2 * Copyright (c) 2008 Joseph Koshy
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
32 #include <sys/pmckern.h>
33 #include <sys/systm.h>
35 #include <machine/specialreg.h>
41 #define TSC_CAPS PMC_CAP_READ
44 struct pmc_descr pm_descr; /* "base class" */
47 static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] =
53 .pd_class = PMC_CLASS_TSC,
61 * Per-CPU data structure for TSCs.
68 static struct tsc_cpu **tsc_pcpu;
71 tsc_allocate_pmc(int cpu, int ri, struct pmc *pm,
72 const struct pmc_op_pmcallocate *a)
76 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
77 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
78 KASSERT(ri >= 0 && ri < TSC_NPMCS,
79 ("[tsc,%d] illegal row index %d", __LINE__, ri));
81 if (a->pm_class != PMC_CLASS_TSC)
84 if ((pm->pm_caps & TSC_CAPS) == 0)
87 if ((pm->pm_caps & ~TSC_CAPS) != 0)
90 if (a->pm_ev != PMC_EV_TSC_TSC ||
91 a->pm_mode != PMC_MODE_SC)
98 tsc_config_pmc(int cpu, int ri, struct pmc *pm)
102 PMCDBG3(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
104 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
105 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
106 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
108 phw = &tsc_pcpu[cpu]->tc_hw;
110 KASSERT(pm == NULL || phw->phw_pmc == NULL,
111 ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__,
120 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
124 const struct tsc_descr *pd;
127 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
128 ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
129 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
131 phw = &tsc_pcpu[cpu]->tc_hw;
132 pd = &tsc_pmcdesc[ri];
134 if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name,
135 PMC_NAME_MAX, &copied)) != 0)
138 pi->pm_class = pd->pm_descr.pd_class;
140 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
141 pi->pm_enabled = TRUE;
142 *ppmc = phw->phw_pmc;
144 pi->pm_enabled = FALSE;
152 tsc_get_config(int cpu, int ri, struct pmc **ppm)
156 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
157 ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
158 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
160 *ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc;
166 tsc_get_msr(int ri, uint32_t *msr)
170 KASSERT(ri >= 0 && ri < TSC_NPMCS,
171 ("[tsc,%d] ri %d out of range", __LINE__, ri));
179 tsc_pcpu_fini(struct pmc_mdep *md, int cpu)
184 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
185 ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
186 KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__));
188 free(tsc_pcpu[cpu], M_PMC);
189 tsc_pcpu[cpu] = NULL;
191 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
194 pc->pc_hwpmcs[ri] = NULL;
200 tsc_pcpu_init(struct pmc_mdep *md, int cpu)
204 struct tsc_cpu *tsc_pc;
207 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
208 ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
209 KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__));
210 KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu",
213 tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO);
215 tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED |
216 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) |
217 PMC_PHW_FLAG_IS_SHAREABLE;
219 tsc_pcpu[cpu] = tsc_pc;
221 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
223 KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__));
227 KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__));
229 pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw;
235 tsc_read_pmc(int cpu, int ri, pmc_value_t *v)
239 const struct pmc_hw *phw;
241 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
242 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
243 KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri));
245 phw = &tsc_pcpu[cpu]->tc_hw;
249 ("[tsc,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri));
251 mode = PMC_TO_MODE(pm);
253 KASSERT(mode == PMC_MODE_SC,
254 ("[tsc,%d] illegal pmc mode %d", __LINE__, mode));
256 PMCDBG1(MDP,REA,1,"tsc-read id=%d", ri);
264 tsc_release_pmc(int cpu, int ri, struct pmc *pmc)
270 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
271 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
273 ("[tsc,%d] illegal row-index %d", __LINE__, ri));
275 phw = &tsc_pcpu[cpu]->tc_hw;
277 KASSERT(phw->phw_pmc == NULL,
278 ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
287 tsc_start_pmc(int cpu, int ri)
291 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
292 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
293 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
295 return (0); /* TSCs are always running. */
299 tsc_stop_pmc(int cpu, int ri)
301 (void) cpu; (void) ri;
303 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
304 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
305 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
307 return (0); /* Cannot actually stop a TSC. */
311 tsc_write_pmc(int cpu, int ri, pmc_value_t v)
313 (void) cpu; (void) ri; (void) v;
315 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
316 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
317 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
320 * The TSCs are used as timecounters by the kernel, so even
321 * though some i386 CPUs support writeable TSCs, we don't
322 * support writing changing TSC values through the HWPMC API.
328 pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu)
330 struct pmc_classdep *pcd;
332 KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__));
333 KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d",
334 __LINE__, md->pmd_nclass));
336 tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC,
339 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC];
341 pcd->pcd_caps = PMC_CAP_READ;
342 pcd->pcd_class = PMC_CLASS_TSC;
343 pcd->pcd_num = TSC_NPMCS;
344 pcd->pcd_ri = md->pmd_npmc;
347 pcd->pcd_allocate_pmc = tsc_allocate_pmc;
348 pcd->pcd_config_pmc = tsc_config_pmc;
349 pcd->pcd_describe = tsc_describe;
350 pcd->pcd_get_config = tsc_get_config;
351 pcd->pcd_get_msr = tsc_get_msr;
352 pcd->pcd_pcpu_init = tsc_pcpu_init;
353 pcd->pcd_pcpu_fini = tsc_pcpu_fini;
354 pcd->pcd_read_pmc = tsc_read_pmc;
355 pcd->pcd_release_pmc = tsc_release_pmc;
356 pcd->pcd_start_pmc = tsc_start_pmc;
357 pcd->pcd_stop_pmc = tsc_stop_pmc;
358 pcd->pcd_write_pmc = tsc_write_pmc;
360 md->pmd_npmc += TSC_NPMCS;
366 pmc_tsc_finalize(struct pmc_mdep *md)
371 ncpus = pmc_cpu_max();
372 for (i = 0; i < ncpus; i++)
373 KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d",
376 KASSERT(md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_class ==
377 PMC_CLASS_TSC, ("[tsc,%d] class mismatch", __LINE__));
383 free(tsc_pcpu, M_PMC);