2 * Copyright (c) 1997-2008 by Matthew Jacob
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice immediately at the beginning of the file, without modification,
10 * this list of conditions, and the following disclaimer.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/linker.h>
38 #include <sys/firmware.h>
40 #include <sys/stdint.h>
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
46 #include <sys/malloc.h>
50 #include <dev/ofw/openfirm.h>
51 #include <machine/ofw_machdep.h>
54 #include <dev/isp/isp_freebsd.h>
56 static uint32_t isp_pci_rd_reg(ispsoftc_t *, int);
57 static void isp_pci_wr_reg(ispsoftc_t *, int, uint32_t);
58 static uint32_t isp_pci_rd_reg_1080(ispsoftc_t *, int);
59 static void isp_pci_wr_reg_1080(ispsoftc_t *, int, uint32_t);
60 static uint32_t isp_pci_rd_reg_2400(ispsoftc_t *, int);
61 static void isp_pci_wr_reg_2400(ispsoftc_t *, int, uint32_t);
62 static int isp_pci_rd_isr(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
63 static int isp_pci_rd_isr_2300(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
64 static int isp_pci_rd_isr_2400(ispsoftc_t *, uint32_t *, uint16_t *, uint16_t *);
65 static int isp_pci_mbxdma(ispsoftc_t *);
66 static int isp_pci_dmasetup(ispsoftc_t *, XS_T *, void *);
69 static void isp_pci_reset0(ispsoftc_t *);
70 static void isp_pci_reset1(ispsoftc_t *);
71 static void isp_pci_dumpregs(ispsoftc_t *, const char *);
73 static struct ispmdvec mdvec = {
79 isp_common_dmateardown,
84 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
87 static struct ispmdvec mdvec_1080 = {
93 isp_common_dmateardown,
98 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
101 static struct ispmdvec mdvec_12160 = {
107 isp_common_dmateardown,
112 BIU_BURST_ENABLE|BIU_PCI_CONF1_FIFO_64
115 static struct ispmdvec mdvec_2100 = {
121 isp_common_dmateardown,
127 static struct ispmdvec mdvec_2200 = {
133 isp_common_dmateardown,
139 static struct ispmdvec mdvec_2300 = {
145 isp_common_dmateardown,
151 static struct ispmdvec mdvec_2400 = {
157 isp_common_dmateardown,
163 static struct ispmdvec mdvec_2500 = {
169 isp_common_dmateardown,
175 #ifndef PCIM_CMD_INVEN
176 #define PCIM_CMD_INVEN 0x10
178 #ifndef PCIM_CMD_BUSMASTEREN
179 #define PCIM_CMD_BUSMASTEREN 0x0004
181 #ifndef PCIM_CMD_PERRESPEN
182 #define PCIM_CMD_PERRESPEN 0x0040
184 #ifndef PCIM_CMD_SEREN
185 #define PCIM_CMD_SEREN 0x0100
187 #ifndef PCIM_CMD_INTX_DISABLE
188 #define PCIM_CMD_INTX_DISABLE 0x0400
192 #define PCIR_COMMAND 0x04
195 #ifndef PCIR_CACHELNSZ
196 #define PCIR_CACHELNSZ 0x0c
199 #ifndef PCIR_LATTIMER
200 #define PCIR_LATTIMER 0x0d
204 #define PCIR_ROMADDR 0x30
207 #ifndef PCI_VENDOR_QLOGIC
208 #define PCI_VENDOR_QLOGIC 0x1077
211 #ifndef PCI_PRODUCT_QLOGIC_ISP1020
212 #define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
215 #ifndef PCI_PRODUCT_QLOGIC_ISP1080
216 #define PCI_PRODUCT_QLOGIC_ISP1080 0x1080
219 #ifndef PCI_PRODUCT_QLOGIC_ISP10160
220 #define PCI_PRODUCT_QLOGIC_ISP10160 0x1016
223 #ifndef PCI_PRODUCT_QLOGIC_ISP12160
224 #define PCI_PRODUCT_QLOGIC_ISP12160 0x1216
227 #ifndef PCI_PRODUCT_QLOGIC_ISP1240
228 #define PCI_PRODUCT_QLOGIC_ISP1240 0x1240
231 #ifndef PCI_PRODUCT_QLOGIC_ISP1280
232 #define PCI_PRODUCT_QLOGIC_ISP1280 0x1280
235 #ifndef PCI_PRODUCT_QLOGIC_ISP2100
236 #define PCI_PRODUCT_QLOGIC_ISP2100 0x2100
239 #ifndef PCI_PRODUCT_QLOGIC_ISP2200
240 #define PCI_PRODUCT_QLOGIC_ISP2200 0x2200
243 #ifndef PCI_PRODUCT_QLOGIC_ISP2300
244 #define PCI_PRODUCT_QLOGIC_ISP2300 0x2300
247 #ifndef PCI_PRODUCT_QLOGIC_ISP2312
248 #define PCI_PRODUCT_QLOGIC_ISP2312 0x2312
251 #ifndef PCI_PRODUCT_QLOGIC_ISP2322
252 #define PCI_PRODUCT_QLOGIC_ISP2322 0x2322
255 #ifndef PCI_PRODUCT_QLOGIC_ISP2422
256 #define PCI_PRODUCT_QLOGIC_ISP2422 0x2422
259 #ifndef PCI_PRODUCT_QLOGIC_ISP2432
260 #define PCI_PRODUCT_QLOGIC_ISP2432 0x2432
263 #ifndef PCI_PRODUCT_QLOGIC_ISP2532
264 #define PCI_PRODUCT_QLOGIC_ISP2532 0x2532
267 #ifndef PCI_PRODUCT_QLOGIC_ISP6312
268 #define PCI_PRODUCT_QLOGIC_ISP6312 0x6312
271 #ifndef PCI_PRODUCT_QLOGIC_ISP6322
272 #define PCI_PRODUCT_QLOGIC_ISP6322 0x6322
276 #define PCI_QLOGIC_ISP1020 \
277 ((PCI_PRODUCT_QLOGIC_ISP1020 << 16) | PCI_VENDOR_QLOGIC)
279 #define PCI_QLOGIC_ISP1080 \
280 ((PCI_PRODUCT_QLOGIC_ISP1080 << 16) | PCI_VENDOR_QLOGIC)
282 #define PCI_QLOGIC_ISP10160 \
283 ((PCI_PRODUCT_QLOGIC_ISP10160 << 16) | PCI_VENDOR_QLOGIC)
285 #define PCI_QLOGIC_ISP12160 \
286 ((PCI_PRODUCT_QLOGIC_ISP12160 << 16) | PCI_VENDOR_QLOGIC)
288 #define PCI_QLOGIC_ISP1240 \
289 ((PCI_PRODUCT_QLOGIC_ISP1240 << 16) | PCI_VENDOR_QLOGIC)
291 #define PCI_QLOGIC_ISP1280 \
292 ((PCI_PRODUCT_QLOGIC_ISP1280 << 16) | PCI_VENDOR_QLOGIC)
294 #define PCI_QLOGIC_ISP2100 \
295 ((PCI_PRODUCT_QLOGIC_ISP2100 << 16) | PCI_VENDOR_QLOGIC)
297 #define PCI_QLOGIC_ISP2200 \
298 ((PCI_PRODUCT_QLOGIC_ISP2200 << 16) | PCI_VENDOR_QLOGIC)
300 #define PCI_QLOGIC_ISP2300 \
301 ((PCI_PRODUCT_QLOGIC_ISP2300 << 16) | PCI_VENDOR_QLOGIC)
303 #define PCI_QLOGIC_ISP2312 \
304 ((PCI_PRODUCT_QLOGIC_ISP2312 << 16) | PCI_VENDOR_QLOGIC)
306 #define PCI_QLOGIC_ISP2322 \
307 ((PCI_PRODUCT_QLOGIC_ISP2322 << 16) | PCI_VENDOR_QLOGIC)
309 #define PCI_QLOGIC_ISP2422 \
310 ((PCI_PRODUCT_QLOGIC_ISP2422 << 16) | PCI_VENDOR_QLOGIC)
312 #define PCI_QLOGIC_ISP2432 \
313 ((PCI_PRODUCT_QLOGIC_ISP2432 << 16) | PCI_VENDOR_QLOGIC)
315 #define PCI_QLOGIC_ISP2532 \
316 ((PCI_PRODUCT_QLOGIC_ISP2532 << 16) | PCI_VENDOR_QLOGIC)
318 #define PCI_QLOGIC_ISP6312 \
319 ((PCI_PRODUCT_QLOGIC_ISP6312 << 16) | PCI_VENDOR_QLOGIC)
321 #define PCI_QLOGIC_ISP6322 \
322 ((PCI_PRODUCT_QLOGIC_ISP6322 << 16) | PCI_VENDOR_QLOGIC)
325 * Odd case for some AMI raid cards... We need to *not* attach to this.
327 #define AMI_RAID_SUBVENDOR_ID 0x101e
329 #define IO_MAP_REG 0x10
330 #define MEM_MAP_REG 0x14
332 #define PCI_DFLT_LTNCY 0x40
333 #define PCI_DFLT_LNSZ 0x10
335 static int isp_pci_probe (device_t);
336 static int isp_pci_attach (device_t);
337 static int isp_pci_detach (device_t);
340 #define ISP_PCD(isp) ((struct isp_pcisoftc *)isp)->pci_dev
341 struct isp_pcisoftc {
344 struct resource * pci_reg;
346 int16_t pci_poff[_NREG_BLKS];
352 static device_method_t isp_pci_methods[] = {
353 /* Device interface */
354 DEVMETHOD(device_probe, isp_pci_probe),
355 DEVMETHOD(device_attach, isp_pci_attach),
356 DEVMETHOD(device_detach, isp_pci_detach),
360 static driver_t isp_pci_driver = {
361 "isp", isp_pci_methods, sizeof (struct isp_pcisoftc)
363 static devclass_t isp_devclass;
364 DRIVER_MODULE(isp, pci, isp_pci_driver, isp_devclass, 0, 0);
367 isp_pci_probe(device_t dev)
369 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
370 case PCI_QLOGIC_ISP1020:
371 device_set_desc(dev, "Qlogic ISP 1020/1040 PCI SCSI Adapter");
373 case PCI_QLOGIC_ISP1080:
374 device_set_desc(dev, "Qlogic ISP 1080 PCI SCSI Adapter");
376 case PCI_QLOGIC_ISP1240:
377 device_set_desc(dev, "Qlogic ISP 1240 PCI SCSI Adapter");
379 case PCI_QLOGIC_ISP1280:
380 device_set_desc(dev, "Qlogic ISP 1280 PCI SCSI Adapter");
382 case PCI_QLOGIC_ISP10160:
383 device_set_desc(dev, "Qlogic ISP 10160 PCI SCSI Adapter");
385 case PCI_QLOGIC_ISP12160:
386 if (pci_get_subvendor(dev) == AMI_RAID_SUBVENDOR_ID) {
389 device_set_desc(dev, "Qlogic ISP 12160 PCI SCSI Adapter");
391 case PCI_QLOGIC_ISP2100:
392 device_set_desc(dev, "Qlogic ISP 2100 PCI FC-AL Adapter");
394 case PCI_QLOGIC_ISP2200:
395 device_set_desc(dev, "Qlogic ISP 2200 PCI FC-AL Adapter");
397 case PCI_QLOGIC_ISP2300:
398 device_set_desc(dev, "Qlogic ISP 2300 PCI FC-AL Adapter");
400 case PCI_QLOGIC_ISP2312:
401 device_set_desc(dev, "Qlogic ISP 2312 PCI FC-AL Adapter");
403 case PCI_QLOGIC_ISP2322:
404 device_set_desc(dev, "Qlogic ISP 2322 PCI FC-AL Adapter");
406 case PCI_QLOGIC_ISP2422:
407 device_set_desc(dev, "Qlogic ISP 2422 PCI FC-AL Adapter");
409 case PCI_QLOGIC_ISP2432:
410 device_set_desc(dev, "Qlogic ISP 2432 PCI FC-AL Adapter");
412 case PCI_QLOGIC_ISP2532:
413 device_set_desc(dev, "Qlogic ISP 2532 PCI FC-AL Adapter");
415 case PCI_QLOGIC_ISP6312:
416 device_set_desc(dev, "Qlogic ISP 6312 PCI FC-AL Adapter");
418 case PCI_QLOGIC_ISP6322:
419 device_set_desc(dev, "Qlogic ISP 6322 PCI FC-AL Adapter");
424 if (isp_announced == 0 && bootverbose) {
425 printf("Qlogic ISP Driver, FreeBSD Version %d.%d, "
426 "Core Version %d.%d\n",
427 ISP_PLATFORM_VERSION_MAJOR, ISP_PLATFORM_VERSION_MINOR,
428 ISP_CORE_VERSION_MAJOR, ISP_CORE_VERSION_MINOR);
432 * XXXX: Here is where we might load the f/w module
433 * XXXX: (or increase a reference count to it).
435 return (BUS_PROBE_DEFAULT);
439 isp_get_generic_options(device_t dev, ispsoftc_t *isp, int *nvp)
444 * Figure out if we're supposed to skip this one.
447 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "disable", &tval) == 0 && tval) {
448 device_printf(dev, "disabled at user request\n");
449 isp->isp_osinfo.disabled = 1;
454 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fwload_disable", &tval) == 0 && tval != 0) {
455 isp->isp_confopts |= ISP_CFG_NORELOAD;
458 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "ignore_nvram", &tval) == 0 && tval != 0) {
459 isp->isp_confopts |= ISP_CFG_NONVRAM;
462 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "debug", &tval);
464 isp->isp_dblev = tval;
466 isp->isp_dblev = ISP_LOGWARN|ISP_LOGERR;
469 isp->isp_dblev |= ISP_LOGCONFIG|ISP_LOGINFO;
471 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "vports", &tval);
472 if (tval > 0 && tval < 127) {
478 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "autoconfig", &tval);
479 isp_autoconfig = tval;
481 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "quickboot_time", &tval);
482 isp_quickboot_time = tval;
485 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "forcemulti", &tval) == 0 && tval != 0) {
486 isp->isp_osinfo.forcemulti = 1;
491 isp_get_pci_options(device_t dev, int *m1, int *m2)
495 * Which we should try first - memory mapping or i/o mapping?
497 * We used to try memory first followed by i/o on alpha, otherwise
498 * the reverse, but we should just try memory first all the time now.
500 *m1 = PCIM_CMD_MEMEN;
501 *m2 = PCIM_CMD_PORTEN;
504 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_iomap", &tval) == 0 && tval != 0) {
505 *m1 = PCIM_CMD_PORTEN;
506 *m2 = PCIM_CMD_MEMEN;
509 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "prefer_memmap", &tval) == 0 && tval != 0) {
510 *m1 = PCIM_CMD_MEMEN;
511 *m2 = PCIM_CMD_PORTEN;
516 isp_get_specific_options(device_t dev, int chan, ispsoftc_t *isp)
521 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "iid", &tval)) {
523 ISP_FC_PC(isp, chan)->default_id = 109 - chan;
526 ISP_SPI_PC(isp, chan)->iid = OF_getscsinitid(dev);
528 ISP_SPI_PC(isp, chan)->iid = 7;
533 ISP_FC_PC(isp, chan)->default_id = tval - chan;
535 ISP_SPI_PC(isp, chan)->iid = tval;
537 isp->isp_confopts |= ISP_CFG_OWNLOOPID;
541 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "role", &tval) == 0) {
544 case ISP_ROLE_INITIATOR:
545 case ISP_ROLE_TARGET:
546 case ISP_ROLE_INITIATOR|ISP_ROLE_TARGET:
547 device_printf(dev, "setting role to 0x%x\n", tval);
555 tval = ISP_DEFAULT_ROLES;
559 ISP_SPI_PC(isp, chan)->def_role = tval;
562 ISP_FC_PC(isp, chan)->def_role = tval;
565 if (resource_int_value(device_get_name(dev), device_get_unit(dev), "fullduplex", &tval) == 0 && tval != 0) {
566 isp->isp_confopts |= ISP_CFG_FULL_DUPLEX;
569 if (resource_string_value(device_get_name(dev), device_get_unit(dev), "topology", (const char **) &sptr) == 0 && sptr != 0) {
570 if (strcmp(sptr, "lport") == 0) {
571 isp->isp_confopts |= ISP_CFG_LPORT;
572 } else if (strcmp(sptr, "nport") == 0) {
573 isp->isp_confopts |= ISP_CFG_NPORT;
574 } else if (strcmp(sptr, "lport-only") == 0) {
575 isp->isp_confopts |= ISP_CFG_LPORT_ONLY;
576 } else if (strcmp(sptr, "nport-only") == 0) {
577 isp->isp_confopts |= ISP_CFG_NPORT_ONLY;
582 * Because the resource_*_value functions can neither return
583 * 64 bit integer values, nor can they be directly coerced
584 * to interpret the right hand side of the assignment as
585 * you want them to interpret it, we have to force WWN
586 * hint replacement to specify WWN strings with a leading
587 * 'w' (e..g w50000000aaaa0001). Sigh.
590 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), "portwwn", (const char **) &sptr);
591 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
593 ISP_FC_PC(isp, chan)->def_wwpn = strtouq(sptr, &eptr, 16);
594 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwpn == -1) {
595 device_printf(dev, "mangled portwwn hint '%s'\n", sptr);
596 ISP_FC_PC(isp, chan)->def_wwpn = 0;
601 tval = resource_string_value(device_get_name(dev), device_get_unit(dev), "nodewwn", (const char **) &sptr);
602 if (tval == 0 && sptr != 0 && *sptr++ == 'w') {
604 ISP_FC_PC(isp, chan)->def_wwnn = strtouq(sptr, &eptr, 16);
605 if (eptr < sptr + 16 || ISP_FC_PC(isp, chan)->def_wwnn == 0) {
606 device_printf(dev, "mangled nodewwn hint '%s'\n", sptr);
607 ISP_FC_PC(isp, chan)->def_wwnn = 0;
612 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "hysteresis", &tval);
613 if (tval >= 0 && tval < 256) {
614 ISP_FC_PC(isp, chan)->hysteresis = tval;
616 ISP_FC_PC(isp, chan)->hysteresis = isp_fabric_hysteresis;
620 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "loop_down_limit", &tval);
621 if (tval >= 0 && tval < 0xffff) {
622 ISP_FC_PC(isp, chan)->loop_down_limit = tval;
624 ISP_FC_PC(isp, chan)->loop_down_limit = isp_loop_down_limit;
628 (void) resource_int_value(device_get_name(dev), device_get_unit(dev), "gone_device_time", &tval);
629 if (tval >= 0 && tval < 0xffff) {
630 ISP_FC_PC(isp, chan)->gone_device_time = tval;
632 ISP_FC_PC(isp, chan)->gone_device_time = isp_gone_device_time;
637 isp_pci_attach(device_t dev)
639 struct resource *regs, *irq;
640 int rtp, rgd, iqd, i, m1, m2, locksetup = 0;
642 uint32_t data, cmd, linesz, did;
643 struct isp_pcisoftc *pcs;
644 ispsoftc_t *isp = NULL;
648 pcs = device_get_softc(dev);
650 device_printf(dev, "cannot get softc\n");
653 memset(pcs, 0, sizeof (*pcs));
661 * Get Generic Options
663 isp_get_generic_options(dev, isp, &isp_nvports);
666 * Check to see if options have us disabled
668 if (isp->isp_osinfo.disabled) {
670 * But return zero to preserve unit numbering
676 * Get PCI options- which in this case are just mapping preferences.
678 isp_get_pci_options(dev, &m1, &m2);
680 linesz = PCI_DFLT_LNSZ;
684 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
686 rtp = (m1 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
687 rgd = (m1 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
688 regs = bus_alloc_resource_any(dev, rtp, &rgd, RF_ACTIVE);
690 if (regs == NULL && (cmd & m2)) {
691 rtp = (m2 == PCIM_CMD_MEMEN)? SYS_RES_MEMORY : SYS_RES_IOPORT;
692 rgd = (m2 == PCIM_CMD_MEMEN)? MEM_MAP_REG : IO_MAP_REG;
693 regs = bus_alloc_resource_any(dev, rtp, &rgd, RF_ACTIVE);
696 device_printf(dev, "unable to map any ports\n");
700 device_printf(dev, "using %s space register mapping\n", (rgd == IO_MAP_REG)? "I/O" : "Memory");
702 isp->isp_bus_tag = rman_get_bustag(regs);
703 isp->isp_bus_handle = rman_get_bushandle(regs);
707 pcs->pci_poff[BIU_BLOCK >> _BLK_REG_SHFT] = BIU_REGS_OFF;
708 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS_OFF;
709 pcs->pci_poff[SXP_BLOCK >> _BLK_REG_SHFT] = PCI_SXP_REGS_OFF;
710 pcs->pci_poff[RISC_BLOCK >> _BLK_REG_SHFT] = PCI_RISC_REGS_OFF;
711 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = DMA_REGS_OFF;
713 switch (pci_get_devid(dev)) {
714 case PCI_QLOGIC_ISP1020:
716 isp->isp_mdvec = &mdvec;
717 isp->isp_type = ISP_HA_SCSI_UNKNOWN;
719 case PCI_QLOGIC_ISP1080:
721 isp->isp_mdvec = &mdvec_1080;
722 isp->isp_type = ISP_HA_SCSI_1080;
723 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
725 case PCI_QLOGIC_ISP1240:
727 isp->isp_mdvec = &mdvec_1080;
728 isp->isp_type = ISP_HA_SCSI_1240;
730 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
732 case PCI_QLOGIC_ISP1280:
734 isp->isp_mdvec = &mdvec_1080;
735 isp->isp_type = ISP_HA_SCSI_1280;
736 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
738 case PCI_QLOGIC_ISP10160:
740 isp->isp_mdvec = &mdvec_12160;
741 isp->isp_type = ISP_HA_SCSI_10160;
742 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
744 case PCI_QLOGIC_ISP12160:
747 isp->isp_mdvec = &mdvec_12160;
748 isp->isp_type = ISP_HA_SCSI_12160;
749 pcs->pci_poff[DMA_BLOCK >> _BLK_REG_SHFT] = ISP1080_DMA_REGS_OFF;
751 case PCI_QLOGIC_ISP2100:
753 isp->isp_mdvec = &mdvec_2100;
754 isp->isp_type = ISP_HA_FC_2100;
755 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
756 if (pci_get_revid(dev) < 3) {
758 * XXX: Need to get the actual revision
759 * XXX: number of the 2100 FB. At any rate,
760 * XXX: lower cache line size for early revision
766 case PCI_QLOGIC_ISP2200:
768 isp->isp_mdvec = &mdvec_2200;
769 isp->isp_type = ISP_HA_FC_2200;
770 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2100_OFF;
772 case PCI_QLOGIC_ISP2300:
774 isp->isp_mdvec = &mdvec_2300;
775 isp->isp_type = ISP_HA_FC_2300;
776 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
778 case PCI_QLOGIC_ISP2312:
779 case PCI_QLOGIC_ISP6312:
781 isp->isp_mdvec = &mdvec_2300;
782 isp->isp_type = ISP_HA_FC_2312;
783 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
785 case PCI_QLOGIC_ISP2322:
786 case PCI_QLOGIC_ISP6322:
788 isp->isp_mdvec = &mdvec_2300;
789 isp->isp_type = ISP_HA_FC_2322;
790 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2300_OFF;
792 case PCI_QLOGIC_ISP2422:
793 case PCI_QLOGIC_ISP2432:
795 isp->isp_nchan += isp_nvports;
796 isp->isp_mdvec = &mdvec_2400;
797 isp->isp_type = ISP_HA_FC_2400;
798 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
800 case PCI_QLOGIC_ISP2532:
802 isp->isp_nchan += isp_nvports;
803 isp->isp_mdvec = &mdvec_2500;
804 isp->isp_type = ISP_HA_FC_2500;
805 pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] = PCI_MBOX_REGS2400_OFF;
808 device_printf(dev, "unknown device type\n");
812 isp->isp_revision = pci_get_revid(dev);
815 psize = sizeof (fcparam);
816 xsize = sizeof (struct isp_fc);
818 psize = sizeof (sdparam);
819 xsize = sizeof (struct isp_spi);
821 psize *= isp->isp_nchan;
822 xsize *= isp->isp_nchan;
823 isp->isp_param = malloc(psize, M_DEVBUF, M_NOWAIT | M_ZERO);
824 if (isp->isp_param == NULL) {
825 device_printf(dev, "cannot allocate parameter data\n");
828 isp->isp_osinfo.pc.ptr = malloc(xsize, M_DEVBUF, M_NOWAIT | M_ZERO);
829 if (isp->isp_osinfo.pc.ptr == NULL) {
830 device_printf(dev, "cannot allocate parameter data\n");
835 * Now that we know who we are (roughly) get/set specific options
837 for (i = 0; i < isp->isp_nchan; i++) {
838 isp_get_specific_options(dev, i, isp);
842 * The 'it' suffix really only matters for SCSI cards in target mode.
844 isp->isp_osinfo.fw = NULL;
845 if (IS_SCSI(isp) && (ISP_SPI_PC(isp, 0)->def_role & ISP_ROLE_TARGET)) {
846 snprintf(fwname, sizeof (fwname), "isp_%04x_it", did);
847 isp->isp_osinfo.fw = firmware_get(fwname);
848 } else if (IS_24XX(isp) && (isp->isp_nchan > 1 || isp->isp_osinfo.forcemulti)) {
849 snprintf(fwname, sizeof (fwname), "isp_%04x_multi", did);
850 isp->isp_osinfo.fw = firmware_get(fwname);
852 if (isp->isp_osinfo.fw == NULL) {
853 snprintf(fwname, sizeof (fwname), "isp_%04x", did);
854 isp->isp_osinfo.fw = firmware_get(fwname);
856 if (isp->isp_osinfo.fw != NULL) {
857 isp->isp_mdvec->dv_ispfw = isp->isp_osinfo.fw->data;
861 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER
864 cmd |= PCIM_CMD_SEREN | PCIM_CMD_PERRESPEN |
865 PCIM_CMD_BUSMASTEREN | PCIM_CMD_INVEN;
867 if (IS_2300(isp)) { /* per QLogic errata */
868 cmd &= ~PCIM_CMD_INVEN;
871 if (IS_2322(isp) || pci_get_devid(dev) == PCI_QLOGIC_ISP6312) {
872 cmd &= ~PCIM_CMD_INTX_DISABLE;
876 cmd &= ~PCIM_CMD_INTX_DISABLE;
879 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
882 * Make sure the Cache Line Size register is set sensibly.
884 data = pci_read_config(dev, PCIR_CACHELNSZ, 1);
885 if (data == 0 || (linesz != PCI_DFLT_LNSZ && data != linesz)) {
886 isp_prt(isp, ISP_LOGCONFIG, "set PCI line size to %d from %d", linesz, data);
888 pci_write_config(dev, PCIR_CACHELNSZ, data, 1);
892 * Make sure the Latency Timer is sane.
894 data = pci_read_config(dev, PCIR_LATTIMER, 1);
895 if (data < PCI_DFLT_LTNCY) {
896 data = PCI_DFLT_LTNCY;
897 isp_prt(isp, ISP_LOGCONFIG, "set PCI latency to %d", data);
898 pci_write_config(dev, PCIR_LATTIMER, data, 1);
902 * Make sure we've disabled the ROM.
904 data = pci_read_config(dev, PCIR_ROMADDR, 4);
906 pci_write_config(dev, PCIR_ROMADDR, data, 4);
911 * NB: MSI-X needs to be disabled for the 2432 (PCI-Express)
913 if (IS_24XX(isp) || IS_2322(isp)) {
914 pcs->msicount = pci_msi_count(dev);
915 if (pcs->msicount > 1) {
918 if (pci_alloc_msi(dev, &pcs->msicount) == 0) {
924 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd, RF_ACTIVE | RF_SHAREABLE);
926 device_printf(dev, "could not allocate interrupt\n");
930 /* Make sure the lock is set up. */
931 mtx_init(&isp->isp_osinfo.lock, "isp", NULL, MTX_DEF);
934 if (isp_setup_intr(dev, irq, ISP_IFLAGS, NULL, isp_platform_intr, isp, &pcs->ih)) {
935 device_printf(dev, "could not setup interrupt\n");
940 * Last minute checks...
942 if (IS_23XX(isp) || IS_24XX(isp)) {
943 isp->isp_port = pci_get_function(dev);
947 * Make sure we're in reset state.
951 if (isp->isp_state != ISP_RESETSTATE) {
956 if (isp->isp_state == ISP_INITSTATE) {
957 isp->isp_state = ISP_RUNSTATE;
960 if (isp_attach(isp)) {
969 if (pcs && pcs->ih) {
970 (void) bus_teardown_intr(dev, irq, pcs->ih);
972 if (locksetup && isp) {
973 mtx_destroy(&isp->isp_osinfo.lock);
976 (void) bus_release_resource(dev, SYS_RES_IRQ, iqd, irq);
978 if (pcs && pcs->msicount) {
979 pci_release_msi(dev);
982 (void) bus_release_resource(dev, rtp, rgd, regs);
985 if (pcs->pci_isp.isp_param) {
986 free(pcs->pci_isp.isp_param, M_DEVBUF);
987 pcs->pci_isp.isp_param = NULL;
989 if (pcs->pci_isp.isp_osinfo.pc.ptr) {
990 free(pcs->pci_isp.isp_osinfo.pc.ptr, M_DEVBUF);
991 pcs->pci_isp.isp_osinfo.pc.ptr = NULL;
998 isp_pci_detach(device_t dev)
1000 struct isp_pcisoftc *pcs;
1003 pcs = device_get_softc(dev);
1007 isp = (ispsoftc_t *) pcs;
1008 ISP_DISABLE_INTS(isp);
1009 mtx_destroy(&isp->isp_osinfo.lock);
1013 #define IspVirt2Off(a, x) \
1014 (((struct isp_pcisoftc *)a)->pci_poff[((x) & _BLK_REG_MASK) >> \
1015 _BLK_REG_SHFT] + ((x) & 0xfff))
1017 #define BXR2(isp, off) \
1018 bus_space_read_2(isp->isp_bus_tag, isp->isp_bus_handle, off)
1019 #define BXW2(isp, off, v) \
1020 bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1021 #define BXR4(isp, off) \
1022 bus_space_read_4(isp->isp_bus_tag, isp->isp_bus_handle, off)
1023 #define BXW4(isp, off, v) \
1024 bus_space_write_4(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
1027 static ISP_INLINE int
1028 isp_pci_rd_debounced(ispsoftc_t *isp, int off, uint16_t *rp)
1030 uint32_t val0, val1;
1034 val0 = BXR2(isp, IspVirt2Off(isp, off));
1035 val1 = BXR2(isp, IspVirt2Off(isp, off));
1036 } while (val0 != val1 && ++i < 1000);
1045 isp_pci_rd_isr(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbp)
1050 if (isp_pci_rd_debounced(isp, BIU_ISR, &isr)) {
1053 if (isp_pci_rd_debounced(isp, BIU_SEMA, &sema)) {
1057 isr = BXR2(isp, IspVirt2Off(isp, BIU_ISR));
1058 sema = BXR2(isp, IspVirt2Off(isp, BIU_SEMA));
1060 isp_prt(isp, ISP_LOGDEBUG3, "ISR 0x%x SEMA 0x%x", isr, sema);
1061 isr &= INT_PENDING_MASK(isp);
1062 sema &= BIU_SEMA_LOCK;
1063 if (isr == 0 && sema == 0) {
1067 if ((*semap = sema) != 0) {
1069 if (isp_pci_rd_debounced(isp, OUTMAILBOX0, mbp)) {
1073 *mbp = BXR2(isp, IspVirt2Off(isp, OUTMAILBOX0));
1080 isp_pci_rd_isr_2300(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p)
1085 if (!(BXR2(isp, IspVirt2Off(isp, BIU_ISR) & BIU2100_ISR_RISC_INT))) {
1089 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU_R2HSTSLO));
1090 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1091 if ((r2hisr & BIU_R2HST_INTR) == 0) {
1095 switch (r2hisr & BIU_R2HST_ISTAT_MASK) {
1096 case ISPR2HST_ROM_MBX_OK:
1097 case ISPR2HST_ROM_MBX_FAIL:
1098 case ISPR2HST_MBX_OK:
1099 case ISPR2HST_MBX_FAIL:
1100 case ISPR2HST_ASYNC_EVENT:
1101 *isrp = r2hisr & 0xffff;
1102 *mbox0p = (r2hisr >> 16);
1105 case ISPR2HST_RIO_16:
1106 *isrp = r2hisr & 0xffff;
1107 *mbox0p = ASYNC_RIO16_1;
1110 case ISPR2HST_FPOST:
1111 *isrp = r2hisr & 0xffff;
1112 *mbox0p = ASYNC_CMD_CMPLT;
1115 case ISPR2HST_FPOST_CTIO:
1116 *isrp = r2hisr & 0xffff;
1117 *mbox0p = ASYNC_CTIO_DONE;
1120 case ISPR2HST_RSPQ_UPDATE:
1121 *isrp = r2hisr & 0xffff;
1126 hccr = ISP_READ(isp, HCCR);
1127 if (hccr & HCCR_PAUSE) {
1128 ISP_WRITE(isp, HCCR, HCCR_RESET);
1129 isp_prt(isp, ISP_LOGERR, "RISC paused at interrupt (%x->%x)", hccr, ISP_READ(isp, HCCR));
1130 ISP_WRITE(isp, BIU_ICR, 0);
1132 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1139 isp_pci_rd_isr_2400(ispsoftc_t *isp, uint32_t *isrp, uint16_t *semap, uint16_t *mbox0p)
1143 r2hisr = BXR4(isp, IspVirt2Off(isp, BIU2400_R2HSTSLO));
1144 isp_prt(isp, ISP_LOGDEBUG3, "RISC2HOST ISR 0x%x", r2hisr);
1145 if ((r2hisr & BIU2400_R2HST_INTR) == 0) {
1149 switch (r2hisr & BIU2400_R2HST_ISTAT_MASK) {
1150 case ISP2400R2HST_ROM_MBX_OK:
1151 case ISP2400R2HST_ROM_MBX_FAIL:
1152 case ISP2400R2HST_MBX_OK:
1153 case ISP2400R2HST_MBX_FAIL:
1154 case ISP2400R2HST_ASYNC_EVENT:
1155 *isrp = r2hisr & 0xffff;
1156 *mbox0p = (r2hisr >> 16);
1159 case ISP2400R2HST_RSPQ_UPDATE:
1160 case ISP2400R2HST_ATIO_RSPQ_UPDATE:
1161 case ISP2400R2HST_ATIO_RQST_UPDATE:
1162 *isrp = r2hisr & 0xffff;
1167 ISP_WRITE(isp, BIU2400_HCCR, HCCR_2400_CMD_CLEAR_RISC_INT);
1168 isp_prt(isp, ISP_LOGERR, "unknown interrupt 0x%x\n", r2hisr);
1174 isp_pci_rd_reg(ispsoftc_t *isp, int regoff)
1179 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1181 * We will assume that someone has paused the RISC processor.
1183 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1184 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf | BIU_PCI_CONF1_SXP);
1185 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1187 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1188 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1189 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1190 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1196 isp_pci_wr_reg(ispsoftc_t *isp, int regoff, uint32_t val)
1200 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1202 * We will assume that someone has paused the RISC processor.
1204 oldconf = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1205 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1206 oldconf | BIU_PCI_CONF1_SXP);
1207 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1209 BXW2(isp, IspVirt2Off(isp, regoff), val);
1210 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
1211 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK) {
1212 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oldconf);
1213 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1219 isp_pci_rd_reg_1080(ispsoftc_t *isp, int regoff)
1221 uint32_t rv, oc = 0;
1223 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1224 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1227 * We will assume that someone has paused the RISC processor.
1229 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1230 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1231 if (regoff & SXP_BANK1_SELECT)
1232 tc |= BIU_PCI1080_CONF1_SXP1;
1234 tc |= BIU_PCI1080_CONF1_SXP0;
1235 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1236 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1237 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1238 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1239 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1240 oc | BIU_PCI1080_CONF1_DMA);
1241 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1243 rv = BXR2(isp, IspVirt2Off(isp, regoff));
1245 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1246 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1252 isp_pci_wr_reg_1080(ispsoftc_t *isp, int regoff, uint32_t val)
1256 if ((regoff & _BLK_REG_MASK) == SXP_BLOCK ||
1257 (regoff & _BLK_REG_MASK) == (SXP_BLOCK|SXP_BANK1_SELECT)) {
1260 * We will assume that someone has paused the RISC processor.
1262 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1263 tc = oc & ~BIU_PCI1080_CONF1_DMA;
1264 if (regoff & SXP_BANK1_SELECT)
1265 tc |= BIU_PCI1080_CONF1_SXP1;
1267 tc |= BIU_PCI1080_CONF1_SXP0;
1268 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), tc);
1269 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1270 } else if ((regoff & _BLK_REG_MASK) == DMA_BLOCK) {
1271 oc = BXR2(isp, IspVirt2Off(isp, BIU_CONF1));
1272 BXW2(isp, IspVirt2Off(isp, BIU_CONF1),
1273 oc | BIU_PCI1080_CONF1_DMA);
1274 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1276 BXW2(isp, IspVirt2Off(isp, regoff), val);
1277 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
1279 BXW2(isp, IspVirt2Off(isp, BIU_CONF1), oc);
1280 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, BIU_CONF1), 2);
1285 isp_pci_rd_reg_2400(ispsoftc_t *isp, int regoff)
1288 int block = regoff & _BLK_REG_MASK;
1294 return (BXR2(isp, IspVirt2Off(isp, regoff)));
1296 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK read at 0x%x", regoff);
1297 return (0xffffffff);
1299 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK read at 0x%x", regoff);
1300 return (0xffffffff);
1302 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK read at 0x%x", regoff);
1303 return (0xffffffff);
1305 isp_prt(isp, ISP_LOGWARN, "unknown block read at 0x%x", regoff);
1306 return (0xffffffff);
1311 case BIU2400_FLASH_ADDR:
1312 case BIU2400_FLASH_DATA:
1316 case BIU2400_REQINP:
1317 case BIU2400_REQOUTP:
1318 case BIU2400_RSPINP:
1319 case BIU2400_RSPOUTP:
1320 case BIU2400_PRI_REQINP:
1321 case BIU2400_PRI_REQOUTP:
1322 case BIU2400_ATIO_RSPINP:
1323 case BIU2400_ATIO_RSPOUTP:
1328 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1330 case BIU2400_R2HSTSLO:
1331 rv = BXR4(isp, IspVirt2Off(isp, regoff));
1333 case BIU2400_R2HSTSHI:
1334 rv = BXR4(isp, IspVirt2Off(isp, regoff)) >> 16;
1337 isp_prt(isp, ISP_LOGERR,
1338 "isp_pci_rd_reg_2400: unknown offset %x", regoff);
1346 isp_pci_wr_reg_2400(ispsoftc_t *isp, int regoff, uint32_t val)
1348 int block = regoff & _BLK_REG_MASK;
1354 BXW2(isp, IspVirt2Off(isp, regoff), val);
1355 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 2);
1358 isp_prt(isp, ISP_LOGWARN, "SXP_BLOCK write at 0x%x", regoff);
1361 isp_prt(isp, ISP_LOGWARN, "RISC_BLOCK write at 0x%x", regoff);
1364 isp_prt(isp, ISP_LOGWARN, "DMA_BLOCK write at 0x%x", regoff);
1367 isp_prt(isp, ISP_LOGWARN, "unknown block write at 0x%x",
1373 case BIU2400_FLASH_ADDR:
1374 case BIU2400_FLASH_DATA:
1378 case BIU2400_REQINP:
1379 case BIU2400_REQOUTP:
1380 case BIU2400_RSPINP:
1381 case BIU2400_RSPOUTP:
1382 case BIU2400_PRI_REQINP:
1383 case BIU2400_PRI_REQOUTP:
1384 case BIU2400_ATIO_RSPINP:
1385 case BIU2400_ATIO_RSPOUTP:
1390 BXW4(isp, IspVirt2Off(isp, regoff), val);
1391 MEMORYBARRIER(isp, SYNC_REG, IspVirt2Off(isp, regoff), 4);
1394 isp_prt(isp, ISP_LOGERR,
1395 "isp_pci_wr_reg_2400: bad offset 0x%x", regoff);
1408 static void imc(void *, bus_dma_segment_t *, int, int);
1409 static void imc1(void *, bus_dma_segment_t *, int, int);
1412 imc(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1414 struct imush *imushp = (struct imush *) arg;
1417 imushp->error = error;
1421 imushp->error = EINVAL;
1424 imushp->isp->isp_rquest = imushp->vbase;
1425 imushp->isp->isp_rquest_dma = segs->ds_addr;
1426 segs->ds_addr += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1427 imushp->vbase += ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(imushp->isp));
1428 imushp->isp->isp_result_dma = segs->ds_addr;
1429 imushp->isp->isp_result = imushp->vbase;
1431 #ifdef ISP_TARGET_MODE
1432 if (IS_24XX(imushp->isp)) {
1433 segs->ds_addr += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1434 imushp->vbase += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(imushp->isp));
1435 imushp->isp->isp_atioq_dma = segs->ds_addr;
1436 imushp->isp->isp_atioq = imushp->vbase;
1442 imc1(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1444 struct imush *imushp = (struct imush *) arg;
1446 imushp->error = error;
1450 imushp->error = EINVAL;
1453 FCPARAM(imushp->isp, imushp->chan)->isp_scdma = segs->ds_addr;
1454 FCPARAM(imushp->isp, imushp->chan)->isp_scratch = imushp->vbase;
1458 isp_pci_mbxdma(ispsoftc_t *isp)
1462 int i, error, ns, cmap = 0;
1463 bus_size_t slim; /* segment size */
1464 bus_addr_t llim; /* low limit of unavailable dma */
1465 bus_addr_t hlim; /* high limit of unavailable dma */
1469 * Already been here? If so, leave...
1471 if (isp->isp_rquest) {
1476 if (isp->isp_maxcmds == 0) {
1477 isp_prt(isp, ISP_LOGERR, "maxcmds not set");
1482 hlim = BUS_SPACE_MAXADDR;
1483 if (IS_ULTRA2(isp) || IS_FC(isp) || IS_1240(isp)) {
1484 if (sizeof (bus_size_t) > 4) {
1485 slim = (bus_size_t) (1ULL << 32);
1487 slim = (bus_size_t) (1UL << 31);
1489 llim = BUS_SPACE_MAXADDR;
1491 llim = BUS_SPACE_MAXADDR_32BIT;
1495 len = isp->isp_maxcmds * sizeof (struct isp_pcmd);
1496 isp->isp_osinfo.pcmd_pool = (struct isp_pcmd *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1497 if (isp->isp_osinfo.pcmd_pool == NULL) {
1498 isp_prt(isp, ISP_LOGERR, "cannot allocate pcmds");
1504 * XXX: We don't really support 64 bit target mode for parallel scsi yet
1506 #ifdef ISP_TARGET_MODE
1507 if (IS_SCSI(isp) && sizeof (bus_addr_t) > 4) {
1508 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1509 isp_prt(isp, ISP_LOGERR, "we cannot do DAC for SPI cards yet");
1515 if (isp_dma_tag_create(BUS_DMA_ROOTARG(ISP_PCD(isp)), 1, slim, llim, hlim, NULL, NULL, BUS_SPACE_MAXSIZE, ISP_NSEGS, slim, 0, &isp->isp_osinfo.dmat)) {
1516 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1518 isp_prt(isp, ISP_LOGERR, "could not create master dma tag");
1522 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1523 isp->isp_xflist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1524 if (isp->isp_xflist == NULL) {
1525 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1527 isp_prt(isp, ISP_LOGERR, "cannot alloc xflist array");
1530 for (len = 0; len < isp->isp_maxcmds - 1; len++) {
1531 isp->isp_xflist[len].cmd = &isp->isp_xflist[len+1];
1533 isp->isp_xffree = isp->isp_xflist;
1534 #ifdef ISP_TARGET_MODE
1535 len = sizeof (isp_hdl_t) * isp->isp_maxcmds;
1536 isp->isp_tgtlist = (isp_hdl_t *) malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
1537 if (isp->isp_tgtlist == NULL) {
1538 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1539 free(isp->isp_xflist, M_DEVBUF);
1541 isp_prt(isp, ISP_LOGERR, "cannot alloc tgtlist array");
1544 for (len = 0; len < isp->isp_maxcmds - 1; len++) {
1545 isp->isp_tgtlist[len].cmd = &isp->isp_tgtlist[len+1];
1547 isp->isp_tgtfree = isp->isp_tgtlist;
1551 * Allocate and map the request and result queues (and ATIO queue
1552 * if we're a 2400 supporting target mode).
1554 len = ISP_QUEUE_SIZE(RQUEST_QUEUE_LEN(isp));
1555 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1556 #ifdef ISP_TARGET_MODE
1558 len += ISP_QUEUE_SIZE(RESULT_QUEUE_LEN(isp));
1562 ns = (len / PAGE_SIZE) + 1;
1565 * Create a tag for the control spaces. We don't always need this
1566 * to be 32 bits, but we do this for simplicity and speed's sake.
1568 if (isp_dma_tag_create(isp->isp_osinfo.dmat, QENTRY_LEN, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, len, ns, slim, 0, &isp->isp_osinfo.cdmat)) {
1569 isp_prt(isp, ISP_LOGERR, "cannot create a dma tag for control spaces");
1570 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1571 free(isp->isp_xflist, M_DEVBUF);
1572 #ifdef ISP_TARGET_MODE
1573 free(isp->isp_tgtlist, M_DEVBUF);
1579 if (bus_dmamem_alloc(isp->isp_osinfo.cdmat, (void **)&base, BUS_DMA_NOWAIT, &isp->isp_osinfo.cdmap) != 0) {
1580 isp_prt(isp, ISP_LOGERR, "cannot allocate %d bytes of CCB memory", len);
1581 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1582 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1583 free(isp->isp_xflist, M_DEVBUF);
1584 #ifdef ISP_TARGET_MODE
1585 free(isp->isp_tgtlist, M_DEVBUF);
1596 bus_dmamap_load(isp->isp_osinfo.cdmat, isp->isp_osinfo.cdmap, base, len, imc, &im, 0);
1598 isp_prt(isp, ISP_LOGERR, "error %d loading dma map for control areas", im.error);
1603 for (cmap = 0; cmap < isp->isp_nchan; cmap++) {
1604 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1605 if (isp_dma_tag_create(isp->isp_osinfo.dmat, 64, slim, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, ISP_FC_SCRLEN, 1, slim, 0, &fc->tdmat)) {
1608 if (bus_dmamem_alloc(fc->tdmat, (void **)&base, BUS_DMA_NOWAIT, &fc->tdmap) != 0) {
1609 bus_dma_tag_destroy(fc->tdmat);
1616 bus_dmamap_load(fc->tdmat, fc->tdmap, base, ISP_FC_SCRLEN, imc1, &im, 0);
1618 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1619 bus_dma_tag_destroy(fc->tdmat);
1625 for (i = 0; i < isp->isp_maxcmds; i++) {
1626 struct isp_pcmd *pcmd = &isp->isp_osinfo.pcmd_pool[i];
1627 error = bus_dmamap_create(isp->isp_osinfo.dmat, 0, &pcmd->dmap);
1629 isp_prt(isp, ISP_LOGERR, "error %d creating per-cmd DMA maps", error);
1631 bus_dmamap_destroy(isp->isp_osinfo.dmat, isp->isp_osinfo.pcmd_pool[i].dmap);
1635 callout_init_mtx(&pcmd->wdog, &isp->isp_osinfo.lock, 0);
1636 if (i == isp->isp_maxcmds-1) {
1639 pcmd->next = &isp->isp_osinfo.pcmd_pool[i+1];
1642 isp->isp_osinfo.pcmd_free = &isp->isp_osinfo.pcmd_pool[0];
1647 while (--cmap >= 0) {
1648 struct isp_fc *fc = ISP_FC_PC(isp, cmap);
1649 bus_dmamem_free(fc->tdmat, base, fc->tdmap);
1650 bus_dma_tag_destroy(fc->tdmat);
1652 bus_dmamem_free(isp->isp_osinfo.cdmat, base, isp->isp_osinfo.cdmap);
1653 bus_dma_tag_destroy(isp->isp_osinfo.cdmat);
1654 free(isp->isp_xflist, M_DEVBUF);
1655 #ifdef ISP_TARGET_MODE
1656 free(isp->isp_tgtlist, M_DEVBUF);
1658 free(isp->isp_osinfo.pcmd_pool, M_DEVBUF);
1659 isp->isp_rquest = NULL;
1667 void *rq; /* original request */
1672 #define MUSHERR_NOQENTRIES -2
1674 #ifdef ISP_TARGET_MODE
1675 static void tdma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1676 static void tdma2(void *, bus_dma_segment_t *, int, int);
1679 tdma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1683 mp->mapsize = mapsize;
1684 tdma2(arg, dm_segs, nseg, error);
1688 tdma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1692 struct ccb_scsiio *csio;
1696 mp = (mush_t *) arg;
1701 csio = mp->cmd_token;
1705 if (sizeof (bus_addr_t) > 4) {
1706 if (nseg >= ISP_NSEG64_MAX) {
1707 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1711 if (rq->req_header.rqs_entry_type == RQSTYPE_CTIO2) {
1712 rq->req_header.rqs_entry_type = RQSTYPE_CTIO3;
1715 if (nseg >= ISP_NSEG_MAX) {
1716 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1721 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1722 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1723 ddir = ISP_TO_DEVICE;
1724 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1725 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1726 ddir = ISP_FROM_DEVICE;
1736 if (isp_send_tgt_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir, &csio->sense_data, csio->sense_len) != CMD_QUEUED) {
1737 mp->error = MUSHERR_NOQENTRIES;
1742 static void dma2_2(void *, bus_dma_segment_t *, int, bus_size_t, int);
1743 static void dma2(void *, bus_dma_segment_t *, int, int);
1746 dma2_2(void *arg, bus_dma_segment_t *dm_segs, int nseg, bus_size_t mapsize, int error)
1750 mp->mapsize = mapsize;
1751 dma2(arg, dm_segs, nseg, error);
1755 dma2(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1759 struct ccb_scsiio *csio;
1763 mp = (mush_t *) arg;
1768 csio = mp->cmd_token;
1772 if (sizeof (bus_addr_t) > 4) {
1773 if (nseg >= ISP_NSEG64_MAX) {
1774 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG64_MAX);
1778 if (rq->req_header.rqs_entry_type == RQSTYPE_T2RQS) {
1779 rq->req_header.rqs_entry_type = RQSTYPE_T3RQS;
1780 } else if (rq->req_header.rqs_entry_type == RQSTYPE_REQUEST) {
1781 rq->req_header.rqs_entry_type = RQSTYPE_A64;
1784 if (nseg >= ISP_NSEG_MAX) {
1785 isp_prt(isp, ISP_LOGERR, "number of segments (%d) exceed maximum we can support (%d)", nseg, ISP_NSEG_MAX);
1790 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
1791 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREREAD);
1792 ddir = ISP_FROM_DEVICE;
1793 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
1794 bus_dmamap_sync(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, BUS_DMASYNC_PREWRITE);
1795 ddir = ISP_TO_DEVICE;
1805 if (isp_send_cmd(isp, rq, dm_segs, nseg, XS_XFRLEN(csio), ddir) != CMD_QUEUED) {
1806 mp->error = MUSHERR_NOQENTRIES;
1811 isp_pci_dmasetup(ispsoftc_t *isp, struct ccb_scsiio *csio, void *ff)
1814 void (*eptr)(void *, bus_dma_segment_t *, int, int);
1815 void (*eptr2)(void *, bus_dma_segment_t *, int, bus_size_t, int);
1819 mp->cmd_token = csio;
1824 #ifdef ISP_TARGET_MODE
1825 if (csio->ccb_h.func_code == XPT_CONT_TARGET_IO) {
1836 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_NONE || (csio->dxfer_len == 0)) {
1837 (*eptr)(mp, NULL, 0, 0);
1838 } else if ((csio->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
1839 if ((csio->ccb_h.flags & CAM_DATA_PHYS) == 0) {
1841 error = bus_dmamap_load(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, csio->data_ptr, csio->dxfer_len, eptr, mp, 0);
1843 xpt_print(csio->ccb_h.path, "%s: bus_dmamap_load " "ptr %p len %d returned %d\n", __func__, csio->data_ptr, csio->dxfer_len, error);
1846 if (error == EINPROGRESS) {
1847 bus_dmamap_unload(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap);
1849 isp_prt(isp, ISP_LOGERR, "deferred dma allocation not supported");
1850 } else if (error && mp->error == 0) {
1852 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1857 /* Pointer to physical buffer */
1858 struct bus_dma_segment seg;
1859 seg.ds_addr = (bus_addr_t)(vm_offset_t)csio->data_ptr;
1860 seg.ds_len = csio->dxfer_len;
1861 (*eptr)(mp, &seg, 1, 0);
1864 struct bus_dma_segment *segs;
1866 if ((csio->ccb_h.flags & CAM_DATA_PHYS) != 0) {
1867 isp_prt(isp, ISP_LOGERR, "Physical segment pointers unsupported");
1869 } else if ((csio->ccb_h.flags & CAM_SG_LIST_PHYS) == 0) {
1874 * We're taking advantage of the fact that
1875 * the pointer/length sizes and layout of the iovec
1876 * structure are the same as the bus_dma_segment
1877 * structure. This might be a little dangerous,
1878 * but only if they change the structures, which
1881 KASSERT((sizeof (sguio.uio_iov) == sizeof (csio->data_ptr) &&
1882 sizeof (sguio.uio_iovcnt) >= sizeof (csio->sglist_cnt) &&
1883 sizeof (sguio.uio_resid) >= sizeof (csio->dxfer_len)), ("Ken's assumption failed"));
1884 sguio.uio_iov = (struct iovec *)csio->data_ptr;
1885 sguio.uio_iovcnt = csio->sglist_cnt;
1886 sguio.uio_resid = csio->dxfer_len;
1887 sguio.uio_segflg = UIO_SYSSPACE;
1889 error = bus_dmamap_load_uio(isp->isp_osinfo.dmat, PISP_PCMD(csio)->dmap, &sguio, eptr2, mp, 0);
1891 if (error != 0 && mp->error == 0) {
1892 isp_prt(isp, ISP_LOGERR, "error %d in dma mapping code", error);
1896 /* Just use the segments provided */
1897 segs = (struct bus_dma_segment *) csio->data_ptr;
1898 (*eptr)(mp, segs, csio->sglist_cnt, 0);
1902 int retval = CMD_COMPLETE;
1903 if (mp->error == MUSHERR_NOQENTRIES) {
1904 retval = CMD_EAGAIN;
1905 } else if (mp->error == EFBIG) {
1906 XS_SETERR(csio, CAM_REQ_TOO_BIG);
1907 } else if (mp->error == EINVAL) {
1908 XS_SETERR(csio, CAM_REQ_INVALID);
1910 XS_SETERR(csio, CAM_UNREC_HBA_ERROR);
1914 return (CMD_QUEUED);
1918 isp_pci_reset0(ispsoftc_t *isp)
1920 ISP_DISABLE_INTS(isp);
1924 isp_pci_reset1(ispsoftc_t *isp)
1926 if (!IS_24XX(isp)) {
1927 /* Make sure the BIOS is disabled */
1928 isp_pci_wr_reg(isp, HCCR, PCI_HCCR_CMD_BIOS);
1930 /* and enable interrupts */
1931 ISP_ENABLE_INTS(isp);
1935 isp_pci_dumpregs(ispsoftc_t *isp, const char *msg)
1937 struct isp_pcisoftc *pcs = (struct isp_pcisoftc *)isp;
1939 printf("%s: %s\n", device_get_nameunit(isp->isp_dev), msg);
1941 printf("%s:\n", device_get_nameunit(isp->isp_dev));
1943 printf(" biu_conf1=%x", ISP_READ(isp, BIU_CONF1));
1945 printf(" biu_csr=%x", ISP_READ(isp, BIU2100_CSR));
1946 printf(" biu_icr=%x biu_isr=%x biu_sema=%x ", ISP_READ(isp, BIU_ICR),
1947 ISP_READ(isp, BIU_ISR), ISP_READ(isp, BIU_SEMA));
1948 printf("risc_hccr=%x\n", ISP_READ(isp, HCCR));
1952 ISP_WRITE(isp, HCCR, HCCR_CMD_PAUSE);
1953 printf(" cdma_conf=%x cdma_sts=%x cdma_fifostat=%x\n",
1954 ISP_READ(isp, CDMA_CONF), ISP_READ(isp, CDMA_STATUS),
1955 ISP_READ(isp, CDMA_FIFO_STS));
1956 printf(" ddma_conf=%x ddma_sts=%x ddma_fifostat=%x\n",
1957 ISP_READ(isp, DDMA_CONF), ISP_READ(isp, DDMA_STATUS),
1958 ISP_READ(isp, DDMA_FIFO_STS));
1959 printf(" sxp_int=%x sxp_gross=%x sxp(scsi_ctrl)=%x\n",
1960 ISP_READ(isp, SXP_INTERRUPT),
1961 ISP_READ(isp, SXP_GROSS_ERR),
1962 ISP_READ(isp, SXP_PINS_CTRL));
1963 ISP_WRITE(isp, HCCR, HCCR_CMD_RELEASE);
1965 printf(" mbox regs: %x %x %x %x %x\n",
1966 ISP_READ(isp, OUTMAILBOX0), ISP_READ(isp, OUTMAILBOX1),
1967 ISP_READ(isp, OUTMAILBOX2), ISP_READ(isp, OUTMAILBOX3),
1968 ISP_READ(isp, OUTMAILBOX4));
1969 printf(" PCI Status Command/Status=%x\n",
1970 pci_read_config(pcs->pci_dev, PCIR_COMMAND, 1));