3 * Copyright (c) 1997-2009 by Matthew Jacob
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
37 * Mailbox Command Opcodes
39 #define MBOX_NO_OP 0x0000
40 #define MBOX_LOAD_RAM 0x0001
41 #define MBOX_EXEC_FIRMWARE 0x0002
42 #define MBOX_DUMP_RAM 0x0003
43 #define MBOX_WRITE_RAM_WORD 0x0004
44 #define MBOX_READ_RAM_WORD 0x0005
45 #define MBOX_MAILBOX_REG_TEST 0x0006
46 #define MBOX_VERIFY_CHECKSUM 0x0007
47 #define MBOX_ABOUT_FIRMWARE 0x0008
48 #define MBOX_LOAD_RISC_RAM_2100 0x0009
50 #define MBOX_LOAD_RISC_RAM 0x000b
52 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
53 #define MBOX_CHECK_FIRMWARE 0x000e
54 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f
55 #define MBOX_INIT_REQ_QUEUE 0x0010
56 #define MBOX_INIT_RES_QUEUE 0x0011
57 #define MBOX_EXECUTE_IOCB 0x0012
58 #define MBOX_WAKE_UP 0x0013
59 #define MBOX_STOP_FIRMWARE 0x0014
60 #define MBOX_ABORT 0x0015
61 #define MBOX_ABORT_DEVICE 0x0016
62 #define MBOX_ABORT_TARGET 0x0017
63 #define MBOX_BUS_RESET 0x0018
64 #define MBOX_STOP_QUEUE 0x0019
65 #define MBOX_START_QUEUE 0x001a
66 #define MBOX_SINGLE_STEP_QUEUE 0x001b
67 #define MBOX_ABORT_QUEUE 0x001c
68 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
70 #define MBOX_GET_FIRMWARE_STATUS 0x001f
71 #define MBOX_GET_INIT_SCSI_ID 0x0020
72 #define MBOX_GET_SELECT_TIMEOUT 0x0021
73 #define MBOX_GET_RETRY_COUNT 0x0022
74 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
75 #define MBOX_GET_CLOCK_RATE 0x0024
76 #define MBOX_GET_ACT_NEG_STATE 0x0025
77 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
78 #define MBOX_GET_SBUS_PARAMS 0x0027
79 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
80 #define MBOX_GET_TARGET_PARAMS 0x0028
81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a
88 #define MBOX_SET_INIT_SCSI_ID 0x0030
89 #define MBOX_SET_SELECT_TIMEOUT 0x0031
90 #define MBOX_SET_RETRY_COUNT 0x0032
91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
92 #define MBOX_SET_CLOCK_RATE 0x0034
93 #define MBOX_SET_ACT_NEG_STATE 0x0035
94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
96 #define MBOX_SET_PCI_PARAMETERS 0x0037
97 #define MBOX_SET_TARGET_PARAMS 0x0038
98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a
105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
107 #define MBOX_EXEC_BIOS_IOCB 0x0042
108 #define MBOX_SET_FW_FEATURES 0x004a
109 #define MBOX_GET_FW_FEATURES 0x004b
110 #define FW_FEATURE_FAST_POST 0x1
111 #define FW_FEATURE_LVD_NOTIFY 0x2
112 #define FW_FEATURE_RIO_32BIT 0x4
113 #define FW_FEATURE_RIO_16BIT 0x8
115 #define MBOX_INIT_REQ_QUEUE_A64 0x0052
116 #define MBOX_INIT_RES_QUEUE_A64 0x0053
118 #define MBOX_ENABLE_TARGET_MODE 0x0055
119 #define ENABLE_TARGET_FLAG 0x8000
120 #define ENABLE_TQING_FLAG 0x0004
121 #define ENABLE_MANDATORY_DISC 0x0002
122 #define MBOX_GET_TARGET_STATUS 0x0056
124 /* These are for the ISP2X00 FC cards */
125 #define MBOX_GET_LOOP_ID 0x0020
126 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */
127 #define ISP24XX_INORDER 0x0100
128 #define ISP24XX_NPIV_SAN 0x0400
129 #define ISP24XX_VSAN_SAN 0x1000
130 #define ISP24XX_FC_SP_SAN 0x2000
132 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028
133 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038
134 #define MBOX_GET_RESOURCE_COUNT 0x0042
135 #define MBOX_REQUEST_OFFLINE_MODE 0x0043
136 #define MBOX_ENHANCED_GET_PDB 0x0047
137 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */
138 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */
139 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */
140 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
141 #define MBOX_INIT_FIRMWARE 0x0060
142 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
143 #define MBOX_INIT_LIP 0x0062
144 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063
145 #define MBOX_GET_PORT_DB 0x0064
146 #define MBOX_CLEAR_ACA 0x0065
147 #define MBOX_TARGET_RESET 0x0066
148 #define MBOX_CLEAR_TASK_SET 0x0067
149 #define MBOX_ABORT_TASK_SET 0x0068
150 #define MBOX_GET_FW_STATE 0x0069
151 #define MBOX_GET_PORT_NAME 0x006A
152 #define MBOX_GET_LINK_STATUS 0x006B
153 #define MBOX_INIT_LIP_RESET 0x006C
154 #define MBOX_SEND_SNS 0x006E
155 #define MBOX_FABRIC_LOGIN 0x006F
156 #define MBOX_SEND_CHANGE_REQUEST 0x0070
157 #define MBOX_FABRIC_LOGOUT 0x0071
158 #define MBOX_INIT_LIP_LOGIN 0x0072
159 #define MBOX_LUN_RESET 0x007E
161 #define MBOX_DRIVER_HEARTBEAT 0x005B
162 #define MBOX_FW_HEARTBEAT 0x005C
164 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */
165 #define MBGSD_GET_RATE 0
166 #define MBGSD_SET_RATE 1
167 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */
168 #define MBGSD_ONEGB 0
169 #define MBGSD_TWOGB 1
171 #define MBGSD_FOURGB 3 /* 24XX only */
172 #define MBGSD_EIGHTGB 4 /* 25XX only */
175 #define ISP2100_SET_PCI_PARAM 0x00ff
177 #define MBOX_BUSY 0x04
180 * Mailbox Command Complete Status Codes
182 #define MBOX_COMMAND_COMPLETE 0x4000
183 #define MBOX_INVALID_COMMAND 0x4001
184 #define MBOX_HOST_INTERFACE_ERROR 0x4002
185 #define MBOX_TEST_FAILED 0x4003
186 #define MBOX_COMMAND_ERROR 0x4005
187 #define MBOX_COMMAND_PARAM_ERROR 0x4006
188 #define MBOX_PORT_ID_USED 0x4007
189 #define MBOX_LOOP_ID_USED 0x4008
190 #define MBOX_ALL_IDS_USED 0x4009
191 #define MBOX_NOT_LOGGED_IN 0x400A
192 /* pseudo mailbox completion codes */
193 #define MBOX_REGS_BUSY 0x6000 /* registers in use */
194 #define MBOX_TIMEOUT 0x6001 /* command timed out */
196 #define MBLOGALL 0x000f
197 #define MBLOGNONE 0x0000
198 #define MBLOGMASK(x) ((x) & 0xf)
201 * Asynchronous event status codes
203 #define ASYNC_BUS_RESET 0x8001
204 #define ASYNC_SYSTEM_ERROR 0x8002
205 #define ASYNC_RQS_XFER_ERR 0x8003
206 #define ASYNC_RSP_XFER_ERR 0x8004
207 #define ASYNC_QWAKEUP 0x8005
208 #define ASYNC_TIMEOUT_RESET 0x8006
209 #define ASYNC_DEVICE_RESET 0x8007
210 #define ASYNC_EXTMSG_UNDERRUN 0x800A
211 #define ASYNC_SCAM_INT 0x800B
212 #define ASYNC_HUNG_SCSI 0x800C
213 #define ASYNC_KILLED_BUS 0x800D
214 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
215 #define ASYNC_LIP_OCCURRED 0x8010
216 #define ASYNC_LOOP_UP 0x8011
217 #define ASYNC_LOOP_DOWN 0x8012
218 #define ASYNC_LOOP_RESET 0x8013
219 #define ASYNC_PDB_CHANGED 0x8014
220 #define ASYNC_CHANGE_NOTIFY 0x8015
221 #define ASYNC_LIP_F8 0x8016
222 #define ASYNC_LIP_ERROR 0x8017
223 #define ASYNC_SECURITY_UPDATE 0x801B
224 #define ASYNC_CMD_CMPLT 0x8020
225 #define ASYNC_CTIO_DONE 0x8021
226 #define ASYNC_RIO32_1 0x8021
227 #define ASYNC_RIO32_2 0x8022
228 #define ASYNC_IP_XMIT_DONE 0x8022
229 #define ASYNC_IP_RECV_DONE 0x8023
230 #define ASYNC_IP_BROADCAST 0x8024
231 #define ASYNC_IP_RCVQ_LOW 0x8025
232 #define ASYNC_IP_RCVQ_EMPTY 0x8026
233 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
234 #define ASYNC_PTPMODE 0x8030
235 #define ASYNC_RIO16_1 0x8031
236 #define ASYNC_RIO16_2 0x8032
237 #define ASYNC_RIO16_3 0x8033
238 #define ASYNC_RIO16_4 0x8034
239 #define ASYNC_RIO16_5 0x8035
240 #define ASYNC_CONNMODE 0x8036
241 #define ISP_CONN_LOOP 1
242 #define ISP_CONN_PTP 2
243 #define ISP_CONN_BADLIP 3
244 #define ISP_CONN_FATAL 4
245 #define ISP_CONN_LOOPBACK 5
246 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */
247 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */
248 #define ASYNC_RCV_ERR 0x8048
251 * Firmware Options. There are a lot of them.
253 * IFCOPTN - ISP Fibre Channel Option Word N
255 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */
256 #define IFCOPT1_EAABSRCVD (1 << 12)
257 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */
258 #define IFCOPT1_ENAPURE (1 << 10)
259 #define IFCOPT1_ENA8017 (1 << 7)
260 #define IFCOPT1_DISGPIO67 (1 << 6)
261 #define IFCOPT1_LIPLOSSIMM (1 << 5)
262 #define IFCOPT1_DISF7SWTCH (1 << 4)
263 #define IFCOPT1_CTIO_RETRY (1 << 3)
264 #define IFCOPT1_LIPASYNC (1 << 1)
265 #define IFCOPT1_LIPF8 (1 << 0)
267 #define IFCOPT2_LOOPBACK (1 << 1)
268 #define IFCOPT2_ATIO3_ONLY (1 << 0)
270 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */
271 #define IFCOPT3_RNDASYNC (1 << 1)
273 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
274 * mailbox command to enable this.
276 #define ASYNC_QFULL_SENT 0x8049
279 * Needs to be enabled
281 #define ASYNC_AUTO_PLOGI_RJT 0x8018
285 #define ASYNC_RJT_SENT 0x8049
288 * All IOCB Queue entries are this size
290 #define QENTRY_LEN 64
293 * Command Structure Definitions
307 #define DSTYPE_32BIT 0
308 #define DSTYPE_64BIT 1
310 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
311 uint32_t ds_segment; /* unused */
312 uint32_t ds_base; /* 32 bit address of DSD list */
317 uint8_t rqs_entry_type;
318 uint8_t rqs_entry_count;
323 /* RQS Flag definitions */
324 #define RQSFLAG_CONTINUATION 0x01
325 #define RQSFLAG_FULL 0x02
326 #define RQSFLAG_BADHEADER 0x04
327 #define RQSFLAG_BADPACKET 0x08
328 #define RQSFLAG_BADCOUNT 0x10
329 #define RQSFLAG_BADORDER 0x20
330 #define RQSFLAG_MASK 0x3f
332 /* RQS entry_type definitions */
333 #define RQSTYPE_REQUEST 0x01
334 #define RQSTYPE_DATASEG 0x02
335 #define RQSTYPE_RESPONSE 0x03
336 #define RQSTYPE_MARKER 0x04
337 #define RQSTYPE_CMDONLY 0x05
338 #define RQSTYPE_ATIO 0x06 /* Target Mode */
339 #define RQSTYPE_CTIO 0x07 /* Target Mode */
340 #define RQSTYPE_SCAM 0x08
341 #define RQSTYPE_A64 0x09
342 #define RQSTYPE_A64_CONT 0x0a
343 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
344 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
345 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */
346 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
347 #define RQSTYPE_CTIO1 0x0f /* Target Mode */
348 #define RQSTYPE_STATUS_CONT 0x10
349 #define RQSTYPE_T2RQS 0x11
350 #define RQSTYPE_CTIO7 0x12
351 #define RQSTYPE_IP_XMIT 0x13
352 #define RQSTYPE_TSK_MGMT 0x14
353 #define RQSTYPE_T4RQS 0x15
354 #define RQSTYPE_ATIO2 0x16 /* Target Mode */
355 #define RQSTYPE_CTIO2 0x17 /* Target Mode */
356 #define RQSTYPE_T7RQS 0x18
357 #define RQSTYPE_T3RQS 0x19
358 #define RQSTYPE_IP_XMIT_64 0x1b
359 #define RQSTYPE_CTIO4 0x1e /* Target Mode */
360 #define RQSTYPE_CTIO3 0x1f /* Target Mode */
361 #define RQSTYPE_RIO1 0x21
362 #define RQSTYPE_RIO2 0x22
363 #define RQSTYPE_IP_RECV 0x23
364 #define RQSTYPE_IP_RECV_CONT 0x24
365 #define RQSTYPE_CT_PASSTHRU 0x29
366 #define RQSTYPE_MS_PASSTHRU 0x29
367 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */
368 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */
369 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */
370 #define RQSTYPE_ABORT_IO 0x33
371 #define RQSTYPE_T6RQS 0x48
372 #define RQSTYPE_LOGIN 0x52
373 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */
374 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */
385 uint16_t req_reserved;
387 uint16_t req_seg_count;
389 ispds_t req_dataseg[ISP_RQDSEG];
391 #define ISP_RQDSEG_A64 2
396 uint8_t mrk_reserved0;
398 uint16_t mrk_modifier;
401 uint8_t mrk_reserved1[48];
408 uint8_t mrk_modifier;
409 uint8_t mrk_reserved0;
410 uint8_t mrk_reserved1;
412 uint16_t mrk_reserved2;
414 uint8_t mrk_reserved3[40];
418 #define SYNC_DEVICE 0
419 #define SYNC_TARGET 1
423 #define ISP_RQDSEG_T2 3
432 uint8_t req_reserved;
434 uint16_t req_seg_count;
436 uint32_t req_totalcnt;
437 ispds_t req_dataseg[ISP_RQDSEG_T2];
446 uint16_t req_reserved;
448 uint16_t req_seg_count;
450 uint32_t req_totalcnt;
451 ispds_t req_dataseg[ISP_RQDSEG_T2];
454 #define ISP_RQDSEG_T3 2
463 uint8_t req_reserved;
465 uint16_t req_seg_count;
467 uint32_t req_totalcnt;
468 ispds64_t req_dataseg[ISP_RQDSEG_T3];
470 #define ispreq64_t ispreqt3_t /* same as.... */
479 uint8_t req_reserved;
481 uint16_t req_seg_count;
483 uint32_t req_totalcnt;
484 ispds64_t req_dataseg[ISP_RQDSEG_T3];
487 /* req_flag values */
488 #define REQFLAG_NODISCON 0x0001
489 #define REQFLAG_HTAG 0x0002
490 #define REQFLAG_OTAG 0x0004
491 #define REQFLAG_STAG 0x0008
492 #define REQFLAG_TARGET_RTN 0x0010
494 #define REQFLAG_NODATA 0x0000
495 #define REQFLAG_DATA_IN 0x0020
496 #define REQFLAG_DATA_OUT 0x0040
497 #define REQFLAG_DATA_UNKNOWN 0x0060
499 #define REQFLAG_DISARQ 0x0100
500 #define REQFLAG_FRC_ASYNC 0x0200
501 #define REQFLAG_FRC_SYNC 0x0400
502 #define REQFLAG_FRC_WIDE 0x0800
503 #define REQFLAG_NOPARITY 0x1000
504 #define REQFLAG_STOPQ 0x2000
505 #define REQFLAG_XTRASNS 0x4000
506 #define REQFLAG_PRIORITY 0x8000
515 uint16_t req_reserved;
517 uint16_t req_seg_count;
530 uint16_t req_seg_count;
531 uint16_t req_reserved;
533 uint8_t req_alen_datadir;
534 uint8_t req_task_management;
535 uint8_t req_task_attribute;
542 ispds64_t req_dataseg;
545 /* Task Management Request Function */
550 uint8_t tmf_reserved0[2];
552 uint16_t tmf_timeout;
555 uint8_t tmf_reserved1[20];
559 uint8_t tmf_reserved2[12];
562 #define ISP24XX_TMF_NOSEND 0x80000000
564 #define ISP24XX_TMF_LUN_RESET 0x00000010
565 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008
566 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004
567 #define ISP24XX_TMF_TARGET_RESET 0x00000002
568 #define ISP24XX_TMF_CLEAR_ACA 0x00000001
570 /* I/O Abort Structure */
572 isphdr_t abrt_header;
573 uint32_t abrt_handle;
575 uint16_t abrt_options;
576 uint32_t abrt_cmd_handle;
577 uint16_t abrt_queue_number;
578 uint8_t abrt_reserved[30];
582 uint8_t abrt_reserved1[12];
585 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */
586 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */
587 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */
592 uint32_t req_reserved;
593 ispds_t req_dataseg[ISP_CDSEG];
596 #define ISP_CDSEG64 5
599 ispds64_t req_dataseg[ISP_CDSEG64];
605 uint16_t req_scsi_status;
606 uint16_t req_completion_status;
607 uint16_t req_state_flags;
608 uint16_t req_status_flags;
610 #define req_response_len req_time /* FC only */
611 uint16_t req_sense_len;
613 uint8_t req_response[8]; /* FC only */
614 uint8_t req_sense_data[32];
618 * Status Continuation
622 uint8_t req_sense_data[60];
631 uint16_t req_completion_status;
634 uint16_t req_reserved0;
635 uint16_t req_state_flags;
636 uint16_t req_retry_delay; /* aka Status Qualifier */
637 uint16_t req_scsi_status;
638 uint32_t req_fcp_residual;
639 uint32_t req_sense_len;
640 uint32_t req_response_len;
641 uint8_t req_rsp_sense[28];
642 } isp24xx_statusreq_t;
645 * For Qlogic 2X00, the high order byte of SCSI status has
646 * additional meaning.
648 #define RQCS_CR 0x1000 /* Confirmation Request */
649 #define RQCS_RU 0x0800 /* Residual Under */
650 #define RQCS_RO 0x0400 /* Residual Over */
651 #define RQCS_RESID (RQCS_RU|RQCS_RO)
652 #define RQCS_SV 0x0200 /* Sense Length Valid */
653 #define RQCS_RV 0x0100 /* FCP Response Length Valid */
662 uint16_t ctp_nphdl; /* n-port handle */
663 uint16_t ctp_cmd_cnt; /* Command DSD count */
665 uint8_t ctp_reserved0;
667 uint16_t ctp_reserved1;
668 uint16_t ctp_rsp_cnt; /* Response DSD count */
669 uint16_t ctp_reserved2[5];
670 uint32_t ctp_rsp_bcnt; /* Response byte count */
671 uint32_t ctp_cmd_bcnt; /* Command byte count */
672 ispds64_t ctp_dataseg[2];
681 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */
684 uint16_t ms_reserved1; /* low 8 bits */
686 uint16_t ms_cmd_cnt; /* Command DSD count */
687 uint16_t ms_tot_cnt; /* Total DSD Count */
688 uint8_t ms_type; /* MS type */
689 uint8_t ms_r_ctl; /* R_CTL */
690 uint16_t ms_rxid; /* RX_ID */
691 uint16_t ms_reserved2;
693 uint32_t ms_rsp_bcnt; /* Response byte count */
694 uint32_t ms_cmd_bcnt; /* Command byte count */
695 ispds64_t ms_dataseg[2];
699 * Completion Status Codes.
701 #define RQCS_COMPLETE 0x0000
702 #define RQCS_DMA_ERROR 0x0002
703 #define RQCS_RESET_OCCURRED 0x0004
704 #define RQCS_ABORTED 0x0005
705 #define RQCS_TIMEOUT 0x0006
706 #define RQCS_DATA_OVERRUN 0x0007
707 #define RQCS_DATA_UNDERRUN 0x0015
708 #define RQCS_QUEUE_FULL 0x001C
710 /* 1X00 Only Completion Codes */
711 #define RQCS_INCOMPLETE 0x0001
712 #define RQCS_TRANSPORT_ERROR 0x0003
713 #define RQCS_COMMAND_OVERRUN 0x0008
714 #define RQCS_STATUS_OVERRUN 0x0009
715 #define RQCS_BAD_MESSAGE 0x000a
716 #define RQCS_NO_MESSAGE_OUT 0x000b
717 #define RQCS_EXT_ID_FAILED 0x000c
718 #define RQCS_IDE_MSG_FAILED 0x000d
719 #define RQCS_ABORT_MSG_FAILED 0x000e
720 #define RQCS_REJECT_MSG_FAILED 0x000f
721 #define RQCS_NOP_MSG_FAILED 0x0010
722 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
723 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
724 #define RQCS_ID_MSG_FAILED 0x0013
725 #define RQCS_UNEXP_BUS_FREE 0x0014
726 #define RQCS_XACT_ERR1 0x0018
727 #define RQCS_XACT_ERR2 0x0019
728 #define RQCS_XACT_ERR3 0x001A
729 #define RQCS_BAD_ENTRY 0x001B
730 #define RQCS_PHASE_SKIPPED 0x001D
731 #define RQCS_ARQS_FAILED 0x001E
732 #define RQCS_WIDE_FAILED 0x001F
733 #define RQCS_SYNCXFER_FAILED 0x0020
734 #define RQCS_LVD_BUSERR 0x0021
736 /* 2X00 Only Completion Codes */
737 #define RQCS_PORT_UNAVAILABLE 0x0028
738 #define RQCS_PORT_LOGGED_OUT 0x0029
739 #define RQCS_PORT_CHANGED 0x002A
740 #define RQCS_PORT_BUSY 0x002B
742 /* 24XX Only Completion Codes */
743 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */
744 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */
745 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */
746 #define RQCS_24XX_TMO 0x0030 /* task management overrun */
750 * 1X00 specific State Flags
752 #define RQSF_GOT_BUS 0x0100
753 #define RQSF_GOT_TARGET 0x0200
754 #define RQSF_SENT_CDB 0x0400
755 #define RQSF_XFRD_DATA 0x0800
756 #define RQSF_GOT_STATUS 0x1000
757 #define RQSF_GOT_SENSE 0x2000
758 #define RQSF_XFER_COMPLETE 0x4000
761 * 2X00 specific State Flags
762 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
764 #define RQSF_DATA_IN 0x0020
765 #define RQSF_DATA_OUT 0x0040
766 #define RQSF_STAG 0x0008
767 #define RQSF_OTAG 0x0004
768 #define RQSF_HTAG 0x0002
772 #define RQSTF_DISCONNECT 0x0001
773 #define RQSTF_SYNCHRONOUS 0x0002
774 #define RQSTF_PARITY_ERROR 0x0004
775 #define RQSTF_BUS_RESET 0x0008
776 #define RQSTF_DEVICE_RESET 0x0010
777 #define RQSTF_ABORTED 0x0020
778 #define RQSTF_TIMEOUT 0x0040
779 #define RQSTF_NEGOTIATION 0x0080
782 * 2X00 specific state flags
786 /* RQSF_GOT_STATUS */
787 /* RQSF_XFER_COMPLETE */
790 * 2X00 specific status flags
794 #define RQSTF_DMA_ERROR 0x0080
795 #define RQSTF_LOGOUT 0x2000
800 #ifndef ISP_EXEC_THROTTLE
801 #define ISP_EXEC_THROTTLE 16
805 * About Firmware returns an 'attribute' word in mailbox 6.
806 * These attributes are for 2200 and 2300.
808 #define ISP_FW_ATTR_TMODE 0x0001
809 #define ISP_FW_ATTR_SCCLUN 0x0002
810 #define ISP_FW_ATTR_FABRIC 0x0004
811 #define ISP_FW_ATTR_CLASS2 0x0008
812 #define ISP_FW_ATTR_FCTAPE 0x0010
813 #define ISP_FW_ATTR_IP 0x0020
814 #define ISP_FW_ATTR_VI 0x0040
815 #define ISP_FW_ATTR_VI_SOLARIS 0x0080
816 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */
818 /* and these are for the 2400 */
819 #define ISP2400_FW_ATTR_CLASS2 0x0001
820 #define ISP2400_FW_ATTR_IP 0x0002
821 #define ISP2400_FW_ATTR_MULTIID 0x0004
822 #define ISP2400_FW_ATTR_SB2 0x0008
823 #define ISP2400_FW_ATTR_T10CRC 0x0010
824 #define ISP2400_FW_ATTR_VI 0x0020
825 #define ISP2400_FW_ATTR_MQ 0x0040
826 #define ISP2400_FW_ATTR_MSIX 0x0080
827 #define ISP2400_FW_ATTR_FCOE 0x0800
828 #define ISP2400_FW_ATTR_VP0 0x1000
829 #define ISP2400_FW_ATTR_EXPFW 0x2000
830 #define ISP2400_FW_ATTR_HOTFW 0x4000
831 #define ISP2400_FW_ATTR_EXTNDED 0x8000
832 #define ISP2400_FW_ATTR_EXTVP 0x00010000
833 #define ISP2400_FW_ATTR_VN2VN 0x00040000
834 #define ISP2400_FW_ATTR_EXMOFF 0x00080000
835 #define ISP2400_FW_ATTR_NPMOFF 0x00100000
836 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000
837 #define ISP2400_FW_ATTR_SRIOV 0x02000000
838 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000
839 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000
842 * These are either manifestly true or are dependent on f/w attributes
844 #define ISP_CAP_TMODE(isp) \
845 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE))
846 #define ISP_CAP_SCCFW(isp) \
847 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN))
848 #define ISP_CAP_2KLOGIN(isp) \
849 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
852 * This is only true for 24XX cards with this f/w attribute
854 #define ISP_CAP_MULTI_ID(isp) \
855 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0)
856 #define ISP_GET_VPIDX(isp, tag) \
857 (ISP_CAP_MULTI_ID(isp) ? tag : 0)
858 #define ISP_CAP_VP0(isp) \
859 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0)
862 * This is true manifestly or is dependent on a f/w attribute
863 * but may or may not actually be *enabled*. In any case, it
864 * is enabled on a per-channel basis.
866 #define ISP_CAP_FCTAPE(isp) \
867 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE))
869 #define ISP_FCTAPE_ENABLED(isp, chan) \
870 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0)
873 * Reduced Interrupt Operation Response Queue Entries
878 uint32_t req_handles[15];
883 uint16_t req_handles[30];
887 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
891 * Initialization Control Block
893 * Version One (prime) format.
897 uint8_t icb_reserved0;
898 uint16_t icb_fwoptions;
899 uint16_t icb_maxfrmlen;
900 uint16_t icb_maxalloc;
901 uint16_t icb_execthrottle;
902 uint8_t icb_retry_count;
903 uint8_t icb_retry_delay;
904 uint8_t icb_portname[8];
905 uint16_t icb_hardaddr;
906 uint8_t icb_iqdevtype;
907 uint8_t icb_logintime;
908 uint8_t icb_nodename[8];
909 uint16_t icb_rqstout;
910 uint16_t icb_rspnsin;
911 uint16_t icb_rqstqlen;
912 uint16_t icb_rsltqlen;
913 uint16_t icb_rqstaddr[4];
914 uint16_t icb_respaddr[4];
915 uint16_t icb_lunenables;
918 uint16_t icb_lunetimeout;
919 uint16_t icb_reserved1;
920 uint16_t icb_xfwoptions;
921 uint8_t icb_racctimer;
922 uint8_t icb_idelaytimer;
923 uint16_t icb_zfwoptions;
924 uint16_t icb_reserved2[13];
927 #define ICB_VERSION1 1
929 #define ICBOPT_EXTENDED 0x8000
930 #define ICBOPT_BOTH_WWNS 0x4000
931 #define ICBOPT_FULL_LOGIN 0x2000
932 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */
933 #define ICBOPT_PREV_ADDRESS 0x0800
934 #define ICBOPT_SRCHDOWN 0x0400
935 #define ICBOPT_NOLIP 0x0200
936 #define ICBOPT_PDBCHANGE_AE 0x0100
937 #define ICBOPT_TGT_TYPE 0x0080
938 #define ICBOPT_INI_ADISC 0x0040
939 #define ICBOPT_INI_DISABLE 0x0020
940 #define ICBOPT_TGT_ENABLE 0x0010
941 #define ICBOPT_FAST_POST 0x0008
942 #define ICBOPT_FULL_DUPLEX 0x0004
943 #define ICBOPT_FAIRNESS 0x0002
944 #define ICBOPT_HARD_ADDRESS 0x0001
946 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */
947 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */
948 #define ICBXOPT_FCTAPE_CONFIRM 0x2000
949 #define ICBXOPT_FCTAPE 0x1000
950 #define ICBXOPT_CLASS2_ACK0 0x0200
951 #define ICBXOPT_CLASS2 0x0100
952 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */
953 #define ICBXOPT_TOPO_MASK 0x0070
954 #define ICBXOPT_LOOP_ONLY 0x0000
955 #define ICBXOPT_PTP_ONLY 0x0010
956 #define ICBXOPT_LOOP_2_PTP 0x0020
957 #define ICBXOPT_PTP_2_LOOP 0x0030
959 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
960 * RIO is not defined for the 23XX cards (just 2200)
962 #define ICBXOPT_RIO_OFF 0
963 #define ICBXOPT_RIO_16BIT 1
964 #define ICBXOPT_RIO_32BIT 2
965 #define ICBXOPT_RIO_16BIT_IOCB 3
966 #define ICBXOPT_RIO_32BIT_IOCB 4
967 #define ICBXOPT_ZIO 5
968 #define ICBXOPT_TIMER_MASK 0x7
970 #define ICBZOPT_RATE_MASK 0xC000
971 #define ICBZOPT_RATE_ONEGB 0x0000
972 #define ICBZOPT_RATE_AUTO 0x8000
973 #define ICBZOPT_RATE_TWOGB 0x4000
974 #define ICBZOPT_50_OHM 0x2000
975 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */
976 #define ICBZOPT_RSPSZ_MASK 0x0030
977 #define ICBZOPT_RSPSZ_24 0x0000
978 #define ICBZOPT_RSPSZ_12 0x0010
979 #define ICBZOPT_RSPSZ_24A 0x0020
980 #define ICBZOPT_RSPSZ_32 0x0030
981 #define ICBZOPT_SOFTID 0x0002
982 #define ICBZOPT_ENA_RDXFR_RDY 0x0001
984 /* 2400 F/W options */
985 #define ICB2400_OPT1_BOTH_WWNS 0x00004000
986 #define ICB2400_OPT1_FULL_LOGIN 0x00002000
987 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800
988 #define ICB2400_OPT1_SRCHDOWN 0x00000400
989 #define ICB2400_OPT1_NOLIP 0x00000200
990 #define ICB2400_OPT1_INI_DISABLE 0x00000020
991 #define ICB2400_OPT1_TGT_ENABLE 0x00000010
992 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004
993 #define ICB2400_OPT1_FAIRNESS 0x00000002
994 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001
996 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000
997 #define ICB2400_OPT2_ENA_IHA 0x04000000
998 #define ICB2400_OPT2_QOS 0x02000000
999 #define ICB2400_OPT2_IOCBS 0x01000000
1000 #define ICB2400_OPT2_ENA_IHR 0x00400000
1001 #define ICB2400_OPT2_ENA_VMS 0x00200000
1002 #define ICB2400_OPT2_ENA_TA 0x00100000
1003 #define ICB2400_OPT2_TPRLIC 0x00004000
1004 #define ICB2400_OPT2_FCTAPE 0x00001000
1005 #define ICB2400_OPT2_FCSP 0x00000800
1006 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200
1007 #define ICB2400_OPT2_CLASS2 0x00000100
1008 #define ICB2400_OPT2_NO_PLAY 0x00000080
1009 #define ICB2400_OPT2_TOPO_MASK 0x00000070
1010 #define ICB2400_OPT2_LOOP_ONLY 0x00000000
1011 #define ICB2400_OPT2_PTP_ONLY 0x00000010
1012 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020
1013 #define ICB2400_OPT2_TIMER_MASK 0x0000000f
1014 #define ICB2400_OPT2_ZIO 0x00000005
1015 #define ICB2400_OPT2_ZIO1 0x00000006
1017 #define ICB2400_OPT3_NO_CTXDIS 0x40000000
1018 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000
1019 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000
1020 #define ICB2400_OPT3_ENA_MFCF 0x00020000
1021 #define ICB2400_OPT3_SKIP_FOURGB 0x00010000
1022 #define ICB2400_OPT3_RATE_MASK 0x0000E000
1023 #define ICB2400_OPT3_RATE_ONEGB 0x00000000
1024 #define ICB2400_OPT3_RATE_TWOGB 0x00002000
1025 #define ICB2400_OPT3_RATE_AUTO 0x00004000
1026 #define ICB2400_OPT3_RATE_FOURGB 0x00006000
1027 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000
1028 #define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000
1029 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200
1030 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100
1031 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080
1032 #define ICB2400_OPT3_ENA_OOF 0x00000040
1033 /* note that a response size flag of zero is reserved! */
1034 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030
1035 #define ICB2400_OPT3_RSPSZ_12 0x00000010
1036 #define ICB2400_OPT3_RSPSZ_24 0x00000020
1037 #define ICB2400_OPT3_RSPSZ_32 0x00000030
1038 #define ICB2400_OPT3_SOFTID 0x00000002
1040 #define ICB_MIN_FRMLEN 256
1041 #define ICB_MAX_FRMLEN 2112
1042 #define ICB_DFLT_FRMLEN 1024
1043 #define ICB_DFLT_ALLOC 256
1044 #define ICB_DFLT_THROTTLE 16
1045 #define ICB_DFLT_RDELAY 5
1046 #define ICB_DFLT_RCOUNT 3
1048 #define ICB_LOGIN_TOV 30
1049 #define ICB_LUN_ENABLE_TOV 15
1053 * And somebody at QLogic had a great idea that you could just change
1054 * the structure *and* keep the version number the same as the other cards.
1057 uint16_t icb_version;
1058 uint16_t icb_reserved0;
1059 uint16_t icb_maxfrmlen;
1060 uint16_t icb_execthrottle;
1061 uint16_t icb_xchgcnt;
1062 uint16_t icb_hardaddr;
1063 uint8_t icb_portname[8];
1064 uint8_t icb_nodename[8];
1065 uint16_t icb_rspnsin;
1066 uint16_t icb_rqstout;
1067 uint16_t icb_retry_count;
1068 uint16_t icb_priout;
1069 uint16_t icb_rsltqlen;
1070 uint16_t icb_rqstqlen;
1071 uint16_t icb_ldn_nols;
1072 uint16_t icb_prqstqlen;
1073 uint16_t icb_rqstaddr[4];
1074 uint16_t icb_respaddr[4];
1075 uint16_t icb_priaddr[4];
1076 uint16_t icb_msixresp;
1077 uint16_t icb_msixatio;
1078 uint16_t icb_reserved1[2];
1079 uint16_t icb_atio_in;
1080 uint16_t icb_atioqlen;
1081 uint16_t icb_atioqaddr[4];
1082 uint16_t icb_idelaytimer;
1083 uint16_t icb_logintime;
1084 uint32_t icb_fwoptions1;
1085 uint32_t icb_fwoptions2;
1086 uint32_t icb_fwoptions3;
1088 uint16_t icb_reserved2[3];
1089 uint16_t icb_enodemac[3];
1090 uint16_t icb_disctime;
1091 uint16_t icb_reserved3[4];
1094 #define RQRSP_ADDR0015 0
1095 #define RQRSP_ADDR1631 1
1096 #define RQRSP_ADDR3247 2
1097 #define RQRSP_ADDR4863 3
1109 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
1110 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \
1111 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \
1112 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1113 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1114 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1115 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1116 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1117 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1119 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \
1120 wwn = ((uint64_t) array[ICB_NNM0]) | \
1121 ((uint64_t) array[ICB_NNM1] << 8) | \
1122 ((uint64_t) array[ICB_NNM2] << 16) | \
1123 ((uint64_t) array[ICB_NNM3] << 24) | \
1124 ((uint64_t) array[ICB_NNM4] << 32) | \
1125 ((uint64_t) array[ICB_NNM5] << 40) | \
1126 ((uint64_t) array[ICB_NNM6] << 48) | \
1127 ((uint64_t) array[ICB_NNM7] << 56)
1131 * For MULTI_ID firmware, this describes a
1132 * virtual port entity for getting status.
1135 uint16_t vp_port_status;
1136 uint8_t vp_port_options;
1137 uint8_t vp_port_loopid;
1138 uint8_t vp_port_portname[8];
1139 uint8_t vp_port_nodename[8];
1140 uint16_t vp_port_portid_lo; /* not present when trailing icb */
1141 uint16_t vp_port_portid_hi; /* not present when trailing icb */
1144 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */
1145 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */
1146 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */
1147 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */
1148 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */
1149 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */
1150 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */
1152 #define ICB2400_VPOPT_WRITE_SIZE 20
1155 * For MULTI_ID firmware, we append this structure
1156 * to the isp_icb_2400_t above, followed by a list
1157 * structures that are *most* of the vp_port_info_t.
1161 uint16_t vp_global_options;
1162 } isp_icb_2400_vpinfo_t;
1164 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */
1165 #define ICB2400_VPINFO_PORT_OFF(chan) \
1166 (ICB2400_VPINFO_OFF + \
1167 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE))
1169 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */
1170 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */
1171 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */
1172 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */
1173 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */
1176 isphdr_t vp_ctrl_hdr;
1177 uint32_t vp_ctrl_handle;
1178 uint16_t vp_ctrl_index_fail;
1179 uint16_t vp_ctrl_status;
1180 uint16_t vp_ctrl_command;
1181 uint16_t vp_ctrl_vp_count;
1182 uint16_t vp_ctrl_idmap[16];
1183 uint16_t vp_ctrl_reserved[7];
1184 uint16_t vp_ctrl_fcf_index;
1187 #define VP_CTRL_CMD_ENABLE_VP 0x00
1188 #define VP_CTRL_CMD_DISABLE_VP 0x08
1189 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09
1190 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A
1191 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B
1194 * We can use this structure for modifying either one or two VP ports after initialization
1197 isphdr_t vp_mod_hdr;
1198 uint32_t vp_mod_hdl;
1199 uint16_t vp_mod_reserved0;
1200 uint16_t vp_mod_status;
1203 uint8_t vp_mod_idx0;
1204 uint8_t vp_mod_idx1;
1212 uint8_t vp_mod_reserved2[8];
1215 #define VP_STS_OK 0x00
1216 #define VP_STS_ERR 0x01
1217 #define VP_CNT_ERR 0x02
1218 #define VP_GEN_ERR 0x03
1219 #define VP_IDX_ERR 0x04
1220 #define VP_STS_BSY 0x05
1222 #define VP_MODIFY 0x00
1223 #define VP_MODIFY_ENA 0x01
1224 #define VP_MODIFY_OPT 0x02
1225 #define VP_RESUME 0x03
1228 * Port Data Base Element
1232 uint16_t pdb_options;
1235 uint8_t pdb_hardaddr_bits[4];
1236 uint8_t pdb_portid_bits[4];
1237 uint8_t pdb_nodename[8];
1238 uint8_t pdb_portname[8];
1239 uint16_t pdb_execthrottle;
1240 uint16_t pdb_exec_count;
1241 uint8_t pdb_retry_count;
1242 uint8_t pdb_retry_delay;
1243 uint16_t pdb_resalloc;
1244 uint16_t pdb_curalloc;
1247 uint16_t pdb_tl_next;
1248 uint16_t pdb_tl_last;
1249 uint16_t pdb_features; /* PLOGI, Common Service */
1250 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */
1251 uint16_t pdb_roi; /* PLOGI, Common Service */
1253 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
1254 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */
1255 uint16_t pdb_ncseq; /* PLOGI, Class 3 */
1256 uint16_t pdb_noseq; /* PLOGI, Class 3 */
1257 uint16_t pdb_labrtflg;
1258 uint16_t pdb_lstopflg;
1259 uint16_t pdb_sqhead;
1260 uint16_t pdb_sqtail;
1261 uint16_t pdb_ptimer;
1262 uint16_t pdb_nxt_seqid;
1263 uint16_t pdb_fcount;
1264 uint16_t pdb_prli_len;
1265 uint16_t pdb_prli_svc0;
1266 uint16_t pdb_prli_svc3;
1267 uint16_t pdb_loopid;
1268 uint16_t pdb_il_ptr;
1269 uint16_t pdb_sl_ptr;
1272 #define PDB_OPTIONS_XMITTING (1<<11)
1273 #define PDB_OPTIONS_LNKXMIT (1<<10)
1274 #define PDB_OPTIONS_ABORTED (1<<9)
1275 #define PDB_OPTIONS_ADISC (1<<1)
1277 #define PDB_STATE_DISCOVERY 0
1278 #define PDB_STATE_WDISC_ACK 1
1279 #define PDB_STATE_PLOGI 2
1280 #define PDB_STATE_PLOGI_ACK 3
1281 #define PDB_STATE_PRLI 4
1282 #define PDB_STATE_PRLI_ACK 5
1283 #define PDB_STATE_LOGGED_IN 6
1284 #define PDB_STATE_PORT_UNAVAIL 7
1285 #define PDB_STATE_PRLO 8
1286 #define PDB_STATE_PRLO_ACK 9
1287 #define PDB_STATE_PLOGO 10
1288 #define PDB_STATE_PLOG_ACK 11
1290 #define SVC3_ROLE_MASK 0x30
1291 #define SVC3_ROLE_SHIFT 4
1293 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1294 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1297 * Port Data Base Element- 24XX cards
1301 uint8_t pdb_curstate;
1302 uint8_t pdb_laststate;
1303 uint8_t pdb_hardaddr_bits[4];
1304 uint8_t pdb_portid_bits[4];
1305 #define pdb_nxt_seqid_2400 pdb_portid_bits[3]
1306 uint16_t pdb_retry_timer;
1307 uint16_t pdb_handle;
1308 uint16_t pdb_rcv_dsize;
1309 uint16_t pdb_reserved0;
1310 uint16_t pdb_prli_svc0;
1311 uint16_t pdb_prli_svc3;
1312 uint8_t pdb_portname[8];
1313 uint8_t pdb_nodename[8];
1314 uint8_t pdb_reserved1[24];
1317 #define PDB2400_TID_SUPPORTED 0x4000
1318 #define PDB2400_FC_TAPE 0x0080
1319 #define PDB2400_CLASS2_ACK0 0x0040
1320 #define PDB2400_FCP_CONF 0x0020
1321 #define PDB2400_CLASS2 0x0010
1322 #define PDB2400_ADDR_VALID 0x0002
1324 #define PDB2400_STATE_PLOGI_PEND 0x03
1325 #define PDB2400_STATE_PLOGI_DONE 0x04
1326 #define PDB2400_STATE_PRLI_PEND 0x05
1327 #define PDB2400_STATE_LOGGED_IN 0x06
1328 #define PDB2400_STATE_PORT_UNAVAIL 0x07
1329 #define PDB2400_STATE_PRLO_PEND 0x09
1330 #define PDB2400_STATE_LOGO_PEND 0x0B
1333 * Common elements from the above two structures that are actually useful to us.
1337 uint16_t prli_word3;
1340 uint8_t portname[8];
1341 uint8_t nodename[8];
1345 * Port Database Changed Async Event information for 24XX cards
1347 #define PDB24XX_AE_OK 0x00
1348 #define PDB24XX_AE_IMPL_LOGO_1 0x01
1349 #define PDB24XX_AE_IMPL_LOGO_2 0x02
1350 #define PDB24XX_AE_IMPL_LOGO_3 0x03
1351 #define PDB24XX_AE_PLOGI_RCVD 0x04
1352 #define PDB24XX_AE_PLOGI_RJT 0x05
1353 #define PDB24XX_AE_PRLI_RCVD 0x06
1354 #define PDB24XX_AE_PRLI_RJT 0x07
1355 #define PDB24XX_AE_TPRLO 0x08
1356 #define PDB24XX_AE_TPRLO_RJT 0x09
1357 #define PDB24XX_AE_PRLO_RCVD 0x0a
1358 #define PDB24XX_AE_LOGO_RCVD 0x0b
1359 #define PDB24XX_AE_TOPO_CHG 0x0c
1360 #define PDB24XX_AE_NPORT_CHG 0x0d
1361 #define PDB24XX_AE_FLOGI_RJT 0x0e
1362 #define PDB24XX_AE_BAD_FANN 0x0f
1363 #define PDB24XX_AE_FLOGI_TIMO 0x10
1364 #define PDB24XX_AE_ABX_LOGO 0x11
1365 #define PDB24XX_AE_PLOGI_DONE 0x12
1366 #define PDB24XX_AE_PRLI_DONJE 0x13
1367 #define PDB24XX_AE_OPN_1 0x14
1368 #define PDB24XX_AE_OPN_2 0x15
1369 #define PDB24XX_AE_TXERR 0x16
1370 #define PDB24XX_AE_FORCED_LOGO 0x17
1371 #define PDB24XX_AE_DISC_TIMO 0x18
1374 * Genericized Port Login/Logout software structure
1383 /* the flags to use are those for PLOGX_FLG_* below */
1386 * ISP24XX- Login/Logout Port IOCB
1389 isphdr_t plogx_header;
1390 uint32_t plogx_handle;
1391 uint16_t plogx_status;
1392 uint16_t plogx_nphdl;
1393 uint16_t plogx_flags;
1394 uint16_t plogx_vphdl; /* low 8 bits */
1395 uint16_t plogx_portlo; /* low 16 bits */
1396 uint16_t plogx_rspsz_porthi;
1403 #define PLOGX_STATUS_OK 0x00
1404 #define PLOGX_STATUS_UNAVAIL 0x28
1405 #define PLOGX_STATUS_LOGOUT 0x29
1406 #define PLOGX_STATUS_IOCBERR 0x31
1408 #define PLOGX_IOCBERR_NOLINK 0x01
1409 #define PLOGX_IOCBERR_NOIOCB 0x02
1410 #define PLOGX_IOCBERR_NOXGHG 0x03
1411 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */
1412 #define PLOGX_IOCBERR_NOFABRIC 0x05
1413 #define PLOGX_IOCBERR_NOTREADY 0x07
1414 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */
1415 #define PLOGX_IOCBERR_NOPCB 0x0a
1416 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */
1417 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */
1418 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */
1419 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */
1420 #define PLOGX_IOCBERR_NOHANDLE 0x1c
1421 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */
1423 #define PLOGX_FLG_CMD_MASK 0xf
1424 #define PLOGX_FLG_CMD_PLOGI 0
1425 #define PLOGX_FLG_CMD_PRLI 1
1426 #define PLOGX_FLG_CMD_PDISC 2
1427 #define PLOGX_FLG_CMD_LOGO 8
1428 #define PLOGX_FLG_CMD_PRLO 9
1429 #define PLOGX_FLG_CMD_TPRLO 10
1431 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */
1432 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */
1433 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */
1434 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */
1435 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */
1436 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */
1437 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */
1439 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */
1440 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */
1443 * Report ID Acquisistion (24XX multi-id firmware)
1446 isphdr_t ridacq_hdr;
1447 uint32_t ridacq_handle;
1450 uint8_t ridacq_vp_acquired;
1451 uint8_t ridacq_vp_setup;
1452 uint16_t ridacq_reserved0;
1453 } type0; /* type 0 */
1455 uint16_t ridacq_vp_count;
1456 uint8_t ridacq_vp_index;
1457 uint8_t ridacq_vp_status;
1458 } type1; /* type 1 */
1460 uint16_t ridacq_vp_port_lo;
1461 uint8_t ridacq_vp_port_hi;
1462 uint8_t ridacq_format; /* 0 or 1 */
1463 uint16_t ridacq_map[8];
1464 uint8_t ridacq_reserved1[32];
1467 #define RIDACQ_STS_COMPLETE 0
1468 #define RIDACQ_STS_UNACQUIRED 1
1469 #define RIDACQ_STS_CHANGED 20
1473 * Simple Name Server Data Structures
1475 #define SNS_GA_NXT 0x100
1476 #define SNS_GPN_ID 0x112
1477 #define SNS_GNN_ID 0x113
1478 #define SNS_GFF_ID 0x11F
1479 #define SNS_GID_FT 0x171
1480 #define SNS_RFT_ID 0x217
1482 uint16_t snscb_rblen; /* response buffer length (words) */
1483 uint16_t snscb_reserved0;
1484 uint16_t snscb_addr[4]; /* response buffer address */
1485 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1486 uint16_t snscb_reserved1;
1487 uint16_t snscb_data[]; /* variable data */
1488 } sns_screq_t; /* Subcommand Request Structure */
1491 uint16_t snscb_rblen; /* response buffer length (words) */
1492 uint16_t snscb_reserved0;
1493 uint16_t snscb_addr[4]; /* response buffer address */
1494 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1495 uint16_t snscb_reserved1;
1497 uint16_t snscb_reserved2;
1498 uint32_t snscb_reserved3;
1499 uint32_t snscb_port;
1501 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
1504 uint16_t snscb_rblen; /* response buffer length (words) */
1505 uint16_t snscb_reserved0;
1506 uint16_t snscb_addr[4]; /* response buffer address */
1507 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1508 uint16_t snscb_reserved1;
1510 uint16_t snscb_reserved2;
1511 uint32_t snscb_reserved3;
1512 uint32_t snscb_portid;
1514 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
1517 uint16_t snscb_rblen; /* response buffer length (words) */
1518 uint16_t snscb_reserved0;
1519 uint16_t snscb_addr[4]; /* response buffer address */
1520 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1521 uint16_t snscb_reserved1;
1523 uint16_t snscb_mword_div_2;
1524 uint32_t snscb_reserved3;
1525 uint32_t snscb_fc4_type;
1527 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
1530 uint16_t snscb_rblen; /* response buffer length (words) */
1531 uint16_t snscb_reserved0;
1532 uint16_t snscb_addr[4]; /* response buffer address */
1533 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1534 uint16_t snscb_reserved1;
1536 uint16_t snscb_reserved2;
1537 uint32_t snscb_reserved3;
1538 uint32_t snscb_port;
1539 uint32_t snscb_fc4_types[8];
1541 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
1544 ct_hdr_t snscb_cthdr;
1545 uint8_t snscb_port_type;
1546 uint8_t snscb_port_id[3];
1547 uint8_t snscb_portname[8];
1548 uint16_t snscb_data[]; /* variable data */
1549 } sns_scrsp_t; /* Subcommand Response Structure */
1552 ct_hdr_t snscb_cthdr;
1553 uint8_t snscb_port_type;
1554 uint8_t snscb_port_id[3];
1555 uint8_t snscb_portname[8];
1556 uint8_t snscb_pnlen; /* symbolic port name length */
1557 uint8_t snscb_pname[255]; /* symbolic port name */
1558 uint8_t snscb_nodename[8];
1559 uint8_t snscb_nnlen; /* symbolic node name length */
1560 uint8_t snscb_nname[255]; /* symbolic node name */
1561 uint8_t snscb_ipassoc[8];
1562 uint8_t snscb_ipaddr[16];
1563 uint8_t snscb_svc_class[4];
1564 uint8_t snscb_fc4_types[32];
1565 uint8_t snscb_fpname[8];
1566 uint8_t snscb_reserved;
1567 uint8_t snscb_hardaddr[3];
1568 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
1569 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
1572 ct_hdr_t snscb_cthdr;
1573 uint8_t snscb_wwn[8];
1575 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
1578 ct_hdr_t snscb_cthdr;
1579 uint32_t snscb_fc4_features[32];
1581 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
1584 ct_hdr_t snscb_cthdr;
1590 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1591 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
1594 * Other Misc Structures
1597 /* ELS Pass Through */
1600 uint32_t els_handle;
1601 uint16_t els_status;
1603 uint16_t els_xmit_dsd_count; /* outgoing only */
1607 uint16_t els_recv_dsd_count; /* outgoing only */
1609 uint8_t els_reserved1;
1611 uint8_t els_did_mid;
1613 uint8_t els_reserved2;
1614 uint16_t els_reserved3;
1615 uint16_t els_ctl_flags;
1618 uint32_t _els_bytecnt;
1619 uint32_t _els_subcode1;
1620 uint32_t _els_subcode2;
1621 uint8_t _els_reserved4[20];
1624 uint32_t _els_recv_bytecnt;
1625 uint32_t _els_xmit_bytecnt;
1626 uint32_t _els_xmit_dsd_length;
1627 uint16_t _els_xmit_dsd_a1500;
1628 uint16_t _els_xmit_dsd_a3116;
1629 uint16_t _els_xmit_dsd_a4732;
1630 uint16_t _els_xmit_dsd_a6348;
1631 uint32_t _els_recv_dsd_length;
1632 uint16_t _els_recv_dsd_a1500;
1633 uint16_t _els_recv_dsd_a3116;
1634 uint16_t _els_recv_dsd_a4732;
1635 uint16_t _els_recv_dsd_a6348;
1638 #define els_bytecnt inout.in._els_bytecnt
1639 #define els_subcode1 inout.in._els_subcode1
1640 #define els_subcode2 inout.in._els_subcode2
1641 #define els_reserved4 inout.in._els_reserved4
1642 #define els_recv_bytecnt inout.out._els_recv_bytecnt
1643 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt
1644 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length
1645 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500
1646 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116
1647 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732
1648 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348
1649 #define els_recv_dsd_length inout.out._els_recv_dsd_length
1650 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500
1651 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116
1652 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732
1653 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348
1657 * A handy package structure for running FC-SCSI commands internally
1668 uint32_t data_length;
1676 uint32_t data_residual;
1679 uint16_t sense_length;
1680 uint8_t sense_data[32];
1686 * Target Mode related definitions
1688 #define QLTM_SENSELEN 18 /* non-FC cards only */
1689 #define QLTM_SVALID 0x80
1692 * Structure for Enable Lun and Modify Lun queue entries
1696 uint32_t le_reserved;
1699 uint8_t le_ops; /* Modify LUN only */
1700 uint8_t le_tgt; /* Not for FC */
1701 uint32_t le_flags; /* Not for FC */
1703 uint8_t le_reserved2;
1704 uint8_t le_cmd_count;
1705 uint8_t le_in_count;
1706 uint8_t le_cdb6len; /* Not for FC */
1707 uint8_t le_cdb7len; /* Not for FC */
1708 uint16_t le_timeout;
1709 uint16_t le_reserved3[20];
1715 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */
1716 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */
1717 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */
1718 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */
1723 #define LUN_CCINCR 0x01 /* increment command count */
1724 #define LUN_CCDECR 0x02 /* decrement command count */
1725 #define LUN_ININCR 0x40 /* increment immed. notify count */
1726 #define LUN_INDECR 0x80 /* decrement immed. notify count */
1731 #define LUN_OK 0x01 /* we be rockin' */
1732 #define LUN_ERR 0x04 /* request completed with error */
1733 #define LUN_INVAL 0x06 /* invalid request */
1734 #define LUN_NOCAP 0x16 /* can't provide requested capability */
1735 #define LUN_ENABLED 0x3E /* LUN already enabled */
1738 * Immediate Notify Entry structure
1740 #define IN_MSGLEN 8 /* 8 bytes */
1741 #define IN_RSVDLEN 8 /* 8 words */
1744 uint32_t in_reserved;
1745 uint8_t in_lun; /* lun */
1746 uint8_t in_iid; /* initiator */
1747 uint8_t in_reserved2;
1748 uint8_t in_tgt; /* target */
1752 uint8_t in_tag_val; /* tag value */
1753 uint8_t in_tag_type; /* tag type */
1754 uint16_t in_seqid; /* sequence id */
1755 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */
1756 uint16_t in_reserved3[IN_RSVDLEN];
1757 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */
1762 uint32_t in_reserved;
1763 uint8_t in_lun; /* lun */
1764 uint8_t in_iid; /* initiator */
1766 uint32_t in_reserved2;
1768 uint16_t in_task_flags;
1769 uint16_t in_seqid; /* sequence id */
1774 uint32_t in_reserved;
1775 uint16_t in_iid; /* initiator */
1777 uint32_t in_reserved2;
1779 uint16_t in_task_flags;
1780 uint16_t in_seqid; /* sequence id */
1784 * Values for the in_status field
1786 #define IN_REJECT 0x0D /* Message Reject message received */
1787 #define IN_RESET 0x0E /* Bus Reset occurred */
1788 #define IN_NO_RCAP 0x16 /* requested capability not available */
1789 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
1790 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */
1791 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */
1792 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */
1793 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */
1794 #define IN_PORT_CHANGED 0x2A /* port changed */
1795 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */
1796 #define IN_NO_NEXUS 0x3B /* Nexus not established */
1797 #define IN_SRR_RCVD 0x45 /* SRR received */
1800 * Values for the in_task_flags field- should only get one at a time!
1802 #define TASK_FLAGS_RESERVED_MASK (0xe700)
1803 #define TASK_FLAGS_CLEAR_ACA (1<<14)
1804 #define TASK_FLAGS_TARGET_RESET (1<<13)
1805 #define TASK_FLAGS_LUN_RESET (1<<12)
1806 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10)
1807 #define TASK_FLAGS_ABORT_TASK_SET (1<<9)
1810 * ISP24XX Immediate Notify
1814 uint32_t in_reserved;
1816 uint16_t in_reserved1;
1818 uint16_t in_srr_rxid;
1820 uint8_t in_status_subcode;
1821 uint8_t in_fwhandle;
1823 uint16_t in_srr_reloff_lo;
1824 uint16_t in_srr_reloff_hi;
1826 uint16_t in_srr_oxid;
1828 * If bit 2 is set in in_flags, the N-Port and
1829 * handle tags are valid. If the received ELS is
1830 * a LOGO, then these tags contain the N Port ID
1831 * from the LOGO payload. If the received ELS
1832 * request is TPRLO, these tags contain the
1833 * Third Party Originator N Port ID.
1835 uint16_t in_nport_id_hi;
1836 #define in_prli_options in_nport_id_hi
1837 uint8_t in_nport_id_lo;
1838 uint8_t in_reserved3;
1839 uint16_t in_np_handle;
1840 uint8_t in_reserved4[12];
1841 uint8_t in_reserved5;
1843 uint32_t in_reserved6;
1844 uint16_t in_portid_lo;
1845 uint8_t in_portid_hi;
1846 uint8_t in_reserved7;
1847 uint16_t in_reserved8;
1849 } in_fcentry_24xx_t;
1851 #define IN24XX_FLAG_PUREX_IOCB 0x1
1852 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2
1853 #define IN24XX_FLAG_NPHDL_VALID 0x4
1854 #define IN24XX_FLAG_N2N_PRLI 0x8
1855 #define IN24XX_FLAG_PN_NN_VALID 0x10
1857 #define IN24XX_LIP_RESET 0x0E
1858 #define IN24XX_LINK_RESET 0x0F
1859 #define IN24XX_PORT_LOGOUT 0x29
1860 #define IN24XX_PORT_CHANGED 0x2A
1861 #define IN24XX_LINK_FAILED 0x2E
1862 #define IN24XX_SRR_RCVD 0x45
1863 #define IN24XX_ELS_RCVD 0x46 /*
1864 * login-affectin ELS received- check
1865 * subcode for specific opcode
1869 * For f/w > 4.0.25, these offsets in the Immediate Notify contain
1870 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in
1871 * Big Endian format.
1873 #define IN24XX_PRLI_WWNN_OFF 0x18
1874 #define IN24XX_PRLI_WWPN_OFF 0x28
1875 #define IN24XX_PLOGI_WWNN_OFF 0x20
1876 #define IN24XX_PLOGI_WWPN_OFF 0x28
1879 * For f/w > 4.0.25, this offset in the Immediate Notify contain
1880 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format.
1882 #define IN24XX_LOGO_WWPN_OFF 0x28
1885 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT
1887 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00
1888 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01
1889 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02
1890 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03
1891 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04
1892 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05
1893 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06
1894 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07
1895 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08
1896 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09
1899 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED
1901 #define IN24XX_PORT_CHANGED_BADFAN 0x00
1902 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01
1903 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02
1904 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03
1905 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04
1906 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05
1909 * Notify Acknowledge Entry structure
1911 #define NA_RSVDLEN 22
1914 uint32_t na_reserved;
1915 uint8_t na_lun; /* lun */
1916 uint8_t na_iid; /* initiator */
1917 uint8_t na_reserved2;
1918 uint8_t na_tgt; /* target */
1922 uint16_t na_seqid; /* sequence id */
1923 uint16_t na_reserved3[NA_RSVDLEN];
1927 * Value for the na_event field
1929 #define NA_RST_CLRD 0x80 /* Clear an async event notification */
1930 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */
1931 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */
1933 #define NA2_RSVDLEN 21
1936 uint32_t na_reserved;
1937 uint8_t na_reserved1;
1938 uint8_t na_iid; /* initiator loop id */
1939 uint16_t na_response;
1941 uint16_t na_reserved2;
1943 uint16_t na_task_flags;
1944 uint16_t na_seqid; /* sequence id */
1945 uint16_t na_reserved3[NA2_RSVDLEN];
1950 uint32_t na_reserved;
1951 uint16_t na_iid; /* initiator loop id */
1952 uint16_t na_response; /* response code */
1954 uint16_t na_reserved2;
1956 uint16_t na_task_flags;
1957 uint16_t na_seqid; /* sequence id */
1958 uint16_t na_reserved3[NA2_RSVDLEN];
1961 #define NAFC_RCOUNT 0x80 /* increment resource count */
1962 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
1963 #define NAFC_TVALID 0x10 /* task mangement response code is valid */
1966 * ISP24XX Notify Acknowledge
1973 uint16_t na_reserved1;
1975 uint16_t na_srr_rxid;
1977 uint8_t na_status_subcode;
1978 uint8_t na_fwhandle;
1980 uint16_t na_srr_reloff_lo;
1981 uint16_t na_srr_reloff_hi;
1983 uint16_t na_srr_flags;
1984 uint8_t na_reserved3[18];
1985 uint8_t na_reserved4;
1987 uint8_t na_srr_reject_vunique;
1988 uint8_t na_srr_reject_explanation;
1989 uint8_t na_srr_reject_code;
1990 uint8_t na_reserved5;
1991 uint8_t na_reserved6[6];
1993 } na_fcentry_24xx_t;
1996 * Accept Target I/O Entry structure
1998 #define ATIO_CDBLEN 26
2002 uint16_t at_reserved;
2004 uint8_t at_lun; /* lun */
2005 uint8_t at_iid; /* initiator */
2006 uint8_t at_cdblen; /* cdb length */
2007 uint8_t at_tgt; /* target */
2009 uint8_t at_status; /* firmware status */
2010 uint8_t at_scsi_status; /* scsi status */
2011 uint8_t at_tag_val; /* tag value */
2012 uint8_t at_tag_type; /* tag type */
2013 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */
2014 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */
2020 #define AT_NODISC 0x00008000 /* disconnect disabled */
2021 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */
2026 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */
2027 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */
2028 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2029 #define AT_NOCAP 0x16 /* Requested capability not available */
2030 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2031 #define AT_CDB 0x3D /* CDB received */
2033 * Macros to create and fetch and test concatenated handle and tag value macros
2036 #define AT_MAKE_TAGID(tid, aep) \
2037 tid = aep->at_handle; \
2038 if (aep->at_flags & AT_TQAE) { \
2039 tid |= (aep->at_tag_val << 16); \
2043 #define CT_MAKE_TAGID(tid, ct) \
2044 tid = ct->ct_fwhandle; \
2045 if (ct->ct_flags & CT_TQAE) { \
2046 tid |= (ct->ct_tag_val << 16); \
2050 #define AT_HAS_TAG(val) ((val) & (1 << 24))
2051 #define AT_GET_TAG(val) (((val) >> 16) & 0xff)
2052 #define AT_GET_HANDLE(val) ((val) & 0xffff)
2054 #define IN_MAKE_TAGID(tid, inp) \
2055 tid = inp->in_seqid; \
2056 tid |= (inp->in_tag_val << 16); \
2060 * Accept Target I/O Entry structure, Type 2
2062 #define ATIO2_CDBLEN 16
2066 uint32_t at_reserved;
2067 uint8_t at_lun; /* lun or reserved */
2068 uint8_t at_iid; /* initiator */
2069 uint16_t at_rxid; /* response ID */
2071 uint16_t at_status; /* firmware status */
2072 uint8_t at_crn; /* command reference number */
2073 uint8_t at_taskcodes;
2074 uint8_t at_taskflags;
2075 uint8_t at_execodes;
2076 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2077 uint32_t at_datalen; /* allocated data len */
2078 uint16_t at_scclun; /* SCC Lun or reserved */
2079 uint16_t at_wwpn[4]; /* WWPN of initiator */
2080 uint16_t at_reserved2[6];
2086 uint32_t at_reserved;
2087 uint16_t at_iid; /* initiator */
2088 uint16_t at_rxid; /* response ID */
2090 uint16_t at_status; /* firmware status */
2091 uint8_t at_crn; /* command reference number */
2092 uint8_t at_taskcodes;
2093 uint8_t at_taskflags;
2094 uint8_t at_execodes;
2095 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2096 uint32_t at_datalen; /* allocated data len */
2097 uint16_t at_scclun; /* SCC Lun or reserved */
2098 uint16_t at_wwpn[4]; /* WWPN of initiator */
2099 uint16_t at_reserved2[6];
2103 #define ATIO2_WWPN_OFFSET 0x2A
2104 #define ATIO2_OXID_OFFSET 0x3E
2106 #define ATIO2_TC_ATTR_MASK 0x7
2107 #define ATIO2_TC_ATTR_SIMPLEQ 0
2108 #define ATIO2_TC_ATTR_HEADOFQ 1
2109 #define ATIO2_TC_ATTR_ORDERED 2
2110 #define ATIO2_TC_ATTR_ACAQ 4
2111 #define ATIO2_TC_ATTR_UNTAGGED 5
2113 #define ATIO2_EX_WRITE 0x1
2114 #define ATIO2_EX_READ 0x2
2116 * Macros to create and fetch and test concatenated handle and tag value macros
2118 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \
2119 tid = aep->at_rxid; \
2120 tid |= (((uint64_t)inst) << 32); \
2121 tid |= (((uint64_t)bus) << 48)
2123 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \
2124 tid = ct->ct_rxid; \
2125 tid |= (((uint64_t)inst) << 32); \
2126 tid |= (((uint64_t)(bus & 0xff)) << 48)
2128 #define AT2_HAS_TAG(val) 1
2129 #define AT2_GET_TAG(val) ((val) & 0xffffffff)
2130 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff)
2131 #define AT2_GET_HANDLE AT2_GET_TAG
2132 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff)
2134 #define FC_HAS_TAG AT2_HAS_TAG
2135 #define FC_GET_TAG AT2_GET_TAG
2136 #define FC_GET_INST AT2_GET_INST
2137 #define FC_GET_HANDLE AT2_GET_HANDLE
2139 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \
2141 tid |= (((uint64_t)inst) << 32); \
2142 tid |= (((uint64_t)(bus & 0xff)) << 48)
2144 #define FC_TAG_INSERT_INST(tid, inst) \
2145 tid &= ~0x0000ffff00000000ull; \
2146 tid |= (((uint64_t)inst) << 32)
2149 * 24XX ATIO Definition
2151 * This is *quite* different from other entry types.
2152 * First of all, it has its own queue it comes in on.
2154 * Secondly, it doesn't have a normal header.
2156 * Thirdly, it's just a passthru of the FCP CMND IU
2157 * which is recorded in big endian mode.
2163 * Task attribute in high four bits,
2164 * the rest is the FCP CMND IU Length.
2165 * NB: the command can extend past the
2166 * length for a single queue entry.
2171 fcp_cmnd_iu_t at_cmnd;
2173 #define AT7_NORESRC_RXID 0xffffffff
2177 * Continue Target I/O Entry structure
2178 * Request from driver. The response from the
2179 * ISP firmware is the same except that the last 18
2180 * bytes are overwritten by suggested sense data if
2181 * the 'autosense valid' bit is set in the status byte.
2185 uint16_t ct_syshandle;
2186 uint16_t ct_fwhandle; /* required by f/w */
2187 uint8_t ct_lun; /* lun */
2188 uint8_t ct_iid; /* initiator id */
2189 uint8_t ct_reserved2;
2190 uint8_t ct_tgt; /* our target id */
2192 uint8_t ct_status; /* isp status */
2193 uint8_t ct_scsi_status; /* scsi status */
2194 uint8_t ct_tag_val; /* tag value */
2195 uint8_t ct_tag_type; /* tag type */
2196 uint32_t ct_xfrlen; /* transfer length */
2197 uint32_t ct_resid; /* residual length */
2198 uint16_t ct_timeout;
2199 uint16_t ct_seg_count;
2200 ispds_t ct_dataseg[ISP_RQDSEG];
2204 * For some of the dual port SCSI adapters, port (bus #) is reported
2205 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
2207 * Note that this does not apply to FC adapters at all which can and
2208 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
2209 * that have logged in across a SCSI fabric.
2211 #define GET_IID_VAL(x) (x & 0x3f)
2212 #define GET_BUS_VAL(x) ((x >> 7) & 0x1)
2213 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
2214 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
2219 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */
2220 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */
2221 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */
2222 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */
2223 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */
2224 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */
2225 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */
2226 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */
2227 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */
2228 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */
2229 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */
2233 * - set by the firmware when it returns the CTIO
2235 #define CT_OK 0x01 /* completed without error */
2236 #define CT_ABORTED 0x02 /* aborted by host */
2237 #define CT_ERR 0x04 /* see sense data for error */
2238 #define CT_INVAL 0x06 /* request for disabled lun */
2239 #define CT_NOPATH 0x07 /* invalid ITL nexus */
2240 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */
2241 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */
2242 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */
2243 #define CT_TIMEOUT 0x0B /* timed out */
2244 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */
2245 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */
2246 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */
2247 #define CT_PANIC 0x13 /* Unrecoverable Error */
2248 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2249 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
2250 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2251 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
2252 #define CT_PORTUNAVAIL 0x28 /* port not available */
2253 #define CT_LOGOUT 0x29 /* port logout */
2254 #define CT_PORTCHANGED 0x2A /* port changed */
2255 #define CT_IDE 0x33 /* Initiator Detected Error */
2256 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
2257 #define CT_SRR 0x45 /* SRR Received */
2258 #define CT_LUN_RESET 0x48 /* Lun Reset Received */
2260 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/
2263 * When the firmware returns a CTIO entry, it may overwrite the last
2264 * part of the structure with sense data. This starts at offset 0x2E
2265 * into the entry, which is in the middle of ct_dataseg[1]. Rather
2266 * than define a new struct for this, I'm just using the sense data
2269 #define CTIO_SENSE_OFFSET 0x2E
2272 * Entry length in u_longs. All entries are the same size so
2273 * any one will do as the numerator.
2275 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t))
2278 * QLA2100 CTIO (type 2) entry
2280 #define MAXRESPLEN 26
2283 uint32_t ct_syshandle;
2284 uint8_t ct_lun; /* lun */
2285 uint8_t ct_iid; /* initiator id */
2286 uint16_t ct_rxid; /* response ID */
2288 uint16_t ct_status; /* isp status */
2289 uint16_t ct_timeout;
2290 uint16_t ct_seg_count;
2291 uint32_t ct_reloff; /* relative offset */
2292 uint32_t ct_resid; /* residual length */
2295 * The three different modes that the target driver
2296 * can set the CTIO{2,3,4} up as.
2298 * The first is for sending FCP_DATA_IUs as well as
2299 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
2301 * The second is for sending SCSI sense data in an FCP_RSP_IU.
2302 * Note that no FCP_DATA_IUs will be sent.
2304 * The third is for sending FCP_RSP_IUs as built specifically
2305 * in system memory as located by the isp_dataseg.
2309 uint16_t _reserved2;
2310 uint16_t ct_scsi_status;
2313 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2314 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2315 ispdslist_t ct_dslist;
2320 uint16_t _reserved2;
2321 uint16_t ct_senselen;
2322 uint16_t ct_scsi_status;
2323 uint16_t ct_resplen;
2324 uint8_t ct_resp[MAXRESPLEN];
2328 uint16_t _reserved2;
2329 uint16_t _reserved3;
2330 uint32_t ct_datalen;
2332 ispds_t ct_fcp_rsp_iudata_32;
2333 ispds64_t ct_fcp_rsp_iudata_64;
2341 uint32_t ct_syshandle;
2342 uint16_t ct_iid; /* initiator id */
2343 uint16_t ct_rxid; /* response ID */
2345 uint16_t ct_status; /* isp status */
2346 uint16_t ct_timeout;
2347 uint16_t ct_seg_count;
2348 uint32_t ct_reloff; /* relative offset */
2349 uint32_t ct_resid; /* residual length */
2353 uint16_t _reserved2;
2354 uint16_t ct_scsi_status;
2357 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2358 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2359 ispdslist_t ct_dslist;
2364 uint16_t _reserved2;
2365 uint16_t ct_senselen;
2366 uint16_t ct_scsi_status;
2367 uint16_t ct_resplen;
2368 uint8_t ct_resp[MAXRESPLEN];
2372 uint16_t _reserved2;
2373 uint16_t _reserved3;
2374 uint32_t ct_datalen;
2376 ispds_t ct_fcp_rsp_iudata_32;
2377 ispds64_t ct_fcp_rsp_iudata_64;
2384 * ct_flags values for CTIO2
2386 #define CT2_FLAG_MODE0 0x0000
2387 #define CT2_FLAG_MODE1 0x0001
2388 #define CT2_FLAG_MODE2 0x0002
2389 #define CT2_FLAG_MMASK 0x0003
2390 #define CT2_DATA_IN 0x0040 /* *to* initiator */
2391 #define CT2_DATA_OUT 0x0080 /* *from* initiator */
2392 #define CT2_NO_DATA 0x00C0
2393 #define CT2_DATAMASK 0x00C0
2394 #define CT2_CCINCR 0x0100
2395 #define CT2_FASTPOST 0x0200
2396 #define CT2_CONFIRM 0x2000
2397 #define CT2_TERMINATE 0x4000
2398 #define CT2_SENDSTATUS 0x8000
2401 * ct_status values are (mostly) the same as that for ct_entry.
2405 * ct_scsi_status values- the low 8 bits are the normal SCSI status
2406 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
2409 #define CT2_RSPLEN_VALID 0x0100
2410 #define CT2_SNSLEN_VALID 0x0200
2411 #define CT2_DATA_OVER 0x0400
2412 #define CT2_DATA_UNDER 0x0800
2417 #define MAXRESPLEN_24XX 24
2420 uint32_t ct_syshandle;
2421 uint16_t ct_nphdl; /* status on returned CTIOs */
2422 uint16_t ct_timeout;
2423 uint16_t ct_seg_count;
2426 uint16_t ct_iid_lo; /* low 16 bits of portid */
2427 uint8_t ct_iid_hi; /* hi 8 bits of portid */
2428 uint8_t ct_reserved;
2430 uint16_t ct_senselen; /* mode 1 only */
2432 uint32_t ct_resid; /* residual length */
2434 uint16_t ct_scsi_status; /* modes 0 && 1 only */
2444 uint16_t ct_resplen;
2446 uint8_t ct_resp[MAXRESPLEN_24XX];
2451 uint32_t ct_datalen;
2453 ispds64_t ct_fcp_rsp_iudata;
2459 * ct_flags values for CTIO7
2461 #define CT7_NO_DATA 0x0000
2462 #define CT7_DATA_OUT 0x0001 /* *from* initiator */
2463 #define CT7_DATA_IN 0x0002 /* *to* initiator */
2464 #define CT7_DATAMASK 0x3
2465 #define CT7_DSD_ENABLE 0x0004
2466 #define CT7_CONF_STSFD 0x0010
2467 #define CT7_EXPLCT_CONF 0x0020
2468 #define CT7_FLAG_MODE0 0x0000
2469 #define CT7_FLAG_MODE1 0x0040
2470 #define CT7_FLAG_MODE2 0x0080
2471 #define CT7_FLAG_MMASK 0x00C0
2472 #define CT7_NOACK 0x0100
2473 #define CT7_TASK_ATTR_SHIFT 9
2474 #define CT7_CONFIRM 0x2000
2475 #define CT7_TERMINATE 0x4000
2476 #define CT7_SENDSTATUS 0x8000
2479 * Type 7 CTIO status codes
2481 #define CT7_OK 0x01 /* completed without error */
2482 #define CT7_ABORTED 0x02 /* aborted by host */
2483 #define CT7_ERR 0x04 /* see sense data for error */
2484 #define CT7_INVAL 0x06 /* request for disabled lun */
2485 #define CT7_INVRXID 0x08 /* Invalid RX_ID */
2486 #define CT7_DATA_OVER 0x09 /* Data Overrun */
2487 #define CT7_TIMEOUT 0x0B /* timed out */
2488 #define CT7_RESET 0x0E /* LIP Rset Received */
2489 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */
2490 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */
2491 #define CT7_DATA_UNDER 0x15 /* Data Underrun */
2492 #define CT7_PORTUNAVAIL 0x28 /* port not available */
2493 #define CT7_LOGOUT 0x29 /* port logout */
2494 #define CT7_PORTCHANGED 0x2A /* port changed */
2495 #define CT7_SRR 0x45 /* SRR Received */
2498 * Other 24XX related target IOCBs
2505 isphdr_t abts_header;
2506 uint8_t abts_reserved0[6];
2507 uint16_t abts_nphdl;
2508 uint16_t abts_reserved1;
2510 uint32_t abts_rxid_abts;
2511 uint16_t abts_did_lo;
2512 uint8_t abts_did_hi;
2514 uint16_t abts_sid_lo;
2515 uint8_t abts_sid_hi;
2516 uint8_t abts_cs_ctl;
2517 uint16_t abts_fs_ctl;
2520 uint16_t abts_seq_cnt;
2521 uint8_t abts_df_ctl;
2522 uint8_t abts_seq_id;
2523 uint16_t abts_rx_id;
2524 uint16_t abts_ox_id;
2525 uint32_t abts_param;
2526 uint8_t abts_reserved2[16];
2527 uint32_t abts_rxid_task;
2531 isphdr_t abts_rsp_header;
2532 uint32_t abts_rsp_handle;
2533 uint16_t abts_rsp_status;
2534 uint16_t abts_rsp_nphdl;
2535 uint16_t abts_rsp_ctl_flags;
2536 uint16_t abts_rsp_sof;
2537 uint32_t abts_rsp_rxid_abts;
2538 uint16_t abts_rsp_did_lo;
2539 uint8_t abts_rsp_did_hi;
2540 uint8_t abts_rsp_r_ctl;
2541 uint16_t abts_rsp_sid_lo;
2542 uint8_t abts_rsp_sid_hi;
2543 uint8_t abts_rsp_cs_ctl;
2544 uint16_t abts_rsp_f_ctl_lo;
2545 uint8_t abts_rsp_f_ctl_hi;
2546 uint8_t abts_rsp_type;
2547 uint16_t abts_rsp_seq_cnt;
2548 uint8_t abts_rsp_df_ctl;
2549 uint8_t abts_rsp_seq_id;
2550 uint16_t abts_rsp_rx_id;
2551 uint16_t abts_rsp_ox_id;
2552 uint32_t abts_rsp_param;
2556 uint8_t last_seq_id;
2557 uint8_t seq_id_valid;
2558 uint16_t aborted_rx_id;
2559 uint16_t aborted_ox_id;
2560 uint16_t high_seq_cnt;
2561 uint16_t low_seq_cnt;
2562 uint8_t reserved2[4];
2565 uint8_t vendor_unique;
2566 uint8_t explanation;
2569 uint8_t reserved2[12];
2572 uint8_t reserved[8];
2576 uint8_t reserved[16];
2578 uint32_t abts_rsp_rxid_task;
2581 /* terminate this ABTS exchange */
2582 #define ISP24XX_ABTS_RSP_TERMINATE 0x01
2584 #define ISP24XX_ABTS_RSP_COMPLETE 0x00
2585 #define ISP24XX_ABTS_RSP_RESET 0x04
2586 #define ISP24XX_ABTS_RSP_ABORTED 0x05
2587 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06
2588 #define ISP24XX_ABTS_RSP_INVXID 0x08
2589 #define ISP24XX_ABTS_RSP_LOGOUT 0x29
2590 #define ISP24XX_ABTS_RSP_SUBCODE 0x31
2592 #define ISP24XX_NO_TASK 0xffffffff
2597 * These are the limits of the number of dma segments we
2598 * can deal with based not on the size of the segment counter
2599 * (which is 16 bits), but on the size of the number of
2600 * queue entries field (which is 8 bits). We assume no
2601 * segments in the first queue entry, so we can either
2602 * have 7 dma segments per continuation entry or 5
2603 * (for 64 bit dma).. multiplying out by 254....
2605 #define ISP_NSEG_MAX 1778
2606 #define ISP_NSEG64_MAX 1270
2608 #endif /* _ISPMBOX_H */