3 * Copyright (c) 1997-2009 by Matthew Jacob
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
37 * Mailbox Command Opcodes
39 #define MBOX_NO_OP 0x0000
40 #define MBOX_LOAD_RAM 0x0001
41 #define MBOX_EXEC_FIRMWARE 0x0002
42 #define MBOX_DUMP_RAM 0x0003
43 #define MBOX_WRITE_RAM_WORD 0x0004
44 #define MBOX_READ_RAM_WORD 0x0005
45 #define MBOX_MAILBOX_REG_TEST 0x0006
46 #define MBOX_VERIFY_CHECKSUM 0x0007
47 #define MBOX_ABOUT_FIRMWARE 0x0008
48 #define MBOX_LOAD_RISC_RAM_2100 0x0009
50 #define MBOX_LOAD_RISC_RAM 0x000b
52 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
53 #define MBOX_CHECK_FIRMWARE 0x000e
54 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f
55 #define MBOX_INIT_REQ_QUEUE 0x0010
56 #define MBOX_INIT_RES_QUEUE 0x0011
57 #define MBOX_EXECUTE_IOCB 0x0012
58 #define MBOX_WAKE_UP 0x0013
59 #define MBOX_STOP_FIRMWARE 0x0014
60 #define MBOX_ABORT 0x0015
61 #define MBOX_ABORT_DEVICE 0x0016
62 #define MBOX_ABORT_TARGET 0x0017
63 #define MBOX_BUS_RESET 0x0018
64 #define MBOX_STOP_QUEUE 0x0019
65 #define MBOX_START_QUEUE 0x001a
66 #define MBOX_SINGLE_STEP_QUEUE 0x001b
67 #define MBOX_ABORT_QUEUE 0x001c
68 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
70 #define MBOX_GET_FIRMWARE_STATUS 0x001f
71 #define MBOX_GET_INIT_SCSI_ID 0x0020
72 #define MBOX_GET_SELECT_TIMEOUT 0x0021
73 #define MBOX_GET_RETRY_COUNT 0x0022
74 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
75 #define MBOX_GET_CLOCK_RATE 0x0024
76 #define MBOX_GET_ACT_NEG_STATE 0x0025
77 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
78 #define MBOX_GET_SBUS_PARAMS 0x0027
79 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
80 #define MBOX_GET_TARGET_PARAMS 0x0028
81 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
82 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a
88 #define MBOX_SET_INIT_SCSI_ID 0x0030
89 #define MBOX_SET_SELECT_TIMEOUT 0x0031
90 #define MBOX_SET_RETRY_COUNT 0x0032
91 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
92 #define MBOX_SET_CLOCK_RATE 0x0034
93 #define MBOX_SET_ACT_NEG_STATE 0x0035
94 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
95 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
96 #define MBOX_SET_PCI_PARAMETERS 0x0037
97 #define MBOX_SET_TARGET_PARAMS 0x0038
98 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
99 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a
105 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
106 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
107 #define MBOX_EXEC_BIOS_IOCB 0x0042
108 #define MBOX_SET_FW_FEATURES 0x004a
109 #define MBOX_GET_FW_FEATURES 0x004b
110 #define FW_FEATURE_FAST_POST 0x1
111 #define FW_FEATURE_LVD_NOTIFY 0x2
112 #define FW_FEATURE_RIO_32BIT 0x4
113 #define FW_FEATURE_RIO_16BIT 0x8
115 #define MBOX_INIT_REQ_QUEUE_A64 0x0052
116 #define MBOX_INIT_RES_QUEUE_A64 0x0053
118 #define MBOX_ENABLE_TARGET_MODE 0x0055
119 #define ENABLE_TARGET_FLAG 0x8000
120 #define ENABLE_TQING_FLAG 0x0004
121 #define ENABLE_MANDATORY_DISC 0x0002
122 #define MBOX_GET_TARGET_STATUS 0x0056
124 /* These are for the ISP2X00 FC cards */
125 #define MBOX_GET_LOOP_ID 0x0020
126 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */
127 #define ISP24XX_INORDER 0x0100
128 #define ISP24XX_NPIV_SAN 0x0400
129 #define ISP24XX_VSAN_SAN 0x1000
130 #define ISP24XX_FC_SP_SAN 0x2000
132 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028
133 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038
134 #define MBOX_GET_RESOURCE_COUNT 0x0042
135 #define MBOX_REQUEST_OFFLINE_MODE 0x0043
136 #define MBOX_ENHANCED_GET_PDB 0x0047
137 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */
138 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */
139 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */
140 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
141 #define MBOX_INIT_FIRMWARE 0x0060
142 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
143 #define MBOX_INIT_LIP 0x0062
144 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063
145 #define MBOX_GET_PORT_DB 0x0064
146 #define MBOX_CLEAR_ACA 0x0065
147 #define MBOX_TARGET_RESET 0x0066
148 #define MBOX_CLEAR_TASK_SET 0x0067
149 #define MBOX_ABORT_TASK_SET 0x0068
150 #define MBOX_GET_FW_STATE 0x0069
151 #define MBOX_GET_PORT_NAME 0x006A
152 #define MBOX_GET_LINK_STATUS 0x006B
153 #define MBOX_INIT_LIP_RESET 0x006C
154 #define MBOX_SEND_SNS 0x006E
155 #define MBOX_FABRIC_LOGIN 0x006F
156 #define MBOX_SEND_CHANGE_REQUEST 0x0070
157 #define MBOX_FABRIC_LOGOUT 0x0071
158 #define MBOX_INIT_LIP_LOGIN 0x0072
159 #define MBOX_GET_PORT_NODE_NAME_LIST 0x0075
160 #define MBOX_GET_ID_LIST 0x007C
161 #define MBOX_LUN_RESET 0x007E
163 #define MBOX_DRIVER_HEARTBEAT 0x005B
164 #define MBOX_FW_HEARTBEAT 0x005C
166 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */
167 #define MBGSD_GET_RATE 0
168 #define MBGSD_SET_RATE 1
169 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */
170 #define MBGSD_1GB 0x00
171 #define MBGSD_2GB 0x01
172 #define MBGSD_AUTO 0x02
173 #define MBGSD_4GB 0x03 /* 24XX only */
174 #define MBGSD_8GB 0x04 /* 25XX only */
175 #define MBGSD_16GB 0x05 /* 26XX only */
176 #define MBGSD_10GB 0x13 /* 26XX only */
178 #define ISP2100_SET_PCI_PARAM 0x00ff
180 #define MBOX_BUSY 0x04
183 * Mailbox Command Complete Status Codes
185 #define MBOX_COMMAND_COMPLETE 0x4000
186 #define MBOX_INVALID_COMMAND 0x4001
187 #define MBOX_HOST_INTERFACE_ERROR 0x4002
188 #define MBOX_TEST_FAILED 0x4003
189 #define MBOX_COMMAND_ERROR 0x4005
190 #define MBOX_COMMAND_PARAM_ERROR 0x4006
191 #define MBOX_PORT_ID_USED 0x4007
192 #define MBOX_LOOP_ID_USED 0x4008
193 #define MBOX_ALL_IDS_USED 0x4009
194 #define MBOX_NOT_LOGGED_IN 0x400A
195 #define MBOX_LINK_DOWN_ERROR 0x400B
196 #define MBOX_LOOPBACK_ERROR 0x400C
197 #define MBOX_CHECKSUM_ERROR 0x4010
198 #define MBOX_INVALID_PRODUCT_KEY 0x4020
199 /* pseudo mailbox completion codes */
200 #define MBOX_REGS_BUSY 0x6000 /* registers in use */
201 #define MBOX_TIMEOUT 0x6001 /* command timed out */
203 #define MBLOGALL 0xffffffff
204 #define MBLOGNONE 0x00000000
205 #define MBLOGMASK(x) (1 << (((x) - 1) & 0x1f))
208 * Asynchronous event status codes
210 #define ASYNC_BUS_RESET 0x8001
211 #define ASYNC_SYSTEM_ERROR 0x8002
212 #define ASYNC_RQS_XFER_ERR 0x8003
213 #define ASYNC_RSP_XFER_ERR 0x8004
214 #define ASYNC_QWAKEUP 0x8005
215 #define ASYNC_TIMEOUT_RESET 0x8006
216 #define ASYNC_DEVICE_RESET 0x8007
217 #define ASYNC_EXTMSG_UNDERRUN 0x800A
218 #define ASYNC_SCAM_INT 0x800B
219 #define ASYNC_HUNG_SCSI 0x800C
220 #define ASYNC_KILLED_BUS 0x800D
221 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
222 #define ASYNC_LIP_OCCURRED 0x8010
223 #define ASYNC_LOOP_UP 0x8011
224 #define ASYNC_LOOP_DOWN 0x8012
225 #define ASYNC_LOOP_RESET 0x8013
226 #define ASYNC_PDB_CHANGED 0x8014
227 #define ASYNC_CHANGE_NOTIFY 0x8015
228 #define ASYNC_LIP_F8 0x8016
229 #define ASYNC_LIP_ERROR 0x8017
230 #define ASYNC_SECURITY_UPDATE 0x801B
231 #define ASYNC_CMD_CMPLT 0x8020
232 #define ASYNC_CTIO_DONE 0x8021
233 #define ASYNC_RIO32_1 0x8021
234 #define ASYNC_RIO32_2 0x8022
235 #define ASYNC_IP_XMIT_DONE 0x8022
236 #define ASYNC_IP_RECV_DONE 0x8023
237 #define ASYNC_IP_BROADCAST 0x8024
238 #define ASYNC_IP_RCVQ_LOW 0x8025
239 #define ASYNC_IP_RCVQ_EMPTY 0x8026
240 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
241 #define ASYNC_PTPMODE 0x8030
242 #define ASYNC_RIO16_1 0x8031
243 #define ASYNC_RIO16_2 0x8032
244 #define ASYNC_RIO16_3 0x8033
245 #define ASYNC_RIO16_4 0x8034
246 #define ASYNC_RIO16_5 0x8035
247 #define ASYNC_CONNMODE 0x8036
248 #define ISP_CONN_LOOP 1
249 #define ISP_CONN_PTP 2
250 #define ISP_CONN_BADLIP 3
251 #define ISP_CONN_FATAL 4
252 #define ISP_CONN_LOOPBACK 5
253 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */
254 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */
255 #define ASYNC_RCV_ERR 0x8048
258 * Firmware Options. There are a lot of them.
260 * IFCOPTN - ISP Fibre Channel Option Word N
262 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */
263 #define IFCOPT1_EAABSRCVD (1 << 12)
264 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */
265 #define IFCOPT1_ENAPURE (1 << 10)
266 #define IFCOPT1_ENA8017 (1 << 7)
267 #define IFCOPT1_DISGPIO67 (1 << 6)
268 #define IFCOPT1_LIPLOSSIMM (1 << 5)
269 #define IFCOPT1_DISF7SWTCH (1 << 4)
270 #define IFCOPT1_CTIO_RETRY (1 << 3)
271 #define IFCOPT1_LIPASYNC (1 << 1)
272 #define IFCOPT1_LIPF8 (1 << 0)
274 #define IFCOPT2_LOOPBACK (1 << 1)
275 #define IFCOPT2_ATIO3_ONLY (1 << 0)
277 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */
278 #define IFCOPT3_RNDASYNC (1 << 1)
280 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
281 * mailbox command to enable this.
283 #define ASYNC_QFULL_SENT 0x8049
286 * Needs to be enabled
288 #define ASYNC_AUTO_PLOGI_RJT 0x8018
292 #define ASYNC_RJT_SENT 0x8049
295 * All IOCB Queue entries are this size
297 #define QENTRY_LEN 64
300 * Command Structure Definitions
314 #define DSTYPE_32BIT 0
315 #define DSTYPE_64BIT 1
317 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
318 uint32_t ds_segment; /* unused */
319 uint32_t ds_base; /* 32 bit address of DSD list */
324 uint8_t rqs_entry_type;
325 uint8_t rqs_entry_count;
330 /* RQS Flag definitions */
331 #define RQSFLAG_CONTINUATION 0x01
332 #define RQSFLAG_FULL 0x02
333 #define RQSFLAG_BADHEADER 0x04
334 #define RQSFLAG_BADPACKET 0x08
335 #define RQSFLAG_BADCOUNT 0x10
336 #define RQSFLAG_BADORDER 0x20
337 #define RQSFLAG_MASK 0x3f
339 /* RQS entry_type definitions */
340 #define RQSTYPE_REQUEST 0x01
341 #define RQSTYPE_DATASEG 0x02
342 #define RQSTYPE_RESPONSE 0x03
343 #define RQSTYPE_MARKER 0x04
344 #define RQSTYPE_CMDONLY 0x05
345 #define RQSTYPE_ATIO 0x06 /* Target Mode */
346 #define RQSTYPE_CTIO 0x07 /* Target Mode */
347 #define RQSTYPE_SCAM 0x08
348 #define RQSTYPE_A64 0x09
349 #define RQSTYPE_A64_CONT 0x0a
350 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
351 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
352 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */
353 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
354 #define RQSTYPE_CTIO1 0x0f /* Target Mode */
355 #define RQSTYPE_STATUS_CONT 0x10
356 #define RQSTYPE_T2RQS 0x11
357 #define RQSTYPE_CTIO7 0x12
358 #define RQSTYPE_IP_XMIT 0x13
359 #define RQSTYPE_TSK_MGMT 0x14
360 #define RQSTYPE_T4RQS 0x15
361 #define RQSTYPE_ATIO2 0x16 /* Target Mode */
362 #define RQSTYPE_CTIO2 0x17 /* Target Mode */
363 #define RQSTYPE_T7RQS 0x18
364 #define RQSTYPE_T3RQS 0x19
365 #define RQSTYPE_IP_XMIT_64 0x1b
366 #define RQSTYPE_CTIO4 0x1e /* Target Mode */
367 #define RQSTYPE_CTIO3 0x1f /* Target Mode */
368 #define RQSTYPE_RIO1 0x21
369 #define RQSTYPE_RIO2 0x22
370 #define RQSTYPE_IP_RECV 0x23
371 #define RQSTYPE_IP_RECV_CONT 0x24
372 #define RQSTYPE_CT_PASSTHRU 0x29
373 #define RQSTYPE_MS_PASSTHRU 0x29
374 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */
375 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */
376 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */
377 #define RQSTYPE_ABORT_IO 0x33
378 #define RQSTYPE_T6RQS 0x48
379 #define RQSTYPE_LOGIN 0x52
380 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */
381 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */
392 uint16_t req_reserved;
394 uint16_t req_seg_count;
396 ispds_t req_dataseg[ISP_RQDSEG];
398 #define ISP_RQDSEG_A64 2
403 uint8_t mrk_reserved0;
405 uint16_t mrk_modifier;
408 uint8_t mrk_reserved1[48];
415 uint8_t mrk_modifier;
416 uint8_t mrk_reserved0;
417 uint8_t mrk_reserved1;
419 uint16_t mrk_reserved2;
421 uint8_t mrk_reserved3[40];
425 #define SYNC_DEVICE 0
426 #define SYNC_TARGET 1
430 #define ISP_RQDSEG_T2 3
439 uint8_t req_reserved;
441 uint16_t req_seg_count;
443 uint32_t req_totalcnt;
444 ispds_t req_dataseg[ISP_RQDSEG_T2];
453 uint16_t req_reserved;
455 uint16_t req_seg_count;
457 uint32_t req_totalcnt;
458 ispds_t req_dataseg[ISP_RQDSEG_T2];
461 #define ISP_RQDSEG_T3 2
470 uint8_t req_reserved;
472 uint16_t req_seg_count;
474 uint32_t req_totalcnt;
475 ispds64_t req_dataseg[ISP_RQDSEG_T3];
477 #define ispreq64_t ispreqt3_t /* same as.... */
486 uint8_t req_reserved;
488 uint16_t req_seg_count;
490 uint32_t req_totalcnt;
491 ispds64_t req_dataseg[ISP_RQDSEG_T3];
494 /* req_flag values */
495 #define REQFLAG_NODISCON 0x0001
496 #define REQFLAG_HTAG 0x0002
497 #define REQFLAG_OTAG 0x0004
498 #define REQFLAG_STAG 0x0008
499 #define REQFLAG_TARGET_RTN 0x0010
501 #define REQFLAG_NODATA 0x0000
502 #define REQFLAG_DATA_IN 0x0020
503 #define REQFLAG_DATA_OUT 0x0040
504 #define REQFLAG_DATA_UNKNOWN 0x0060
506 #define REQFLAG_DISARQ 0x0100
507 #define REQFLAG_FRC_ASYNC 0x0200
508 #define REQFLAG_FRC_SYNC 0x0400
509 #define REQFLAG_FRC_WIDE 0x0800
510 #define REQFLAG_NOPARITY 0x1000
511 #define REQFLAG_STOPQ 0x2000
512 #define REQFLAG_XTRASNS 0x4000
513 #define REQFLAG_PRIORITY 0x8000
522 uint16_t req_reserved;
524 uint16_t req_seg_count;
537 uint16_t req_seg_count;
538 uint16_t req_reserved;
540 uint8_t req_alen_datadir;
541 uint8_t req_task_management;
542 uint8_t req_task_attribute;
549 ispds64_t req_dataseg;
552 /* Task Management Request Function */
557 uint8_t tmf_reserved0[2];
559 uint16_t tmf_timeout;
562 uint8_t tmf_reserved1[20];
566 uint8_t tmf_reserved2[12];
569 #define ISP24XX_TMF_NOSEND 0x80000000
571 #define ISP24XX_TMF_LUN_RESET 0x00000010
572 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008
573 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004
574 #define ISP24XX_TMF_TARGET_RESET 0x00000002
575 #define ISP24XX_TMF_CLEAR_ACA 0x00000001
577 /* I/O Abort Structure */
579 isphdr_t abrt_header;
580 uint32_t abrt_handle;
582 uint16_t abrt_options;
583 uint32_t abrt_cmd_handle;
584 uint16_t abrt_queue_number;
585 uint8_t abrt_reserved[30];
589 uint8_t abrt_reserved1[12];
592 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */
593 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */
594 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */
599 uint32_t req_reserved;
600 ispds_t req_dataseg[ISP_CDSEG];
603 #define ISP_CDSEG64 5
606 ispds64_t req_dataseg[ISP_CDSEG64];
612 uint16_t req_scsi_status;
613 uint16_t req_completion_status;
614 uint16_t req_state_flags;
615 uint16_t req_status_flags;
617 #define req_response_len req_time /* FC only */
618 uint16_t req_sense_len;
620 uint8_t req_response[8]; /* FC only */
621 uint8_t req_sense_data[32];
625 * Status Continuation
629 uint8_t req_sense_data[60];
638 uint16_t req_completion_status;
641 uint16_t req_reserved0;
642 uint16_t req_state_flags;
643 uint16_t req_retry_delay; /* aka Status Qualifier */
644 uint16_t req_scsi_status;
645 uint32_t req_fcp_residual;
646 uint32_t req_sense_len;
647 uint32_t req_response_len;
648 uint8_t req_rsp_sense[28];
649 } isp24xx_statusreq_t;
652 * For Qlogic 2X00, the high order byte of SCSI status has
653 * additional meaning.
655 #define RQCS_CR 0x1000 /* Confirmation Request */
656 #define RQCS_RU 0x0800 /* Residual Under */
657 #define RQCS_RO 0x0400 /* Residual Over */
658 #define RQCS_RESID (RQCS_RU|RQCS_RO)
659 #define RQCS_SV 0x0200 /* Sense Length Valid */
660 #define RQCS_RV 0x0100 /* FCP Response Length Valid */
669 uint16_t ctp_nphdl; /* n-port handle */
670 uint16_t ctp_cmd_cnt; /* Command DSD count */
672 uint8_t ctp_reserved0;
674 uint16_t ctp_reserved1;
675 uint16_t ctp_rsp_cnt; /* Response DSD count */
676 uint16_t ctp_reserved2[5];
677 uint32_t ctp_rsp_bcnt; /* Response byte count */
678 uint32_t ctp_cmd_bcnt; /* Command byte count */
679 ispds64_t ctp_dataseg[2];
688 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */
691 uint16_t ms_reserved1; /* low 8 bits */
693 uint16_t ms_cmd_cnt; /* Command DSD count */
694 uint16_t ms_tot_cnt; /* Total DSD Count */
695 uint8_t ms_type; /* MS type */
696 uint8_t ms_r_ctl; /* R_CTL */
697 uint16_t ms_rxid; /* RX_ID */
698 uint16_t ms_reserved2;
700 uint32_t ms_rsp_bcnt; /* Response byte count */
701 uint32_t ms_cmd_bcnt; /* Command byte count */
702 ispds64_t ms_dataseg[2];
706 * Completion Status Codes.
708 #define RQCS_COMPLETE 0x0000
709 #define RQCS_DMA_ERROR 0x0002
710 #define RQCS_RESET_OCCURRED 0x0004
711 #define RQCS_ABORTED 0x0005
712 #define RQCS_TIMEOUT 0x0006
713 #define RQCS_DATA_OVERRUN 0x0007
714 #define RQCS_DATA_UNDERRUN 0x0015
715 #define RQCS_QUEUE_FULL 0x001C
717 /* 1X00 Only Completion Codes */
718 #define RQCS_INCOMPLETE 0x0001
719 #define RQCS_TRANSPORT_ERROR 0x0003
720 #define RQCS_COMMAND_OVERRUN 0x0008
721 #define RQCS_STATUS_OVERRUN 0x0009
722 #define RQCS_BAD_MESSAGE 0x000a
723 #define RQCS_NO_MESSAGE_OUT 0x000b
724 #define RQCS_EXT_ID_FAILED 0x000c
725 #define RQCS_IDE_MSG_FAILED 0x000d
726 #define RQCS_ABORT_MSG_FAILED 0x000e
727 #define RQCS_REJECT_MSG_FAILED 0x000f
728 #define RQCS_NOP_MSG_FAILED 0x0010
729 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
730 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
731 #define RQCS_ID_MSG_FAILED 0x0013
732 #define RQCS_UNEXP_BUS_FREE 0x0014
733 #define RQCS_XACT_ERR1 0x0018
734 #define RQCS_XACT_ERR2 0x0019
735 #define RQCS_XACT_ERR3 0x001A
736 #define RQCS_BAD_ENTRY 0x001B
737 #define RQCS_PHASE_SKIPPED 0x001D
738 #define RQCS_ARQS_FAILED 0x001E
739 #define RQCS_WIDE_FAILED 0x001F
740 #define RQCS_SYNCXFER_FAILED 0x0020
741 #define RQCS_LVD_BUSERR 0x0021
743 /* 2X00 Only Completion Codes */
744 #define RQCS_PORT_UNAVAILABLE 0x0028
745 #define RQCS_PORT_LOGGED_OUT 0x0029
746 #define RQCS_PORT_CHANGED 0x002A
747 #define RQCS_PORT_BUSY 0x002B
749 /* 24XX Only Completion Codes */
750 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */
751 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */
752 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */
753 #define RQCS_24XX_TMO 0x0030 /* task management overrun */
757 * 1X00 specific State Flags
759 #define RQSF_GOT_BUS 0x0100
760 #define RQSF_GOT_TARGET 0x0200
761 #define RQSF_SENT_CDB 0x0400
762 #define RQSF_XFRD_DATA 0x0800
763 #define RQSF_GOT_STATUS 0x1000
764 #define RQSF_GOT_SENSE 0x2000
765 #define RQSF_XFER_COMPLETE 0x4000
768 * 2X00 specific State Flags
769 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
771 #define RQSF_DATA_IN 0x0020
772 #define RQSF_DATA_OUT 0x0040
773 #define RQSF_STAG 0x0008
774 #define RQSF_OTAG 0x0004
775 #define RQSF_HTAG 0x0002
779 #define RQSTF_DISCONNECT 0x0001
780 #define RQSTF_SYNCHRONOUS 0x0002
781 #define RQSTF_PARITY_ERROR 0x0004
782 #define RQSTF_BUS_RESET 0x0008
783 #define RQSTF_DEVICE_RESET 0x0010
784 #define RQSTF_ABORTED 0x0020
785 #define RQSTF_TIMEOUT 0x0040
786 #define RQSTF_NEGOTIATION 0x0080
789 * 2X00 specific state flags
793 /* RQSF_GOT_STATUS */
794 /* RQSF_XFER_COMPLETE */
797 * 2X00 specific status flags
801 #define RQSTF_DMA_ERROR 0x0080
802 #define RQSTF_LOGOUT 0x2000
807 #ifndef ISP_EXEC_THROTTLE
808 #define ISP_EXEC_THROTTLE 16
812 * About Firmware returns an 'attribute' word in mailbox 6.
813 * These attributes are for 2200 and 2300.
815 #define ISP_FW_ATTR_TMODE 0x0001
816 #define ISP_FW_ATTR_SCCLUN 0x0002
817 #define ISP_FW_ATTR_FABRIC 0x0004
818 #define ISP_FW_ATTR_CLASS2 0x0008
819 #define ISP_FW_ATTR_FCTAPE 0x0010
820 #define ISP_FW_ATTR_IP 0x0020
821 #define ISP_FW_ATTR_VI 0x0040
822 #define ISP_FW_ATTR_VI_SOLARIS 0x0080
823 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */
825 /* and these are for the 2400 */
826 #define ISP2400_FW_ATTR_CLASS2 0x0001
827 #define ISP2400_FW_ATTR_IP 0x0002
828 #define ISP2400_FW_ATTR_MULTIID 0x0004
829 #define ISP2400_FW_ATTR_SB2 0x0008
830 #define ISP2400_FW_ATTR_T10CRC 0x0010
831 #define ISP2400_FW_ATTR_VI 0x0020
832 #define ISP2400_FW_ATTR_MQ 0x0040
833 #define ISP2400_FW_ATTR_MSIX 0x0080
834 #define ISP2400_FW_ATTR_FCOE 0x0800
835 #define ISP2400_FW_ATTR_VP0 0x1000
836 #define ISP2400_FW_ATTR_EXPFW 0x2000
837 #define ISP2400_FW_ATTR_HOTFW 0x4000
838 #define ISP2400_FW_ATTR_EXTNDED 0x8000
839 #define ISP2400_FW_ATTR_EXTVP 0x00010000
840 #define ISP2400_FW_ATTR_VN2VN 0x00040000
841 #define ISP2400_FW_ATTR_EXMOFF 0x00080000
842 #define ISP2400_FW_ATTR_NPMOFF 0x00100000
843 #define ISP2400_FW_ATTR_DIFCHOP 0x00400000
844 #define ISP2400_FW_ATTR_SRIOV 0x02000000
845 #define ISP2400_FW_ATTR_ASICTMP 0x0200000000
846 #define ISP2400_FW_ATTR_ATIOMQ 0x0400000000
849 * These are either manifestly true or are dependent on f/w attributes
851 #define ISP_CAP_TMODE(isp) \
852 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE))
853 #define ISP_CAP_SCCFW(isp) \
854 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN))
855 #define ISP_CAP_2KLOGIN(isp) \
856 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS))
859 * This is only true for 24XX cards with this f/w attribute
861 #define ISP_CAP_MULTI_ID(isp) \
862 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0)
863 #define ISP_GET_VPIDX(isp, tag) \
864 (ISP_CAP_MULTI_ID(isp) ? tag : 0)
865 #define ISP_CAP_VP0(isp) \
866 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_VP0) : 0)
869 * This is true manifestly or is dependent on a f/w attribute
870 * but may or may not actually be *enabled*. In any case, it
871 * is enabled on a per-channel basis.
873 #define ISP_CAP_FCTAPE(isp) \
874 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE))
876 #define ISP_FCTAPE_ENABLED(isp, chan) \
877 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0)
880 * Reduced Interrupt Operation Response Queue Entries
885 uint32_t req_handles[15];
890 uint16_t req_handles[30];
894 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
898 * Initialization Control Block
900 * Version One (prime) format.
904 uint8_t icb_reserved0;
905 uint16_t icb_fwoptions;
906 uint16_t icb_maxfrmlen;
907 uint16_t icb_maxalloc;
908 uint16_t icb_execthrottle;
909 uint8_t icb_retry_count;
910 uint8_t icb_retry_delay;
911 uint8_t icb_portname[8];
912 uint16_t icb_hardaddr;
913 uint8_t icb_iqdevtype;
914 uint8_t icb_logintime;
915 uint8_t icb_nodename[8];
916 uint16_t icb_rqstout;
917 uint16_t icb_rspnsin;
918 uint16_t icb_rqstqlen;
919 uint16_t icb_rsltqlen;
920 uint16_t icb_rqstaddr[4];
921 uint16_t icb_respaddr[4];
922 uint16_t icb_lunenables;
925 uint16_t icb_lunetimeout;
926 uint16_t icb_reserved1;
927 uint16_t icb_xfwoptions;
928 uint8_t icb_racctimer;
929 uint8_t icb_idelaytimer;
930 uint16_t icb_zfwoptions;
931 uint16_t icb_reserved2[13];
934 #define ICB_VERSION1 1
936 #define ICBOPT_EXTENDED 0x8000
937 #define ICBOPT_BOTH_WWNS 0x4000
938 #define ICBOPT_FULL_LOGIN 0x2000
939 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */
940 #define ICBOPT_PREV_ADDRESS 0x0800
941 #define ICBOPT_SRCHDOWN 0x0400
942 #define ICBOPT_NOLIP 0x0200
943 #define ICBOPT_PDBCHANGE_AE 0x0100
944 #define ICBOPT_TGT_TYPE 0x0080
945 #define ICBOPT_INI_ADISC 0x0040
946 #define ICBOPT_INI_DISABLE 0x0020
947 #define ICBOPT_TGT_ENABLE 0x0010
948 #define ICBOPT_FAST_POST 0x0008
949 #define ICBOPT_FULL_DUPLEX 0x0004
950 #define ICBOPT_FAIRNESS 0x0002
951 #define ICBOPT_HARD_ADDRESS 0x0001
953 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */
954 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */
955 #define ICBXOPT_FCTAPE_CONFIRM 0x2000
956 #define ICBXOPT_FCTAPE 0x1000
957 #define ICBXOPT_CLASS2_ACK0 0x0200
958 #define ICBXOPT_CLASS2 0x0100
959 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */
960 #define ICBXOPT_TOPO_MASK 0x0070
961 #define ICBXOPT_LOOP_ONLY 0x0000
962 #define ICBXOPT_PTP_ONLY 0x0010
963 #define ICBXOPT_LOOP_2_PTP 0x0020
964 #define ICBXOPT_PTP_2_LOOP 0x0030
966 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
967 * RIO is not defined for the 23XX cards (just 2200)
969 #define ICBXOPT_RIO_OFF 0
970 #define ICBXOPT_RIO_16BIT 1
971 #define ICBXOPT_RIO_32BIT 2
972 #define ICBXOPT_RIO_16BIT_IOCB 3
973 #define ICBXOPT_RIO_32BIT_IOCB 4
974 #define ICBXOPT_ZIO 5
975 #define ICBXOPT_TIMER_MASK 0x7
977 #define ICBZOPT_RATE_MASK 0xC000
978 #define ICBZOPT_RATE_ONEGB 0x0000
979 #define ICBZOPT_RATE_AUTO 0x8000
980 #define ICBZOPT_RATE_TWOGB 0x4000
981 #define ICBZOPT_50_OHM 0x2000
982 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */
983 #define ICBZOPT_RSPSZ_MASK 0x0030
984 #define ICBZOPT_RSPSZ_24 0x0000
985 #define ICBZOPT_RSPSZ_12 0x0010
986 #define ICBZOPT_RSPSZ_24A 0x0020
987 #define ICBZOPT_RSPSZ_32 0x0030
988 #define ICBZOPT_SOFTID 0x0002
989 #define ICBZOPT_ENA_RDXFR_RDY 0x0001
991 /* 2400 F/W options */
992 #define ICB2400_OPT1_BOTH_WWNS 0x00004000
993 #define ICB2400_OPT1_FULL_LOGIN 0x00002000
994 #define ICB2400_OPT1_PREV_ADDRESS 0x00000800
995 #define ICB2400_OPT1_SRCHDOWN 0x00000400
996 #define ICB2400_OPT1_NOLIP 0x00000200
997 #define ICB2400_OPT1_INI_DISABLE 0x00000020
998 #define ICB2400_OPT1_TGT_ENABLE 0x00000010
999 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004
1000 #define ICB2400_OPT1_FAIRNESS 0x00000002
1001 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001
1003 #define ICB2400_OPT2_ENA_ATIOMQ 0x08000000
1004 #define ICB2400_OPT2_ENA_IHA 0x04000000
1005 #define ICB2400_OPT2_QOS 0x02000000
1006 #define ICB2400_OPT2_IOCBS 0x01000000
1007 #define ICB2400_OPT2_ENA_IHR 0x00400000
1008 #define ICB2400_OPT2_ENA_VMS 0x00200000
1009 #define ICB2400_OPT2_ENA_TA 0x00100000
1010 #define ICB2400_OPT2_TPRLIC 0x00004000
1011 #define ICB2400_OPT2_FCTAPE 0x00001000
1012 #define ICB2400_OPT2_FCSP 0x00000800
1013 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200
1014 #define ICB2400_OPT2_CLASS2 0x00000100
1015 #define ICB2400_OPT2_NO_PLAY 0x00000080
1016 #define ICB2400_OPT2_TOPO_MASK 0x00000070
1017 #define ICB2400_OPT2_LOOP_ONLY 0x00000000
1018 #define ICB2400_OPT2_PTP_ONLY 0x00000010
1019 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020
1020 #define ICB2400_OPT2_TIMER_MASK 0x0000000f
1021 #define ICB2400_OPT2_ZIO 0x00000005
1022 #define ICB2400_OPT2_ZIO1 0x00000006
1024 #define ICB2400_OPT3_NO_CTXDIS 0x40000000
1025 #define ICB2400_OPT3_ENA_ETH_RESP 0x08000000
1026 #define ICB2400_OPT3_ENA_ETH_ATIO 0x04000000
1027 #define ICB2400_OPT3_ENA_MFCF 0x00020000
1028 #define ICB2400_OPT3_SKIP_FOURGB 0x00010000
1029 #define ICB2400_OPT3_RATE_MASK 0x0000E000
1030 #define ICB2400_OPT3_RATE_ONEGB 0x00000000
1031 #define ICB2400_OPT3_RATE_TWOGB 0x00002000
1032 #define ICB2400_OPT3_RATE_AUTO 0x00004000
1033 #define ICB2400_OPT3_RATE_FOURGB 0x00006000
1034 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000
1035 #define ICB2400_OPT3_RATE_SIXTEENGB 0x0000A000
1036 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200
1037 #define ICB2400_OPT3_NO_N2N_LOGI 0x00000100
1038 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080
1039 #define ICB2400_OPT3_ENA_OOF 0x00000040
1040 /* note that a response size flag of zero is reserved! */
1041 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030
1042 #define ICB2400_OPT3_RSPSZ_12 0x00000010
1043 #define ICB2400_OPT3_RSPSZ_24 0x00000020
1044 #define ICB2400_OPT3_RSPSZ_32 0x00000030
1045 #define ICB2400_OPT3_SOFTID 0x00000002
1047 #define ICB_MIN_FRMLEN 256
1048 #define ICB_MAX_FRMLEN 2112
1049 #define ICB_DFLT_FRMLEN 1024
1050 #define ICB_DFLT_ALLOC 256
1051 #define ICB_DFLT_THROTTLE 16
1052 #define ICB_DFLT_RDELAY 5
1053 #define ICB_DFLT_RCOUNT 3
1055 #define ICB_LOGIN_TOV 30
1056 #define ICB_LUN_ENABLE_TOV 15
1060 * And somebody at QLogic had a great idea that you could just change
1061 * the structure *and* keep the version number the same as the other cards.
1064 uint16_t icb_version;
1065 uint16_t icb_reserved0;
1066 uint16_t icb_maxfrmlen;
1067 uint16_t icb_execthrottle;
1068 uint16_t icb_xchgcnt;
1069 uint16_t icb_hardaddr;
1070 uint8_t icb_portname[8];
1071 uint8_t icb_nodename[8];
1072 uint16_t icb_rspnsin;
1073 uint16_t icb_rqstout;
1074 uint16_t icb_retry_count;
1075 uint16_t icb_priout;
1076 uint16_t icb_rsltqlen;
1077 uint16_t icb_rqstqlen;
1078 uint16_t icb_ldn_nols;
1079 uint16_t icb_prqstqlen;
1080 uint16_t icb_rqstaddr[4];
1081 uint16_t icb_respaddr[4];
1082 uint16_t icb_priaddr[4];
1083 uint16_t icb_msixresp;
1084 uint16_t icb_msixatio;
1085 uint16_t icb_reserved1[2];
1086 uint16_t icb_atio_in;
1087 uint16_t icb_atioqlen;
1088 uint16_t icb_atioqaddr[4];
1089 uint16_t icb_idelaytimer;
1090 uint16_t icb_logintime;
1091 uint32_t icb_fwoptions1;
1092 uint32_t icb_fwoptions2;
1093 uint32_t icb_fwoptions3;
1095 uint16_t icb_reserved2[3];
1096 uint16_t icb_enodemac[3];
1097 uint16_t icb_disctime;
1098 uint16_t icb_reserved3[4];
1101 #define RQRSP_ADDR0015 0
1102 #define RQRSP_ADDR1631 1
1103 #define RQRSP_ADDR3247 2
1104 #define RQRSP_ADDR4863 3
1116 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
1117 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \
1118 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \
1119 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1120 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1121 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1122 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1123 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1124 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1126 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \
1127 wwn = ((uint64_t) array[ICB_NNM0]) | \
1128 ((uint64_t) array[ICB_NNM1] << 8) | \
1129 ((uint64_t) array[ICB_NNM2] << 16) | \
1130 ((uint64_t) array[ICB_NNM3] << 24) | \
1131 ((uint64_t) array[ICB_NNM4] << 32) | \
1132 ((uint64_t) array[ICB_NNM5] << 40) | \
1133 ((uint64_t) array[ICB_NNM6] << 48) | \
1134 ((uint64_t) array[ICB_NNM7] << 56)
1138 * For MULTI_ID firmware, this describes a
1139 * virtual port entity for getting status.
1142 uint16_t vp_port_status;
1143 uint8_t vp_port_options;
1144 uint8_t vp_port_loopid;
1145 uint8_t vp_port_portname[8];
1146 uint8_t vp_port_nodename[8];
1147 uint16_t vp_port_portid_lo; /* not present when trailing icb */
1148 uint16_t vp_port_portid_hi; /* not present when trailing icb */
1151 #define ICB2400_VPOPT_ENA_SNSLOGIN 0x00000040 /* Enable SNS Login and SCR for Virtual Ports */
1152 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* Target Mode Disabled */
1153 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* Initiator Mode Enabled */
1154 #define ICB2400_VPOPT_ENABLED 0x00000008 /* VP Enabled */
1155 #define ICB2400_VPOPT_NOPLAY 0x00000004 /* ID Not Acquired */
1156 #define ICB2400_VPOPT_PREV_ADDRESS 0x00000002 /* Previously Assigned ID */
1157 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 /* Hard Assigned ID */
1159 #define ICB2400_VPOPT_WRITE_SIZE 20
1162 * For MULTI_ID firmware, we append this structure
1163 * to the isp_icb_2400_t above, followed by a list
1164 * structures that are *most* of the vp_port_info_t.
1168 uint16_t vp_global_options;
1169 } isp_icb_2400_vpinfo_t;
1171 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */
1172 #define ICB2400_VPINFO_PORT_OFF(chan) \
1173 (ICB2400_VPINFO_OFF + \
1174 sizeof (isp_icb_2400_vpinfo_t) + (chan * ICB2400_VPOPT_WRITE_SIZE))
1176 #define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */
1177 #define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */
1178 #define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */
1179 #define ICB2400_VPGOPT_SUSP_FDISK 0x10 /* Suspend FDISC for Enabled VPs */
1180 #define ICB2400_VPGOPT_GEN_RIDA 0x20 /* Generate RIDA if FLOGI Fails */
1183 isphdr_t vp_ctrl_hdr;
1184 uint32_t vp_ctrl_handle;
1185 uint16_t vp_ctrl_index_fail;
1186 uint16_t vp_ctrl_status;
1187 uint16_t vp_ctrl_command;
1188 uint16_t vp_ctrl_vp_count;
1189 uint16_t vp_ctrl_idmap[16];
1190 uint16_t vp_ctrl_reserved[7];
1191 uint16_t vp_ctrl_fcf_index;
1194 #define VP_CTRL_CMD_ENABLE_VP 0x00
1195 #define VP_CTRL_CMD_DISABLE_VP 0x08
1196 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 0x09
1197 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0x0A
1198 #define VP_CTRL_CMD_DISABLE_VP_LOGO_ALL 0x0B
1201 * We can use this structure for modifying either one or two VP ports after initialization
1204 isphdr_t vp_mod_hdr;
1205 uint32_t vp_mod_hdl;
1206 uint16_t vp_mod_reserved0;
1207 uint16_t vp_mod_status;
1210 uint8_t vp_mod_idx0;
1211 uint8_t vp_mod_idx1;
1219 uint8_t vp_mod_reserved2[8];
1222 #define VP_STS_OK 0x00
1223 #define VP_STS_ERR 0x01
1224 #define VP_CNT_ERR 0x02
1225 #define VP_GEN_ERR 0x03
1226 #define VP_IDX_ERR 0x04
1227 #define VP_STS_BSY 0x05
1229 #define VP_MODIFY 0x00
1230 #define VP_MODIFY_ENA 0x01
1231 #define VP_MODIFY_OPT 0x02
1232 #define VP_RESUME 0x03
1235 * Port Data Base Element
1239 uint16_t pdb_options;
1242 uint8_t pdb_hardaddr_bits[4];
1243 uint8_t pdb_portid_bits[4];
1244 uint8_t pdb_nodename[8];
1245 uint8_t pdb_portname[8];
1246 uint16_t pdb_execthrottle;
1247 uint16_t pdb_exec_count;
1248 uint8_t pdb_retry_count;
1249 uint8_t pdb_retry_delay;
1250 uint16_t pdb_resalloc;
1251 uint16_t pdb_curalloc;
1254 uint16_t pdb_tl_next;
1255 uint16_t pdb_tl_last;
1256 uint16_t pdb_features; /* PLOGI, Common Service */
1257 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */
1258 uint16_t pdb_roi; /* PLOGI, Common Service */
1260 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
1261 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */
1262 uint16_t pdb_ncseq; /* PLOGI, Class 3 */
1263 uint16_t pdb_noseq; /* PLOGI, Class 3 */
1264 uint16_t pdb_labrtflg;
1265 uint16_t pdb_lstopflg;
1266 uint16_t pdb_sqhead;
1267 uint16_t pdb_sqtail;
1268 uint16_t pdb_ptimer;
1269 uint16_t pdb_nxt_seqid;
1270 uint16_t pdb_fcount;
1271 uint16_t pdb_prli_len;
1272 uint16_t pdb_prli_svc0;
1273 uint16_t pdb_prli_svc3;
1274 uint16_t pdb_loopid;
1275 uint16_t pdb_il_ptr;
1276 uint16_t pdb_sl_ptr;
1279 #define PDB_OPTIONS_XMITTING (1<<11)
1280 #define PDB_OPTIONS_LNKXMIT (1<<10)
1281 #define PDB_OPTIONS_ABORTED (1<<9)
1282 #define PDB_OPTIONS_ADISC (1<<1)
1284 #define PDB_STATE_DISCOVERY 0
1285 #define PDB_STATE_WDISC_ACK 1
1286 #define PDB_STATE_PLOGI 2
1287 #define PDB_STATE_PLOGI_ACK 3
1288 #define PDB_STATE_PRLI 4
1289 #define PDB_STATE_PRLI_ACK 5
1290 #define PDB_STATE_LOGGED_IN 6
1291 #define PDB_STATE_PORT_UNAVAIL 7
1292 #define PDB_STATE_PRLO 8
1293 #define PDB_STATE_PRLO_ACK 9
1294 #define PDB_STATE_PLOGO 10
1295 #define PDB_STATE_PLOG_ACK 11
1297 #define SVC3_ROLE_MASK 0x30
1298 #define SVC3_ROLE_SHIFT 4
1300 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1301 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1304 * Port Data Base Element- 24XX cards
1308 uint8_t pdb_curstate;
1309 uint8_t pdb_laststate;
1310 uint8_t pdb_hardaddr_bits[4];
1311 uint8_t pdb_portid_bits[4];
1312 #define pdb_nxt_seqid_2400 pdb_portid_bits[3]
1313 uint16_t pdb_retry_timer;
1314 uint16_t pdb_handle;
1315 uint16_t pdb_rcv_dsize;
1316 uint16_t pdb_reserved0;
1317 uint16_t pdb_prli_svc0;
1318 uint16_t pdb_prli_svc3;
1319 uint8_t pdb_portname[8];
1320 uint8_t pdb_nodename[8];
1321 uint8_t pdb_reserved1[24];
1324 #define PDB2400_TID_SUPPORTED 0x4000
1325 #define PDB2400_FC_TAPE 0x0080
1326 #define PDB2400_CLASS2_ACK0 0x0040
1327 #define PDB2400_FCP_CONF 0x0020
1328 #define PDB2400_CLASS2 0x0010
1329 #define PDB2400_ADDR_VALID 0x0002
1331 #define PDB2400_STATE_PLOGI_PEND 0x03
1332 #define PDB2400_STATE_PLOGI_DONE 0x04
1333 #define PDB2400_STATE_PRLI_PEND 0x05
1334 #define PDB2400_STATE_LOGGED_IN 0x06
1335 #define PDB2400_STATE_PORT_UNAVAIL 0x07
1336 #define PDB2400_STATE_PRLO_PEND 0x09
1337 #define PDB2400_STATE_LOGO_PEND 0x0B
1340 * Common elements from the above two structures that are actually useful to us.
1344 uint16_t prli_word3;
1347 uint8_t portname[8];
1348 uint8_t nodename[8];
1352 * Port/Node Name List Element
1355 uint8_t pnnle_name[8];
1356 uint16_t pnnle_handle;
1357 uint16_t pnnle_reserved;
1360 #define PNNL_OPTIONS_NODE_NAMES (1<<0)
1361 #define PNNL_OPTIONS_PORT_DATA (1<<2)
1362 #define PNNL_OPTIONS_INITIATORS (1<<3)
1365 * Port and N-Port Handle List Element
1368 uint16_t pnhle_port_id_lo;
1369 uint16_t pnhle_port_id_hi_handle;
1373 uint16_t pnhle_port_id_lo;
1374 uint16_t pnhle_port_id_hi;
1375 uint16_t pnhle_handle;
1379 uint16_t pnhle_port_id_lo;
1380 uint16_t pnhle_port_id_hi;
1381 uint16_t pnhle_handle;
1382 uint16_t pnhle_reserved;
1386 * Port Database Changed Async Event information for 24XX cards
1388 #define PDB24XX_AE_OK 0x00
1389 #define PDB24XX_AE_IMPL_LOGO_1 0x01
1390 #define PDB24XX_AE_IMPL_LOGO_2 0x02
1391 #define PDB24XX_AE_IMPL_LOGO_3 0x03
1392 #define PDB24XX_AE_PLOGI_RCVD 0x04
1393 #define PDB24XX_AE_PLOGI_RJT 0x05
1394 #define PDB24XX_AE_PRLI_RCVD 0x06
1395 #define PDB24XX_AE_PRLI_RJT 0x07
1396 #define PDB24XX_AE_TPRLO 0x08
1397 #define PDB24XX_AE_TPRLO_RJT 0x09
1398 #define PDB24XX_AE_PRLO_RCVD 0x0a
1399 #define PDB24XX_AE_LOGO_RCVD 0x0b
1400 #define PDB24XX_AE_TOPO_CHG 0x0c
1401 #define PDB24XX_AE_NPORT_CHG 0x0d
1402 #define PDB24XX_AE_FLOGI_RJT 0x0e
1403 #define PDB24XX_AE_BAD_FANN 0x0f
1404 #define PDB24XX_AE_FLOGI_TIMO 0x10
1405 #define PDB24XX_AE_ABX_LOGO 0x11
1406 #define PDB24XX_AE_PLOGI_DONE 0x12
1407 #define PDB24XX_AE_PRLI_DONJE 0x13
1408 #define PDB24XX_AE_OPN_1 0x14
1409 #define PDB24XX_AE_OPN_2 0x15
1410 #define PDB24XX_AE_TXERR 0x16
1411 #define PDB24XX_AE_FORCED_LOGO 0x17
1412 #define PDB24XX_AE_DISC_TIMO 0x18
1415 * Genericized Port Login/Logout software structure
1424 /* the flags to use are those for PLOGX_FLG_* below */
1427 * ISP24XX- Login/Logout Port IOCB
1430 isphdr_t plogx_header;
1431 uint32_t plogx_handle;
1432 uint16_t plogx_status;
1433 uint16_t plogx_nphdl;
1434 uint16_t plogx_flags;
1435 uint16_t plogx_vphdl; /* low 8 bits */
1436 uint16_t plogx_portlo; /* low 16 bits */
1437 uint16_t plogx_rspsz_porthi;
1444 #define PLOGX_STATUS_OK 0x00
1445 #define PLOGX_STATUS_UNAVAIL 0x28
1446 #define PLOGX_STATUS_LOGOUT 0x29
1447 #define PLOGX_STATUS_IOCBERR 0x31
1449 #define PLOGX_IOCBERR_NOLINK 0x01
1450 #define PLOGX_IOCBERR_NOIOCB 0x02
1451 #define PLOGX_IOCBERR_NOXGHG 0x03
1452 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */
1453 #define PLOGX_IOCBERR_NOFABRIC 0x05
1454 #define PLOGX_IOCBERR_NOTREADY 0x07
1455 #define PLOGX_IOCBERR_NOLOGIN 0x09 /* further info in IOPARM 1 */
1456 #define PLOGX_IOCBERR_NOPCB 0x0a
1457 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */
1458 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */
1459 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */
1460 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */
1461 #define PLOGX_IOCBERR_NOHANDLE 0x1c
1462 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */
1464 #define PLOGX_FLG_CMD_MASK 0xf
1465 #define PLOGX_FLG_CMD_PLOGI 0
1466 #define PLOGX_FLG_CMD_PRLI 1
1467 #define PLOGX_FLG_CMD_PDISC 2
1468 #define PLOGX_FLG_CMD_LOGO 8
1469 #define PLOGX_FLG_CMD_PRLO 9
1470 #define PLOGX_FLG_CMD_TPRLO 10
1472 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */
1473 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */
1474 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */
1475 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */
1476 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */
1477 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */
1478 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */
1480 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */
1481 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */
1484 * Report ID Acquisistion (24XX multi-id firmware)
1487 isphdr_t ridacq_hdr;
1488 uint32_t ridacq_handle;
1489 uint8_t ridacq_vp_acquired;
1490 uint8_t ridacq_vp_setup;
1491 uint8_t ridacq_vp_index;
1492 uint8_t ridacq_vp_status;
1493 uint16_t ridacq_vp_port_lo;
1494 uint8_t ridacq_vp_port_hi;
1495 uint8_t ridacq_format; /* 0 or 1 */
1496 uint16_t ridacq_map[8];
1497 uint8_t ridacq_reserved1[32];
1500 #define RIDACQ_STS_COMPLETE 0
1501 #define RIDACQ_STS_UNACQUIRED 1
1502 #define RIDACQ_STS_CHANGED 2
1503 #define RIDACQ_STS_SNS_TIMEOUT 3
1504 #define RIDACQ_STS_SNS_REJECTED 4
1505 #define RIDACQ_STS_SCR_TIMEOUT 5
1506 #define RIDACQ_STS_SCR_REJECTED 6
1509 * Simple Name Server Data Structures
1511 #define SNS_GA_NXT 0x100
1512 #define SNS_GPN_ID 0x112
1513 #define SNS_GNN_ID 0x113
1514 #define SNS_GFF_ID 0x11F
1515 #define SNS_GID_FT 0x171
1516 #define SNS_RFT_ID 0x217
1517 #define SNS_RFF_ID 0x21F
1519 uint16_t snscb_rblen; /* response buffer length (words) */
1520 uint16_t snscb_reserved0;
1521 uint16_t snscb_addr[4]; /* response buffer address */
1522 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1523 uint16_t snscb_reserved1;
1524 uint16_t snscb_data[]; /* variable data */
1525 } sns_screq_t; /* Subcommand Request Structure */
1528 uint16_t snscb_rblen; /* response buffer length (words) */
1529 uint16_t snscb_reserved0;
1530 uint16_t snscb_addr[4]; /* response buffer address */
1531 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1532 uint16_t snscb_reserved1;
1534 uint16_t snscb_reserved2;
1535 uint32_t snscb_reserved3;
1536 uint32_t snscb_port;
1538 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
1541 uint16_t snscb_rblen; /* response buffer length (words) */
1542 uint16_t snscb_reserved0;
1543 uint16_t snscb_addr[4]; /* response buffer address */
1544 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1545 uint16_t snscb_reserved1;
1547 uint16_t snscb_reserved2;
1548 uint32_t snscb_reserved3;
1549 uint32_t snscb_portid;
1551 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
1554 uint16_t snscb_rblen; /* response buffer length (words) */
1555 uint16_t snscb_reserved0;
1556 uint16_t snscb_addr[4]; /* response buffer address */
1557 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1558 uint16_t snscb_reserved1;
1560 uint16_t snscb_mword_div_2;
1561 uint32_t snscb_reserved3;
1562 uint32_t snscb_fc4_type;
1564 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
1567 uint16_t snscb_rblen; /* response buffer length (words) */
1568 uint16_t snscb_reserved0;
1569 uint16_t snscb_addr[4]; /* response buffer address */
1570 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1571 uint16_t snscb_reserved1;
1573 uint16_t snscb_reserved2;
1574 uint32_t snscb_reserved3;
1575 uint32_t snscb_port;
1576 uint32_t snscb_fc4_types[8];
1578 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
1581 ct_hdr_t snscb_cthdr;
1582 uint8_t snscb_port_type;
1583 uint8_t snscb_port_id[3];
1584 uint8_t snscb_portname[8];
1585 uint16_t snscb_data[]; /* variable data */
1586 } sns_scrsp_t; /* Subcommand Response Structure */
1589 ct_hdr_t snscb_cthdr;
1590 uint8_t snscb_port_type;
1591 uint8_t snscb_port_id[3];
1592 uint8_t snscb_portname[8];
1593 uint8_t snscb_pnlen; /* symbolic port name length */
1594 uint8_t snscb_pname[255]; /* symbolic port name */
1595 uint8_t snscb_nodename[8];
1596 uint8_t snscb_nnlen; /* symbolic node name length */
1597 uint8_t snscb_nname[255]; /* symbolic node name */
1598 uint8_t snscb_ipassoc[8];
1599 uint8_t snscb_ipaddr[16];
1600 uint8_t snscb_svc_class[4];
1601 uint8_t snscb_fc4_types[32];
1602 uint8_t snscb_fpname[8];
1603 uint8_t snscb_reserved;
1604 uint8_t snscb_hardaddr[3];
1605 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
1606 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
1609 ct_hdr_t snscb_cthdr;
1610 uint8_t snscb_wwn[8];
1612 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
1615 ct_hdr_t snscb_cthdr;
1616 uint32_t snscb_fc4_features[32];
1618 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
1621 ct_hdr_t snscb_cthdr;
1627 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1628 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
1631 * Other Misc Structures
1634 /* ELS Pass Through */
1637 uint32_t els_handle;
1638 uint16_t els_status;
1640 uint16_t els_xmit_dsd_count; /* outgoing only */
1644 uint16_t els_recv_dsd_count; /* outgoing only */
1646 uint8_t els_reserved1;
1648 uint8_t els_did_mid;
1650 uint8_t els_reserved2;
1651 uint16_t els_reserved3;
1652 uint16_t els_ctl_flags;
1655 uint32_t _els_bytecnt;
1656 uint32_t _els_subcode1;
1657 uint32_t _els_subcode2;
1658 uint8_t _els_reserved4[20];
1661 uint32_t _els_recv_bytecnt;
1662 uint32_t _els_xmit_bytecnt;
1663 uint32_t _els_xmit_dsd_length;
1664 uint16_t _els_xmit_dsd_a1500;
1665 uint16_t _els_xmit_dsd_a3116;
1666 uint16_t _els_xmit_dsd_a4732;
1667 uint16_t _els_xmit_dsd_a6348;
1668 uint32_t _els_recv_dsd_length;
1669 uint16_t _els_recv_dsd_a1500;
1670 uint16_t _els_recv_dsd_a3116;
1671 uint16_t _els_recv_dsd_a4732;
1672 uint16_t _els_recv_dsd_a6348;
1675 #define els_bytecnt inout.in._els_bytecnt
1676 #define els_subcode1 inout.in._els_subcode1
1677 #define els_subcode2 inout.in._els_subcode2
1678 #define els_reserved4 inout.in._els_reserved4
1679 #define els_recv_bytecnt inout.out._els_recv_bytecnt
1680 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt
1681 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length
1682 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500
1683 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116
1684 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732
1685 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348
1686 #define els_recv_dsd_length inout.out._els_recv_dsd_length
1687 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500
1688 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116
1689 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732
1690 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348
1694 * A handy package structure for running FC-SCSI commands internally
1705 uint32_t data_length;
1713 uint32_t data_residual;
1716 uint16_t sense_length;
1717 uint8_t sense_data[32];
1723 * Target Mode related definitions
1725 #define QLTM_SENSELEN 18 /* non-FC cards only */
1726 #define QLTM_SVALID 0x80
1729 * Structure for Enable Lun and Modify Lun queue entries
1733 uint32_t le_reserved;
1736 uint8_t le_ops; /* Modify LUN only */
1737 uint8_t le_tgt; /* Not for FC */
1738 uint32_t le_flags; /* Not for FC */
1740 uint8_t le_reserved2;
1741 uint8_t le_cmd_count;
1742 uint8_t le_in_count;
1743 uint8_t le_cdb6len; /* Not for FC */
1744 uint8_t le_cdb7len; /* Not for FC */
1745 uint16_t le_timeout;
1746 uint16_t le_reserved3[20];
1752 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */
1753 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */
1754 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */
1755 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */
1760 #define LUN_CCINCR 0x01 /* increment command count */
1761 #define LUN_CCDECR 0x02 /* decrement command count */
1762 #define LUN_ININCR 0x40 /* increment immed. notify count */
1763 #define LUN_INDECR 0x80 /* decrement immed. notify count */
1768 #define LUN_OK 0x01 /* we be rockin' */
1769 #define LUN_ERR 0x04 /* request completed with error */
1770 #define LUN_INVAL 0x06 /* invalid request */
1771 #define LUN_NOCAP 0x16 /* can't provide requested capability */
1772 #define LUN_ENABLED 0x3E /* LUN already enabled */
1775 * Immediate Notify Entry structure
1777 #define IN_MSGLEN 8 /* 8 bytes */
1778 #define IN_RSVDLEN 8 /* 8 words */
1781 uint32_t in_reserved;
1782 uint8_t in_lun; /* lun */
1783 uint8_t in_iid; /* initiator */
1784 uint8_t in_reserved2;
1785 uint8_t in_tgt; /* target */
1789 uint8_t in_tag_val; /* tag value */
1790 uint8_t in_tag_type; /* tag type */
1791 uint16_t in_seqid; /* sequence id */
1792 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */
1793 uint16_t in_reserved3[IN_RSVDLEN];
1794 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */
1799 uint32_t in_reserved;
1800 uint8_t in_lun; /* lun */
1801 uint8_t in_iid; /* initiator */
1803 uint32_t in_reserved2;
1805 uint16_t in_task_flags;
1806 uint16_t in_seqid; /* sequence id */
1811 uint32_t in_reserved;
1812 uint16_t in_iid; /* initiator */
1814 uint32_t in_reserved2;
1816 uint16_t in_task_flags;
1817 uint16_t in_seqid; /* sequence id */
1821 * Values for the in_status field
1823 #define IN_REJECT 0x0D /* Message Reject message received */
1824 #define IN_RESET 0x0E /* Bus Reset occurred */
1825 #define IN_NO_RCAP 0x16 /* requested capability not available */
1826 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */
1827 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */
1828 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */
1829 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */
1830 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */
1831 #define IN_PORT_CHANGED 0x2A /* port changed */
1832 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */
1833 #define IN_NO_NEXUS 0x3B /* Nexus not established */
1834 #define IN_SRR_RCVD 0x45 /* SRR received */
1837 * Values for the in_task_flags field- should only get one at a time!
1839 #define TASK_FLAGS_RESERVED_MASK (0xe700)
1840 #define TASK_FLAGS_CLEAR_ACA (1<<14)
1841 #define TASK_FLAGS_TARGET_RESET (1<<13)
1842 #define TASK_FLAGS_LUN_RESET (1<<12)
1843 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10)
1844 #define TASK_FLAGS_ABORT_TASK_SET (1<<9)
1847 * ISP24XX Immediate Notify
1851 uint32_t in_reserved;
1853 uint16_t in_reserved1;
1855 uint16_t in_srr_rxid;
1857 uint8_t in_status_subcode;
1858 uint8_t in_fwhandle;
1860 uint16_t in_srr_reloff_lo;
1861 uint16_t in_srr_reloff_hi;
1863 uint16_t in_srr_oxid;
1865 * If bit 2 is set in in_flags, the N-Port and
1866 * handle tags are valid. If the received ELS is
1867 * a LOGO, then these tags contain the N Port ID
1868 * from the LOGO payload. If the received ELS
1869 * request is TPRLO, these tags contain the
1870 * Third Party Originator N Port ID.
1872 uint16_t in_nport_id_hi;
1873 #define in_prli_options in_nport_id_hi
1874 uint8_t in_nport_id_lo;
1875 uint8_t in_reserved3;
1876 uint16_t in_np_handle;
1877 uint8_t in_reserved4[12];
1878 uint8_t in_reserved5;
1880 uint32_t in_reserved6;
1881 uint16_t in_portid_lo;
1882 uint8_t in_portid_hi;
1883 uint8_t in_reserved7;
1884 uint16_t in_reserved8;
1886 } in_fcentry_24xx_t;
1888 #define IN24XX_FLAG_PUREX_IOCB 0x1
1889 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2
1890 #define IN24XX_FLAG_NPHDL_VALID 0x4
1891 #define IN24XX_FLAG_N2N_PRLI 0x8
1892 #define IN24XX_FLAG_PN_NN_VALID 0x10
1894 #define IN24XX_LIP_RESET 0x0E
1895 #define IN24XX_LINK_RESET 0x0F
1896 #define IN24XX_PORT_LOGOUT 0x29
1897 #define IN24XX_PORT_CHANGED 0x2A
1898 #define IN24XX_LINK_FAILED 0x2E
1899 #define IN24XX_SRR_RCVD 0x45
1900 #define IN24XX_ELS_RCVD 0x46 /*
1901 * login-affectin ELS received- check
1902 * subcode for specific opcode
1906 * For f/w > 4.0.25, these offsets in the Immediate Notify contain
1907 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in
1908 * Big Endian format.
1910 #define IN24XX_PRLI_WWNN_OFF 0x18
1911 #define IN24XX_PRLI_WWPN_OFF 0x28
1912 #define IN24XX_PLOGI_WWNN_OFF 0x20
1913 #define IN24XX_PLOGI_WWPN_OFF 0x28
1916 * For f/w > 4.0.25, this offset in the Immediate Notify contain
1917 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format.
1919 #define IN24XX_LOGO_WWPN_OFF 0x28
1922 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT
1924 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00
1925 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01
1926 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02
1927 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03
1928 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04
1929 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05
1930 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06
1931 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07
1932 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08
1933 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09
1936 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED
1938 #define IN24XX_PORT_CHANGED_BADFAN 0x00
1939 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01
1940 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02
1941 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03
1942 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04
1943 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05
1946 * Notify Acknowledge Entry structure
1948 #define NA_RSVDLEN 22
1951 uint32_t na_reserved;
1952 uint8_t na_lun; /* lun */
1953 uint8_t na_iid; /* initiator */
1954 uint8_t na_reserved2;
1955 uint8_t na_tgt; /* target */
1959 uint16_t na_seqid; /* sequence id */
1960 uint16_t na_reserved3[NA_RSVDLEN];
1964 * Value for the na_event field
1966 #define NA_RST_CLRD 0x80 /* Clear an async event notification */
1967 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */
1968 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */
1970 #define NA2_RSVDLEN 21
1973 uint32_t na_reserved;
1974 uint8_t na_reserved1;
1975 uint8_t na_iid; /* initiator loop id */
1976 uint16_t na_response;
1978 uint16_t na_reserved2;
1980 uint16_t na_task_flags;
1981 uint16_t na_seqid; /* sequence id */
1982 uint16_t na_reserved3[NA2_RSVDLEN];
1987 uint32_t na_reserved;
1988 uint16_t na_iid; /* initiator loop id */
1989 uint16_t na_response; /* response code */
1991 uint16_t na_reserved2;
1993 uint16_t na_task_flags;
1994 uint16_t na_seqid; /* sequence id */
1995 uint16_t na_reserved3[NA2_RSVDLEN];
1998 #define NAFC_RCOUNT 0x80 /* increment resource count */
1999 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */
2000 #define NAFC_TVALID 0x10 /* task mangement response code is valid */
2003 * ISP24XX Notify Acknowledge
2010 uint16_t na_reserved1;
2012 uint16_t na_srr_rxid;
2014 uint8_t na_status_subcode;
2015 uint8_t na_fwhandle;
2017 uint16_t na_srr_reloff_lo;
2018 uint16_t na_srr_reloff_hi;
2020 uint16_t na_srr_flags;
2021 uint8_t na_reserved3[18];
2022 uint8_t na_reserved4;
2024 uint8_t na_srr_reject_vunique;
2025 uint8_t na_srr_reject_explanation;
2026 uint8_t na_srr_reject_code;
2027 uint8_t na_reserved5;
2028 uint8_t na_reserved6[6];
2030 } na_fcentry_24xx_t;
2033 * Accept Target I/O Entry structure
2035 #define ATIO_CDBLEN 26
2039 uint16_t at_reserved;
2041 uint8_t at_lun; /* lun */
2042 uint8_t at_iid; /* initiator */
2043 uint8_t at_cdblen; /* cdb length */
2044 uint8_t at_tgt; /* target */
2046 uint8_t at_status; /* firmware status */
2047 uint8_t at_scsi_status; /* scsi status */
2048 uint8_t at_tag_val; /* tag value */
2049 uint8_t at_tag_type; /* tag type */
2050 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */
2051 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */
2057 #define AT_NODISC 0x00008000 /* disconnect disabled */
2058 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */
2063 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */
2064 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */
2065 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2066 #define AT_NOCAP 0x16 /* Requested capability not available */
2067 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2068 #define AT_CDB 0x3D /* CDB received */
2070 * Macros to create and fetch and test concatenated handle and tag value macros
2073 #define AT_MAKE_TAGID(tid, aep) \
2074 tid = aep->at_handle; \
2075 if (aep->at_flags & AT_TQAE) { \
2076 tid |= (aep->at_tag_val << 16); \
2080 #define CT_MAKE_TAGID(tid, ct) \
2081 tid = ct->ct_fwhandle; \
2082 if (ct->ct_flags & CT_TQAE) { \
2083 tid |= (ct->ct_tag_val << 16); \
2087 #define AT_HAS_TAG(val) ((val) & (1 << 24))
2088 #define AT_GET_TAG(val) (((val) >> 16) & 0xff)
2089 #define AT_GET_HANDLE(val) ((val) & 0xffff)
2091 #define IN_MAKE_TAGID(tid, inp) \
2092 tid = inp->in_seqid; \
2093 tid |= (inp->in_tag_val << 16); \
2097 * Accept Target I/O Entry structure, Type 2
2099 #define ATIO2_CDBLEN 16
2103 uint32_t at_reserved;
2104 uint8_t at_lun; /* lun or reserved */
2105 uint8_t at_iid; /* initiator */
2106 uint16_t at_rxid; /* response ID */
2108 uint16_t at_status; /* firmware status */
2109 uint8_t at_crn; /* command reference number */
2110 uint8_t at_taskcodes;
2111 uint8_t at_taskflags;
2112 uint8_t at_execodes;
2113 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2114 uint32_t at_datalen; /* allocated data len */
2115 uint16_t at_scclun; /* SCC Lun or reserved */
2116 uint16_t at_wwpn[4]; /* WWPN of initiator */
2117 uint16_t at_reserved2[6];
2123 uint32_t at_reserved;
2124 uint16_t at_iid; /* initiator */
2125 uint16_t at_rxid; /* response ID */
2127 uint16_t at_status; /* firmware status */
2128 uint8_t at_crn; /* command reference number */
2129 uint8_t at_taskcodes;
2130 uint8_t at_taskflags;
2131 uint8_t at_execodes;
2132 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */
2133 uint32_t at_datalen; /* allocated data len */
2134 uint16_t at_scclun; /* SCC Lun or reserved */
2135 uint16_t at_wwpn[4]; /* WWPN of initiator */
2136 uint16_t at_reserved2[6];
2140 #define ATIO2_WWPN_OFFSET 0x2A
2141 #define ATIO2_OXID_OFFSET 0x3E
2143 #define ATIO2_TC_ATTR_MASK 0x7
2144 #define ATIO2_TC_ATTR_SIMPLEQ 0
2145 #define ATIO2_TC_ATTR_HEADOFQ 1
2146 #define ATIO2_TC_ATTR_ORDERED 2
2147 #define ATIO2_TC_ATTR_ACAQ 4
2148 #define ATIO2_TC_ATTR_UNTAGGED 5
2150 #define ATIO2_EX_WRITE 0x1
2151 #define ATIO2_EX_READ 0x2
2153 * Macros to create and fetch and test concatenated handle and tag value macros
2155 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \
2156 tid = aep->at_rxid; \
2157 tid |= (((uint64_t)inst) << 32); \
2158 tid |= (((uint64_t)bus) << 48)
2160 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \
2161 tid = ct->ct_rxid; \
2162 tid |= (((uint64_t)inst) << 32); \
2163 tid |= (((uint64_t)(bus & 0xff)) << 48)
2165 #define AT2_HAS_TAG(val) 1
2166 #define AT2_GET_TAG(val) ((val) & 0xffffffff)
2167 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff)
2168 #define AT2_GET_HANDLE AT2_GET_TAG
2169 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff)
2171 #define FC_HAS_TAG AT2_HAS_TAG
2172 #define FC_GET_TAG AT2_GET_TAG
2173 #define FC_GET_INST AT2_GET_INST
2174 #define FC_GET_HANDLE AT2_GET_HANDLE
2176 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \
2178 tid |= (((uint64_t)inst) << 32); \
2179 tid |= (((uint64_t)(bus & 0xff)) << 48)
2181 #define FC_TAG_INSERT_INST(tid, inst) \
2182 tid &= ~0x0000ffff00000000ull; \
2183 tid |= (((uint64_t)inst) << 32)
2186 * 24XX ATIO Definition
2188 * This is *quite* different from other entry types.
2189 * First of all, it has its own queue it comes in on.
2191 * Secondly, it doesn't have a normal header.
2193 * Thirdly, it's just a passthru of the FCP CMND IU
2194 * which is recorded in big endian mode.
2200 * Task attribute in high four bits,
2201 * the rest is the FCP CMND IU Length.
2202 * NB: the command can extend past the
2203 * length for a single queue entry.
2208 fcp_cmnd_iu_t at_cmnd;
2210 #define AT7_NORESRC_RXID 0xffffffff
2214 * Continue Target I/O Entry structure
2215 * Request from driver. The response from the
2216 * ISP firmware is the same except that the last 18
2217 * bytes are overwritten by suggested sense data if
2218 * the 'autosense valid' bit is set in the status byte.
2222 uint16_t ct_syshandle;
2223 uint16_t ct_fwhandle; /* required by f/w */
2224 uint8_t ct_lun; /* lun */
2225 uint8_t ct_iid; /* initiator id */
2226 uint8_t ct_reserved2;
2227 uint8_t ct_tgt; /* our target id */
2229 uint8_t ct_status; /* isp status */
2230 uint8_t ct_scsi_status; /* scsi status */
2231 uint8_t ct_tag_val; /* tag value */
2232 uint8_t ct_tag_type; /* tag type */
2233 uint32_t ct_xfrlen; /* transfer length */
2234 uint32_t ct_resid; /* residual length */
2235 uint16_t ct_timeout;
2236 uint16_t ct_seg_count;
2237 ispds_t ct_dataseg[ISP_RQDSEG];
2241 * For some of the dual port SCSI adapters, port (bus #) is reported
2242 * in the MSbit of ct_iid. Bit fields are a bit too awkward here.
2244 * Note that this does not apply to FC adapters at all which can and
2245 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices
2246 * that have logged in across a SCSI fabric.
2248 #define GET_IID_VAL(x) (x & 0x3f)
2249 #define GET_BUS_VAL(x) ((x >> 7) & 0x1)
2250 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f))
2251 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7))
2256 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */
2257 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */
2258 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */
2259 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */
2260 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */
2261 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */
2262 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */
2263 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */
2264 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */
2265 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */
2266 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */
2270 * - set by the firmware when it returns the CTIO
2272 #define CT_OK 0x01 /* completed without error */
2273 #define CT_ABORTED 0x02 /* aborted by host */
2274 #define CT_ERR 0x04 /* see sense data for error */
2275 #define CT_INVAL 0x06 /* request for disabled lun */
2276 #define CT_NOPATH 0x07 /* invalid ITL nexus */
2277 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */
2278 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */
2279 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */
2280 #define CT_TIMEOUT 0x0B /* timed out */
2281 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */
2282 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */
2283 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */
2284 #define CT_PANIC 0x13 /* Unrecoverable Error */
2285 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */
2286 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */
2287 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */
2288 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */
2289 #define CT_PORTUNAVAIL 0x28 /* port not available */
2290 #define CT_LOGOUT 0x29 /* port logout */
2291 #define CT_PORTCHANGED 0x2A /* port changed */
2292 #define CT_IDE 0x33 /* Initiator Detected Error */
2293 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */
2294 #define CT_SRR 0x45 /* SRR Received */
2295 #define CT_LUN_RESET 0x48 /* Lun Reset Received */
2297 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/
2300 * When the firmware returns a CTIO entry, it may overwrite the last
2301 * part of the structure with sense data. This starts at offset 0x2E
2302 * into the entry, which is in the middle of ct_dataseg[1]. Rather
2303 * than define a new struct for this, I'm just using the sense data
2306 #define CTIO_SENSE_OFFSET 0x2E
2309 * Entry length in u_longs. All entries are the same size so
2310 * any one will do as the numerator.
2312 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t))
2315 * QLA2100 CTIO (type 2) entry
2317 #define MAXRESPLEN 26
2320 uint32_t ct_syshandle;
2321 uint8_t ct_lun; /* lun */
2322 uint8_t ct_iid; /* initiator id */
2323 uint16_t ct_rxid; /* response ID */
2325 uint16_t ct_status; /* isp status */
2326 uint16_t ct_timeout;
2327 uint16_t ct_seg_count;
2328 uint32_t ct_reloff; /* relative offset */
2329 uint32_t ct_resid; /* residual length */
2332 * The three different modes that the target driver
2333 * can set the CTIO{2,3,4} up as.
2335 * The first is for sending FCP_DATA_IUs as well as
2336 * (optionally) sending a terminal SCSI status FCP_RSP_IU.
2338 * The second is for sending SCSI sense data in an FCP_RSP_IU.
2339 * Note that no FCP_DATA_IUs will be sent.
2341 * The third is for sending FCP_RSP_IUs as built specifically
2342 * in system memory as located by the isp_dataseg.
2346 uint16_t _reserved2;
2347 uint16_t ct_scsi_status;
2350 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2351 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2352 ispdslist_t ct_dslist;
2357 uint16_t _reserved2;
2358 uint16_t ct_senselen;
2359 uint16_t ct_scsi_status;
2360 uint16_t ct_resplen;
2361 uint8_t ct_resp[MAXRESPLEN];
2365 uint16_t _reserved2;
2366 uint16_t _reserved3;
2367 uint32_t ct_datalen;
2369 ispds_t ct_fcp_rsp_iudata_32;
2370 ispds64_t ct_fcp_rsp_iudata_64;
2378 uint32_t ct_syshandle;
2379 uint16_t ct_iid; /* initiator id */
2380 uint16_t ct_rxid; /* response ID */
2382 uint16_t ct_status; /* isp status */
2383 uint16_t ct_timeout;
2384 uint16_t ct_seg_count;
2385 uint32_t ct_reloff; /* relative offset */
2386 uint32_t ct_resid; /* residual length */
2390 uint16_t _reserved2;
2391 uint16_t ct_scsi_status;
2394 ispds_t ct_dataseg[ISP_RQDSEG_T2];
2395 ispds64_t ct_dataseg64[ISP_RQDSEG_T3];
2396 ispdslist_t ct_dslist;
2401 uint16_t _reserved2;
2402 uint16_t ct_senselen;
2403 uint16_t ct_scsi_status;
2404 uint16_t ct_resplen;
2405 uint8_t ct_resp[MAXRESPLEN];
2409 uint16_t _reserved2;
2410 uint16_t _reserved3;
2411 uint32_t ct_datalen;
2413 ispds_t ct_fcp_rsp_iudata_32;
2414 ispds64_t ct_fcp_rsp_iudata_64;
2421 * ct_flags values for CTIO2
2423 #define CT2_FLAG_MODE0 0x0000
2424 #define CT2_FLAG_MODE1 0x0001
2425 #define CT2_FLAG_MODE2 0x0002
2426 #define CT2_FLAG_MMASK 0x0003
2427 #define CT2_DATA_IN 0x0040 /* *to* initiator */
2428 #define CT2_DATA_OUT 0x0080 /* *from* initiator */
2429 #define CT2_NO_DATA 0x00C0
2430 #define CT2_DATAMASK 0x00C0
2431 #define CT2_CCINCR 0x0100
2432 #define CT2_FASTPOST 0x0200
2433 #define CT2_CONFIRM 0x2000
2434 #define CT2_TERMINATE 0x4000
2435 #define CT2_SENDSTATUS 0x8000
2438 * ct_status values are (mostly) the same as that for ct_entry.
2442 * ct_scsi_status values- the low 8 bits are the normal SCSI status
2443 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU
2446 #define CT2_RSPLEN_VALID 0x0100
2447 #define CT2_SNSLEN_VALID 0x0200
2448 #define CT2_DATA_OVER 0x0400
2449 #define CT2_DATA_UNDER 0x0800
2454 #define MAXRESPLEN_24XX 24
2457 uint32_t ct_syshandle;
2458 uint16_t ct_nphdl; /* status on returned CTIOs */
2459 uint16_t ct_timeout;
2460 uint16_t ct_seg_count;
2463 uint16_t ct_iid_lo; /* low 16 bits of portid */
2464 uint8_t ct_iid_hi; /* hi 8 bits of portid */
2465 uint8_t ct_reserved;
2467 uint16_t ct_senselen; /* mode 1 only */
2469 uint32_t ct_resid; /* residual length */
2471 uint16_t ct_scsi_status; /* modes 0 && 1 only */
2481 uint16_t ct_resplen;
2483 uint8_t ct_resp[MAXRESPLEN_24XX];
2488 uint32_t ct_datalen;
2490 ispds64_t ct_fcp_rsp_iudata;
2496 * ct_flags values for CTIO7
2498 #define CT7_NO_DATA 0x0000
2499 #define CT7_DATA_OUT 0x0001 /* *from* initiator */
2500 #define CT7_DATA_IN 0x0002 /* *to* initiator */
2501 #define CT7_DATAMASK 0x3
2502 #define CT7_DSD_ENABLE 0x0004
2503 #define CT7_CONF_STSFD 0x0010
2504 #define CT7_EXPLCT_CONF 0x0020
2505 #define CT7_FLAG_MODE0 0x0000
2506 #define CT7_FLAG_MODE1 0x0040
2507 #define CT7_FLAG_MODE2 0x0080
2508 #define CT7_FLAG_MMASK 0x00C0
2509 #define CT7_NOACK 0x0100
2510 #define CT7_TASK_ATTR_SHIFT 9
2511 #define CT7_CONFIRM 0x2000
2512 #define CT7_TERMINATE 0x4000
2513 #define CT7_SENDSTATUS 0x8000
2516 * Type 7 CTIO status codes
2518 #define CT7_OK 0x01 /* completed without error */
2519 #define CT7_ABORTED 0x02 /* aborted by host */
2520 #define CT7_ERR 0x04 /* see sense data for error */
2521 #define CT7_INVAL 0x06 /* request for disabled lun */
2522 #define CT7_INVRXID 0x08 /* Invalid RX_ID */
2523 #define CT7_DATA_OVER 0x09 /* Data Overrun */
2524 #define CT7_TIMEOUT 0x0B /* timed out */
2525 #define CT7_RESET 0x0E /* LIP Rset Received */
2526 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */
2527 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */
2528 #define CT7_DATA_UNDER 0x15 /* Data Underrun */
2529 #define CT7_PORTUNAVAIL 0x28 /* port not available */
2530 #define CT7_LOGOUT 0x29 /* port logout */
2531 #define CT7_PORTCHANGED 0x2A /* port changed */
2532 #define CT7_SRR 0x45 /* SRR Received */
2535 * Other 24XX related target IOCBs
2542 isphdr_t abts_header;
2543 uint8_t abts_reserved0[6];
2544 uint16_t abts_nphdl;
2545 uint16_t abts_reserved1;
2547 uint32_t abts_rxid_abts;
2548 uint16_t abts_did_lo;
2549 uint8_t abts_did_hi;
2551 uint16_t abts_sid_lo;
2552 uint8_t abts_sid_hi;
2553 uint8_t abts_cs_ctl;
2554 uint16_t abts_fs_ctl;
2557 uint16_t abts_seq_cnt;
2558 uint8_t abts_df_ctl;
2559 uint8_t abts_seq_id;
2560 uint16_t abts_rx_id;
2561 uint16_t abts_ox_id;
2562 uint32_t abts_param;
2563 uint8_t abts_reserved2[16];
2564 uint32_t abts_rxid_task;
2568 isphdr_t abts_rsp_header;
2569 uint32_t abts_rsp_handle;
2570 uint16_t abts_rsp_status;
2571 uint16_t abts_rsp_nphdl;
2572 uint16_t abts_rsp_ctl_flags;
2573 uint16_t abts_rsp_sof;
2574 uint32_t abts_rsp_rxid_abts;
2575 uint16_t abts_rsp_did_lo;
2576 uint8_t abts_rsp_did_hi;
2577 uint8_t abts_rsp_r_ctl;
2578 uint16_t abts_rsp_sid_lo;
2579 uint8_t abts_rsp_sid_hi;
2580 uint8_t abts_rsp_cs_ctl;
2581 uint16_t abts_rsp_f_ctl_lo;
2582 uint8_t abts_rsp_f_ctl_hi;
2583 uint8_t abts_rsp_type;
2584 uint16_t abts_rsp_seq_cnt;
2585 uint8_t abts_rsp_df_ctl;
2586 uint8_t abts_rsp_seq_id;
2587 uint16_t abts_rsp_rx_id;
2588 uint16_t abts_rsp_ox_id;
2589 uint32_t abts_rsp_param;
2593 uint8_t last_seq_id;
2594 uint8_t seq_id_valid;
2595 uint16_t aborted_rx_id;
2596 uint16_t aborted_ox_id;
2597 uint16_t high_seq_cnt;
2598 uint16_t low_seq_cnt;
2599 uint8_t reserved2[4];
2602 uint8_t vendor_unique;
2603 uint8_t explanation;
2606 uint8_t reserved2[12];
2609 uint8_t reserved[8];
2613 uint8_t reserved[16];
2615 uint32_t abts_rsp_rxid_task;
2618 /* terminate this ABTS exchange */
2619 #define ISP24XX_ABTS_RSP_TERMINATE 0x01
2621 #define ISP24XX_ABTS_RSP_COMPLETE 0x00
2622 #define ISP24XX_ABTS_RSP_RESET 0x04
2623 #define ISP24XX_ABTS_RSP_ABORTED 0x05
2624 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06
2625 #define ISP24XX_ABTS_RSP_INVXID 0x08
2626 #define ISP24XX_ABTS_RSP_LOGOUT 0x29
2627 #define ISP24XX_ABTS_RSP_SUBCODE 0x31
2629 #define ISP24XX_NO_TASK 0xffffffff
2634 * These are the limits of the number of dma segments we
2635 * can deal with based not on the size of the segment counter
2636 * (which is 16 bits), but on the size of the number of
2637 * queue entries field (which is 8 bits). We assume no
2638 * segments in the first queue entry, so we can either
2639 * have 7 dma segments per continuation entry or 5
2640 * (for 64 bit dma).. multiplying out by 254....
2642 #define ISP_NSEG_MAX 1778
2643 #define ISP_NSEG64_MAX 1270
2645 #endif /* _ISPMBOX_H */