1 /******************************************************************************
3 Copyright (c) 2001-2017, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************/
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/buf_ring.h>
44 #include <sys/protosw.h>
45 #include <sys/socket.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/module.h>
49 #include <sys/sockio.h>
50 #include <sys/eventhandler.h>
53 #include <net/if_var.h>
54 #include <net/if_arp.h>
56 #include <net/ethernet.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
61 #include <net/if_types.h>
62 #include <net/if_vlan_var.h>
64 #include <netinet/in_systm.h>
65 #include <netinet/in.h>
66 #include <netinet/if_ether.h>
67 #include <netinet/ip.h>
68 #include <netinet/ip6.h>
69 #include <netinet/tcp.h>
70 #include <netinet/tcp_lro.h>
71 #include <netinet/udp.h>
73 #include <machine/in_cksum.h>
76 #include <machine/bus.h>
78 #include <machine/resource.h>
81 #include <machine/clock.h>
82 #include <dev/pci/pcivar.h>
83 #include <dev/pci/pcireg.h>
85 #include <sys/sysctl.h>
86 #include <sys/endian.h>
87 #include <sys/taskqueue.h>
90 #include <machine/smp.h>
93 #include "ixgbe_features.h"
94 #include "ixgbe_api.h"
95 #include "ixgbe_common.h"
96 #include "ixgbe_phy.h"
101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
102 * number of transmit descriptors allocated by the driver. Increasing this
103 * value allows the driver to queue more transmits. Each descriptor is 16
104 * bytes. Performance tests have show the 2K value to be optimal for top
107 #define DEFAULT_TXD 1024
108 #define PERFORM_TXD 2048
113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
114 * number of receive descriptors allocated for each RX queue. Increasing this
115 * value allows the driver to buffer more incoming packets. Each descriptor
116 * is 16 bytes. A receive buffer is also allocated for each descriptor.
118 * Note: with 8 rings and a dual port card, it is possible to bump up
119 * against the system mbuf pool limit, you can tune nmbclusters
120 * to adjust for this.
122 #define DEFAULT_RXD 1024
123 #define PERFORM_RXD 2048
127 /* Alignment for rings */
128 #define DBA_ALIGN 128
131 * This is the max watchdog interval, ie. the time that can
132 * pass between any two TX clean operations, such only happening
133 * when the TX hardware is functioning.
135 #define IXGBE_WATCHDOG (10 * hz)
138 * This parameters control when the driver calls the routine to reclaim
139 * transmit descriptors.
141 #define IXGBE_TX_CLEANUP_THRESHOLD(_a) ((_a)->num_tx_desc / 8)
142 #define IXGBE_TX_OP_THRESHOLD(_a) ((_a)->num_tx_desc / 32)
144 /* These defines are used in MTU calculations */
145 #define IXGBE_MAX_FRAME_SIZE 9728
146 #define IXGBE_MTU_HDR (ETHER_HDR_LEN + ETHER_CRC_LEN)
147 #define IXGBE_MTU_HDR_VLAN (ETHER_HDR_LEN + ETHER_CRC_LEN + \
148 ETHER_VLAN_ENCAP_LEN)
149 #define IXGBE_MAX_MTU (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR)
150 #define IXGBE_MAX_MTU_VLAN (IXGBE_MAX_FRAME_SIZE - IXGBE_MTU_HDR_VLAN)
152 /* Flow control constants */
153 #define IXGBE_FC_PAUSE 0xFFFF
154 #define IXGBE_FC_HI 0x20000
155 #define IXGBE_FC_LO 0x10000
158 * Used for optimizing small rx mbufs. Effort is made to keep the copy
159 * small and aligned for the CPU L1 cache.
161 * MHLEN is typically 168 bytes, giving us 8-byte alignment. Getting
162 * 32 byte alignment needed for the fast bcopy results in 8 bytes being
163 * wasted. Getting 64 byte alignment, which _should_ be ideal for
164 * modern Intel CPUs, results in 40 bytes wasted and a significant drop
165 * in observed efficiency of the optimization, 97.9% -> 81.8%.
167 #if __FreeBSD_version < 1002000
168 #define MPKTHSIZE (sizeof(struct m_hdr) + sizeof(struct pkthdr))
170 #define IXGBE_RX_COPY_HDR_PADDED ((((MPKTHSIZE - 1) / 32) + 1) * 32)
171 #define IXGBE_RX_COPY_LEN (MSIZE - IXGBE_RX_COPY_HDR_PADDED)
172 #define IXGBE_RX_COPY_ALIGN (IXGBE_RX_COPY_HDR_PADDED - MPKTHSIZE)
174 /* Keep older OS drivers building... */
175 #if !defined(SYSCTL_ADD_UQUAD)
176 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
179 /* Defines for printing debug information */
181 #define DEBUG_IOCTL 0
184 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n")
185 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A)
186 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B)
187 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n")
188 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A)
189 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B)
190 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n")
191 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A)
192 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B)
194 #define MAX_NUM_MULTICAST_ADDRESSES 128
195 #define IXGBE_82598_SCATTER 100
196 #define IXGBE_82599_SCATTER 32
197 #define MSIX_82598_BAR 3
198 #define MSIX_82599_BAR 4
199 #define IXGBE_TSO_SIZE 262140
200 #define IXGBE_RX_HDR 128
201 #define IXGBE_VFTA_SIZE 128
202 #define IXGBE_BR_SIZE 4096
203 #define IXGBE_QUEUE_MIN_FREE 32
204 #define IXGBE_MAX_TX_BUSY 10
205 #define IXGBE_QUEUE_HUNG 0x80000000
207 #define IXGBE_EITR_DEFAULT 128
209 /* Supported offload bits in mbuf flag */
210 #if __FreeBSD_version >= 1000000
211 #define CSUM_OFFLOAD (CSUM_IP_TSO|CSUM_IP6_TSO|CSUM_IP| \
212 CSUM_IP_UDP|CSUM_IP_TCP|CSUM_IP_SCTP| \
213 CSUM_IP6_UDP|CSUM_IP6_TCP|CSUM_IP6_SCTP)
214 #elif __FreeBSD_version >= 800000
215 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP|CSUM_SCTP)
217 #define CSUM_OFFLOAD (CSUM_IP|CSUM_TCP|CSUM_UDP)
220 /* Backward compatibility items for very old versions */
222 #define pci_find_cap pci_find_extcap
225 #ifndef DEVMETHOD_END
226 #define DEVMETHOD_END { NULL, NULL }
230 * Interrupt Moderation parameters
232 #define IXGBE_LOW_LATENCY 128
233 #define IXGBE_AVE_LATENCY 400
234 #define IXGBE_BULK_LATENCY 1200
236 /* Using 1FF (the max value), the interval is ~1.05ms */
237 #define IXGBE_LINK_ITR_QUANTA 0x1FF
238 #define IXGBE_LINK_ITR ((IXGBE_LINK_ITR_QUANTA << 3) & \
239 IXGBE_EITR_ITR_INT_MASK)
241 #define IXGBE_IS_VF(_x) 0
242 #define IXGBE_IS_X550VF(_x) 0
244 /* Netmap helper macro */
245 #define IXGBE_VFTDH IXGBE_TDH
247 /************************************************************************
250 * This array contains the list of Subvendor/Subdevice IDs on
251 * which the driver should load.
252 ************************************************************************/
253 typedef struct _ixgbe_vendor_info_t {
254 unsigned int vendor_id;
255 unsigned int device_id;
256 unsigned int subvendor_id;
257 unsigned int subdevice_id;
259 } ixgbe_vendor_info_t;
261 struct ixgbe_bp_data {
267 struct ixgbe_tx_buf {
268 union ixgbe_adv_tx_desc *eop;
273 struct ixgbe_rx_buf {
278 #define IXGBE_RX_COPY 0x01
283 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free
285 struct ixgbe_dma_alloc {
286 bus_addr_t dma_paddr;
288 bus_dma_tag_t dma_tag;
289 bus_dmamap_t dma_map;
290 bus_dma_segment_t dma_seg;
295 struct ixgbe_mc_addr {
296 u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS];
301 * Driver queue struct: this is the interrupt container
302 * for the associated tx and rx ring.
305 struct adapter *adapter;
306 u32 msix; /* This queue's MSI-X vector */
307 u32 eims; /* This queue's EIMS bit */
310 struct resource *res;
315 struct task que_task;
316 struct taskqueue *tq;
321 * The transmit ring, one per queue
324 struct adapter *adapter;
329 union ixgbe_adv_tx_desc *tx_base;
330 struct ixgbe_tx_buf *tx_buffers;
331 struct ixgbe_dma_alloc txdma;
332 volatile u16 tx_avail;
340 struct task txq_task;
346 u32 bytes; /* used for AIM */
358 * The Receive ring, one per rx queue
361 struct adapter *adapter;
365 union ixgbe_adv_rx_desc *rx_base;
366 struct ixgbe_dma_alloc rxdma;
376 struct ixgbe_rx_buf *rx_buffers;
379 u32 bytes; /* Used for AIM calc */
394 #define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */
399 u_int max_frame_size;
401 uint8_t ether_addr[ETHER_ADDR_LEN];
402 uint16_t mc_hash[IXGBE_MAX_VF_MC];
403 uint16_t num_mc_hashes;
404 uint16_t default_vlan;
409 /* Our adapter structure */
412 struct ixgbe_osdep osdep;
417 struct resource *pci_mem;
418 struct resource *msix_mem;
421 * Interrupt resources: this set is
422 * either used for legacy, or for Link
426 struct resource *res;
428 struct ifmedia media;
429 struct callout timer;
435 eventhandler_tag vlan_attach;
436 eventhandler_tag vlan_detach;
442 * Shadow VFTA table, this is needed because
443 * the real vlan filter table gets cleared during
444 * a soft reset and the driver needs to be able
447 u32 shadow_vfta[IXGBE_VFTA_SIZE];
449 /* Info about the interface */
450 int advertise; /* link speeds */
451 bool enable_aim; /* adaptive interrupt moderation */
461 /* Power management-related */
465 /* Mbuf cluster size */
468 /* Support for pluggable optics */
470 struct task link_task; /* Link tasklet */
471 struct task mod_task; /* SFP tasklet */
472 struct task msf_task; /* Multispeed Fiber */
473 struct task mbx_task; /* VF -> PF mailbox interrupt */
477 struct task fdir_task;
479 struct task phy_task; /* PHY intr tasklet */
480 struct taskqueue *tq;
484 * This is the irq holder, it has
485 * and RX/TX pair or rings associated
488 struct ix_queue *queues;
492 * Allocated at run time, an array of rings
494 struct tx_ring *tx_rings;
496 u32 tx_process_limit;
500 * Allocated at run time, an array of rings
502 struct rx_ring *rx_rings;
505 u32 rx_process_limit;
507 /* Multicast array memory */
508 struct ixgbe_mc_addr *mta;
514 struct ixgbe_vf *vfs;
517 struct ixgbe_bp_data bypass;
520 void (*init_locked)(struct adapter *);
521 void (*stop_locked)(void *);
523 /* Misc stats maintained by the driver */
524 unsigned long dropped_pkts;
525 unsigned long mbuf_defrag_failed;
526 unsigned long mbuf_header_failed;
527 unsigned long mbuf_packet_failed;
528 unsigned long watchdog_events;
529 unsigned long link_irq;
530 struct ixgbe_hw_stats stats_pf;
531 #if __FreeBSD_version >= 1100036
532 /* counter(9) stats */
544 /* Feature capable/enabled flags. See ixgbe_features.h */
550 /* Precision Time Sync (IEEE 1588) defines */
551 #define ETHERTYPE_IEEE1588 0x88F7
552 #define PICOSECS_PER_TICK 20833
553 #define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
554 #define IXGBE_ADVTXD_TSTAMP 0x00080000
557 #define IXGBE_CORE_LOCK_INIT(_sc, _name) \
558 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF)
559 #define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx)
560 #define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx)
561 #define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx)
562 #define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx)
563 #define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx)
564 #define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx)
565 #define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx)
566 #define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx)
567 #define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx)
568 #define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx)
569 #define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED)
570 #define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED)
572 /* For backward compatibility */
573 #if !defined(PCIER_LINK_STA)
574 #define PCIER_LINK_STA PCIR_EXPRESS_LINK_STA
578 #if __FreeBSD_version >= 1100036
579 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ipackets = (count)
580 #define IXGBE_SET_IERRORS(sc, count) (sc)->ierrors = (count)
581 #define IXGBE_SET_OPACKETS(sc, count) (sc)->opackets = (count)
582 #define IXGBE_SET_OERRORS(sc, count) (sc)->oerrors = (count)
583 #define IXGBE_SET_COLLISIONS(sc, count)
584 #define IXGBE_SET_IBYTES(sc, count) (sc)->ibytes = (count)
585 #define IXGBE_SET_OBYTES(sc, count) (sc)->obytes = (count)
586 #define IXGBE_SET_IMCASTS(sc, count) (sc)->imcasts = (count)
587 #define IXGBE_SET_OMCASTS(sc, count) (sc)->omcasts = (count)
588 #define IXGBE_SET_IQDROPS(sc, count) (sc)->iqdrops = (count)
590 #define IXGBE_SET_IPACKETS(sc, count) (sc)->ifp->if_ipackets = (count)
591 #define IXGBE_SET_IERRORS(sc, count) (sc)->ifp->if_ierrors = (count)
592 #define IXGBE_SET_OPACKETS(sc, count) (sc)->ifp->if_opackets = (count)
593 #define IXGBE_SET_OERRORS(sc, count) (sc)->ifp->if_oerrors = (count)
594 #define IXGBE_SET_COLLISIONS(sc, count) (sc)->ifp->if_collisions = (count)
595 #define IXGBE_SET_IBYTES(sc, count) (sc)->ifp->if_ibytes = (count)
596 #define IXGBE_SET_OBYTES(sc, count) (sc)->ifp->if_obytes = (count)
597 #define IXGBE_SET_IMCASTS(sc, count) (sc)->ifp->if_imcasts = (count)
598 #define IXGBE_SET_OMCASTS(sc, count) (sc)->ifp->if_omcasts = (count)
599 #define IXGBE_SET_IQDROPS(sc, count) (sc)->ifp->if_iqdrops = (count)
602 /* External PHY register addresses */
603 #define IXGBE_PHY_CURRENT_TEMP 0xC820
604 #define IXGBE_PHY_OVERTEMP_STATUS 0xC830
606 /* Sysctl help messages; displayed with sysctl -d */
607 #define IXGBE_SYSCTL_DESC_ADV_SPEED \
608 "\nControl advertised link speed using these flags:\n" \
609 "\t0x1 - advertise 100M\n" \
610 "\t0x2 - advertise 1G\n" \
611 "\t0x4 - advertise 10G\n" \
612 "\t0x8 - advertise 10M\n\n" \
613 "\t100M and 10M are only supported on certain adapters.\n"
615 #define IXGBE_SYSCTL_DESC_SET_FC \
616 "\nSet flow control mode using these values:\n" \
620 "\t3 - tx and rx pause"
622 /* Workaround to make 8.0 buildable */
623 #if __FreeBSD_version >= 800000 && __FreeBSD_version < 800504
625 drbr_needs_enqueue(struct ifnet *ifp, struct buf_ring *br)
628 if (ALTQ_IS_ENABLED(&ifp->if_snd))
631 return (!buf_ring_empty(br));
636 * Find the number of unrefreshed RX descriptors
639 ixgbe_rx_unrefreshed(struct rx_ring *rxr)
641 if (rxr->next_to_check > rxr->next_to_refresh)
642 return (rxr->next_to_check - rxr->next_to_refresh - 1);
644 return ((rxr->num_desc + rxr->next_to_check) -
645 rxr->next_to_refresh - 1);
649 ixgbe_legacy_ring_empty(struct ifnet *ifp, struct buf_ring *dummy)
651 UNREFERENCED_1PARAMETER(dummy);
653 return IFQ_DRV_IS_EMPTY(&ifp->if_snd);
657 * This checks for a zero mac addr, something that will be likely
658 * unless the Admin on the Host has created one.
661 ixv_check_ether_addr(u8 *addr)
665 if ((addr[0] == 0 && addr[1]== 0 && addr[2] == 0 &&
666 addr[3] == 0 && addr[4]== 0 && addr[5] == 0))
672 /* Shared Prototypes */
673 void ixgbe_legacy_start(struct ifnet *);
674 int ixgbe_legacy_start_locked(struct ifnet *, struct tx_ring *);
675 int ixgbe_mq_start(struct ifnet *, struct mbuf *);
676 int ixgbe_mq_start_locked(struct ifnet *, struct tx_ring *);
677 void ixgbe_qflush(struct ifnet *);
678 void ixgbe_deferred_mq_start(void *, int);
679 void ixgbe_init_locked(struct adapter *);
681 int ixgbe_allocate_queues(struct adapter *);
682 int ixgbe_setup_transmit_structures(struct adapter *);
683 void ixgbe_free_transmit_structures(struct adapter *);
684 int ixgbe_setup_receive_structures(struct adapter *);
685 void ixgbe_free_receive_structures(struct adapter *);
686 void ixgbe_txeof(struct tx_ring *);
687 bool ixgbe_rxeof(struct ix_queue *);
689 #include "ixgbe_sriov.h"
690 #include "ixgbe_bypass.h"
691 #include "ixgbe_fdir.h"
692 #include "ixgbe_rss.h"
693 #include "ixgbe_netmap.h"
695 #endif /* _IXGBE_H_ */