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32 ******************************************************************************/
36 #include "ixgbe_type.h"
37 #include "ixgbe_dcb.h"
38 #include "ixgbe_dcb_82598.h"
39 #include "ixgbe_dcb_82599.h"
42 * ixgbe_dcb_calculate_tc_credits - This calculates the ieee traffic class
43 * credits from the configured bandwidth percentages. Credits
44 * are the smallest unit programmable into the underlying
45 * hardware. The IEEE 802.1Qaz specification do not use bandwidth
46 * groups so this is much simplified from the CEE case.
48 s32 ixgbe_dcb_calculate_tc_credits(u8 *bw, u16 *refill, u16 *max,
51 int min_percent = 100;
52 int min_credit, multiplier;
55 min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) /
56 IXGBE_DCB_CREDIT_QUANTUM;
58 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
59 if (bw[i] < min_percent && bw[i])
63 multiplier = (min_credit / min_percent) + 1;
65 /* Find out the hw credits for each TC */
66 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
67 int val = min(bw[i] * multiplier, IXGBE_DCB_MAX_CREDIT_REFILL);
73 max[i] = bw[i] ? (bw[i]*IXGBE_DCB_MAX_CREDIT)/100 : min_credit;
80 * ixgbe_dcb_calculate_tc_credits_cee - Calculates traffic class credits
81 * @ixgbe_dcb_config: Struct containing DCB settings.
82 * @direction: Configuring either Tx or Rx.
84 * This function calculates the credits allocated to each traffic class.
85 * It should be called only after the rules are checked by
86 * ixgbe_dcb_check_config_cee().
88 s32 ixgbe_dcb_calculate_tc_credits_cee(struct ixgbe_hw *hw,
89 struct ixgbe_dcb_config *dcb_config,
90 u32 max_frame_size, u8 direction)
92 struct ixgbe_dcb_tc_path *p;
93 u32 min_multiplier = 0;
94 u16 min_percent = 100;
95 s32 ret_val = IXGBE_SUCCESS;
96 /* Initialization values default for Tx settings */
98 u32 credit_refill = 0;
100 u16 link_percentage = 0;
104 if (dcb_config == NULL) {
105 ret_val = IXGBE_ERR_CONFIG;
109 min_credit = ((max_frame_size / 2) + IXGBE_DCB_CREDIT_QUANTUM - 1) /
110 IXGBE_DCB_CREDIT_QUANTUM;
112 /* Find smallest link percentage */
113 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
114 p = &dcb_config->tc_config[i].path[direction];
115 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
116 link_percentage = p->bwg_percent;
118 link_percentage = (link_percentage * bw_percent) / 100;
120 if (link_percentage && link_percentage < min_percent)
121 min_percent = link_percentage;
125 * The ratio between traffic classes will control the bandwidth
126 * percentages seen on the wire. To calculate this ratio we use
127 * a multiplier. It is required that the refill credits must be
128 * larger than the max frame size so here we find the smallest
129 * multiplier that will allow all bandwidth percentages to be
130 * greater than the max frame size.
132 min_multiplier = (min_credit / min_percent) + 1;
134 /* Find out the link percentage for each TC first */
135 for (i = 0; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++) {
136 p = &dcb_config->tc_config[i].path[direction];
137 bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
139 link_percentage = p->bwg_percent;
140 /* Must be careful of integer division for very small nums */
141 link_percentage = (link_percentage * bw_percent) / 100;
142 if (p->bwg_percent > 0 && link_percentage == 0)
145 /* Save link_percentage for reference */
146 p->link_percent = (u8)link_percentage;
148 /* Calculate credit refill ratio using multiplier */
149 credit_refill = min(link_percentage * min_multiplier,
150 (u32)IXGBE_DCB_MAX_CREDIT_REFILL);
152 /* Refill at least minimum credit */
153 if (credit_refill < min_credit)
154 credit_refill = min_credit;
156 p->data_credits_refill = (u16)credit_refill;
158 /* Calculate maximum credit for the TC */
159 credit_max = (link_percentage * IXGBE_DCB_MAX_CREDIT) / 100;
162 * Adjustment based on rule checking, if the percentage
163 * of a TC is too small, the maximum credit may not be
164 * enough to send out a jumbo frame in data plane arbitration.
166 if (credit_max < min_credit)
167 credit_max = min_credit;
169 if (direction == IXGBE_DCB_TX_CONFIG) {
171 * Adjustment based on rule checking, if the
172 * percentage of a TC is too small, the maximum
173 * credit may not be enough to send out a TSO
174 * packet in descriptor plane arbitration.
176 if (credit_max && (credit_max <
177 IXGBE_DCB_MIN_TSO_CREDIT)
178 && (hw->mac.type == ixgbe_mac_82598EB))
179 credit_max = IXGBE_DCB_MIN_TSO_CREDIT;
181 dcb_config->tc_config[i].desc_credits_max =
185 p->data_credits_max = (u16)credit_max;
193 * ixgbe_dcb_unpack_pfc_cee - Unpack dcb_config PFC info
194 * @cfg: dcb configuration to unpack into hardware consumable fields
195 * @map: user priority to traffic class map
196 * @pfc_up: u8 to store user priority PFC bitmask
198 * This unpacks the dcb configuration PFC info which is stored per
199 * traffic class into a 8bit user priority bitmask that can be
200 * consumed by hardware routines. The priority to tc map must be
201 * updated before calling this routine to use current up-to maps.
203 void ixgbe_dcb_unpack_pfc_cee(struct ixgbe_dcb_config *cfg, u8 *map, u8 *pfc_up)
205 struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
209 * If the TC for this user priority has PFC enabled then set the
210 * matching bit in 'pfc_up' to reflect that PFC is enabled.
212 for (*pfc_up = 0, up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++) {
213 if (tc_config[map[up]].pfc != ixgbe_dcb_pfc_disabled)
218 void ixgbe_dcb_unpack_refill_cee(struct ixgbe_dcb_config *cfg, int direction,
221 struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
224 for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
225 refill[tc] = tc_config[tc].path[direction].data_credits_refill;
228 void ixgbe_dcb_unpack_max_cee(struct ixgbe_dcb_config *cfg, u16 *max)
230 struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
233 for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
234 max[tc] = tc_config[tc].desc_credits_max;
237 void ixgbe_dcb_unpack_bwgid_cee(struct ixgbe_dcb_config *cfg, int direction,
240 struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
243 for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
244 bwgid[tc] = tc_config[tc].path[direction].bwg_id;
247 void ixgbe_dcb_unpack_tsa_cee(struct ixgbe_dcb_config *cfg, int direction,
250 struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
253 for (tc = 0; tc < IXGBE_DCB_MAX_TRAFFIC_CLASS; tc++)
254 tsa[tc] = tc_config[tc].path[direction].tsa;
257 u8 ixgbe_dcb_get_tc_from_up(struct ixgbe_dcb_config *cfg, int direction, u8 up)
259 struct ixgbe_dcb_tc_config *tc_config = &cfg->tc_config[0];
260 u8 prio_mask = 1 << up;
261 u8 tc = cfg->num_tcs.pg_tcs;
263 /* If tc is 0 then DCB is likely not enabled or supported */
268 * Test from maximum TC to 1 and report the first match we find. If
269 * we find no match we can assume that the TC is 0 since the TC must
270 * be set for all user priorities
272 for (tc--; tc; tc--) {
273 if (prio_mask & tc_config[tc].path[direction].up_to_tc_bitmap)
280 void ixgbe_dcb_unpack_map_cee(struct ixgbe_dcb_config *cfg, int direction,
285 for (up = 0; up < IXGBE_DCB_MAX_USER_PRIORITY; up++)
286 map[up] = ixgbe_dcb_get_tc_from_up(cfg, direction, up);
290 * ixgbe_dcb_config - Struct containing DCB settings.
291 * @dcb_config: Pointer to DCB config structure
293 * This function checks DCB rules for DCB settings.
294 * The following rules are checked:
295 * 1. The sum of bandwidth percentages of all Bandwidth Groups must total 100%.
296 * 2. The sum of bandwidth percentages of all Traffic Classes within a Bandwidth
297 * Group must total 100.
298 * 3. A Traffic Class should not be set to both Link Strict Priority
299 * and Group Strict Priority.
300 * 4. Link strict Bandwidth Groups can only have link strict traffic classes
301 * with zero bandwidth.
303 s32 ixgbe_dcb_check_config_cee(struct ixgbe_dcb_config *dcb_config)
305 struct ixgbe_dcb_tc_path *p;
306 s32 ret_val = IXGBE_SUCCESS;
307 u8 i, j, bw = 0, bw_id;
308 u8 bw_sum[2][IXGBE_DCB_MAX_BW_GROUP];
309 bool link_strict[2][IXGBE_DCB_MAX_BW_GROUP];
311 memset(bw_sum, 0, sizeof(bw_sum));
312 memset(link_strict, 0, sizeof(link_strict));
314 /* First Tx, then Rx */
315 for (i = 0; i < 2; i++) {
316 /* Check each traffic class for rule violation */
317 for (j = 0; j < IXGBE_DCB_MAX_TRAFFIC_CLASS; j++) {
318 p = &dcb_config->tc_config[j].path[i];
323 if (bw_id >= IXGBE_DCB_MAX_BW_GROUP) {
324 ret_val = IXGBE_ERR_CONFIG;
327 if (p->tsa == ixgbe_dcb_tsa_strict) {
328 link_strict[i][bw_id] = TRUE;
329 /* Link strict should have zero bandwidth */
331 ret_val = IXGBE_ERR_CONFIG;
336 * Traffic classes without link strict
337 * should have non-zero bandwidth.
339 ret_val = IXGBE_ERR_CONFIG;
342 bw_sum[i][bw_id] += bw;
347 /* Check each bandwidth group for rule violation */
348 for (j = 0; j < IXGBE_DCB_MAX_BW_GROUP; j++) {
349 bw += dcb_config->bw_percentage[i][j];
351 * Sum of bandwidth percentages of all traffic classes
352 * within a Bandwidth Group must total 100 except for
353 * link strict group (zero bandwidth).
355 if (link_strict[i][j]) {
358 * Link strict group should have zero
361 ret_val = IXGBE_ERR_CONFIG;
364 } else if (bw_sum[i][j] != IXGBE_DCB_BW_PERCENT &&
366 ret_val = IXGBE_ERR_CONFIG;
371 if (bw != IXGBE_DCB_BW_PERCENT) {
372 ret_val = IXGBE_ERR_CONFIG;
378 DEBUGOUT2("DCB error code %d while checking %s settings.\n",
379 ret_val, (i == IXGBE_DCB_TX_CONFIG) ? "Tx" : "Rx");
385 * ixgbe_dcb_get_tc_stats - Returns status of each traffic class
386 * @hw: pointer to hardware structure
387 * @stats: pointer to statistics structure
388 * @tc_count: Number of elements in bwg_array.
390 * This function returns the status data for each of the Traffic Classes in use.
392 s32 ixgbe_dcb_get_tc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
395 s32 ret = IXGBE_NOT_IMPLEMENTED;
396 switch (hw->mac.type) {
397 case ixgbe_mac_82598EB:
398 ret = ixgbe_dcb_get_tc_stats_82598(hw, stats, tc_count);
400 case ixgbe_mac_82599EB:
403 case ixgbe_mac_X550EM_x:
404 case ixgbe_mac_X550EM_a:
405 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
406 ret = ixgbe_dcb_get_tc_stats_82599(hw, stats, tc_count);
416 * ixgbe_dcb_get_pfc_stats - Returns CBFC status of each traffic class
417 * @hw: pointer to hardware structure
418 * @stats: pointer to statistics structure
419 * @tc_count: Number of elements in bwg_array.
421 * This function returns the CBFC status data for each of the Traffic Classes.
423 s32 ixgbe_dcb_get_pfc_stats(struct ixgbe_hw *hw, struct ixgbe_hw_stats *stats,
426 s32 ret = IXGBE_NOT_IMPLEMENTED;
427 switch (hw->mac.type) {
428 case ixgbe_mac_82598EB:
429 ret = ixgbe_dcb_get_pfc_stats_82598(hw, stats, tc_count);
431 case ixgbe_mac_82599EB:
434 case ixgbe_mac_X550EM_x:
435 case ixgbe_mac_X550EM_a:
436 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
437 ret = ixgbe_dcb_get_pfc_stats_82599(hw, stats, tc_count);
447 * ixgbe_dcb_config_rx_arbiter_cee - Config Rx arbiter
448 * @hw: pointer to hardware structure
449 * @dcb_config: pointer to ixgbe_dcb_config structure
451 * Configure Rx Data Arbiter and credits for each traffic class.
453 s32 ixgbe_dcb_config_rx_arbiter_cee(struct ixgbe_hw *hw,
454 struct ixgbe_dcb_config *dcb_config)
456 s32 ret = IXGBE_NOT_IMPLEMENTED;
457 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
458 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
459 u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
460 u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
461 u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS] = { 0 };
463 ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
464 ixgbe_dcb_unpack_max_cee(dcb_config, max);
465 ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
466 ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
467 ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
469 switch (hw->mac.type) {
470 case ixgbe_mac_82598EB:
471 ret = ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);
473 case ixgbe_mac_82599EB:
476 case ixgbe_mac_X550EM_x:
477 case ixgbe_mac_X550EM_a:
478 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
479 ret = ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwgid,
490 * ixgbe_dcb_config_tx_desc_arbiter_cee - Config Tx Desc arbiter
491 * @hw: pointer to hardware structure
492 * @dcb_config: pointer to ixgbe_dcb_config structure
494 * Configure Tx Descriptor Arbiter and credits for each traffic class.
496 s32 ixgbe_dcb_config_tx_desc_arbiter_cee(struct ixgbe_hw *hw,
497 struct ixgbe_dcb_config *dcb_config)
499 s32 ret = IXGBE_NOT_IMPLEMENTED;
500 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS];
501 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS];
502 u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];
503 u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];
505 ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
506 ixgbe_dcb_unpack_max_cee(dcb_config, max);
507 ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
508 ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
510 switch (hw->mac.type) {
511 case ixgbe_mac_82598EB:
512 ret = ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max,
515 case ixgbe_mac_82599EB:
518 case ixgbe_mac_X550EM_x:
519 case ixgbe_mac_X550EM_a:
520 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
521 ret = ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max,
532 * ixgbe_dcb_config_tx_data_arbiter_cee - Config Tx data arbiter
533 * @hw: pointer to hardware structure
534 * @dcb_config: pointer to ixgbe_dcb_config structure
536 * Configure Tx Data Arbiter and credits for each traffic class.
538 s32 ixgbe_dcb_config_tx_data_arbiter_cee(struct ixgbe_hw *hw,
539 struct ixgbe_dcb_config *dcb_config)
541 s32 ret = IXGBE_NOT_IMPLEMENTED;
542 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS];
543 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS];
544 u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
545 u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];
546 u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];
548 ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
549 ixgbe_dcb_unpack_max_cee(dcb_config, max);
550 ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
551 ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
552 ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
554 switch (hw->mac.type) {
555 case ixgbe_mac_82598EB:
556 ret = ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max,
559 case ixgbe_mac_82599EB:
562 case ixgbe_mac_X550EM_x:
563 case ixgbe_mac_X550EM_a:
564 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
565 ret = ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max,
577 * ixgbe_dcb_config_pfc_cee - Config priority flow control
578 * @hw: pointer to hardware structure
579 * @dcb_config: pointer to ixgbe_dcb_config structure
581 * Configure Priority Flow Control for each traffic class.
583 s32 ixgbe_dcb_config_pfc_cee(struct ixgbe_hw *hw,
584 struct ixgbe_dcb_config *dcb_config)
586 s32 ret = IXGBE_NOT_IMPLEMENTED;
588 u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
590 ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
591 ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en);
593 switch (hw->mac.type) {
594 case ixgbe_mac_82598EB:
595 ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en);
597 case ixgbe_mac_82599EB:
600 case ixgbe_mac_X550EM_x:
601 case ixgbe_mac_X550EM_a:
602 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
603 ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
613 * ixgbe_dcb_config_tc_stats - Config traffic class statistics
614 * @hw: pointer to hardware structure
616 * Configure queue statistics registers, all queues belonging to same traffic
617 * class uses a single set of queue statistics counters.
619 s32 ixgbe_dcb_config_tc_stats(struct ixgbe_hw *hw)
621 s32 ret = IXGBE_NOT_IMPLEMENTED;
622 switch (hw->mac.type) {
623 case ixgbe_mac_82598EB:
624 ret = ixgbe_dcb_config_tc_stats_82598(hw);
626 case ixgbe_mac_82599EB:
629 case ixgbe_mac_X550EM_x:
630 case ixgbe_mac_X550EM_a:
631 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
632 ret = ixgbe_dcb_config_tc_stats_82599(hw, NULL);
642 * ixgbe_dcb_hw_config_cee - Config and enable DCB
643 * @hw: pointer to hardware structure
644 * @dcb_config: pointer to ixgbe_dcb_config structure
646 * Configure dcb settings and enable dcb mode.
648 s32 ixgbe_dcb_hw_config_cee(struct ixgbe_hw *hw,
649 struct ixgbe_dcb_config *dcb_config)
651 s32 ret = IXGBE_NOT_IMPLEMENTED;
653 u8 tsa[IXGBE_DCB_MAX_TRAFFIC_CLASS];
654 u8 bwgid[IXGBE_DCB_MAX_TRAFFIC_CLASS];
655 u8 map[IXGBE_DCB_MAX_USER_PRIORITY] = { 0 };
656 u16 refill[IXGBE_DCB_MAX_TRAFFIC_CLASS];
657 u16 max[IXGBE_DCB_MAX_TRAFFIC_CLASS];
659 /* Unpack CEE standard containers */
660 ixgbe_dcb_unpack_refill_cee(dcb_config, IXGBE_DCB_TX_CONFIG, refill);
661 ixgbe_dcb_unpack_max_cee(dcb_config, max);
662 ixgbe_dcb_unpack_bwgid_cee(dcb_config, IXGBE_DCB_TX_CONFIG, bwgid);
663 ixgbe_dcb_unpack_tsa_cee(dcb_config, IXGBE_DCB_TX_CONFIG, tsa);
664 ixgbe_dcb_unpack_map_cee(dcb_config, IXGBE_DCB_TX_CONFIG, map);
666 hw->mac.ops.setup_rxpba(hw, dcb_config->num_tcs.pg_tcs,
667 0, dcb_config->rx_pba_cfg);
669 switch (hw->mac.type) {
670 case ixgbe_mac_82598EB:
671 ret = ixgbe_dcb_hw_config_82598(hw, dcb_config->link_speed,
672 refill, max, bwgid, tsa);
674 case ixgbe_mac_82599EB:
677 case ixgbe_mac_X550EM_x:
678 case ixgbe_mac_X550EM_a:
679 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
680 ixgbe_dcb_config_82599(hw, dcb_config);
681 ret = ixgbe_dcb_hw_config_82599(hw, dcb_config->link_speed,
685 ixgbe_dcb_config_tc_stats_82599(hw, dcb_config);
692 if (!ret && dcb_config->pfc_mode_enable) {
693 ixgbe_dcb_unpack_pfc_cee(dcb_config, map, &pfc_en);
694 ret = ixgbe_dcb_config_pfc(hw, pfc_en, map);
700 /* Helper routines to abstract HW specifics from DCB netlink ops */
701 s32 ixgbe_dcb_config_pfc(struct ixgbe_hw *hw, u8 pfc_en, u8 *map)
703 int ret = IXGBE_ERR_PARAM;
705 switch (hw->mac.type) {
706 case ixgbe_mac_82598EB:
707 ret = ixgbe_dcb_config_pfc_82598(hw, pfc_en);
709 case ixgbe_mac_82599EB:
712 case ixgbe_mac_X550EM_x:
713 case ixgbe_mac_X550EM_a:
714 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
715 ret = ixgbe_dcb_config_pfc_82599(hw, pfc_en, map);
724 s32 ixgbe_dcb_hw_config(struct ixgbe_hw *hw, u16 *refill, u16 *max,
725 u8 *bwg_id, u8 *tsa, u8 *map)
727 switch (hw->mac.type) {
728 case ixgbe_mac_82598EB:
729 ixgbe_dcb_config_rx_arbiter_82598(hw, refill, max, tsa);
730 ixgbe_dcb_config_tx_desc_arbiter_82598(hw, refill, max, bwg_id,
732 ixgbe_dcb_config_tx_data_arbiter_82598(hw, refill, max, bwg_id,
735 case ixgbe_mac_82599EB:
738 case ixgbe_mac_X550EM_x:
739 case ixgbe_mac_X550EM_a:
740 #if !defined(NO_82599_SUPPORT) || !defined(NO_X540_SUPPORT)
741 ixgbe_dcb_config_rx_arbiter_82599(hw, refill, max, bwg_id,
743 ixgbe_dcb_config_tx_desc_arbiter_82599(hw, refill, max, bwg_id,
745 ixgbe_dcb_config_tx_data_arbiter_82599(hw, refill, max, bwg_id,