1 /******************************************************************************
3 Copyright (c) 2001-2013, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ******************************************************************************/
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/endian.h>
41 #include <sys/systm.h>
43 #include <sys/protosw.h>
44 #include <sys/socket.h>
45 #include <sys/malloc.h>
46 #include <sys/kernel.h>
48 #include <machine/bus.h>
50 #include <machine/resource.h>
53 #include <machine/clock.h>
54 #include <dev/pci/pcivar.h>
55 #include <dev/pci/pcireg.h>
57 #define ASSERT(x) if(!(x)) panic("IXGBE: x")
58 #define EWARN(H, W, S) printf(W)
60 /* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
61 #define usec_delay(x) DELAY(x)
62 #define msec_delay(x) DELAY(1000*(x))
65 #define MSGOUT(S, A, B) printf(S "\n", A, B)
66 #define DEBUGFUNC(F) DEBUGOUT(F);
68 #define DEBUGOUT(S) printf(S "\n")
69 #define DEBUGOUT1(S,A) printf(S "\n",A)
70 #define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
71 #define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
72 #define DEBUGOUT4(S,A,B,C,D) printf(S "\n",A,B,C,D)
73 #define DEBUGOUT5(S,A,B,C,D,E) printf(S "\n",A,B,C,D,E)
74 #define DEBUGOUT6(S,A,B,C,D,E,F) printf(S "\n",A,B,C,D,E,F)
75 #define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
78 #define DEBUGOUT1(S,A)
79 #define DEBUGOUT2(S,A,B)
80 #define DEBUGOUT3(S,A,B,C)
81 #define DEBUGOUT4(S,A,B,C,D)
82 #define DEBUGOUT5(S,A,B,C,D,E)
83 #define DEBUGOUT6(S,A,B,C,D,E,F)
84 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
88 #define false 0 /* shared code requires this */
91 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
92 #define PCI_COMMAND_REGISTER PCIR_COMMAND
94 /* Shared code dropped this define.. */
95 #define IXGBE_INTEL_VENDOR_ID 0x8086
97 /* Bunch of defines for shared code bogosity */
98 #define UNREFERENCED_PARAMETER(_p)
99 #define UNREFERENCED_1PARAMETER(_p)
100 #define UNREFERENCED_2PARAMETER(_p, _q)
101 #define UNREFERENCED_3PARAMETER(_p, _q, _r)
102 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
105 #define IXGBE_NTOHL(_i) ntohl(_i)
106 #define IXGBE_NTOHS(_i) ntohs(_i)
108 /* XXX these need to be revisited */
109 #define IXGBE_CPU_TO_LE32 le32toh
110 #define IXGBE_LE32_TO_CPUS le32dec
114 typedef uint16_t u16;
115 typedef uint32_t u32;
117 typedef uint64_t u64;
118 #ifndef __bool_true_false_are_defined
119 typedef boolean_t bool;
122 /* shared code requires this */
132 #if __FreeBSD_version < 800000
133 #if defined(__i386__) || defined(__amd64__)
134 #define mb() __asm volatile("mfence" ::: "memory")
135 #define wmb() __asm volatile("sfence" ::: "memory")
136 #define rmb() __asm volatile("lfence" ::: "memory")
144 #if defined(__i386__) || defined(__amd64__)
146 void prefetch(void *x)
148 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
155 * Optimized bcopy thanks to Luigi Rizzo's investigative work. Assumes
156 * non-overlapping regions and 32-byte padding on both src and dst.
159 ixgbe_bcopy(void *_src, void *_dst, int l)
161 uint64_t *src = _src;
162 uint64_t *dst = _dst;
164 for (; l > 0; l -= 32) {
175 bus_space_tag_t mem_bus_space_tag;
176 bus_space_handle_t mem_bus_space_handle;
180 /* These routines are needed by the shared code */
182 extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
183 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
185 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
186 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
188 #define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
190 #define IXGBE_READ_REG(a, reg) (\
191 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
192 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
195 #define IXGBE_WRITE_REG(a, reg, value) (\
196 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
197 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
201 #define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
202 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
203 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
204 (reg + ((offset) << 2))))
206 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
207 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
208 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
209 (reg + ((offset) << 2)), value))
212 #endif /* _IXGBE_OS_H_ */