1 /******************************************************************************
3 Copyright (c) 2001-2017, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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32 ******************************************************************************/
38 #ifndef IXGBE_VFWRITE_REG
39 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
41 #ifndef IXGBE_VFREAD_REG
42 #define IXGBE_VFREAD_REG IXGBE_READ_REG
46 * ixgbe_init_ops_vf - Initialize the pointers for vf
47 * @hw: pointer to hardware structure
49 * This will assign function pointers, adapter-specific functions can
50 * override the assignment of generic function pointers by assigning
51 * their own adapter-specific function pointers.
52 * Does not touch the hardware.
54 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
57 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
58 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
59 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
60 /* Cannot clear stats on VF */
61 hw->mac.ops.clear_hw_cntrs = NULL;
62 hw->mac.ops.get_media_type = NULL;
63 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
64 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
65 hw->mac.ops.get_bus_info = NULL;
66 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
69 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
70 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
71 hw->mac.ops.get_link_capabilities = NULL;
73 /* RAR, Multicast, VLAN */
74 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
75 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
76 hw->mac.ops.init_rx_addrs = NULL;
77 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
78 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
79 hw->mac.ops.enable_mc = NULL;
80 hw->mac.ops.disable_mc = NULL;
81 hw->mac.ops.clear_vfta = NULL;
82 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
83 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
85 hw->mac.max_tx_queues = 1;
86 hw->mac.max_rx_queues = 1;
88 hw->mbx.ops.init_params = ixv_init_mbx_params_vf;
93 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
94 * @hw: pointer to hardware structure
96 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
103 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
104 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
105 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
107 /* DCA_RXCTRL default value */
108 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
109 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
110 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
112 /* DCA_TXCTRL default value */
113 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
114 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
115 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
117 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
119 for (i = 0; i < 7; i++) {
120 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
121 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
122 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
123 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
124 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
125 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
126 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
130 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
133 IXGBE_WRITE_FLUSH(hw);
137 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
138 * @hw: pointer to hardware structure
140 * Starts the hardware by filling the bus info structure and media type, clears
141 * all on chip counters, initializes receive address registers, multicast
142 * table, VLAN filter table, calls routine to set up link and flow control
143 * settings, and leaves transmit and receive units disabled and uninitialized
145 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
147 /* Clear adapter stopped flag */
148 hw->adapter_stopped = FALSE;
150 return IXGBE_SUCCESS;
154 * ixgbe_init_hw_vf - virtual function hardware initialization
155 * @hw: pointer to hardware structure
157 * Initialize the hardware by resetting the hardware and then starting
160 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
162 s32 status = hw->mac.ops.start_hw(hw);
164 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
170 * ixgbe_reset_hw_vf - Performs hardware reset
171 * @hw: pointer to hardware structure
173 * Resets the hardware by reseting the transmit and receive units, masks and
174 * clears all interrupts.
176 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
178 struct ixgbe_mbx_info *mbx = &hw->mbx;
179 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
180 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
181 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
182 u8 *addr = (u8 *)(&msgbuf[1]);
184 DEBUGFUNC("ixgbevf_reset_hw_vf");
186 /* Call adapter stop to disable tx/rx and clear interrupts */
187 hw->mac.ops.stop_adapter(hw);
189 /* reset the api version */
190 hw->api_version = ixgbe_mbox_api_10;
192 DEBUGOUT("Issuing a function level reset to MAC\n");
194 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
195 IXGBE_WRITE_FLUSH(hw);
199 /* we cannot reset while the RSTI / RSTD bits are asserted */
200 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
206 return IXGBE_ERR_RESET_FAILED;
208 /* Reset VF registers to initial values */
209 ixgbe_virt_clr_reg(hw);
211 /* mailbox timeout can now become active */
212 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
214 msgbuf[0] = IXGBE_VF_RESET;
215 mbx->ops.write_posted(hw, msgbuf, 1, 0);
220 * set our "perm_addr" based on info provided by PF
221 * also set up the mc_filter_type which is piggy backed
222 * on the mac address in word 3
224 ret_val = mbx->ops.read_posted(hw, msgbuf,
225 IXGBE_VF_PERMADDR_MSG_LEN, 0);
229 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
230 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
231 return IXGBE_ERR_INVALID_MAC_ADDR;
233 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
234 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
236 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
242 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
243 * @hw: pointer to hardware structure
245 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
246 * disables transmit and receive units. The adapter_stopped flag is used by
247 * the shared code and drivers to determine if the adapter is in a stopped
248 * state and should not touch the hardware.
250 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
256 * Set the adapter_stopped flag so other driver functions stop touching
259 hw->adapter_stopped = TRUE;
261 /* Clear interrupt mask to stop from interrupts being generated */
262 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
264 /* Clear any pending interrupts, flush previous writes */
265 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
267 /* Disable the transmit unit. Each queue must be disabled. */
268 for (i = 0; i < hw->mac.max_tx_queues; i++)
269 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
271 /* Disable the receive unit by stopping each queue */
272 for (i = 0; i < hw->mac.max_rx_queues; i++) {
273 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
274 reg_val &= ~IXGBE_RXDCTL_ENABLE;
275 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
277 /* Clear packet split and pool config */
278 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
280 /* flush all queues disables */
281 IXGBE_WRITE_FLUSH(hw);
284 return IXGBE_SUCCESS;
288 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
289 * @hw: pointer to hardware structure
290 * @mc_addr: the multicast address
292 * Extracts the 12 bits, from a multicast address, to determine which
293 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
294 * incoming rx multicast addresses, to determine the bit-vector to check in
295 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
296 * by the MO field of the MCSTCTRL. The MO field is set during initialization
299 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
303 switch (hw->mac.mc_filter_type) {
304 case 0: /* use bits [47:36] of the address */
305 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
307 case 1: /* use bits [46:35] of the address */
308 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
310 case 2: /* use bits [45:34] of the address */
311 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
313 case 3: /* use bits [43:32] of the address */
314 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
316 default: /* Invalid mc_filter_type */
317 DEBUGOUT("MC filter type param set incorrectly\n");
322 /* vector can only be 12-bits or boundary will be exceeded */
327 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
328 u32 *retmsg, u16 size)
330 struct ixgbe_mbx_info *mbx = &hw->mbx;
331 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
336 return mbx->ops.read_posted(hw, retmsg, size, 0);
340 * ixgbe_set_rar_vf - set device MAC address
341 * @hw: pointer to hardware structure
342 * @index: Receive address register to write
343 * @addr: Address to put into receive address register
344 * @vmdq: VMDq "set" or "pool" index
345 * @enable_addr: set flag that address is active
347 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
351 u8 *msg_addr = (u8 *)(&msgbuf[1]);
353 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
355 memset(msgbuf, 0, 12);
356 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
357 memcpy(msg_addr, addr, 6);
358 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
360 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
362 /* if nacked the address was rejected, use "perm_addr" */
364 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
365 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
366 return IXGBE_ERR_MBX;
373 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
374 * @hw: pointer to the HW structure
375 * @mc_addr_list: array of multicast addresses to program
376 * @mc_addr_count: number of multicast addresses to program
377 * @next: caller supplied function to return next address in list
379 * Updates the Multicast Table Array.
381 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
382 u32 mc_addr_count, ixgbe_mc_addr_itr next,
385 struct ixgbe_mbx_info *mbx = &hw->mbx;
386 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
387 u16 *vector_list = (u16 *)&msgbuf[1];
392 UNREFERENCED_1PARAMETER(clear);
394 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
396 /* Each entry in the list uses 1 16 bit word. We have 30
397 * 16 bit words available in our HW msg buffer (minus 1 for the
398 * msg type). That's 30 hash values if we pack 'em right. If
399 * there are more than 30 MC addresses to add then punt the
400 * extras for now and then add code to handle more than 30 later.
401 * It would be unusual for a server to request that many multi-cast
402 * addresses except for in large enterprise network environments.
405 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
407 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
408 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
409 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
411 for (i = 0; i < cnt; i++) {
412 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
413 DEBUGOUT1("Hash value = 0x%03X\n", vector);
414 vector_list[i] = (u16)vector;
417 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
421 * ixgbevf_update_xcast_mode - Update Multicast mode
422 * @hw: pointer to the HW structure
423 * @xcast_mode: new multicast mode
425 * Updates the Multicast Mode of VF.
427 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
432 switch (hw->api_version) {
433 case ixgbe_mbox_api_12:
434 case ixgbe_mbox_api_13:
437 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
440 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
441 msgbuf[1] = xcast_mode;
443 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
447 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
448 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK))
449 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
450 return IXGBE_SUCCESS;
454 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
455 * @hw: pointer to the HW structure
456 * @vlan: 12 bit VLAN ID
457 * @vind: unused by VF drivers
458 * @vlan_on: if TRUE then set bit, else clear bit
459 * @vlvf_bypass: boolean flag indicating updating default pool is okay
461 * Turn on/off specified VLAN in the VLAN filter table.
463 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
464 bool vlan_on, bool vlvf_bypass)
468 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
470 msgbuf[0] = IXGBE_VF_SET_VLAN;
472 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
473 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
475 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
476 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
477 return IXGBE_SUCCESS;
479 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
483 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
484 * @hw: pointer to hardware structure
486 * Returns the number of transmit queues for the given adapter.
488 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
490 UNREFERENCED_1PARAMETER(hw);
491 return IXGBE_VF_MAX_TX_QUEUES;
495 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
496 * @hw: pointer to hardware structure
498 * Returns the number of receive queues for the given adapter.
500 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
502 UNREFERENCED_1PARAMETER(hw);
503 return IXGBE_VF_MAX_RX_QUEUES;
507 * ixgbe_get_mac_addr_vf - Read device MAC address
508 * @hw: pointer to the HW structure
510 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
514 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
515 mac_addr[i] = hw->mac.perm_addr[i];
517 return IXGBE_SUCCESS;
520 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
522 u32 msgbuf[3], msgbuf_chk;
523 u8 *msg_addr = (u8 *)(&msgbuf[1]);
526 memset(msgbuf, 0, sizeof(msgbuf));
528 * If index is one then this is the start of a new list and needs
529 * indication to the PF so it can do it's own list management.
530 * If it is zero then that tells the PF to just clear all of
531 * this VF's macvlans and there is no new list.
533 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
534 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
535 msgbuf_chk = msgbuf[0];
537 memcpy(msg_addr, addr, 6);
539 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
541 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
543 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK))
544 return IXGBE_ERR_OUT_OF_MEM;
551 * ixgbe_setup_mac_link_vf - Setup MAC link settings
552 * @hw: pointer to hardware structure
553 * @speed: new link speed
554 * @autoneg: TRUE if autonegotiation enabled
555 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
557 * Set the link speed in the AUTOC register and restarts link.
559 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
560 bool autoneg_wait_to_complete)
562 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
563 return IXGBE_SUCCESS;
567 * ixgbe_check_mac_link_vf - Get link/speed status
568 * @hw: pointer to hardware structure
569 * @speed: pointer to link speed
570 * @link_up: TRUE is link is up, FALSE otherwise
571 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
573 * Reads the links register to determine if link is up and the current speed
575 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
576 bool *link_up, bool autoneg_wait_to_complete)
578 struct ixgbe_mbx_info *mbx = &hw->mbx;
579 struct ixgbe_mac_info *mac = &hw->mac;
580 s32 ret_val = IXGBE_SUCCESS;
583 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
585 /* If we were hit with a reset drop the link */
586 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
587 mac->get_link_status = TRUE;
589 if (!mac->get_link_status)
592 /* if link status is down no point in checking to see if pf is up */
593 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
594 if (!(links_reg & IXGBE_LINKS_UP))
597 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
598 * before the link status is correct
600 if (mac->type == ixgbe_mac_82599_vf) {
603 for (i = 0; i < 5; i++) {
605 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
607 if (!(links_reg & IXGBE_LINKS_UP))
612 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
613 case IXGBE_LINKS_SPEED_10G_82599:
614 *speed = IXGBE_LINK_SPEED_10GB_FULL;
615 if (hw->mac.type >= ixgbe_mac_X550) {
616 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
617 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
620 case IXGBE_LINKS_SPEED_1G_82599:
621 *speed = IXGBE_LINK_SPEED_1GB_FULL;
623 case IXGBE_LINKS_SPEED_100_82599:
624 *speed = IXGBE_LINK_SPEED_100_FULL;
625 if (hw->mac.type == ixgbe_mac_X550) {
626 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
627 *speed = IXGBE_LINK_SPEED_5GB_FULL;
630 case IXGBE_LINKS_SPEED_10_X550EM_A:
631 *speed = IXGBE_LINK_SPEED_UNKNOWN;
632 /* Since Reserved in older MAC's */
633 if (hw->mac.type >= ixgbe_mac_X550)
634 *speed = IXGBE_LINK_SPEED_10_FULL;
637 *speed = IXGBE_LINK_SPEED_UNKNOWN;
640 /* if the read failed it could just be a mailbox collision, best wait
641 * until we are called again and don't report an error
643 if (mbx->ops.read(hw, &in_msg, 1, 0))
646 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
647 /* msg is not CTS and is NACK we must have lost CTS status */
648 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
653 /* the pf is talking, if we timed out in the past we reinit */
659 /* if we passed all the tests above then the link is up and we no
660 * longer need to check for link
662 mac->get_link_status = FALSE;
665 *link_up = !mac->get_link_status;
670 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
671 * @hw: pointer to the HW structure
672 * @max_size: value to assign to max frame size
674 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
679 msgbuf[0] = IXGBE_VF_SET_LPE;
680 msgbuf[1] = max_size;
682 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
685 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
686 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK))
687 return IXGBE_ERR_MBX;
693 * ixgbevf_negotiate_api_version - Negotiate supported API version
694 * @hw: pointer to the HW structure
695 * @api: integer containing requested API version
697 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
702 /* Negotiate the mailbox API version */
703 msg[0] = IXGBE_VF_API_NEGOTIATE;
707 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
709 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
711 /* Store value and return 0 on success */
712 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
713 hw->api_version = api;
717 err = IXGBE_ERR_INVALID_ARGUMENT;
723 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
724 unsigned int *default_tc)
729 /* do nothing if API doesn't support ixgbevf_get_queues */
730 switch (hw->api_version) {
731 case ixgbe_mbox_api_11:
732 case ixgbe_mbox_api_12:
733 case ixgbe_mbox_api_13:
739 /* Fetch queue configuration from the PF */
740 msg[0] = IXGBE_VF_GET_QUEUES;
741 msg[1] = msg[2] = msg[3] = msg[4] = 0;
743 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
745 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
748 * if we we didn't get an ACK there must have been
749 * some sort of mailbox error so we should treat it
752 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
753 return IXGBE_ERR_MBX;
755 /* record and validate values from message */
756 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
757 if (hw->mac.max_tx_queues == 0 ||
758 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
759 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
761 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
762 if (hw->mac.max_rx_queues == 0 ||
763 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
764 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
766 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
767 /* in case of unknown state assume we cannot tag frames */
768 if (*num_tcs > hw->mac.max_rx_queues)
771 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
772 /* default to queue 0 on out-of-bounds queue number */
773 if (*default_tc >= hw->mac.max_tx_queues)