2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * Driver for the JMicron JMP211 10/100/1000, JMP202 10/100 PHY.
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/socket.h>
43 #include <net/if_media.h>
45 #include <dev/mii/mii.h>
46 #include <dev/mii/miivar.h>
49 #include <dev/mii/jmphyreg.h>
51 #include "miibus_if.h"
53 static int jmphy_probe(device_t);
54 static int jmphy_attach(device_t);
55 static void jmphy_reset(struct mii_softc *);
56 static uint16_t jmphy_anar(struct ifmedia_entry *);
57 static int jmphy_setmedia(struct mii_softc *, struct ifmedia_entry *);
60 struct mii_softc mii_sc;
66 static device_method_t jmphy_methods[] = {
67 /* Device interface. */
68 DEVMETHOD(device_probe, jmphy_probe),
69 DEVMETHOD(device_attach, jmphy_attach),
70 DEVMETHOD(device_detach, mii_phy_detach),
71 DEVMETHOD(device_shutdown, bus_generic_shutdown),
75 static devclass_t jmphy_devclass;
76 static driver_t jmphy_driver = {
79 sizeof(struct jmphy_softc)
82 DRIVER_MODULE(jmphy, miibus, jmphy_driver, jmphy_devclass, 0, 0);
84 static int jmphy_service(struct mii_softc *, struct mii_data *, int);
85 static void jmphy_status(struct mii_softc *);
87 static const struct mii_phydesc jmphys[] = {
88 MII_PHY_DESC(JMICRON, JMP202),
89 MII_PHY_DESC(JMICRON, JMP211),
94 jmphy_probe(device_t dev)
97 return (mii_phy_dev_probe(dev, jmphys, BUS_PROBE_DEFAULT));
101 jmphy_attach(device_t dev)
103 struct jmphy_softc *jsc;
104 struct mii_softc *sc;
105 struct mii_attach_args *ma;
106 struct mii_data *mii;
109 jsc = device_get_softc(dev);
111 ma = device_get_ivars(dev);
112 sc->mii_dev = device_get_parent(dev);
114 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
116 sc->mii_flags = miibus_get_flags(dev);
117 sc->mii_inst = mii->mii_instance++;
118 sc->mii_phy = ma->mii_phyno;
119 sc->mii_service = jmphy_service;
122 ifp = sc->mii_pdata->mii_ifp;
123 if (strcmp(ifp->if_dname, "jme") == 0 &&
124 (sc->mii_flags & MIIF_MACPRIV0) != 0)
125 sc->mii_flags |= MIIF_PHYPRIV0;
126 jsc->mii_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
127 jsc->mii_model = MII_MODEL(ma->mii_id2);
128 jsc->mii_rev = MII_REV(ma->mii_id2);
130 device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
131 jsc->mii_oui, jsc->mii_model, jsc->mii_rev);
135 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
136 if (sc->mii_capabilities & BMSR_EXTSTAT)
137 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
138 device_printf(dev, " ");
139 mii_phy_add_media(sc);
142 MIIBUS_MEDIAINIT(sc->mii_dev);
147 jmphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
149 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
157 * If the interface is not up, don't do anything.
159 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
162 if (jmphy_setmedia(sc, ife) != EJUSTRETURN)
168 * Is the interface even up?
170 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
174 * Only used for autonegotiation.
176 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
181 /* Check for link. */
182 if ((PHY_READ(sc, JMPHY_SSR) & JMPHY_SSR_LINK_UP) != 0) {
187 /* Announce link loss right after it happens. */
188 if (sc->mii_ticks++ == 0)
190 if (sc->mii_ticks <= sc->mii_anegticks)
194 (void)jmphy_setmedia(sc, ife);
198 /* Update the media status. */
201 /* Callback if something changed. */
202 mii_phy_update(sc, cmd);
207 jmphy_status(struct mii_softc *sc)
209 struct mii_data *mii = sc->mii_pdata;
212 mii->mii_media_status = IFM_AVALID;
213 mii->mii_media_active = IFM_ETHER;
215 ssr = PHY_READ(sc, JMPHY_SSR);
216 if ((ssr & JMPHY_SSR_LINK_UP) != 0)
217 mii->mii_media_status |= IFM_ACTIVE;
219 bmcr = PHY_READ(sc, MII_BMCR);
220 if ((bmcr & BMCR_ISO) != 0) {
221 mii->mii_media_active |= IFM_NONE;
222 mii->mii_media_status = 0;
226 if ((bmcr & BMCR_LOOP) != 0)
227 mii->mii_media_active |= IFM_LOOP;
229 if ((ssr & JMPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
230 /* Erg, still trying, I guess... */
231 mii->mii_media_active |= IFM_NONE;
235 switch ((ssr & JMPHY_SSR_SPEED_MASK)) {
236 case JMPHY_SSR_SPEED_1000:
237 mii->mii_media_active |= IFM_1000_T;
239 * jmphy(4) got a valid link so reset mii_ticks.
240 * Resetting mii_ticks is needed in order to
241 * detect link loss after auto-negotiation.
245 case JMPHY_SSR_SPEED_100:
246 mii->mii_media_active |= IFM_100_TX;
249 case JMPHY_SSR_SPEED_10:
250 mii->mii_media_active |= IFM_10_T;
254 mii->mii_media_active |= IFM_NONE;
258 if ((ssr & JMPHY_SSR_DUPLEX) != 0)
259 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
261 mii->mii_media_active |= IFM_HDX;
263 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
264 if ((PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
265 mii->mii_media_active |= IFM_ETH_MASTER;
270 jmphy_reset(struct mii_softc *sc)
275 /* Disable sleep mode. */
276 PHY_WRITE(sc, JMPHY_TMCTL,
277 PHY_READ(sc, JMPHY_TMCTL) & ~JMPHY_TMCTL_SLEEP_ENB);
278 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN);
280 for (i = 0; i < 1000; i++) {
282 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
285 /* Perform vendor recommended PHY calibration. */
286 if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) {
287 /* Select PHY test mode 1. */
288 t2cr = PHY_READ(sc, MII_100T2CR);
289 t2cr &= ~GTCR_TEST_MASK;
291 PHY_WRITE(sc, MII_100T2CR, t2cr);
292 /* Apply calibration patch. */
293 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ |
295 val = PHY_READ(sc, JMPHY_SPEC_DATA);
297 val |= 0x0010 | 0x0001;
298 PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
299 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE |
302 /* XXX 20ms to complete recalibration. */
305 PHY_READ(sc, MII_100T2CR);
306 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_READ |
308 val = PHY_READ(sc, JMPHY_SPEC_DATA);
309 val &= ~(0x0001 | 0x0002 | 0x0010);
310 PHY_WRITE(sc, JMPHY_SPEC_DATA, val);
311 PHY_WRITE(sc, JMPHY_SPEC_ADDR, JMPHY_SPEC_ADDR_WRITE |
313 /* Disable PHY test mode. */
314 PHY_READ(sc, MII_100T2CR);
315 t2cr &= ~GTCR_TEST_MASK;
316 PHY_WRITE(sc, MII_100T2CR, t2cr);
321 jmphy_anar(struct ifmedia_entry *ife)
326 switch (IFM_SUBTYPE(ife->ifm_media)) {
328 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
333 anar |= ANAR_TX | ANAR_TX_FD;
336 anar |= ANAR_10 | ANAR_10_FD;
346 jmphy_setmedia(struct mii_softc *sc, struct ifmedia_entry *ife)
348 uint16_t anar, bmcr, gig;
351 bmcr = PHY_READ(sc, MII_BMCR);
352 switch (IFM_SUBTYPE(ife->ifm_media)) {
354 gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
357 gig |= GTCR_ADV_1000TFDX | GTCR_ADV_1000THDX;
363 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO | BMCR_PDOWN);
364 return (EJUSTRETURN);
369 if ((ife->ifm_media & IFM_LOOP) != 0)
372 anar = jmphy_anar(ife);
373 if ((IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
374 (ife->ifm_media & IFM_FDX) != 0) &&
375 ((ife->ifm_media & IFM_FLOW) != 0 ||
376 (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
377 anar |= ANAR_PAUSE_TOWARDS;
379 if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) {
380 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
382 if ((ife->ifm_media & IFM_ETH_MASTER) != 0)
385 PHY_WRITE(sc, MII_100T2CR, gig);
387 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
388 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
390 return (EJUSTRETURN);