2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2016 Avago Technologies
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Avago Technologies (LSI) MPT-Fusion Host Adapter FreeBSD
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
35 /* Communications core for Avago Technologies (LSI) MPT3 */
37 /* TODO Move headers to mprvar */
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/selinfo.h>
44 #include <sys/mutex.h>
45 #include <sys/module.h>
49 #include <sys/malloc.h>
51 #include <sys/sysctl.h>
52 #include <sys/queue.h>
53 #include <sys/kthread.h>
54 #include <sys/taskqueue.h>
55 #include <sys/endian.h>
56 #include <sys/eventhandler.h>
58 #include <machine/bus.h>
59 #include <machine/resource.h>
63 #include <dev/pci/pcivar.h>
66 #include <cam/scsi/scsi_all.h>
68 #include <dev/mpr/mpi/mpi2_type.h>
69 #include <dev/mpr/mpi/mpi2.h>
70 #include <dev/mpr/mpi/mpi2_ioc.h>
71 #include <dev/mpr/mpi/mpi2_sas.h>
72 #include <dev/mpr/mpi/mpi2_cnfg.h>
73 #include <dev/mpr/mpi/mpi2_init.h>
74 #include <dev/mpr/mpi/mpi2_tool.h>
75 #include <dev/mpr/mpr_ioctl.h>
76 #include <dev/mpr/mprvar.h>
77 #include <dev/mpr/mpr_table.h>
79 static int mpr_diag_reset(struct mpr_softc *sc, int sleep_flag);
80 static int mpr_init_queues(struct mpr_softc *sc);
81 static int mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag);
82 static int mpr_transition_operational(struct mpr_softc *sc);
83 static int mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching);
84 static void mpr_iocfacts_free(struct mpr_softc *sc);
85 static void mpr_startup(void *arg);
86 static int mpr_send_iocinit(struct mpr_softc *sc);
87 static int mpr_alloc_queues(struct mpr_softc *sc);
88 static int mpr_alloc_replies(struct mpr_softc *sc);
89 static int mpr_alloc_requests(struct mpr_softc *sc);
90 static int mpr_attach_log(struct mpr_softc *sc);
91 static __inline void mpr_complete_command(struct mpr_softc *sc,
92 struct mpr_command *cm);
93 static void mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
94 MPI2_EVENT_NOTIFICATION_REPLY *reply);
95 static void mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm);
96 static void mpr_periodic(void *);
97 static int mpr_reregister_events(struct mpr_softc *sc);
98 static void mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm);
99 static int mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts);
100 static int mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag);
101 SYSCTL_NODE(_hw, OID_AUTO, mpr, CTLFLAG_RD, 0, "MPR Driver Parameters");
103 MALLOC_DEFINE(M_MPR, "mpr", "mpr driver memory");
106 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
107 * any state and back to its initialization state machine.
109 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
112 * Added this union to smoothly convert le64toh cm->cm_desc.Words.
113 * Compiler only supports unint64_t to be passed as an argument.
114 * Otherwise it will through this error:
115 * "aggregate value used where an integer was expected"
117 typedef union _reply_descriptor {
123 }reply_descriptor,address_descriptor;
125 /* Rate limit chain-fail messages to 1 per minute */
126 static struct timeval mpr_chainfail_interval = { 60, 0 };
129 * sleep_flag can be either CAN_SLEEP or NO_SLEEP.
130 * If this function is called from process context, it can sleep
131 * and there is no harm to sleep, in case if this fuction is called
132 * from Interrupt handler, we can not sleep and need NO_SLEEP flag set.
133 * based on sleep flags driver will call either msleep, pause or DELAY.
134 * msleep and pause are of same variant, but pause is used when mpr_mtx
135 * is not hold by driver.
138 mpr_diag_reset(struct mpr_softc *sc,int sleep_flag)
141 int i, error, tries = 0;
142 uint8_t first_wait_done = FALSE;
144 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
146 /* Clear any pending interrupts */
147 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
150 * Force NO_SLEEP for threads prohibited to sleep
151 * e.a Thread from interrupt handler are prohibited to sleep.
153 #if __FreeBSD_version >= 1000029
154 if (curthread->td_no_sleeping)
155 #else //__FreeBSD_version < 1000029
156 if (curthread->td_pflags & TDP_NOSLEEPING)
157 #endif //__FreeBSD_version >= 1000029
158 sleep_flag = NO_SLEEP;
160 /* Push the magic sequence */
162 while (tries++ < 20) {
163 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
164 mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
165 mpt2_reset_magic[i]);
168 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
169 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
171 else if (sleep_flag == CAN_SLEEP)
172 pause("mprdiag", hz/10);
176 reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
177 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
185 /* Send the actual reset. XXX need to refresh the reg? */
186 mpr_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
187 reg | MPI2_DIAG_RESET_ADAPTER);
189 /* Wait up to 300 seconds in 50ms intervals */
191 for (i = 0; i < 6000; i++) {
193 * Wait 50 msec. If this is the first time through, wait 256
194 * msec to satisfy Diag Reset timing requirements.
196 if (first_wait_done) {
197 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
198 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
200 else if (sleep_flag == CAN_SLEEP)
201 pause("mprdiag", hz/20);
206 first_wait_done = TRUE;
209 * Check for the RESET_ADAPTER bit to be cleared first, then
210 * wait for the RESET state to be cleared, which takes a little
213 reg = mpr_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
214 if (reg & MPI2_DIAG_RESET_ADAPTER) {
217 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
218 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
226 mpr_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
232 mpr_message_unit_reset(struct mpr_softc *sc, int sleep_flag)
237 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,
238 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
239 MPI2_DOORBELL_FUNCTION_SHIFT);
241 if (mpr_wait_db_ack(sc, 5, sleep_flag) != 0) {
242 mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed : <%s>\n",
251 mpr_transition_ready(struct mpr_softc *sc)
254 int error, tries = 0;
258 /* If we are in attach call, do not sleep */
259 sleep_flags = (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE)
260 ? CAN_SLEEP : NO_SLEEP;
263 while (tries++ < 1200) {
264 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
265 mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg);
268 * Ensure the IOC is ready to talk. If it's not, try
271 if (reg & MPI2_DOORBELL_USED) {
272 mpr_diag_reset(sc, sleep_flags);
277 /* Is the adapter owned by another peer? */
278 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
279 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
280 device_printf(sc->mpr_dev, "IOC is under the control "
281 "of another peer host, aborting initialization.\n");
285 state = reg & MPI2_IOC_STATE_MASK;
286 if (state == MPI2_IOC_STATE_READY) {
290 } else if (state == MPI2_IOC_STATE_FAULT) {
291 mpr_dprint(sc, MPR_FAULT, "IOC in fault state 0x%x\n",
292 state & MPI2_DOORBELL_FAULT_CODE_MASK);
293 mpr_diag_reset(sc, sleep_flags);
294 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
295 /* Need to take ownership */
296 mpr_message_unit_reset(sc, sleep_flags);
297 } else if (state == MPI2_IOC_STATE_RESET) {
298 /* Wait a bit, IOC might be in transition */
299 mpr_dprint(sc, MPR_FAULT,
300 "IOC in unexpected reset state\n");
302 mpr_dprint(sc, MPR_FAULT,
303 "IOC in unknown state 0x%x\n", state);
308 /* Wait 50ms for things to settle down. */
313 device_printf(sc->mpr_dev, "Cannot transition IOC to ready\n");
319 mpr_transition_operational(struct mpr_softc *sc)
327 reg = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
328 mpr_dprint(sc, MPR_INIT, "Doorbell= 0x%x\n", reg);
330 state = reg & MPI2_IOC_STATE_MASK;
331 if (state != MPI2_IOC_STATE_READY) {
332 if ((error = mpr_transition_ready(sc)) != 0) {
333 mpr_dprint(sc, MPR_FAULT,
334 "%s failed to transition ready\n", __func__);
339 error = mpr_send_iocinit(sc);
344 * This is called during attach and when re-initializing due to a Diag Reset.
345 * IOC Facts is used to allocate many of the structures needed by the driver.
346 * If called from attach, de-allocation is not required because the driver has
347 * not allocated any structures yet, but if called from a Diag Reset, previously
348 * allocated structures based on IOC Facts will need to be freed and re-
349 * allocated bases on the latest IOC Facts.
352 mpr_iocfacts_allocate(struct mpr_softc *sc, uint8_t attaching)
355 Mpi2IOCFactsReply_t saved_facts;
356 uint8_t saved_mode, reallocating;
358 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
360 /* Save old IOC Facts and then only reallocate if Facts have changed */
362 bcopy(sc->facts, &saved_facts, sizeof(MPI2_IOC_FACTS_REPLY));
366 * Get IOC Facts. In all cases throughout this function, panic if doing
367 * a re-initialization and only return the error if attaching so the OS
370 if ((error = mpr_get_iocfacts(sc, sc->facts)) != 0) {
372 mpr_dprint(sc, MPR_FAULT, "%s failed to get IOC Facts "
373 "with error %d\n", __func__, error);
376 panic("%s failed to get IOC Facts with error %d\n",
381 mpr_print_iocfacts(sc, sc->facts);
383 snprintf(sc->fw_version, sizeof(sc->fw_version),
384 "%02d.%02d.%02d.%02d",
385 sc->facts->FWVersion.Struct.Major,
386 sc->facts->FWVersion.Struct.Minor,
387 sc->facts->FWVersion.Struct.Unit,
388 sc->facts->FWVersion.Struct.Dev);
390 mpr_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
392 mpr_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
393 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
394 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
395 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
398 * If the chip doesn't support event replay then a hard reset will be
399 * required to trigger a full discovery. Do the reset here then
400 * retransition to Ready. A hard reset might have already been done,
401 * but it doesn't hurt to do it again. Only do this if attaching, not
405 if ((sc->facts->IOCCapabilities &
406 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
407 mpr_diag_reset(sc, NO_SLEEP);
408 if ((error = mpr_transition_ready(sc)) != 0) {
409 mpr_dprint(sc, MPR_FAULT, "%s failed to "
410 "transition to ready with error %d\n",
418 * Set flag if IR Firmware is loaded. If the RAID Capability has
419 * changed from the previous IOC Facts, log a warning, but only if
420 * checking this after a Diag Reset and not during attach.
422 saved_mode = sc->ir_firmware;
423 if (sc->facts->IOCCapabilities &
424 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
427 if (sc->ir_firmware != saved_mode) {
428 mpr_dprint(sc, MPR_FAULT, "%s new IR/IT mode in IOC "
429 "Facts does not match previous mode\n", __func__);
433 /* Only deallocate and reallocate if relevant IOC Facts have changed */
434 reallocating = FALSE;
436 ((saved_facts.MsgVersion != sc->facts->MsgVersion) ||
437 (saved_facts.HeaderVersion != sc->facts->HeaderVersion) ||
438 (saved_facts.MaxChainDepth != sc->facts->MaxChainDepth) ||
439 (saved_facts.RequestCredit != sc->facts->RequestCredit) ||
440 (saved_facts.ProductID != sc->facts->ProductID) ||
441 (saved_facts.IOCCapabilities != sc->facts->IOCCapabilities) ||
442 (saved_facts.IOCRequestFrameSize !=
443 sc->facts->IOCRequestFrameSize) ||
444 (saved_facts.IOCMaxChainSegmentSize !=
445 sc->facts->IOCMaxChainSegmentSize) ||
446 (saved_facts.MaxTargets != sc->facts->MaxTargets) ||
447 (saved_facts.MaxSasExpanders != sc->facts->MaxSasExpanders) ||
448 (saved_facts.MaxEnclosures != sc->facts->MaxEnclosures) ||
449 (saved_facts.HighPriorityCredit != sc->facts->HighPriorityCredit) ||
450 (saved_facts.MaxReplyDescriptorPostQueueDepth !=
451 sc->facts->MaxReplyDescriptorPostQueueDepth) ||
452 (saved_facts.ReplyFrameSize != sc->facts->ReplyFrameSize) ||
453 (saved_facts.MaxVolumes != sc->facts->MaxVolumes) ||
454 (saved_facts.MaxPersistentEntries !=
455 sc->facts->MaxPersistentEntries))) {
460 * Some things should be done if attaching or re-allocating after a Diag
461 * Reset, but are not needed after a Diag Reset if the FW has not
464 if (attaching || reallocating) {
466 * Check if controller supports FW diag buffers and set flag to
469 if (sc->facts->IOCCapabilities &
470 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
471 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].
473 if (sc->facts->IOCCapabilities &
474 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
475 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].
477 if (sc->facts->IOCCapabilities &
478 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
479 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].
483 * Set flag if EEDP is supported and if TLR is supported.
485 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
486 sc->eedp_enabled = TRUE;
487 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
488 sc->control_TLR = TRUE;
491 * Size the queues. Since the reply queues always need one free
492 * entry, we'll just deduct one reply message here.
494 sc->num_reqs = MIN(MPR_REQ_FRAMES, sc->facts->RequestCredit);
495 sc->num_replies = MIN(MPR_REPLY_FRAMES + MPR_EVT_REPLY_FRAMES,
496 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
499 * Initialize all Tail Queues
501 TAILQ_INIT(&sc->req_list);
502 TAILQ_INIT(&sc->high_priority_req_list);
503 TAILQ_INIT(&sc->chain_list);
504 TAILQ_INIT(&sc->tm_list);
508 * If doing a Diag Reset and the FW is significantly different
509 * (reallocating will be set above in IOC Facts comparison), then all
510 * buffers based on the IOC Facts will need to be freed before they are
514 mpr_iocfacts_free(sc);
515 mprsas_realloc_targets(sc, saved_facts.MaxTargets);
519 * Any deallocation has been completed. Now start reallocating
520 * if needed. Will only need to reallocate if attaching or if the new
521 * IOC Facts are different from the previous IOC Facts after a Diag
522 * Reset. Targets have already been allocated above if needed.
524 if (attaching || reallocating) {
525 if (((error = mpr_alloc_queues(sc)) != 0) ||
526 ((error = mpr_alloc_replies(sc)) != 0) ||
527 ((error = mpr_alloc_requests(sc)) != 0)) {
529 mpr_dprint(sc, MPR_FAULT, "%s failed to alloc "
530 "queues with error %d\n", __func__, error);
534 panic("%s failed to alloc queues with error "
535 "%d\n", __func__, error);
540 /* Always initialize the queues */
541 bzero(sc->free_queue, sc->fqdepth * 4);
545 * Always get the chip out of the reset state, but only panic if not
546 * attaching. If attaching and there is an error, that is handled by
549 error = mpr_transition_operational(sc);
552 mpr_printf(sc, "%s failed to transition to operational "
553 "with error %d\n", __func__, error);
557 panic("%s failed to transition to operational with "
558 "error %d\n", __func__, error);
563 * Finish the queue initialization.
564 * These are set here instead of in mpr_init_queues() because the
565 * IOC resets these values during the state transition in
566 * mpr_transition_operational(). The free index is set to 1
567 * because the corresponding index in the IOC is set to 0, and the
568 * IOC treats the queues as full if both are set to the same value.
569 * Hence the reason that the queue can't hold all of the possible
572 sc->replypostindex = 0;
573 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
574 mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
577 * Attach the subsystems so they can prepare their event masks.
579 /* XXX Should be dynamic so that IM/IR and user modules can attach */
581 if (((error = mpr_attach_log(sc)) != 0) ||
582 ((error = mpr_attach_sas(sc)) != 0) ||
583 ((error = mpr_attach_user(sc)) != 0)) {
584 mpr_printf(sc, "%s failed to attach all subsystems: "
585 "error %d\n", __func__, error);
590 if ((error = mpr_pci_setup_interrupts(sc)) != 0) {
591 mpr_printf(sc, "%s failed to setup interrupts\n",
602 * This is called if memory is being free (during detach for example) and when
603 * buffers need to be reallocated due to a Diag Reset.
606 mpr_iocfacts_free(struct mpr_softc *sc)
608 struct mpr_command *cm;
611 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
613 if (sc->free_busaddr != 0)
614 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
615 if (sc->free_queue != NULL)
616 bus_dmamem_free(sc->queues_dmat, sc->free_queue,
618 if (sc->queues_dmat != NULL)
619 bus_dma_tag_destroy(sc->queues_dmat);
621 if (sc->chain_busaddr != 0)
622 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
623 if (sc->chain_frames != NULL)
624 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,
626 if (sc->chain_dmat != NULL)
627 bus_dma_tag_destroy(sc->chain_dmat);
629 if (sc->sense_busaddr != 0)
630 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
631 if (sc->sense_frames != NULL)
632 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,
634 if (sc->sense_dmat != NULL)
635 bus_dma_tag_destroy(sc->sense_dmat);
637 if (sc->reply_busaddr != 0)
638 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
639 if (sc->reply_frames != NULL)
640 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,
642 if (sc->reply_dmat != NULL)
643 bus_dma_tag_destroy(sc->reply_dmat);
645 if (sc->req_busaddr != 0)
646 bus_dmamap_unload(sc->req_dmat, sc->req_map);
647 if (sc->req_frames != NULL)
648 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
649 if (sc->req_dmat != NULL)
650 bus_dma_tag_destroy(sc->req_dmat);
652 if (sc->chains != NULL)
653 free(sc->chains, M_MPR);
654 if (sc->commands != NULL) {
655 for (i = 1; i < sc->num_reqs; i++) {
656 cm = &sc->commands[i];
657 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
659 free(sc->commands, M_MPR);
661 if (sc->buffer_dmat != NULL)
662 bus_dma_tag_destroy(sc->buffer_dmat);
666 * The terms diag reset and hard reset are used interchangeably in the MPI
667 * docs to mean resetting the controller chip. In this code diag reset
668 * cleans everything up, and the hard reset function just sends the reset
669 * sequence to the chip. This should probably be refactored so that every
670 * subsystem gets a reset notification of some sort, and can clean up
674 mpr_reinit(struct mpr_softc *sc)
677 struct mprsas_softc *sassc;
683 mtx_assert(&sc->mpr_mtx, MA_OWNED);
685 if (sc->mpr_flags & MPR_FLAGS_DIAGRESET) {
686 mpr_dprint(sc, MPR_INIT, "%s reset already in progress\n",
691 mpr_dprint(sc, MPR_INFO, "Reinitializing controller,\n");
692 /* make sure the completion callbacks can recognize they're getting
693 * a NULL cm_reply due to a reset.
695 sc->mpr_flags |= MPR_FLAGS_DIAGRESET;
698 * Mask interrupts here.
700 mpr_dprint(sc, MPR_INIT, "%s mask interrupts\n", __func__);
703 error = mpr_diag_reset(sc, CAN_SLEEP);
705 panic("%s hard reset failed with error %d\n", __func__, error);
708 /* Restore the PCI state, including the MSI-X registers */
711 /* Give the I/O subsystem special priority to get itself prepared */
712 mprsas_handle_reinit(sc);
715 * Get IOC Facts and allocate all structures based on this information.
716 * The attach function will also call mpr_iocfacts_allocate at startup.
717 * If relevant values have changed in IOC Facts, this function will free
718 * all of the memory based on IOC Facts and reallocate that memory.
720 if ((error = mpr_iocfacts_allocate(sc, FALSE)) != 0) {
721 panic("%s IOC Facts based allocation failed with error %d\n",
726 * Mapping structures will be re-allocated after getting IOC Page8, so
727 * free these structures here.
729 mpr_mapping_exit(sc);
732 * The static page function currently read is IOC Page8. Others can be
733 * added in future. It's possible that the values in IOC Page8 have
734 * changed after a Diag Reset due to user modification, so always read
735 * these. Interrupts are masked, so unmask them before getting config
739 sc->mpr_flags &= ~MPR_FLAGS_DIAGRESET;
740 mpr_base_static_config_pages(sc);
743 * Some mapping info is based in IOC Page8 data, so re-initialize the
746 mpr_mapping_initialize(sc);
749 * Restart will reload the event masks clobbered by the reset, and
750 * then enable the port.
752 mpr_reregister_events(sc);
754 /* the end of discovery will release the simq, so we're done. */
755 mpr_dprint(sc, MPR_INFO, "%s finished sc %p post %u free %u\n",
756 __func__, sc, sc->replypostindex, sc->replyfreeindex);
757 mprsas_release_simq_reinit(sassc);
762 /* Wait for the chip to ACK a word that we've put into its FIFO
763 * Wait for <timeout> seconds. In single loop wait for busy loop
764 * for 500 microseconds.
765 * Total is [ 0.5 * (2000 * <timeout>) ] in miliseconds.
768 mpr_wait_db_ack(struct mpr_softc *sc, int timeout, int sleep_flag)
775 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
777 int_status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
778 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
779 mpr_dprint(sc, MPR_INIT, "%s: successful count(%d), "
780 "timeout(%d)\n", __func__, count, timeout);
782 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
783 doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
784 if ((doorbell & MPI2_IOC_STATE_MASK) ==
785 MPI2_IOC_STATE_FAULT) {
786 mpr_dprint(sc, MPR_FAULT,
787 "fault_state(0x%04x)!\n", doorbell);
790 } else if (int_status == 0xFFFFFFFF)
794 * If it can sleep, sleep for 1 milisecond, else busy loop for
797 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP)
798 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0, "mprdba",
800 else if (sleep_flag == CAN_SLEEP)
801 pause("mprdba", hz/1000);
808 mpr_dprint(sc, MPR_FAULT, "%s: failed due to timeout count(%d), "
809 "int_status(%x)!\n", __func__, count, int_status);
813 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
815 mpr_wait_db_int(struct mpr_softc *sc)
819 for (retry = 0; retry < MPR_DB_MAX_WAIT; retry++) {
820 if ((mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
821 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
828 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
830 mpr_request_sync(struct mpr_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
831 int req_sz, int reply_sz, int timeout)
835 int i, count, ioc_sz, residual;
836 int sleep_flags = CAN_SLEEP;
838 #if __FreeBSD_version >= 1000029
839 if (curthread->td_no_sleeping)
840 #else //__FreeBSD_version < 1000029
841 if (curthread->td_pflags & TDP_NOSLEEPING)
842 #endif //__FreeBSD_version >= 1000029
843 sleep_flags = NO_SLEEP;
846 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
849 if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
853 * Announce that a message is coming through the doorbell. Messages
854 * are pushed at 32bit words, so round up if needed.
856 count = (req_sz + 3) / 4;
857 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET,
858 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
859 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
862 if (mpr_wait_db_int(sc) ||
863 (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
864 mpr_dprint(sc, MPR_FAULT, "Doorbell failed to activate\n");
867 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
868 if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) {
869 mpr_dprint(sc, MPR_FAULT, "Doorbell handshake failed\n");
874 /* Clock out the message data synchronously in 32-bit dwords*/
875 data32 = (uint32_t *)req;
876 for (i = 0; i < count; i++) {
877 mpr_regwrite(sc, MPI2_DOORBELL_OFFSET, htole32(data32[i]));
878 if (mpr_wait_db_ack(sc, 5, sleep_flags) != 0) {
879 mpr_dprint(sc, MPR_FAULT,
880 "Timeout while writing doorbell\n");
886 /* Clock in the reply in 16-bit words. The total length of the
887 * message is always in the 4th byte, so clock out the first 2 words
888 * manually, then loop the rest.
890 data16 = (uint16_t *)reply;
891 if (mpr_wait_db_int(sc) != 0) {
892 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 0\n");
896 mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
897 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
898 if (mpr_wait_db_int(sc) != 0) {
899 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell 1\n");
903 mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
904 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
906 /* Number of 32bit words in the message */
907 ioc_sz = reply->MsgLength;
910 * Figure out how many 16bit words to clock in without overrunning.
911 * The precision loss with dividing reply_sz can safely be
912 * ignored because the messages can only be multiples of 32bits.
915 count = MIN((reply_sz / 4), ioc_sz) * 2;
916 if (count < ioc_sz * 2) {
917 residual = ioc_sz * 2 - count;
918 mpr_dprint(sc, MPR_ERROR, "Driver error, throwing away %d "
919 "residual message words\n", residual);
922 for (i = 2; i < count; i++) {
923 if (mpr_wait_db_int(sc) != 0) {
924 mpr_dprint(sc, MPR_FAULT,
925 "Timeout reading doorbell %d\n", i);
928 data16[i] = mpr_regread(sc, MPI2_DOORBELL_OFFSET) &
929 MPI2_DOORBELL_DATA_MASK;
930 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
934 * Pull out residual words that won't fit into the provided buffer.
935 * This keeps the chip from hanging due to a driver programming
939 if (mpr_wait_db_int(sc) != 0) {
940 mpr_dprint(sc, MPR_FAULT, "Timeout reading doorbell\n");
943 (void)mpr_regread(sc, MPI2_DOORBELL_OFFSET);
944 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
948 if (mpr_wait_db_int(sc) != 0) {
949 mpr_dprint(sc, MPR_FAULT, "Timeout waiting to exit doorbell\n");
952 if (mpr_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
953 mpr_dprint(sc, MPR_FAULT, "Warning, doorbell still active\n");
954 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
960 mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm)
965 mpr_dprint(sc, MPR_TRACE, "SMID %u cm %p ccb %p\n",
966 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
968 if (sc->mpr_flags & MPR_FLAGS_ATTACH_DONE && !(sc->mpr_flags &
970 mtx_assert(&sc->mpr_mtx, MA_OWNED);
972 if (++sc->io_cmds_active > sc->io_cmds_highwater)
973 sc->io_cmds_highwater++;
975 rd.u.low = cm->cm_desc.Words.Low;
976 rd.u.high = cm->cm_desc.Words.High;
977 rd.word = htole64(rd.word);
978 /* TODO-We may need to make below regwrite atomic */
979 mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
981 mpr_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
986 * Just the FACTS, ma'am.
989 mpr_get_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
991 MPI2_DEFAULT_REPLY *reply;
992 MPI2_IOC_FACTS_REQUEST request;
993 int error, req_sz, reply_sz;
997 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
998 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
999 reply = (MPI2_DEFAULT_REPLY *)facts;
1001 bzero(&request, req_sz);
1002 request.Function = MPI2_FUNCTION_IOC_FACTS;
1003 error = mpr_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
1009 mpr_send_iocinit(struct mpr_softc *sc)
1011 MPI2_IOC_INIT_REQUEST init;
1012 MPI2_DEFAULT_REPLY reply;
1013 int req_sz, reply_sz, error;
1015 uint64_t time_in_msec;
1019 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
1020 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
1021 bzero(&init, req_sz);
1022 bzero(&reply, reply_sz);
1025 * Fill in the init block. Note that most addresses are
1026 * deliberately in the lower 32bits of memory. This is a micro-
1027 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
1029 init.Function = MPI2_FUNCTION_IOC_INIT;
1030 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
1031 init.MsgVersion = htole16(MPI2_VERSION);
1032 init.HeaderVersion = htole16(MPI2_HEADER_VERSION);
1033 init.SystemRequestFrameSize = htole16(sc->facts->IOCRequestFrameSize);
1034 init.ReplyDescriptorPostQueueDepth = htole16(sc->pqdepth);
1035 init.ReplyFreeQueueDepth = htole16(sc->fqdepth);
1036 init.SenseBufferAddressHigh = 0;
1037 init.SystemReplyAddressHigh = 0;
1038 init.SystemRequestFrameBaseAddress.High = 0;
1039 init.SystemRequestFrameBaseAddress.Low =
1040 htole32((uint32_t)sc->req_busaddr);
1041 init.ReplyDescriptorPostQueueAddress.High = 0;
1042 init.ReplyDescriptorPostQueueAddress.Low =
1043 htole32((uint32_t)sc->post_busaddr);
1044 init.ReplyFreeQueueAddress.High = 0;
1045 init.ReplyFreeQueueAddress.Low = htole32((uint32_t)sc->free_busaddr);
1047 time_in_msec = (now.tv_sec * 1000 + now.tv_usec/1000);
1048 init.TimeStamp.High = htole32((time_in_msec >> 32) & 0xFFFFFFFF);
1049 init.TimeStamp.Low = htole32(time_in_msec & 0xFFFFFFFF);
1051 error = mpr_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
1052 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1055 mpr_dprint(sc, MPR_INIT, "IOCInit status= 0x%x\n", reply.IOCStatus);
1060 mpr_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1065 *addr = segs[0].ds_addr;
1069 mpr_alloc_queues(struct mpr_softc *sc)
1071 bus_addr_t queues_busaddr;
1073 int qsize, fqsize, pqsize;
1076 * The reply free queue contains 4 byte entries in multiples of 16 and
1077 * aligned on a 16 byte boundary. There must always be an unused entry.
1078 * This queue supplies fresh reply frames for the firmware to use.
1080 * The reply descriptor post queue contains 8 byte entries in
1081 * multiples of 16 and aligned on a 16 byte boundary. This queue
1082 * contains filled-in reply frames sent from the firmware to the host.
1084 * These two queues are allocated together for simplicity.
1086 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
1087 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
1088 fqsize= sc->fqdepth * 4;
1089 pqsize = sc->pqdepth * 8;
1090 qsize = fqsize + pqsize;
1092 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1093 16, 0, /* algnmnt, boundary */
1094 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1095 BUS_SPACE_MAXADDR, /* highaddr */
1096 NULL, NULL, /* filter, filterarg */
1097 qsize, /* maxsize */
1099 qsize, /* maxsegsize */
1101 NULL, NULL, /* lockfunc, lockarg */
1102 &sc->queues_dmat)) {
1103 device_printf(sc->mpr_dev, "Cannot allocate queues DMA tag\n");
1106 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
1108 device_printf(sc->mpr_dev, "Cannot allocate queues memory\n");
1111 bzero(queues, qsize);
1112 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
1113 mpr_memaddr_cb, &queues_busaddr, 0);
1115 sc->free_queue = (uint32_t *)queues;
1116 sc->free_busaddr = queues_busaddr;
1117 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
1118 sc->post_busaddr = queues_busaddr + fqsize;
1124 mpr_alloc_replies(struct mpr_softc *sc)
1126 int rsize, num_replies;
1129 * sc->num_replies should be one less than sc->fqdepth. We need to
1130 * allocate space for sc->fqdepth replies, but only sc->num_replies
1131 * replies can be used at once.
1133 num_replies = max(sc->fqdepth, sc->num_replies);
1135 rsize = sc->facts->ReplyFrameSize * num_replies * 4;
1136 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1137 4, 0, /* algnmnt, boundary */
1138 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1139 BUS_SPACE_MAXADDR, /* highaddr */
1140 NULL, NULL, /* filter, filterarg */
1141 rsize, /* maxsize */
1143 rsize, /* maxsegsize */
1145 NULL, NULL, /* lockfunc, lockarg */
1147 device_printf(sc->mpr_dev, "Cannot allocate replies DMA tag\n");
1150 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
1151 BUS_DMA_NOWAIT, &sc->reply_map)) {
1152 device_printf(sc->mpr_dev, "Cannot allocate replies memory\n");
1155 bzero(sc->reply_frames, rsize);
1156 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
1157 mpr_memaddr_cb, &sc->reply_busaddr, 0);
1163 mpr_alloc_requests(struct mpr_softc *sc)
1165 struct mpr_command *cm;
1166 struct mpr_chain *chain;
1167 int i, rsize, nsegs;
1169 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
1170 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1171 16, 0, /* algnmnt, boundary */
1172 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1173 BUS_SPACE_MAXADDR, /* highaddr */
1174 NULL, NULL, /* filter, filterarg */
1175 rsize, /* maxsize */
1177 rsize, /* maxsegsize */
1179 NULL, NULL, /* lockfunc, lockarg */
1181 device_printf(sc->mpr_dev, "Cannot allocate request DMA tag\n");
1184 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
1185 BUS_DMA_NOWAIT, &sc->req_map)) {
1186 device_printf(sc->mpr_dev, "Cannot allocate request memory\n");
1189 bzero(sc->req_frames, rsize);
1190 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
1191 mpr_memaddr_cb, &sc->req_busaddr, 0);
1194 * Gen3 and beyond uses the IOCMaxChainSegmentSize from IOC Facts to
1195 * get the size of a Chain Frame. Previous versions use the size as a
1196 * Request Frame for the Chain Frame size. If IOCMaxChainSegmentSize
1197 * is 0, use the default value. The IOCMaxChainSegmentSize is the
1198 * number of 16-byte elelements that can fit in a Chain Frame, which is
1199 * the size of an IEEE Simple SGE.
1201 if (sc->facts->MsgVersion >= MPI2_VERSION_02_05) {
1202 sc->chain_seg_size =
1203 htole16(sc->facts->IOCMaxChainSegmentSize);
1204 if (sc->chain_seg_size == 0) {
1205 sc->chain_frame_size = MPR_DEFAULT_CHAIN_SEG_SIZE *
1206 MPR_MAX_CHAIN_ELEMENT_SIZE;
1208 sc->chain_frame_size = sc->chain_seg_size *
1209 MPR_MAX_CHAIN_ELEMENT_SIZE;
1212 sc->chain_frame_size = sc->facts->IOCRequestFrameSize * 4;
1214 rsize = sc->chain_frame_size * sc->max_chains;
1215 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1216 16, 0, /* algnmnt, boundary */
1217 BUS_SPACE_MAXADDR, /* lowaddr */
1218 BUS_SPACE_MAXADDR, /* highaddr */
1219 NULL, NULL, /* filter, filterarg */
1220 rsize, /* maxsize */
1222 rsize, /* maxsegsize */
1224 NULL, NULL, /* lockfunc, lockarg */
1226 device_printf(sc->mpr_dev, "Cannot allocate chain DMA tag\n");
1229 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
1230 BUS_DMA_NOWAIT, &sc->chain_map)) {
1231 device_printf(sc->mpr_dev, "Cannot allocate chain memory\n");
1234 bzero(sc->chain_frames, rsize);
1235 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
1236 mpr_memaddr_cb, &sc->chain_busaddr, 0);
1238 rsize = MPR_SENSE_LEN * sc->num_reqs;
1239 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1240 1, 0, /* algnmnt, boundary */
1241 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
1242 BUS_SPACE_MAXADDR, /* highaddr */
1243 NULL, NULL, /* filter, filterarg */
1244 rsize, /* maxsize */
1246 rsize, /* maxsegsize */
1248 NULL, NULL, /* lockfunc, lockarg */
1250 device_printf(sc->mpr_dev, "Cannot allocate sense DMA tag\n");
1253 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
1254 BUS_DMA_NOWAIT, &sc->sense_map)) {
1255 device_printf(sc->mpr_dev, "Cannot allocate sense memory\n");
1258 bzero(sc->sense_frames, rsize);
1259 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
1260 mpr_memaddr_cb, &sc->sense_busaddr, 0);
1262 sc->chains = malloc(sizeof(struct mpr_chain) * sc->max_chains, M_MPR,
1265 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1266 __func__, __LINE__);
1269 for (i = 0; i < sc->max_chains; i++) {
1270 chain = &sc->chains[i];
1271 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
1272 i * sc->chain_frame_size);
1273 chain->chain_busaddr = sc->chain_busaddr +
1274 i * sc->chain_frame_size;
1275 mpr_free_chain(sc, chain);
1276 sc->chain_free_lowwater++;
1279 /* XXX Need to pick a more precise value */
1280 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
1281 if (bus_dma_tag_create( sc->mpr_parent_dmat, /* parent */
1282 1, 0, /* algnmnt, boundary */
1283 BUS_SPACE_MAXADDR, /* lowaddr */
1284 BUS_SPACE_MAXADDR, /* highaddr */
1285 NULL, NULL, /* filter, filterarg */
1286 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
1287 nsegs, /* nsegments */
1288 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
1289 BUS_DMA_ALLOCNOW, /* flags */
1290 busdma_lock_mutex, /* lockfunc */
1291 &sc->mpr_mtx, /* lockarg */
1292 &sc->buffer_dmat)) {
1293 device_printf(sc->mpr_dev, "Cannot allocate buffer DMA tag\n");
1298 * SMID 0 cannot be used as a free command per the firmware spec.
1299 * Just drop that command instead of risking accounting bugs.
1301 sc->commands = malloc(sizeof(struct mpr_command) * sc->num_reqs,
1302 M_MPR, M_WAITOK | M_ZERO);
1303 if (!sc->commands) {
1304 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1305 __func__, __LINE__);
1308 for (i = 1; i < sc->num_reqs; i++) {
1309 cm = &sc->commands[i];
1310 cm->cm_req = sc->req_frames +
1311 i * sc->facts->IOCRequestFrameSize * 4;
1312 cm->cm_req_busaddr = sc->req_busaddr +
1313 i * sc->facts->IOCRequestFrameSize * 4;
1314 cm->cm_sense = &sc->sense_frames[i];
1315 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN;
1316 cm->cm_desc.Default.SMID = i;
1318 TAILQ_INIT(&cm->cm_chain_list);
1319 callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0);
1321 /* XXX Is a failure here a critical problem? */
1322 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
1323 if (i <= sc->facts->HighPriorityCredit)
1324 mpr_free_high_priority_command(sc, cm);
1326 mpr_free_command(sc, cm);
1328 panic("failed to allocate command %d\n", i);
1338 mpr_init_queues(struct mpr_softc *sc)
1342 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
1345 * According to the spec, we need to use one less reply than we
1346 * have space for on the queue. So sc->num_replies (the number we
1347 * use) should be less than sc->fqdepth (allocated size).
1349 if (sc->num_replies >= sc->fqdepth)
1353 * Initialize all of the free queue entries.
1355 for (i = 0; i < sc->fqdepth; i++)
1356 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
1357 sc->replyfreeindex = sc->num_replies;
1362 /* Get the driver parameter tunables. Lowest priority are the driver defaults.
1363 * Next are the global settings, if they exist. Highest are the per-unit
1364 * settings, if they exist.
1367 mpr_get_tunables(struct mpr_softc *sc)
1371 /* XXX default to some debugging for now */
1372 sc->mpr_debug = MPR_INFO | MPR_FAULT;
1373 sc->disable_msix = 0;
1374 sc->disable_msi = 0;
1375 sc->max_chains = MPR_CHAIN_FRAMES;
1376 sc->max_io_pages = MPR_MAXIO_PAGES;
1377 sc->enable_ssu = MPR_SSU_ENABLE_SSD_DISABLE_HDD;
1378 sc->spinup_wait_time = DEFAULT_SPINUP_WAIT;
1381 * Grab the global variables.
1383 TUNABLE_INT_FETCH("hw.mpr.debug_level", &sc->mpr_debug);
1384 TUNABLE_INT_FETCH("hw.mpr.disable_msix", &sc->disable_msix);
1385 TUNABLE_INT_FETCH("hw.mpr.disable_msi", &sc->disable_msi);
1386 TUNABLE_INT_FETCH("hw.mpr.max_chains", &sc->max_chains);
1387 TUNABLE_INT_FETCH("hw.mpr.max_io_pages", &sc->max_io_pages);
1388 TUNABLE_INT_FETCH("hw.mpr.enable_ssu", &sc->enable_ssu);
1389 TUNABLE_INT_FETCH("hw.mpr.spinup_wait_time", &sc->spinup_wait_time);
1391 /* Grab the unit-instance variables */
1392 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.debug_level",
1393 device_get_unit(sc->mpr_dev));
1394 TUNABLE_INT_FETCH(tmpstr, &sc->mpr_debug);
1396 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msix",
1397 device_get_unit(sc->mpr_dev));
1398 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
1400 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.disable_msi",
1401 device_get_unit(sc->mpr_dev));
1402 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
1404 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_chains",
1405 device_get_unit(sc->mpr_dev));
1406 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
1408 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.max_io_pages",
1409 device_get_unit(sc->mpr_dev));
1410 TUNABLE_INT_FETCH(tmpstr, &sc->max_io_pages);
1412 bzero(sc->exclude_ids, sizeof(sc->exclude_ids));
1413 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.exclude_ids",
1414 device_get_unit(sc->mpr_dev));
1415 TUNABLE_STR_FETCH(tmpstr, sc->exclude_ids, sizeof(sc->exclude_ids));
1417 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.enable_ssu",
1418 device_get_unit(sc->mpr_dev));
1419 TUNABLE_INT_FETCH(tmpstr, &sc->enable_ssu);
1421 snprintf(tmpstr, sizeof(tmpstr), "dev.mpr.%d.spinup_wait_time",
1422 device_get_unit(sc->mpr_dev));
1423 TUNABLE_INT_FETCH(tmpstr, &sc->spinup_wait_time);
1427 mpr_setup_sysctl(struct mpr_softc *sc)
1429 struct sysctl_ctx_list *sysctl_ctx = NULL;
1430 struct sysctl_oid *sysctl_tree = NULL;
1431 char tmpstr[80], tmpstr2[80];
1434 * Setup the sysctl variable so the user can change the debug level
1437 snprintf(tmpstr, sizeof(tmpstr), "MPR controller %d",
1438 device_get_unit(sc->mpr_dev));
1439 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mpr_dev));
1441 sysctl_ctx = device_get_sysctl_ctx(sc->mpr_dev);
1442 if (sysctl_ctx != NULL)
1443 sysctl_tree = device_get_sysctl_tree(sc->mpr_dev);
1445 if (sysctl_tree == NULL) {
1446 sysctl_ctx_init(&sc->sysctl_ctx);
1447 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
1448 SYSCTL_STATIC_CHILDREN(_hw_mpr), OID_AUTO, tmpstr2,
1449 CTLFLAG_RD, 0, tmpstr);
1450 if (sc->sysctl_tree == NULL)
1452 sysctl_ctx = &sc->sysctl_ctx;
1453 sysctl_tree = sc->sysctl_tree;
1456 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1457 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mpr_debug, 0,
1460 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1461 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
1462 "Disable the use of MSI-X interrupts");
1464 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1465 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1466 "Disable the use of MSI interrupts");
1468 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1469 OID_AUTO, "firmware_version", CTLFLAG_RW, sc->fw_version,
1470 strlen(sc->fw_version), "firmware version");
1472 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1473 OID_AUTO, "driver_version", CTLFLAG_RW, MPR_DRIVER_VERSION,
1474 strlen(MPR_DRIVER_VERSION), "driver version");
1476 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1477 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1478 &sc->io_cmds_active, 0, "number of currently active commands");
1480 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1481 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1482 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1484 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1485 OID_AUTO, "chain_free", CTLFLAG_RD,
1486 &sc->chain_free, 0, "number of free chain elements");
1488 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1489 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1490 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1492 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1493 OID_AUTO, "max_chains", CTLFLAG_RD,
1494 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1496 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1497 OID_AUTO, "max_io_pages", CTLFLAG_RD,
1498 &sc->max_io_pages, 0,"maximum pages to allow per I/O (if <1 use "
1501 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1502 OID_AUTO, "enable_ssu", CTLFLAG_RW, &sc->enable_ssu, 0,
1503 "enable SSU to SATA SSD/HDD at shutdown");
1505 #if __FreeBSD_version >= 900030
1506 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1507 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1508 &sc->chain_alloc_fail, "chain allocation failures");
1509 #endif //FreeBSD_version >= 900030
1511 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1512 OID_AUTO, "spinup_wait_time", CTLFLAG_RD,
1513 &sc->spinup_wait_time, DEFAULT_SPINUP_WAIT, "seconds to wait for "
1514 "spinup after SATA ID error");
1518 mpr_attach(struct mpr_softc *sc)
1522 mpr_get_tunables(sc);
1526 mtx_init(&sc->mpr_mtx, "MPR lock", NULL, MTX_DEF);
1527 callout_init_mtx(&sc->periodic, &sc->mpr_mtx, 0);
1528 TAILQ_INIT(&sc->event_list);
1529 timevalclear(&sc->lastfail);
1531 if ((error = mpr_transition_ready(sc)) != 0) {
1532 mpr_printf(sc, "%s failed to transition ready\n", __func__);
1536 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPR,
1539 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
1540 __func__, __LINE__);
1545 * Get IOC Facts and allocate all structures based on this information.
1546 * A Diag Reset will also call mpr_iocfacts_allocate and re-read the IOC
1547 * Facts. If relevant values have changed in IOC Facts, this function
1548 * will free all of the memory based on IOC Facts and reallocate that
1549 * memory. If this fails, any allocated memory should already be freed.
1551 if ((error = mpr_iocfacts_allocate(sc, TRUE)) != 0) {
1552 mpr_dprint(sc, MPR_FAULT, "%s IOC Facts based allocation "
1553 "failed with error %d\n", __func__, error);
1557 /* Start the periodic watchdog check on the IOC Doorbell */
1561 * The portenable will kick off discovery events that will drive the
1562 * rest of the initialization process. The CAM/SAS module will
1563 * hold up the boot sequence until discovery is complete.
1565 sc->mpr_ich.ich_func = mpr_startup;
1566 sc->mpr_ich.ich_arg = sc;
1567 if (config_intrhook_establish(&sc->mpr_ich) != 0) {
1568 mpr_dprint(sc, MPR_ERROR, "Cannot establish MPR config hook\n");
1573 * Allow IR to shutdown gracefully when shutdown occurs.
1575 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1576 mprsas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1578 if (sc->shutdown_eh == NULL)
1579 mpr_dprint(sc, MPR_ERROR, "shutdown event registration "
1582 mpr_setup_sysctl(sc);
1584 sc->mpr_flags |= MPR_FLAGS_ATTACH_DONE;
1589 /* Run through any late-start handlers. */
1591 mpr_startup(void *arg)
1593 struct mpr_softc *sc;
1595 sc = (struct mpr_softc *)arg;
1598 mpr_unmask_intr(sc);
1600 /* initialize device mapping tables */
1601 mpr_base_static_config_pages(sc);
1602 mpr_mapping_initialize(sc);
1607 /* Periodic watchdog. Is called with the driver lock already held. */
1609 mpr_periodic(void *arg)
1611 struct mpr_softc *sc;
1614 sc = (struct mpr_softc *)arg;
1615 if (sc->mpr_flags & MPR_FLAGS_SHUTDOWN)
1618 db = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
1619 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1620 if ((db & MPI2_DOORBELL_FAULT_CODE_MASK) ==
1621 IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED) {
1622 panic("TEMPERATURE FAULT: STOPPING.");
1624 mpr_dprint(sc, MPR_FAULT, "IOC Fault 0x%08x, Resetting\n", db);
1628 callout_reset(&sc->periodic, MPR_PERIODIC_DELAY * hz, mpr_periodic, sc);
1632 mpr_log_evt_handler(struct mpr_softc *sc, uintptr_t data,
1633 MPI2_EVENT_NOTIFICATION_REPLY *event)
1635 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1637 mpr_print_event(sc, event);
1639 switch (event->Event) {
1640 case MPI2_EVENT_LOG_DATA:
1641 mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_DATA:\n");
1642 if (sc->mpr_debug & MPR_EVENT)
1643 hexdump(event->EventData, event->EventDataLength, NULL,
1646 case MPI2_EVENT_LOG_ENTRY_ADDED:
1647 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1648 mpr_dprint(sc, MPR_EVENT, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1649 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1650 entry->LogSequence);
1659 mpr_attach_log(struct mpr_softc *sc)
1664 setbit(events, MPI2_EVENT_LOG_DATA);
1665 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1667 mpr_register_events(sc, events, mpr_log_evt_handler, NULL,
1674 mpr_detach_log(struct mpr_softc *sc)
1677 if (sc->mpr_log_eh != NULL)
1678 mpr_deregister_events(sc, sc->mpr_log_eh);
1683 * Free all of the driver resources and detach submodules. Should be called
1684 * without the lock held.
1687 mpr_free(struct mpr_softc *sc)
1691 /* Turn off the watchdog */
1693 sc->mpr_flags |= MPR_FLAGS_SHUTDOWN;
1695 /* Lock must not be held for this */
1696 callout_drain(&sc->periodic);
1698 if (((error = mpr_detach_log(sc)) != 0) ||
1699 ((error = mpr_detach_sas(sc)) != 0))
1702 mpr_detach_user(sc);
1704 /* Put the IOC back in the READY state. */
1706 if ((error = mpr_transition_ready(sc)) != 0) {
1712 if (sc->facts != NULL)
1713 free(sc->facts, M_MPR);
1716 * Free all buffers that are based on IOC Facts. A Diag Reset may need
1717 * to free these buffers too.
1719 mpr_iocfacts_free(sc);
1721 if (sc->sysctl_tree != NULL)
1722 sysctl_ctx_free(&sc->sysctl_ctx);
1724 /* Deregister the shutdown function */
1725 if (sc->shutdown_eh != NULL)
1726 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1728 mtx_destroy(&sc->mpr_mtx);
1733 static __inline void
1734 mpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm)
1739 mpr_dprint(sc, MPR_ERROR, "Completing NULL command\n");
1743 if (cm->cm_flags & MPR_CM_FLAGS_POLLED)
1744 cm->cm_flags |= MPR_CM_FLAGS_COMPLETE;
1746 if (cm->cm_complete != NULL) {
1747 mpr_dprint(sc, MPR_TRACE,
1748 "%s cm %p calling cm_complete %p data %p reply %p\n",
1749 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1751 cm->cm_complete(sc, cm);
1754 if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) {
1755 mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm);
1759 if (sc->io_cmds_active != 0) {
1760 sc->io_cmds_active--;
1762 mpr_dprint(sc, MPR_ERROR, "Warning: io_cmds_active is "
1763 "out of sync - resynching to 0\n");
1768 mpr_sas_log_info(struct mpr_softc *sc , u32 log_info)
1770 union loginfo_type {
1779 union loginfo_type sas_loginfo;
1780 char *originator_str = NULL;
1782 sas_loginfo.loginfo = log_info;
1783 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
1786 /* each nexus loss loginfo */
1787 if (log_info == 0x31170000)
1790 /* eat the loginfos associated with task aborts */
1791 if ((log_info == 30050000) || (log_info == 0x31140000) ||
1792 (log_info == 0x31130000))
1795 switch (sas_loginfo.dw.originator) {
1797 originator_str = "IOP";
1800 originator_str = "PL";
1803 originator_str = "IR";
1807 mpr_dprint(sc, MPR_LOG, "log_info(0x%08x): originator(%s), "
1808 "code(0x%02x), sub_code(0x%04x)\n", log_info, originator_str,
1809 sas_loginfo.dw.code, sas_loginfo.dw.subcode);
1813 mpr_display_reply_info(struct mpr_softc *sc, uint8_t *reply)
1815 MPI2DefaultReply_t *mpi_reply;
1818 mpi_reply = (MPI2DefaultReply_t*)reply;
1819 sc_status = le16toh(mpi_reply->IOCStatus);
1820 if (sc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
1821 mpr_sas_log_info(sc, le32toh(mpi_reply->IOCLogInfo));
1825 mpr_intr(void *data)
1827 struct mpr_softc *sc;
1830 sc = (struct mpr_softc *)data;
1831 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
1834 * Check interrupt status register to flush the bus. This is
1835 * needed for both INTx interrupts and driver-driven polling
1837 status = mpr_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1838 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1842 mpr_intr_locked(data);
1848 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1849 * chip. Hopefully this theory is correct.
1852 mpr_intr_msi(void *data)
1854 struct mpr_softc *sc;
1856 sc = (struct mpr_softc *)data;
1857 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
1859 mpr_intr_locked(data);
1865 * The locking is overly broad and simplistic, but easy to deal with for now.
1868 mpr_intr_locked(void *data)
1870 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1871 struct mpr_softc *sc;
1872 struct mpr_command *cm = NULL;
1875 MPI2_DIAG_RELEASE_REPLY *rel_rep;
1876 mpr_fw_diagnostic_buffer_t *pBuffer;
1878 sc = (struct mpr_softc *)data;
1880 pq = sc->replypostindex;
1881 mpr_dprint(sc, MPR_TRACE,
1882 "%s sc %p starting with replypostindex %u\n",
1883 __func__, sc, sc->replypostindex);
1887 desc = &sc->post_queue[sc->replypostindex];
1888 flags = desc->Default.ReplyFlags &
1889 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1890 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) ||
1891 (le32toh(desc->Words.High) == 0xffffffff))
1894 /* increment the replypostindex now, so that event handlers
1895 * and cm completion handlers which decide to do a diag
1896 * reset can zero it without it getting incremented again
1897 * afterwards, and we break out of this loop on the next
1898 * iteration since the reply post queue has been cleared to
1899 * 0xFF and all descriptors look unused (which they are).
1901 if (++sc->replypostindex >= sc->pqdepth)
1902 sc->replypostindex = 0;
1905 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1906 case MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS:
1907 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
1908 cm->cm_reply = NULL;
1910 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1916 * Re-compose the reply address from the address
1917 * sent back from the chip. The ReplyFrameAddress
1918 * is the lower 32 bits of the physical address of
1919 * particular reply frame. Convert that address to
1920 * host format, and then use that to provide the
1921 * offset against the virtual address base
1922 * (sc->reply_frames).
1924 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1925 reply = sc->reply_frames +
1926 (baddr - ((uint32_t)sc->reply_busaddr));
1928 * Make sure the reply we got back is in a valid
1929 * range. If not, go ahead and panic here, since
1930 * we'll probably panic as soon as we deference the
1931 * reply pointer anyway.
1933 if ((reply < sc->reply_frames)
1934 || (reply > (sc->reply_frames +
1935 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1936 printf("%s: WARNING: reply %p out of range!\n",
1938 printf("%s: reply_frames %p, fqdepth %d, "
1939 "frame size %d\n", __func__,
1940 sc->reply_frames, sc->fqdepth,
1941 sc->facts->ReplyFrameSize * 4);
1942 printf("%s: baddr %#x,\n", __func__, baddr);
1943 /* LSI-TODO. See Linux Code for Graceful exit */
1944 panic("Reply address out of range");
1946 if (le16toh(desc->AddressReply.SMID) == 0) {
1947 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1948 MPI2_FUNCTION_DIAG_BUFFER_POST) {
1950 * If SMID is 0 for Diag Buffer Post,
1951 * this implies that the reply is due to
1952 * a release function with a status that
1953 * the buffer has been released. Set
1954 * the buffer flags accordingly.
1957 (MPI2_DIAG_RELEASE_REPLY *)reply;
1958 if ((le16toh(rel_rep->IOCStatus) &
1959 MPI2_IOCSTATUS_MASK) ==
1960 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1963 &sc->fw_diag_buffer_list[
1964 rel_rep->BufferType];
1965 pBuffer->valid_data = TRUE;
1966 pBuffer->owned_by_firmware =
1968 pBuffer->immediate = FALSE;
1971 mpr_dispatch_event(sc, baddr,
1972 (MPI2_EVENT_NOTIFICATION_REPLY *)
1976 le16toh(desc->AddressReply.SMID)];
1977 cm->cm_reply = reply;
1979 le32toh(desc->AddressReply.
1984 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1985 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1986 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1989 mpr_dprint(sc, MPR_ERROR, "Unhandled reply 0x%x\n",
1990 desc->Default.ReplyFlags);
1996 // Print Error reply frame
1998 mpr_display_reply_info(sc,cm->cm_reply);
1999 mpr_complete_command(sc, cm);
2002 desc->Words.Low = 0xffffffff;
2003 desc->Words.High = 0xffffffff;
2006 if (pq != sc->replypostindex) {
2007 mpr_dprint(sc, MPR_TRACE,
2008 "%s sc %p writing postindex %d\n",
2009 __func__, sc, sc->replypostindex);
2010 mpr_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET,
2011 sc->replypostindex);
2018 mpr_dispatch_event(struct mpr_softc *sc, uintptr_t data,
2019 MPI2_EVENT_NOTIFICATION_REPLY *reply)
2021 struct mpr_event_handle *eh;
2022 int event, handled = 0;
2024 event = le16toh(reply->Event);
2025 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2026 if (isset(eh->mask, event)) {
2027 eh->callback(sc, data, reply);
2033 mpr_dprint(sc, MPR_EVENT, "Unhandled event 0x%x\n",
2037 * This is the only place that the event/reply should be freed.
2038 * Anything wanting to hold onto the event data should have
2039 * already copied it into their own storage.
2041 mpr_free_reply(sc, data);
2045 mpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm)
2047 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2051 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2053 mpr_free_command(sc, cm);
2055 /* next, send a port enable */
2060 * For both register_events and update_events, the caller supplies a bitmap
2061 * of events that it _wants_. These functions then turn that into a bitmask
2062 * suitable for the controller.
2065 mpr_register_events(struct mpr_softc *sc, uint8_t *mask,
2066 mpr_evt_callback_t *cb, void *data, struct mpr_event_handle **handle)
2068 struct mpr_event_handle *eh;
2071 eh = malloc(sizeof(struct mpr_event_handle), M_MPR, M_WAITOK|M_ZERO);
2073 device_printf(sc->mpr_dev, "Cannot allocate memory %s %d\n",
2074 __func__, __LINE__);
2079 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
2081 error = mpr_update_events(sc, eh, mask);
2088 mpr_update_events(struct mpr_softc *sc, struct mpr_event_handle *handle,
2091 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2092 MPI2_EVENT_NOTIFICATION_REPLY *reply;
2093 struct mpr_command *cm;
2094 struct mpr_event_handle *eh;
2097 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2099 if ((mask != NULL) && (handle != NULL))
2100 bcopy(mask, &handle->mask[0], 16);
2101 memset(sc->event_mask, 0xff, 16);
2103 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2104 for (i = 0; i < 16; i++)
2105 sc->event_mask[i] &= ~eh->mask[i];
2108 if ((cm = mpr_alloc_command(sc)) == NULL)
2110 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2111 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2112 evtreq->MsgFlags = 0;
2113 evtreq->SASBroadcastPrimitiveMasks = 0;
2114 #ifdef MPR_DEBUG_ALL_EVENTS
2116 u_char fullmask[16];
2117 memset(fullmask, 0x00, 16);
2118 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
2121 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
2123 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2126 error = mpr_request_polled(sc, cm);
2127 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2128 if ((reply == NULL) ||
2129 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
2133 mpr_print_event(sc, reply);
2135 mpr_dprint(sc, MPR_TRACE, "%s finished error %d\n", __func__, error);
2137 mpr_free_command(sc, cm);
2142 mpr_reregister_events(struct mpr_softc *sc)
2144 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
2145 struct mpr_command *cm;
2146 struct mpr_event_handle *eh;
2149 mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
2151 /* first, reregister events */
2153 memset(sc->event_mask, 0xff, 16);
2155 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
2156 for (i = 0; i < 16; i++)
2157 sc->event_mask[i] &= ~eh->mask[i];
2160 if ((cm = mpr_alloc_command(sc)) == NULL)
2162 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2163 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
2164 evtreq->MsgFlags = 0;
2165 evtreq->SASBroadcastPrimitiveMasks = 0;
2166 #ifdef MPR_DEBUG_ALL_EVENTS
2168 u_char fullmask[16];
2169 memset(fullmask, 0x00, 16);
2170 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
2173 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
2175 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2177 cm->cm_complete = mpr_reregister_events_complete;
2179 error = mpr_map_command(sc, cm);
2181 mpr_dprint(sc, MPR_TRACE, "%s finished with error %d\n", __func__,
2187 mpr_deregister_events(struct mpr_softc *sc, struct mpr_event_handle *handle)
2190 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
2191 free(handle, M_MPR);
2192 return (mpr_update_events(sc, NULL, NULL));
2196 * Add a chain element as the next SGE for the specified command.
2197 * Reset cm_sge and cm_sgesize to indicate all the available space. Chains are
2198 * only required for IEEE commands. Therefore there is no code for commands
2199 * that have the MPR_CM_FLAGS_SGE_SIMPLE flag set (and those commands
2200 * shouldn't be requesting chains).
2203 mpr_add_chain(struct mpr_command *cm, int segsleft)
2205 struct mpr_softc *sc = cm->cm_sc;
2206 MPI2_REQUEST_HEADER *req;
2207 MPI25_IEEE_SGE_CHAIN64 *ieee_sgc;
2208 struct mpr_chain *chain;
2209 int sgc_size, current_segs, rem_segs, segs_per_frame;
2210 uint8_t next_chain_offset = 0;
2213 * Fail if a command is requesting a chain for SIMPLE SGE's. For SAS3
2214 * only IEEE commands should be requesting chains. Return some error
2215 * code other than 0.
2217 if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) {
2218 mpr_dprint(sc, MPR_ERROR, "A chain element cannot be added to "
2223 sgc_size = sizeof(MPI25_IEEE_SGE_CHAIN64);
2224 if (cm->cm_sglsize < sgc_size)
2225 panic("MPR: Need SGE Error Code\n");
2227 chain = mpr_alloc_chain(cm->cm_sc);
2232 * Note: a double-linked list is used to make it easier to walk for
2235 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2238 * Need to know if the number of frames left is more than 1 or not. If
2239 * more than 1 frame is required, NextChainOffset will need to be set,
2240 * which will just be the last segment of the frame.
2243 if (cm->cm_sglsize < (sgc_size * segsleft)) {
2245 * rem_segs is the number of segements remaining after the
2246 * segments that will go into the current frame. Since it is
2247 * known that at least one more frame is required, account for
2248 * the chain element. To know if more than one more frame is
2249 * required, just check if there will be a remainder after using
2250 * the current frame (with this chain) and the next frame. If
2251 * so the NextChainOffset must be the last element of the next
2254 current_segs = (cm->cm_sglsize / sgc_size) - 1;
2255 rem_segs = segsleft - current_segs;
2256 segs_per_frame = sc->chain_frame_size / sgc_size;
2257 if (rem_segs > segs_per_frame) {
2258 next_chain_offset = segs_per_frame - 1;
2261 ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain;
2262 ieee_sgc->Length = next_chain_offset ?
2263 htole32((uint32_t)sc->chain_frame_size) :
2264 htole32((uint32_t)rem_segs * (uint32_t)sgc_size);
2265 ieee_sgc->NextChainOffset = next_chain_offset;
2266 ieee_sgc->Flags = (MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
2267 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2268 ieee_sgc->Address.Low = htole32(chain->chain_busaddr);
2269 ieee_sgc->Address.High = htole32(chain->chain_busaddr >> 32);
2270 cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple;
2271 req = (MPI2_REQUEST_HEADER *)cm->cm_req;
2272 req->ChainOffset = (sc->chain_frame_size - sgc_size) >> 4;
2274 cm->cm_sglsize = sc->chain_frame_size;
2279 * Add one scatter-gather element to the scatter-gather list for a command.
2280 * Maintain cm_sglsize and cm_sge as the remaining size and pointer to the
2281 * next SGE to fill in, respectively. In Gen3, the MPI SGL does not have a
2282 * chain, so don't consider any chain additions.
2285 mpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len,
2288 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2292 * case 1: >=1 more segment, no room for anything (error)
2293 * case 2: 1 more segment and enough room for it
2296 if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) {
2297 mpr_dprint(cm->cm_sc, MPR_ERROR,
2298 "%s: warning: Not enough room for MPI SGL in frame.\n",
2303 KASSERT(segsleft == 1,
2304 ("segsleft cannot be more than 1 for an MPI SGL; segsleft = %d\n",
2308 * There is one more segment left to add for the MPI SGL and there is
2309 * enough room in the frame to add it. This is the normal case because
2310 * MPI SGL's don't have chains, otherwise something is wrong.
2312 * If this is a bi-directional request, need to account for that
2313 * here. Save the pre-filled sge values. These will be used
2314 * either for the 2nd SGL or for a single direction SGL. If
2315 * cm_out_len is non-zero, this is a bi-directional request, so
2316 * fill in the OUT SGL first, then the IN SGL, otherwise just
2317 * fill in the IN SGL. Note that at this time, when filling in
2318 * 2 SGL's for a bi-directional request, they both use the same
2319 * DMA buffer (same cm command).
2321 saved_buf_len = sge->FlagsLength & 0x00FFFFFF;
2322 saved_address_low = sge->Address.Low;
2323 saved_address_high = sge->Address.High;
2324 if (cm->cm_out_len) {
2325 sge->FlagsLength = cm->cm_out_len |
2326 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2327 MPI2_SGE_FLAGS_END_OF_BUFFER |
2328 MPI2_SGE_FLAGS_HOST_TO_IOC |
2329 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2330 MPI2_SGE_FLAGS_SHIFT);
2331 cm->cm_sglsize -= len;
2332 /* Endian Safe code */
2333 sge_flags = sge->FlagsLength;
2334 sge->FlagsLength = htole32(sge_flags);
2335 sge->Address.High = htole32(sge->Address.High);
2336 sge->Address.Low = htole32(sge->Address.Low);
2337 bcopy(sge, cm->cm_sge, len);
2338 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2340 sge->FlagsLength = saved_buf_len |
2341 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2342 MPI2_SGE_FLAGS_END_OF_BUFFER |
2343 MPI2_SGE_FLAGS_LAST_ELEMENT |
2344 MPI2_SGE_FLAGS_END_OF_LIST |
2345 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
2346 MPI2_SGE_FLAGS_SHIFT);
2347 if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) {
2349 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
2350 MPI2_SGE_FLAGS_SHIFT);
2353 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
2354 MPI2_SGE_FLAGS_SHIFT);
2356 sge->Address.Low = saved_address_low;
2357 sge->Address.High = saved_address_high;
2359 cm->cm_sglsize -= len;
2360 /* Endian Safe code */
2361 sge_flags = sge->FlagsLength;
2362 sge->FlagsLength = htole32(sge_flags);
2363 sge->Address.High = htole32(sge->Address.High);
2364 sge->Address.Low = htole32(sge->Address.Low);
2365 bcopy(sge, cm->cm_sge, len);
2366 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
2371 * Add one IEEE scatter-gather element (chain or simple) to the IEEE scatter-
2372 * gather list for a command. Maintain cm_sglsize and cm_sge as the
2373 * remaining size and pointer to the next SGE to fill in, respectively.
2376 mpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft)
2378 MPI2_IEEE_SGE_SIMPLE64 *sge = sgep;
2379 int error, ieee_sge_size = sizeof(MPI25_SGE_IO_UNION);
2380 uint32_t saved_buf_len, saved_address_low, saved_address_high;
2381 uint32_t sge_length;
2384 * case 1: No room for chain or segment (error).
2385 * case 2: Two or more segments left but only room for chain.
2386 * case 3: Last segment and room for it, so set flags.
2390 * There should be room for at least one element, or there is a big
2393 if (cm->cm_sglsize < ieee_sge_size)
2394 panic("MPR: Need SGE Error Code\n");
2396 if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) {
2397 if ((error = mpr_add_chain(cm, segsleft)) != 0)
2401 if (segsleft == 1) {
2403 * If this is a bi-directional request, need to account for that
2404 * here. Save the pre-filled sge values. These will be used
2405 * either for the 2nd SGL or for a single direction SGL. If
2406 * cm_out_len is non-zero, this is a bi-directional request, so
2407 * fill in the OUT SGL first, then the IN SGL, otherwise just
2408 * fill in the IN SGL. Note that at this time, when filling in
2409 * 2 SGL's for a bi-directional request, they both use the same
2410 * DMA buffer (same cm command).
2412 saved_buf_len = sge->Length;
2413 saved_address_low = sge->Address.Low;
2414 saved_address_high = sge->Address.High;
2415 if (cm->cm_out_len) {
2416 sge->Length = cm->cm_out_len;
2417 sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2418 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2419 cm->cm_sglsize -= ieee_sge_size;
2420 /* Endian Safe code */
2421 sge_length = sge->Length;
2422 sge->Length = htole32(sge_length);
2423 sge->Address.High = htole32(sge->Address.High);
2424 sge->Address.Low = htole32(sge->Address.Low);
2425 bcopy(sgep, cm->cm_sge, ieee_sge_size);
2427 (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
2430 sge->Length = saved_buf_len;
2431 sge->Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2432 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
2433 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
2434 sge->Address.Low = saved_address_low;
2435 sge->Address.High = saved_address_high;
2438 cm->cm_sglsize -= ieee_sge_size;
2439 /* Endian Safe code */
2440 sge_length = sge->Length;
2441 sge->Length = htole32(sge_length);
2442 sge->Address.High = htole32(sge->Address.High);
2443 sge->Address.Low = htole32(sge->Address.Low);
2444 bcopy(sgep, cm->cm_sge, ieee_sge_size);
2445 cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
2451 * Add one dma segment to the scatter-gather list for a command.
2454 mpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2457 MPI2_SGE_SIMPLE64 sge;
2458 MPI2_IEEE_SGE_SIMPLE64 ieee_sge;
2460 if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) {
2461 ieee_sge.Flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
2462 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
2463 ieee_sge.Length = len;
2464 mpr_from_u64(pa, &ieee_sge.Address);
2466 return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft));
2469 * This driver always uses 64-bit address elements for
2472 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2473 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2474 /* Set Endian safe macro in mpr_push_sge */
2475 sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT);
2476 mpr_from_u64(pa, &sge.Address);
2478 return (mpr_push_sge(cm, &sge, sizeof sge, segsleft));
2483 mpr_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2485 struct mpr_softc *sc;
2486 struct mpr_command *cm;
2487 u_int i, dir, sflags;
2489 cm = (struct mpr_command *)arg;
2493 * In this case, just print out a warning and let the chip tell the
2494 * user they did the wrong thing.
2496 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2497 mpr_dprint(sc, MPR_ERROR, "%s: warning: busdma returned %d "
2498 "segments, more than the %d allowed\n", __func__, nsegs,
2503 * Set up DMA direction flags. Bi-directional requests are also handled
2504 * here. In that case, both direction flags will be set.
2507 if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) {
2509 * We have to add a special case for SMP passthrough, there
2510 * is no easy way to generically handle it. The first
2511 * S/G element is used for the command (therefore the
2512 * direction bit needs to be set). The second one is used
2513 * for the reply. We'll leave it to the caller to make
2514 * sure we only have two buffers.
2517 * Even though the busdma man page says it doesn't make
2518 * sense to have both direction flags, it does in this case.
2519 * We have one s/g element being accessed in each direction.
2521 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2524 * Set the direction flag on the first buffer in the SMP
2525 * passthrough request. We'll clear it for the second one.
2527 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2528 MPI2_SGE_FLAGS_END_OF_BUFFER;
2529 } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) {
2530 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2531 dir = BUS_DMASYNC_PREWRITE;
2533 dir = BUS_DMASYNC_PREREAD;
2535 for (i = 0; i < nsegs; i++) {
2536 if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) {
2537 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2539 error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2542 /* Resource shortage, roll back! */
2543 if (ratecheck(&sc->lastfail, &mpr_chainfail_interval))
2544 mpr_dprint(sc, MPR_INFO, "Out of chain frames, "
2545 "consider increasing hw.mpr.max_chains.\n");
2546 cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED;
2547 mpr_complete_command(sc, cm);
2552 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2553 mpr_enqueue_request(sc, cm);
2559 mpr_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2562 mpr_data_cb(arg, segs, nsegs, error);
2566 * This is the routine to enqueue commands ansynchronously.
2567 * Note that the only error path here is from bus_dmamap_load(), which can
2568 * return EINPROGRESS if it is waiting for resources. Other than this, it's
2569 * assumed that if you have a command in-hand, then you have enough credits
2573 mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm)
2577 if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) {
2578 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2579 &cm->cm_uio, mpr_data_cb2, cm, 0);
2580 } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) {
2581 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
2582 cm->cm_data, mpr_data_cb, cm, 0);
2583 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2584 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2585 cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0);
2587 /* Add a zero-length element as needed */
2588 if (cm->cm_sge != NULL)
2589 mpr_add_dmaseg(cm, 0, 0, 0, 1);
2590 mpr_enqueue_request(sc, cm);
2597 * This is the routine to enqueue commands synchronously. An error of
2598 * EINPROGRESS from mpr_map_command() is ignored since the command will
2599 * be executed and enqueued automatically. Other errors come from msleep().
2602 mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm, int timeout,
2606 struct timeval cur_time, start_time;
2608 if (sc->mpr_flags & MPR_FLAGS_DIAGRESET)
2611 cm->cm_complete = NULL;
2612 cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED);
2613 error = mpr_map_command(sc, cm);
2614 if ((error != 0) && (error != EINPROGRESS))
2617 // Check for context and wait for 50 mSec at a time until time has
2618 // expired or the command has finished. If msleep can't be used, need
2620 #if __FreeBSD_version >= 1000029
2621 if (curthread->td_no_sleeping)
2622 #else //__FreeBSD_version < 1000029
2623 if (curthread->td_pflags & TDP_NOSLEEPING)
2624 #endif //__FreeBSD_version >= 1000029
2625 sleep_flag = NO_SLEEP;
2626 getmicrotime(&start_time);
2627 if (mtx_owned(&sc->mpr_mtx) && sleep_flag == CAN_SLEEP) {
2628 error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz);
2630 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
2631 mpr_intr_locked(sc);
2632 if (sleep_flag == CAN_SLEEP)
2633 pause("mprwait", hz/20);
2637 getmicrotime(&cur_time);
2638 if ((cur_time.tv_sec - start_time.tv_sec) > timeout) {
2639 error = EWOULDBLOCK;
2645 if (error == EWOULDBLOCK) {
2646 mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
2647 rc = mpr_reinit(sc);
2648 mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2656 * This is the routine to enqueue a command synchonously and poll for
2657 * completion. Its use should be rare.
2660 mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm)
2662 int error, timeout = 0, rc;
2663 struct timeval cur_time, start_time;
2667 cm->cm_flags |= MPR_CM_FLAGS_POLLED;
2668 cm->cm_complete = NULL;
2669 mpr_map_command(sc, cm);
2671 getmicrotime(&start_time);
2672 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
2673 mpr_intr_locked(sc);
2675 if (mtx_owned(&sc->mpr_mtx))
2676 msleep(&sc->msleep_fake_chan, &sc->mpr_mtx, 0,
2679 pause("mprpoll", hz/20);
2682 * Check for real-time timeout and fail if more than 60 seconds.
2684 getmicrotime(&cur_time);
2685 timeout = cur_time.tv_sec - start_time.tv_sec;
2687 mpr_dprint(sc, MPR_FAULT, "polling failed\n");
2694 mpr_dprint(sc, MPR_FAULT, "Calling Reinit from %s\n", __func__);
2695 rc = mpr_reinit(sc);
2696 mpr_dprint(sc, MPR_FAULT, "Reinit %s\n", (rc == 0) ? "success" :
2703 * The MPT driver had a verbose interface for config pages. In this driver,
2704 * reduce it to much simplier terms, similar to the Linux driver.
2707 mpr_read_config_page(struct mpr_softc *sc, struct mpr_config_params *params)
2709 MPI2_CONFIG_REQUEST *req;
2710 struct mpr_command *cm;
2713 if (sc->mpr_flags & MPR_FLAGS_BUSY) {
2717 cm = mpr_alloc_command(sc);
2722 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2723 req->Function = MPI2_FUNCTION_CONFIG;
2724 req->Action = params->action;
2726 req->ChainOffset = 0;
2727 req->PageAddress = params->page_address;
2728 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2729 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2731 hdr = ¶ms->hdr.Ext;
2732 req->ExtPageType = hdr->ExtPageType;
2733 req->ExtPageLength = hdr->ExtPageLength;
2734 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2735 req->Header.PageLength = 0; /* Must be set to zero */
2736 req->Header.PageNumber = hdr->PageNumber;
2737 req->Header.PageVersion = hdr->PageVersion;
2739 MPI2_CONFIG_PAGE_HEADER *hdr;
2741 hdr = ¶ms->hdr.Struct;
2742 req->Header.PageType = hdr->PageType;
2743 req->Header.PageNumber = hdr->PageNumber;
2744 req->Header.PageLength = hdr->PageLength;
2745 req->Header.PageVersion = hdr->PageVersion;
2748 cm->cm_data = params->buffer;
2749 cm->cm_length = params->length;
2750 if (cm->cm_data != NULL) {
2751 cm->cm_sge = &req->PageBufferSGE;
2752 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2753 cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN;
2756 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2758 cm->cm_complete_data = params;
2759 if (params->callback != NULL) {
2760 cm->cm_complete = mpr_config_complete;
2761 return (mpr_map_command(sc, cm));
2763 error = mpr_wait_command(sc, cm, 0, CAN_SLEEP);
2765 mpr_dprint(sc, MPR_FAULT,
2766 "Error %d reading config page\n", error);
2767 mpr_free_command(sc, cm);
2770 mpr_config_complete(sc, cm);
2777 mpr_write_config_page(struct mpr_softc *sc, struct mpr_config_params *params)
2783 mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm)
2785 MPI2_CONFIG_REPLY *reply;
2786 struct mpr_config_params *params;
2789 params = cm->cm_complete_data;
2791 if (cm->cm_data != NULL) {
2792 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2793 BUS_DMASYNC_POSTREAD);
2794 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2798 * XXX KDM need to do more error recovery? This results in the
2799 * device in question not getting probed.
2801 if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) {
2802 params->status = MPI2_IOCSTATUS_BUSY;
2806 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2807 if (reply == NULL) {
2808 params->status = MPI2_IOCSTATUS_BUSY;
2811 params->status = reply->IOCStatus;
2812 if (params->hdr.Struct.PageType == MPI2_CONFIG_PAGETYPE_EXTENDED) {
2813 params->hdr.Ext.ExtPageType = reply->ExtPageType;
2814 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2815 params->hdr.Ext.PageType = reply->Header.PageType;
2816 params->hdr.Ext.PageNumber = reply->Header.PageNumber;
2817 params->hdr.Ext.PageVersion = reply->Header.PageVersion;
2819 params->hdr.Struct.PageType = reply->Header.PageType;
2820 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2821 params->hdr.Struct.PageLength = reply->Header.PageLength;
2822 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2826 mpr_free_command(sc, cm);
2827 if (params->callback != NULL)
2828 params->callback(sc, params);