2 * PCI specific probe and attach routines for LSI Fusion Adapters
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
101 #include <sys/cdefs.h>
102 __FBSDID("$FreeBSD$");
104 #include <dev/mpt/mpt.h>
105 #include <dev/mpt/mpt_cam.h>
106 #include <dev/mpt/mpt_raid.h>
108 #if __FreeBSD_version < 700000
109 #define pci_msix_count(x) 0
110 #define pci_msi_count(x) 0
111 #define pci_alloc_msi(x, y) 1
112 #define pci_alloc_msix(x, y) 1
113 #define pci_release_msi(x) do { ; } while (0)
116 #ifndef PCI_VENDOR_LSI
117 #define PCI_VENDOR_LSI 0x1000
120 #ifndef PCI_PRODUCT_LSI_FC909
121 #define PCI_PRODUCT_LSI_FC909 0x0620
124 #ifndef PCI_PRODUCT_LSI_FC909A
125 #define PCI_PRODUCT_LSI_FC909A 0x0621
128 #ifndef PCI_PRODUCT_LSI_FC919
129 #define PCI_PRODUCT_LSI_FC919 0x0624
132 #ifndef PCI_PRODUCT_LSI_FC929
133 #define PCI_PRODUCT_LSI_FC929 0x0622
136 #ifndef PCI_PRODUCT_LSI_FC929X
137 #define PCI_PRODUCT_LSI_FC929X 0x0626
140 #ifndef PCI_PRODUCT_LSI_FC919X
141 #define PCI_PRODUCT_LSI_FC919X 0x0628
144 #ifndef PCI_PRODUCT_LSI_FC7X04X
145 #define PCI_PRODUCT_LSI_FC7X04X 0x0640
148 #ifndef PCI_PRODUCT_LSI_FC646
149 #define PCI_PRODUCT_LSI_FC646 0x0646
152 #ifndef PCI_PRODUCT_LSI_1030
153 #define PCI_PRODUCT_LSI_1030 0x0030
156 #ifndef PCI_PRODUCT_LSI_SAS1064
157 #define PCI_PRODUCT_LSI_SAS1064 0x0050
160 #ifndef PCI_PRODUCT_LSI_SAS1064A
161 #define PCI_PRODUCT_LSI_SAS1064A 0x005C
164 #ifndef PCI_PRODUCT_LSI_SAS1064E
165 #define PCI_PRODUCT_LSI_SAS1064E 0x0056
168 #ifndef PCI_PRODUCT_LSI_SAS1066
169 #define PCI_PRODUCT_LSI_SAS1066 0x005E
172 #ifndef PCI_PRODUCT_LSI_SAS1066E
173 #define PCI_PRODUCT_LSI_SAS1066E 0x005A
176 #ifndef PCI_PRODUCT_LSI_SAS1068
177 #define PCI_PRODUCT_LSI_SAS1068 0x0054
180 #ifndef PCI_PRODUCT_LSI_SAS1068E
181 #define PCI_PRODUCT_LSI_SAS1068E 0x0058
184 #ifndef PCI_PRODUCT_LSI_SAS1078
185 #define PCI_PRODUCT_LSI_SAS1078 0x0062
188 #ifndef PCI_PRODUCT_LSI_SAS1078DE
189 #define PCI_PRODUCT_LSI_SAS1078DE 0x007C
192 #ifndef PCIM_CMD_SERRESPEN
193 #define PCIM_CMD_SERRESPEN 0x0100
196 static int mpt_pci_probe(device_t);
197 static int mpt_pci_attach(device_t);
198 static void mpt_free_bus_resources(struct mpt_softc *mpt);
199 static int mpt_pci_detach(device_t);
200 static int mpt_pci_shutdown(device_t);
201 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
202 static void mpt_dma_mem_free(struct mpt_softc *mpt);
203 static void mpt_read_config_regs(struct mpt_softc *mpt);
205 static void mpt_set_config_regs(struct mpt_softc *mpt);
207 static void mpt_pci_intr(void *);
209 static device_method_t mpt_methods[] = {
210 /* Device interface */
211 DEVMETHOD(device_probe, mpt_pci_probe),
212 DEVMETHOD(device_attach, mpt_pci_attach),
213 DEVMETHOD(device_detach, mpt_pci_detach),
214 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
218 static driver_t mpt_driver = {
219 "mpt", mpt_methods, sizeof(struct mpt_softc)
221 static devclass_t mpt_devclass;
222 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
223 MODULE_DEPEND(mpt, pci, 1, 1, 1);
224 MODULE_VERSION(mpt, 1);
227 mpt_pci_probe(device_t dev)
231 if (pci_get_vendor(dev) != PCI_VENDOR_LSI) {
235 switch ((pci_get_device(dev) & ~1)) {
236 case PCI_PRODUCT_LSI_FC909:
237 desc = "LSILogic FC909 FC Adapter";
239 case PCI_PRODUCT_LSI_FC909A:
240 desc = "LSILogic FC909A FC Adapter";
242 case PCI_PRODUCT_LSI_FC919:
243 desc = "LSILogic FC919 FC Adapter";
245 case PCI_PRODUCT_LSI_FC929:
246 desc = "Dual LSILogic FC929 FC Adapter";
248 case PCI_PRODUCT_LSI_FC919X:
249 desc = "LSILogic FC919 FC PCI-X Adapter";
251 case PCI_PRODUCT_LSI_FC929X:
252 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
254 case PCI_PRODUCT_LSI_FC646:
255 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
257 case PCI_PRODUCT_LSI_FC7X04X:
258 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
260 case PCI_PRODUCT_LSI_1030:
261 desc = "LSILogic 1030 Ultra4 Adapter";
263 case PCI_PRODUCT_LSI_SAS1064:
264 case PCI_PRODUCT_LSI_SAS1064A:
265 case PCI_PRODUCT_LSI_SAS1064E:
266 case PCI_PRODUCT_LSI_SAS1066:
267 case PCI_PRODUCT_LSI_SAS1066E:
268 case PCI_PRODUCT_LSI_SAS1068:
269 case PCI_PRODUCT_LSI_SAS1068E:
270 case PCI_PRODUCT_LSI_SAS1078:
271 case PCI_PRODUCT_LSI_SAS1078DE:
272 desc = "LSILogic SAS/SATA Adapter";
278 device_set_desc(dev, desc);
282 #if __FreeBSD_version < 500000
284 mpt_set_options(struct mpt_softc *mpt)
289 if (getenv_int("mpt_disable", &bitmap)) {
290 if (bitmap & (1 << mpt->unit)) {
295 if (getenv_int("mpt_debug", &bitmap)) {
296 if (bitmap & (1 << mpt->unit)) {
297 mpt->verbose = MPT_PRT_DEBUG;
301 if (getenv_int("mpt_debug1", &bitmap)) {
302 if (bitmap & (1 << mpt->unit)) {
303 mpt->verbose = MPT_PRT_DEBUG1;
307 if (getenv_int("mpt_debug2", &bitmap)) {
308 if (bitmap & (1 << mpt->unit)) {
309 mpt->verbose = MPT_PRT_DEBUG2;
313 if (getenv_int("mpt_debug3", &bitmap)) {
314 if (bitmap & (1 << mpt->unit)) {
315 mpt->verbose = MPT_PRT_DEBUG3;
319 mpt->cfg_role = MPT_ROLE_DEFAULT;
321 if (getenv_int("mpt_nil_role", &bitmap)) {
322 if (bitmap & (1 << mpt->unit)) {
325 mpt->do_cfg_role = 1;
328 if (getenv_int("mpt_tgt_role", &bitmap)) {
329 if (bitmap & (1 << mpt->unit)) {
330 mpt->cfg_role |= MPT_ROLE_TARGET;
332 mpt->do_cfg_role = 1;
335 if (getenv_int("mpt_ini_role", &bitmap)) {
336 if (bitmap & (1 << mpt->unit)) {
337 mpt->cfg_role |= MPT_ROLE_INITIATOR;
339 mpt->do_cfg_role = 1;
345 mpt_set_options(struct mpt_softc *mpt)
350 if (resource_int_value(device_get_name(mpt->dev),
351 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
355 if (resource_int_value(device_get_name(mpt->dev),
356 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
360 if (resource_int_value(device_get_name(mpt->dev),
361 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
363 mpt->cfg_role = tval;
364 mpt->do_cfg_role = 1;
370 if (resource_int_value(device_get_name(mpt->dev),
371 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
372 mpt->msi_enable = tval;
378 mpt_link_peer(struct mpt_softc *mpt)
380 struct mpt_softc *mpt2;
382 if (mpt->unit == 0) {
386 * XXX: depends on probe order
388 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
393 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
396 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
401 if (mpt->verbose >= MPT_PRT_DEBUG) {
402 mpt_prt(mpt, "linking with peer (mpt%d)\n",
403 device_get_unit(mpt2->dev));
408 mpt_unlink_peer(struct mpt_softc *mpt)
412 mpt->mpt2->mpt2 = NULL;
417 mpt_pci_attach(device_t dev)
419 struct mpt_softc *mpt;
422 int mpt_io_bar, mpt_mem_bar;
424 /* Allocate the softc structure */
425 mpt = (struct mpt_softc*)device_get_softc(dev);
427 device_printf(dev, "cannot allocate softc\n");
430 memset(mpt, 0, sizeof(struct mpt_softc));
431 switch ((pci_get_device(dev) & ~1)) {
432 case PCI_PRODUCT_LSI_FC909:
433 case PCI_PRODUCT_LSI_FC909A:
434 case PCI_PRODUCT_LSI_FC919:
435 case PCI_PRODUCT_LSI_FC929:
436 case PCI_PRODUCT_LSI_FC919X:
437 case PCI_PRODUCT_LSI_FC646:
438 case PCI_PRODUCT_LSI_FC7X04X:
441 case PCI_PRODUCT_LSI_SAS1064:
442 case PCI_PRODUCT_LSI_SAS1064A:
443 case PCI_PRODUCT_LSI_SAS1064E:
444 case PCI_PRODUCT_LSI_SAS1066:
445 case PCI_PRODUCT_LSI_SAS1066E:
446 case PCI_PRODUCT_LSI_SAS1068:
447 case PCI_PRODUCT_LSI_SAS1068E:
448 case PCI_PRODUCT_LSI_SAS1078:
449 case PCI_PRODUCT_LSI_SAS1078DE:
457 mpt->unit = device_get_unit(dev);
458 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
459 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
460 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
461 mpt->verbose = MPT_PRT_NONE;
462 mpt->role = MPT_ROLE_NONE;
463 mpt->mpt_ini_id = MPT_INI_ID_NONE;
466 mpt->mpt_ini_id = OF_getscsinitid(dev);
468 mpt_set_options(mpt);
469 if (mpt->verbose == MPT_PRT_NONE) {
470 mpt->verbose = MPT_PRT_WARN;
471 /* Print INFO level (if any) if bootverbose is set */
472 mpt->verbose += (bootverbose != 0)? 1 : 0;
474 /* Make sure memory access decoders are enabled */
475 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
476 if ((cmd & PCIM_CMD_MEMEN) == 0) {
477 device_printf(dev, "Memory accesses disabled");
482 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
485 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
486 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
487 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
490 * Make sure we've disabled the ROM.
492 data = pci_read_config(dev, PCIR_BIOS, 4);
493 data &= ~PCIM_BIOS_ENABLE;
494 pci_write_config(dev, PCIR_BIOS, data, 4);
497 * Is this part a dual?
498 * If so, link with our partner (around yet)
500 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
501 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC646 ||
502 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC7X04X ||
503 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
508 * Figure out which are the I/O and MEM Bars
510 data = pci_read_config(dev, PCIR_BAR(0), 4);
511 if (PCI_BAR_IO(data)) {
512 /* BAR0 is IO, BAR1 is memory */
516 /* BAR0 is memory, BAR1 is IO */
522 * Set up register access. PIO mode is required for
523 * certain reset operations (but must be disabled for
524 * some cards otherwise).
526 mpt_io_bar = PCIR_BAR(mpt_io_bar);
527 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
528 &mpt_io_bar, RF_ACTIVE);
529 if (mpt->pci_pio_reg == NULL) {
530 device_printf(dev, "unable to map registers in PIO mode\n");
533 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
534 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
536 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
537 mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
538 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
539 &mpt_mem_bar, RF_ACTIVE);
540 if (mpt->pci_reg == NULL) {
541 device_printf(dev, "Unable to memory map registers.\n");
543 device_printf(dev, "Giving Up.\n");
546 device_printf(dev, "Falling back to PIO mode.\n");
547 mpt->pci_st = mpt->pci_pio_st;
548 mpt->pci_sh = mpt->pci_pio_sh;
550 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
551 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
554 /* Get a handle to the interrupt */
556 if (mpt->msi_enable) {
558 * First try to alloc an MSI-X message. If that
559 * fails, then try to alloc an MSI message instead.
561 if (pci_msix_count(dev) == 1) {
562 mpt->pci_msi_count = 1;
563 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
566 mpt->pci_msi_count = 0;
569 if (iqd == 0 && pci_msi_count(dev) == 1) {
570 mpt->pci_msi_count = 1;
571 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
574 mpt->pci_msi_count = 0;
578 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
579 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
580 if (mpt->pci_irq == NULL) {
581 device_printf(dev, "could not allocate interrupt\n");
587 /* Disable interrupts at the part */
588 mpt_disable_ints(mpt);
590 /* Register the interrupt handler */
591 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
593 device_printf(dev, "could not setup interrupt\n");
597 /* Allocate dma memory */
598 if (mpt_dma_mem_alloc(mpt)) {
599 mpt_prt(mpt, "Could not allocate DMA memory\n");
604 * Save the PCI config register values
606 * Hard resets are known to screw up the BAR for diagnostic
607 * memory accesses (Mem1).
609 * Using Mem1 is known to make the chip stop responding to
610 * configuration space transfers, so we need to save it now
613 mpt_read_config_regs(mpt);
616 * Disable PIO until we need it
619 pci_disable_io(dev, SYS_RES_IOPORT);
622 /* Initialize the hardware */
623 if (mpt->disabled == 0) {
624 if (mpt_attach(mpt) != 0) {
628 mpt_prt(mpt, "device disabled at user request\n");
632 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
633 dev, SHUTDOWN_PRI_DEFAULT);
635 if (mpt->eh == NULL) {
636 mpt_prt(mpt, "shutdown event registration failed\n");
637 (void) mpt_detach(mpt);
643 mpt_dma_mem_free(mpt);
644 mpt_free_bus_resources(mpt);
645 mpt_unlink_peer(mpt);
647 MPT_LOCK_DESTROY(mpt);
650 * but return zero to preserve unit numbering
659 mpt_free_bus_resources(struct mpt_softc *mpt)
663 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
668 bus_release_resource(mpt->dev, SYS_RES_IRQ,
669 rman_get_rid(mpt->pci_irq), mpt->pci_irq);
673 if (mpt->pci_msi_count) {
674 pci_release_msi(mpt->dev);
675 mpt->pci_msi_count = 0;
678 if (mpt->pci_pio_reg) {
679 bus_release_resource(mpt->dev, SYS_RES_IOPORT,
680 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
681 mpt->pci_pio_reg = NULL;
684 bus_release_resource(mpt->dev, SYS_RES_MEMORY,
685 rman_get_rid(mpt->pci_reg), mpt->pci_reg);
688 MPT_LOCK_DESTROY(mpt);
692 * Disconnect ourselves from the system.
695 mpt_pci_detach(device_t dev)
697 struct mpt_softc *mpt;
699 mpt = (struct mpt_softc*)device_get_softc(dev);
702 mpt_disable_ints(mpt);
704 mpt_reset(mpt, /*reinit*/FALSE);
705 mpt_dma_mem_free(mpt);
706 mpt_free_bus_resources(mpt);
707 mpt_raid_free_mem(mpt);
708 if (mpt->eh != NULL) {
709 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
716 * Disable the hardware
719 mpt_pci_shutdown(device_t dev)
721 struct mpt_softc *mpt;
723 mpt = (struct mpt_softc *)device_get_softc(dev);
726 r = mpt_shutdown(mpt);
733 mpt_dma_mem_alloc(struct mpt_softc *mpt)
736 struct mpt_map_info mi;
738 /* Check if we alreay have allocated the reply memory */
739 if (mpt->reply_phys != 0) {
743 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
745 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
746 if (mpt->request_pool == NULL) {
747 mpt_prt(mpt, "cannot allocate request pool\n");
750 memset(mpt->request_pool, 0, len);
752 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
753 if (mpt->request_pool == NULL) {
754 mpt_prt(mpt, "cannot allocate request pool\n");
760 * Create a parent dma tag for this device.
762 * Align at byte boundaries,
763 * Limit to 32-bit addressing for request/reply queues.
765 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
766 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
767 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
768 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
769 /*nsegments*/BUS_SPACE_UNRESTRICTED,
770 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
771 &mpt->parent_dmat) != 0) {
772 mpt_prt(mpt, "cannot create parent dma tag\n");
776 /* Create a child tag for reply buffers */
777 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
778 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
779 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
780 &mpt->reply_dmat) != 0) {
781 mpt_prt(mpt, "cannot create a dma tag for replies\n");
785 /* Allocate some DMA accessible memory for replies */
786 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
787 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
788 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
789 (u_long) (2 * PAGE_SIZE));
796 /* Load and lock it into "bus space" */
797 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
798 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
801 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
805 mpt->reply_phys = mi.phys;
810 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
813 mpt_dma_mem_free(struct mpt_softc *mpt)
816 /* Make sure we aren't double destroying */
817 if (mpt->reply_dmat == 0) {
818 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
822 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
823 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
824 bus_dma_tag_destroy(mpt->reply_dmat);
825 bus_dma_tag_destroy(mpt->parent_dmat);
826 mpt->reply_dmat = NULL;
827 free(mpt->request_pool, M_DEVBUF);
828 mpt->request_pool = NULL;
831 /* Reads modifiable (via PCI transactions) config registers */
833 mpt_read_config_regs(struct mpt_softc *mpt)
836 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
837 mpt->pci_cfg.LatencyTimer_LineSize =
838 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
839 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
840 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
841 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
842 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
843 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
844 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
845 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
846 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
850 /* Sets modifiable config registers */
852 mpt_set_config_regs(struct mpt_softc *mpt)
856 #define MPT_CHECK(reg, offset, size) \
857 val = pci_read_config(mpt->dev, offset, size); \
858 if (mpt->pci_cfg.reg != val) { \
860 "Restoring " #reg " to 0x%X from 0x%X\n", \
861 mpt->pci_cfg.reg, val); \
864 if (mpt->verbose >= MPT_PRT_DEBUG) {
865 MPT_CHECK(Command, PCIR_COMMAND, 2);
866 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
867 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
868 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
869 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
870 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
871 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
872 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
873 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
874 MPT_CHECK(PMCSR, 0x44, 4);
878 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
879 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
880 mpt->pci_cfg.LatencyTimer_LineSize, 2);
881 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
882 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
883 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
884 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
885 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
886 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
887 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
888 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
893 mpt_pci_intr(void *arg)
895 struct mpt_softc *mpt;
897 mpt = (struct mpt_softc *)arg;