2 * PCI specific probe and attach routines for LSI Fusion Adapters
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
101 #include <sys/cdefs.h>
102 __FBSDID("$FreeBSD$");
104 #include <dev/mpt/mpt.h>
105 #include <dev/mpt/mpt_cam.h>
106 #include <dev/mpt/mpt_raid.h>
108 #if __FreeBSD_version < 700000
109 #define pci_msix_count(x) 0
110 #define pci_msi_count(x) 0
111 #define pci_alloc_msi(x, y) 1
112 #define pci_alloc_msix(x, y) 1
113 #define pci_release_msi(x) do { ; } while (0)
117 * XXX it seems no other MPT driver knows about the following chips.
120 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB
121 #define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620
124 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
125 #define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625
128 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
129 #define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623
132 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
133 #define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627
136 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
137 #define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629
140 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
141 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055
144 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
145 #define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059
148 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
149 #define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C
152 #ifndef PCIM_CMD_SERRESPEN
153 #define PCIM_CMD_SERRESPEN 0x0100
156 static int mpt_pci_probe(device_t);
157 static int mpt_pci_attach(device_t);
158 static void mpt_free_bus_resources(struct mpt_softc *mpt);
159 static int mpt_pci_detach(device_t);
160 static int mpt_pci_shutdown(device_t);
161 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
162 static void mpt_dma_mem_free(struct mpt_softc *mpt);
164 static void mpt_read_config_regs(struct mpt_softc *mpt);
165 static void mpt_set_config_regs(struct mpt_softc *mpt);
167 static void mpt_pci_intr(void *);
169 static device_method_t mpt_methods[] = {
170 /* Device interface */
171 DEVMETHOD(device_probe, mpt_pci_probe),
172 DEVMETHOD(device_attach, mpt_pci_attach),
173 DEVMETHOD(device_detach, mpt_pci_detach),
174 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
178 static driver_t mpt_driver = {
179 "mpt", mpt_methods, sizeof(struct mpt_softc)
181 static devclass_t mpt_devclass;
182 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
183 MODULE_DEPEND(mpt, pci, 1, 1, 1);
184 MODULE_VERSION(mpt, 1);
187 mpt_pci_probe(device_t dev)
192 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
195 rval = BUS_PROBE_DEFAULT;
196 switch (pci_get_device(dev)) {
197 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
198 desc = "LSILogic FC909 FC Adapter";
200 case MPI_MANUFACTPAGE_DEVICEID_FC909:
201 desc = "LSILogic FC909A FC Adapter";
203 case MPI_MANUFACTPAGE_DEVICEID_FC919:
204 desc = "LSILogic FC919 FC Adapter";
206 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
207 desc = "LSILogic FC919 LAN Adapter";
209 case MPI_MANUFACTPAGE_DEVICEID_FC929:
210 desc = "Dual LSILogic FC929 FC Adapter";
212 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
213 desc = "Dual LSILogic FC929 LAN Adapter";
215 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
216 desc = "LSILogic FC919 FC PCI-X Adapter";
218 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
219 desc = "LSILogic FC919 LAN PCI-X Adapter";
221 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
222 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
224 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
225 desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
227 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
228 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
230 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
231 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
233 case MPI_MANUFACTPAGE_DEVID_53C1030:
234 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
235 desc = "LSILogic 1030 Ultra4 Adapter";
237 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
239 * Allow mfi(4) to claim this device in case it's in MegaRAID
242 rval = BUS_PROBE_LOW_PRIORITY;
244 case MPI_MANUFACTPAGE_DEVID_SAS1064:
245 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
246 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
247 case MPI_MANUFACTPAGE_DEVID_SAS1066:
248 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
249 case MPI_MANUFACTPAGE_DEVID_SAS1068:
250 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
251 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
252 case MPI_MANUFACTPAGE_DEVID_SAS1078:
253 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
254 desc = "LSILogic SAS/SATA Adapter";
260 device_set_desc(dev, desc);
265 mpt_set_options(struct mpt_softc *mpt)
270 if (resource_int_value(device_get_name(mpt->dev),
271 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
275 if (resource_int_value(device_get_name(mpt->dev),
276 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
280 if (resource_int_value(device_get_name(mpt->dev),
281 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
283 mpt->cfg_role = tval;
284 mpt->do_cfg_role = 1;
290 if (resource_int_value(device_get_name(mpt->dev),
291 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
292 mpt->msi_enable = tval;
297 mpt_link_peer(struct mpt_softc *mpt)
299 struct mpt_softc *mpt2;
301 if (mpt->unit == 0) {
305 * XXX: depends on probe order
307 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
312 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
315 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
320 if (mpt->verbose >= MPT_PRT_DEBUG) {
321 mpt_prt(mpt, "linking with peer (mpt%d)\n",
322 device_get_unit(mpt2->dev));
327 mpt_unlink_peer(struct mpt_softc *mpt)
331 mpt->mpt2->mpt2 = NULL;
336 mpt_pci_attach(device_t dev)
338 struct mpt_softc *mpt;
341 int mpt_io_bar, mpt_mem_bar;
343 mpt = (struct mpt_softc*)device_get_softc(dev);
345 switch (pci_get_device(dev)) {
346 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
347 case MPI_MANUFACTPAGE_DEVICEID_FC909:
348 case MPI_MANUFACTPAGE_DEVICEID_FC919:
349 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
350 case MPI_MANUFACTPAGE_DEVICEID_FC929:
351 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
352 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
353 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
354 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
355 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
356 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
357 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
360 case MPI_MANUFACTPAGE_DEVID_SAS1078:
361 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
364 case MPI_MANUFACTPAGE_DEVID_SAS1064:
365 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
366 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
367 case MPI_MANUFACTPAGE_DEVID_SAS1066:
368 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
369 case MPI_MANUFACTPAGE_DEVID_SAS1068:
370 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
371 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
372 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
380 mpt->unit = device_get_unit(dev);
381 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
382 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
383 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
384 mpt->verbose = MPT_PRT_NONE;
385 mpt->role = MPT_ROLE_NONE;
386 mpt->mpt_ini_id = MPT_INI_ID_NONE;
389 mpt->mpt_ini_id = OF_getscsinitid(dev);
391 mpt_set_options(mpt);
392 if (mpt->verbose == MPT_PRT_NONE) {
393 mpt->verbose = MPT_PRT_WARN;
394 /* Print INFO level (if any) if bootverbose is set */
395 mpt->verbose += (bootverbose != 0)? 1 : 0;
397 /* Make sure memory access decoders are enabled */
398 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
399 if ((cmd & PCIM_CMD_MEMEN) == 0) {
400 device_printf(dev, "Memory accesses disabled");
405 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
408 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
409 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
410 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
413 * Make sure we've disabled the ROM.
415 data = pci_read_config(dev, PCIR_BIOS, 4);
417 pci_write_config(dev, PCIR_BIOS, data, 4);
420 * Is this part a dual?
421 * If so, link with our partner (around yet)
423 switch (pci_get_device(dev)) {
424 case MPI_MANUFACTPAGE_DEVICEID_FC929:
425 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
426 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
427 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
428 case MPI_MANUFACTPAGE_DEVID_53C1030:
429 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
437 * Figure out which are the I/O and MEM Bars
439 data = pci_read_config(dev, PCIR_BAR(0), 4);
440 if (PCI_BAR_IO(data)) {
441 /* BAR0 is IO, BAR1 is memory */
445 /* BAR0 is memory, BAR1 is IO */
451 * Set up register access. PIO mode is required for
452 * certain reset operations (but must be disabled for
453 * some cards otherwise).
455 mpt_io_bar = PCIR_BAR(mpt_io_bar);
456 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
457 &mpt_io_bar, RF_ACTIVE);
458 if (mpt->pci_pio_reg == NULL) {
461 "unable to map registers in PIO mode\n");
464 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
465 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
468 mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
469 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
470 &mpt_mem_bar, RF_ACTIVE);
471 if (mpt->pci_reg == NULL) {
472 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
474 "Unable to memory map registers.\n");
476 if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
477 device_printf(dev, "Giving Up.\n");
481 device_printf(dev, "Falling back to PIO mode.\n");
483 mpt->pci_st = mpt->pci_pio_st;
484 mpt->pci_sh = mpt->pci_pio_sh;
486 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
487 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
490 /* Get a handle to the interrupt */
492 if (mpt->msi_enable) {
494 * First try to alloc an MSI-X message. If that
495 * fails, then try to alloc an MSI message instead.
497 if (pci_msix_count(dev) == 1) {
498 mpt->pci_msi_count = 1;
499 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
502 mpt->pci_msi_count = 0;
505 if (iqd == 0 && pci_msi_count(dev) == 1) {
506 mpt->pci_msi_count = 1;
507 if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
510 mpt->pci_msi_count = 0;
514 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
515 RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
516 if (mpt->pci_irq == NULL) {
517 device_printf(dev, "could not allocate interrupt\n");
523 /* Disable interrupts at the part */
524 mpt_disable_ints(mpt);
526 /* Register the interrupt handler */
527 if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
529 device_printf(dev, "could not setup interrupt\n");
533 /* Allocate dma memory */
534 if (mpt_dma_mem_alloc(mpt)) {
535 mpt_prt(mpt, "Could not allocate DMA memory\n");
541 * Save the PCI config register values
543 * Hard resets are known to screw up the BAR for diagnostic
544 * memory accesses (Mem1).
546 * Using Mem1 is known to make the chip stop responding to
547 * configuration space transfers, so we need to save it now
550 mpt_read_config_regs(mpt);
554 * Disable PIO until we need it
557 pci_disable_io(dev, SYS_RES_IOPORT);
560 /* Initialize the hardware */
561 if (mpt->disabled == 0) {
562 if (mpt_attach(mpt) != 0) {
566 mpt_prt(mpt, "device disabled at user request\n");
570 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
571 dev, SHUTDOWN_PRI_DEFAULT);
573 if (mpt->eh == NULL) {
574 mpt_prt(mpt, "shutdown event registration failed\n");
575 (void) mpt_detach(mpt);
581 mpt_dma_mem_free(mpt);
582 mpt_free_bus_resources(mpt);
583 mpt_unlink_peer(mpt);
585 MPT_LOCK_DESTROY(mpt);
588 * but return zero to preserve unit numbering
597 mpt_free_bus_resources(struct mpt_softc *mpt)
601 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
606 bus_release_resource(mpt->dev, SYS_RES_IRQ,
607 rman_get_rid(mpt->pci_irq), mpt->pci_irq);
611 if (mpt->pci_msi_count) {
612 pci_release_msi(mpt->dev);
613 mpt->pci_msi_count = 0;
616 if (mpt->pci_pio_reg) {
617 bus_release_resource(mpt->dev, SYS_RES_IOPORT,
618 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
619 mpt->pci_pio_reg = NULL;
622 bus_release_resource(mpt->dev, SYS_RES_MEMORY,
623 rman_get_rid(mpt->pci_reg), mpt->pci_reg);
626 MPT_LOCK_DESTROY(mpt);
630 * Disconnect ourselves from the system.
633 mpt_pci_detach(device_t dev)
635 struct mpt_softc *mpt;
637 mpt = (struct mpt_softc*)device_get_softc(dev);
640 mpt_disable_ints(mpt);
642 mpt_reset(mpt, /*reinit*/FALSE);
643 mpt_dma_mem_free(mpt);
644 mpt_free_bus_resources(mpt);
645 mpt_raid_free_mem(mpt);
646 if (mpt->eh != NULL) {
647 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
654 * Disable the hardware
657 mpt_pci_shutdown(device_t dev)
659 struct mpt_softc *mpt;
661 mpt = (struct mpt_softc *)device_get_softc(dev);
664 r = mpt_shutdown(mpt);
671 mpt_dma_mem_alloc(struct mpt_softc *mpt)
674 struct mpt_map_info mi;
676 /* Check if we alreay have allocated the reply memory */
677 if (mpt->reply_phys != 0) {
681 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
683 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK);
684 if (mpt->request_pool == NULL) {
685 mpt_prt(mpt, "cannot allocate request pool\n");
688 memset(mpt->request_pool, 0, len);
690 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
691 if (mpt->request_pool == NULL) {
692 mpt_prt(mpt, "cannot allocate request pool\n");
698 * Create a parent dma tag for this device.
700 * Align at byte boundaries,
701 * Limit to 32-bit addressing for request/reply queues.
703 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
704 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
705 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
706 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
707 /*nsegments*/BUS_SPACE_UNRESTRICTED,
708 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
709 &mpt->parent_dmat) != 0) {
710 mpt_prt(mpt, "cannot create parent dma tag\n");
714 /* Create a child tag for reply buffers */
715 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
716 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
717 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
718 &mpt->reply_dmat) != 0) {
719 mpt_prt(mpt, "cannot create a dma tag for replies\n");
723 /* Allocate some DMA accessible memory for replies */
724 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
725 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
726 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
727 (u_long) (2 * PAGE_SIZE));
734 /* Load and lock it into "bus space" */
735 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
736 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
739 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
743 mpt->reply_phys = mi.phys;
748 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
751 mpt_dma_mem_free(struct mpt_softc *mpt)
754 /* Make sure we aren't double destroying */
755 if (mpt->reply_dmat == 0) {
756 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
760 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
761 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
762 bus_dma_tag_destroy(mpt->reply_dmat);
763 bus_dma_tag_destroy(mpt->parent_dmat);
764 mpt->reply_dmat = NULL;
765 free(mpt->request_pool, M_DEVBUF);
766 mpt->request_pool = NULL;
770 /* Reads modifiable (via PCI transactions) config registers */
772 mpt_read_config_regs(struct mpt_softc *mpt)
775 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
776 mpt->pci_cfg.LatencyTimer_LineSize =
777 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
778 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
779 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
780 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
781 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
782 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
783 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
784 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
785 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
788 /* Sets modifiable config registers */
790 mpt_set_config_regs(struct mpt_softc *mpt)
794 #define MPT_CHECK(reg, offset, size) \
795 val = pci_read_config(mpt->dev, offset, size); \
796 if (mpt->pci_cfg.reg != val) { \
798 "Restoring " #reg " to 0x%X from 0x%X\n", \
799 mpt->pci_cfg.reg, val); \
802 if (mpt->verbose >= MPT_PRT_DEBUG) {
803 MPT_CHECK(Command, PCIR_COMMAND, 2);
804 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
805 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
806 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
807 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
808 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
809 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
810 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
811 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
812 MPT_CHECK(PMCSR, 0x44, 4);
816 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
817 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
818 mpt->pci_cfg.LatencyTimer_LineSize, 2);
819 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
820 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
821 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
822 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
823 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
824 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
825 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
826 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
831 mpt_pci_intr(void *arg)
833 struct mpt_softc *mpt;
835 mpt = (struct mpt_softc *)arg;