2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>.
3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $
30 * NVIDIA nForce MCP Networking Adapter driver
32 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA
33 * through their web site.
35 * All mainstream nForce and nForce2 motherboards are supported. This module
36 * is as stable, sometimes more stable, than the linux version. (Recent
37 * Linux stability issues seem to be related to some issues with newer
38 * distributions using GCC 3.x, however this don't appear to effect FreeBSD
41 * In accordance with the NVIDIA distribution license it is necessary to
42 * link this module against the nvlibnet.o binary object included in the
43 * Linux driver source distribution. The binary component is not modified in
44 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c
45 * linux kernel module "wrapper".
47 * The Linux driver uses a common code API that is shared between Win32 and
48 * i386 Linux. This abstracts the low level driver functions and uses
49 * callbacks and hooks to access the underlying hardware device. By using
50 * this same API in a FreeBSD kernel module it is possible to support the
51 * hardware without breaching the Linux source distributions licensing
52 * requirements, or obtaining the hardware programming specifications.
54 * Although not conventional, it works, and given the relatively small
55 * amount of hardware centric code, it's hopefully no more buggy than its
58 * NVIDIA now support the nForce3 AMD64 platform, however I have been
59 * unable to access such a system to verify support. However, the code is
60 * reported to work with little modification when compiled with the AMD64
61 * version of the NVIDIA Linux library. All that should be necessary to make
62 * the driver work is to link it directly into the kernel, instead of as a
63 * module, and apply the docs/amd64.diff patch in this source distribution to
64 * the NVIDIA Linux driver source.
66 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well
67 * as recent versions of DragonFly.
69 * Written by Quinton Dolan <q@onthenet.com.au>
70 * Portions based on existing FreeBSD network drivers.
71 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files.
74 #include <sys/cdefs.h>
75 __FBSDID("$FreeBSD$");
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/sockio.h>
81 #include <sys/malloc.h>
82 #include <sys/kernel.h>
83 #include <sys/socket.h>
84 #include <sys/sysctl.h>
85 #include <sys/queue.h>
86 #include <sys/module.h>
89 #include <net/if_arp.h>
90 #include <net/ethernet.h>
91 #include <net/if_dl.h>
92 #include <net/if_media.h>
93 #include <net/if_types.h>
95 #include <net/if_vlan_var.h>
97 #include <machine/bus.h>
98 #include <machine/resource.h>
100 #include <vm/vm.h> /* for vtophys */
101 #include <vm/pmap.h> /* for vtophys */
103 #include <sys/rman.h>
105 #include <dev/pci/pcireg.h>
106 #include <dev/pci/pcivar.h>
107 #include <dev/mii/mii.h>
108 #include <dev/mii/miivar.h>
109 #include "miibus_if.h"
111 /* Include NVIDIA Linux driver header files */
112 #include <contrib/dev/nve/nvenet_version.h>
114 #include <contrib/dev/nve/basetype.h>
115 #include <contrib/dev/nve/phy.h>
116 #include "os+%DIKED-nve.h"
117 #include <contrib/dev/nve/drvinfo.h>
118 #include <contrib/dev/nve/adapter.h>
121 #include <dev/nve/if_nvereg.h>
123 MODULE_DEPEND(nve, pci, 1, 1, 1);
124 MODULE_DEPEND(nve, ether, 1, 1, 1);
125 MODULE_DEPEND(nve, miibus, 1, 1, 1);
127 static int nve_probe(device_t);
128 static int nve_attach(device_t);
129 static int nve_detach(device_t);
130 static void nve_init(void *);
131 static void nve_init_locked(struct nve_softc *);
132 static void nve_stop(struct nve_softc *);
133 static int nve_shutdown(device_t);
134 static int nve_init_rings(struct nve_softc *);
135 static void nve_free_rings(struct nve_softc *);
137 static void nve_ifstart(struct ifnet *);
138 static void nve_ifstart_locked(struct ifnet *);
139 static int nve_ioctl(struct ifnet *, u_long, caddr_t);
140 static void nve_intr(void *);
141 static void nve_tick(void *);
142 static void nve_setmulti(struct nve_softc *);
143 static void nve_watchdog(struct nve_softc *);
144 static void nve_update_stats(struct nve_softc *);
146 static int nve_ifmedia_upd(struct ifnet *);
147 static void nve_ifmedia_upd_locked(struct ifnet *);
148 static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *);
149 static int nve_miibus_readreg(device_t, int, int);
150 static int nve_miibus_writereg(device_t, int, int, int);
152 static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int);
153 static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int);
155 static NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK);
156 static NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK);
157 static NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX);
158 static NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX);
159 static NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32);
160 static NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32);
161 static NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *);
162 static NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID);
163 static NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32);
164 static NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8);
165 static NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32);
166 static NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *);
167 static NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID);
168 static NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID);
169 static NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32);
170 static NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID);
172 static NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8);
173 static PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID);
174 static NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32);
175 static NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *);
176 static NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID);
177 static NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID);
178 static PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID);
180 static device_method_t nve_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, nve_probe),
183 DEVMETHOD(device_attach, nve_attach),
184 DEVMETHOD(device_detach, nve_detach),
185 DEVMETHOD(device_shutdown, nve_shutdown),
188 DEVMETHOD(miibus_readreg, nve_miibus_readreg),
189 DEVMETHOD(miibus_writereg, nve_miibus_writereg),
194 static driver_t nve_driver = {
197 sizeof(struct nve_softc)
200 static devclass_t nve_devclass;
202 static int nve_pollinterval = 0;
203 SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW,
204 &nve_pollinterval, 0, "delay between interface polls");
206 DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0);
207 DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0);
209 static struct nve_type nve_devs[] = {
210 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN,
211 "NVIDIA nForce MCP Networking Adapter"},
212 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN,
213 "NVIDIA nForce2 MCP2 Networking Adapter"},
214 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1,
215 "NVIDIA nForce2 400 MCP4 Networking Adapter"},
216 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2,
217 "NVIDIA nForce2 400 MCP5 Networking Adapter"},
218 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1,
219 "NVIDIA nForce3 MCP3 Networking Adapter"},
220 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN,
221 "NVIDIA nForce3 250 MCP6 Networking Adapter"},
222 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4,
223 "NVIDIA nForce3 MCP7 Networking Adapter"},
224 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN1,
225 "NVIDIA nForce4 CK804 MCP8 Networking Adapter"},
226 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN2,
227 "NVIDIA nForce4 CK804 MCP9 Networking Adapter"},
228 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1,
229 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP10
230 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2,
231 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP11
232 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN1,
233 "NVIDIA nForce 430 MCP12 Networking Adapter"},
234 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN2,
235 "NVIDIA nForce 430 MCP13 Networking Adapter"},
236 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1,
237 "NVIDIA nForce MCP55 Networking Adapter"},
238 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2,
239 "NVIDIA nForce MCP55 Networking Adapter"},
240 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN1,
241 "NVIDIA nForce MCP61 Networking Adapter"},
242 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN2,
243 "NVIDIA nForce MCP61 Networking Adapter"},
244 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN3,
245 "NVIDIA nForce MCP61 Networking Adapter"},
246 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN4,
247 "NVIDIA nForce MCP61 Networking Adapter"},
248 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN1,
249 "NVIDIA nForce MCP65 Networking Adapter"},
250 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN2,
251 "NVIDIA nForce MCP65 Networking Adapter"},
252 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN3,
253 "NVIDIA nForce MCP65 Networking Adapter"},
254 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN4,
255 "NVIDIA nForce MCP65 Networking Adapter"},
259 /* DMA MEM map callback function to get data segment physical address */
261 nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error)
267 ("Too many DMA segments returned when mapping DMA memory"));
268 *(bus_addr_t *)arg = segs->ds_addr;
271 /* DMA RX map callback function to get data segment physical address */
273 nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs,
274 bus_size_t mapsize, int error)
278 *(bus_addr_t *)arg = segs->ds_addr;
282 * DMA TX buffer callback function to allocate fragment data segment
286 nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error)
288 struct nve_tx_desc *info;
293 KASSERT(nsegs < NV_MAX_FRAGS,
294 ("Too many DMA segments returned when mapping mbuf"));
295 info->numfrags = nsegs;
296 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t));
299 /* Probe for supported hardware ID's */
301 nve_probe(device_t dev)
306 /* Check for matching PCI DEVICE ID's */
307 while (t->name != NULL) {
308 if ((pci_get_vendor(dev) == t->vid_id) &&
309 (pci_get_device(dev) == t->dev_id)) {
310 device_set_desc(dev, t->name);
311 return (BUS_PROBE_LOW_PRIORITY);
319 /* Attach driver and initialise hardware for use */
321 nve_attach(device_t dev)
323 u_char eaddr[ETHER_ADDR_LEN];
324 struct nve_softc *sc;
327 ADAPTER_OPEN_PARAMS OpenParams;
328 int error = 0, i, rid;
331 device_printf(dev, "nvenetlib.o version %s\n", DRIVER_VERSION);
333 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n");
335 sc = device_get_softc(dev);
338 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
340 callout_init_mtx(&sc->stat_callout, &sc->mtx, 0);
344 /* Preinitialize data structures */
345 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS));
347 /* Enable bus mastering */
348 pci_enable_busmaster(dev);
350 /* Allocate memory mapped address space */
352 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1,
355 if (sc->res == NULL) {
356 device_printf(dev, "couldn't map memory\n");
360 sc->sc_st = rman_get_bustag(sc->res);
361 sc->sc_sh = rman_get_bushandle(sc->res);
363 /* Allocate interrupt */
365 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
366 RF_SHAREABLE | RF_ACTIVE);
368 if (sc->irq == NULL) {
369 device_printf(dev, "couldn't map interrupt\n");
373 /* Allocate DMA tags */
374 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
375 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS,
376 NV_MAX_FRAGS, MCLBYTES, 0,
377 busdma_lock_mutex, &Giant,
380 device_printf(dev, "couldn't allocate dma tag\n");
383 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
384 BUS_SPACE_MAXADDR, NULL, NULL,
385 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1,
386 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0,
387 busdma_lock_mutex, &Giant,
390 device_printf(dev, "couldn't allocate dma tag\n");
393 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT,
394 BUS_SPACE_MAXADDR, NULL, NULL,
395 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1,
396 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0,
397 busdma_lock_mutex, &Giant,
400 device_printf(dev, "couldn't allocate dma tag\n");
403 /* Allocate DMA safe memory and get the DMA addresses. */
404 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc,
405 BUS_DMA_WAITOK, &sc->tmap);
407 device_printf(dev, "couldn't allocate dma memory\n");
410 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE);
411 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc,
412 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb,
415 device_printf(dev, "couldn't map dma memory\n");
418 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc,
419 BUS_DMA_WAITOK, &sc->rmap);
421 device_printf(dev, "couldn't allocate dma memory\n");
424 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE);
425 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc,
426 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb,
429 device_printf(dev, "couldn't map dma memory\n");
432 /* Initialize rings. */
433 if (nve_init_rings(sc)) {
434 device_printf(dev, "failed to init rings\n");
438 /* Setup NVIDIA API callback routines */
441 osapi->pfnAllocMemory = nve_osalloc;
442 osapi->pfnFreeMemory = nve_osfree;
443 osapi->pfnAllocMemoryEx = nve_osallocex;
444 osapi->pfnFreeMemoryEx = nve_osfreeex;
445 osapi->pfnClearMemory = nve_osclear;
446 osapi->pfnStallExecution = nve_osdelay;
447 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf;
448 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf;
449 osapi->pfnPacketWasSent = nve_ospackettx;
450 osapi->pfnPacketWasReceived = nve_ospacketrx;
451 osapi->pfnLinkStateHasChanged = nve_oslinkchg;
452 osapi->pfnAllocTimer = nve_osalloctimer;
453 osapi->pfnFreeTimer = nve_osfreetimer;
454 osapi->pfnInitializeTimer = nve_osinittimer;
455 osapi->pfnSetTimer = nve_ossettimer;
456 osapi->pfnCancelTimer = nve_oscanceltimer;
457 osapi->pfnPreprocessPacket = nve_ospreprocpkt;
458 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq;
459 osapi->pfnIndicatePackets = nve_osindicatepkt;
460 osapi->pfnLockAlloc = nve_oslockalloc;
461 osapi->pfnLockAcquire = nve_oslockacquire;
462 osapi->pfnLockRelease = nve_oslockrelease;
463 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt;
466 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN;
468 /* TODO - We don't support hardware offload yet */
472 /* Set NVIDIA API startup parameters */
473 OpenParams.MaxDpcLoop = 2;
474 OpenParams.MaxRxPkt = RX_RING_SIZE;
475 OpenParams.MaxTxPkt = TX_RING_SIZE;
476 OpenParams.SentPacketStatusSuccess = 1;
477 OpenParams.SentPacketStatusFailure = 0;
478 OpenParams.MaxRxPktToAccumulate = 6;
479 OpenParams.ulPollInterval = nve_pollinterval;
480 OpenParams.SetForcedModeEveryNthRxPacket = 0;
481 OpenParams.SetForcedModeEveryNthTxPacket = 0;
482 OpenParams.RxForcedInterrupt = 0;
483 OpenParams.TxForcedInterrupt = 0;
484 OpenParams.pOSApi = osapi;
485 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res);
486 OpenParams.bASFEnabled = 0;
487 OpenParams.ulDescriptorVersion = sc->hwmode;
488 OpenParams.ulMaxPacketSize = sc->max_frame_size;
489 OpenParams.DeviceId = pci_get_device(dev);
491 /* Open NVIDIA Hardware API */
492 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr);
495 "failed to open NVIDIA Hardware API: 0x%x\n", error);
499 /* TODO - Add support for MODE2 hardware offload */
501 bzero(&sc->adapterdata, sizeof(sc->adapterdata));
503 sc->adapterdata.ulMediaIF = sc->media;
504 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1;
505 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata);
507 /* MAC is loaded backwards into h/w reg */
508 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr);
509 for (i = 0; i < 6; i++) {
510 eaddr[i] = sc->original_mac_addr[5 - i];
512 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr);
514 /* Display ethernet address ,... */
515 device_printf(dev, "Ethernet address %6D\n", eaddr, ":");
517 /* Allocate interface structures */
518 ifp = sc->ifp = if_alloc(IFT_ETHER);
520 device_printf(dev, "can not if_alloc()\n");
525 /* Setup interface parameters */
527 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
528 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
529 ifp->if_ioctl = nve_ioctl;
530 ifp->if_start = nve_ifstart;
531 ifp->if_init = nve_init;
532 ifp->if_mtu = ETHERMTU;
533 ifp->if_baudrate = IF_Mbps(100);
534 IFQ_SET_MAXLEN(&ifp->if_snd, TX_RING_SIZE - 1);
535 ifp->if_snd.ifq_drv_maxlen = TX_RING_SIZE - 1;
536 IFQ_SET_READY(&ifp->if_snd);
537 ifp->if_capabilities |= IFCAP_VLAN_MTU;
538 ifp->if_capenable |= IFCAP_VLAN_MTU;
540 /* Attach device for MII interface to PHY */
541 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_attach\n");
542 error = mii_attach(dev, &sc->miibus, ifp, nve_ifmedia_upd,
543 nve_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
545 device_printf(dev, "attaching PHYs failed\n");
549 /* Attach to OS's managers. */
550 ether_ifattach(ifp, eaddr);
552 /* Activate our interrupt handler. - attach last to avoid lock */
553 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
554 NULL, nve_intr, sc, &sc->sc_ih);
556 device_printf(dev, "couldn't set up interrupt handler\n");
559 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n");
568 /* Detach interface for module unload */
570 nve_detach(device_t dev)
572 struct nve_softc *sc = device_get_softc(dev);
575 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized"));
577 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n");
581 if (device_is_attached(dev)) {
586 callout_drain(&sc->stat_callout);
590 device_delete_child(dev, sc->miibus);
591 bus_generic_detach(dev);
593 /* Reload unreversed address back into MAC in original state */
594 if (sc->original_mac_addr)
595 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX,
596 sc->original_mac_addr);
598 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n");
599 /* Detach from NVIDIA hardware API */
600 if (sc->hwapi->pfnClose)
601 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE);
602 /* Release resources */
604 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih);
606 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
608 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res);
613 bus_dmamap_unload(sc->rtag, sc->rmap);
614 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap);
615 bus_dmamap_destroy(sc->rtag, sc->rmap);
618 bus_dma_tag_destroy(sc->mtag);
620 bus_dma_tag_destroy(sc->ttag);
622 bus_dma_tag_destroy(sc->rtag);
626 mtx_destroy(&sc->mtx);
628 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n");
633 /* Initialise interface and start it "RUNNING" */
637 struct nve_softc *sc = xsc;
645 nve_init_locked(struct nve_softc *sc)
651 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup);
655 /* Do nothing if already running */
656 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
660 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n");
662 nve_ifmedia_upd_locked(ifp);
664 /* Setup Hardware interface and allocate memory structures */
665 error = sc->hwapi->pfnInit(sc->hwapi->pADCX,
667 0, /* force full duplex */
669 0, /* force async mode */
673 device_printf(sc->dev,
674 "failed to start NVIDIA Hardware interface\n");
677 /* Set the MAC address */
678 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, IF_LLADDR(sc->ifp));
679 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
680 sc->hwapi->pfnStart(sc->hwapi->pADCX);
682 /* Setup multicast filter */
685 /* Update interface parameters */
686 ifp->if_drv_flags |= IFF_DRV_RUNNING;
687 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
689 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
691 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n");
696 /* Stop interface activity ie. not "RUNNING" */
698 nve_stop(struct nve_softc *sc)
704 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n");
709 /* Cancel tick timer */
710 callout_stop(&sc->stat_callout);
712 /* Stop hardware activity */
713 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
714 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0);
716 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n");
717 /* Shutdown interface and deallocate memory buffers */
718 if (sc->hwapi->pfnDeinit)
719 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0);
726 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
728 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n");
733 /* Shutdown interface for unload/reboot */
735 nve_shutdown(device_t dev)
737 struct nve_softc *sc;
739 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n");
741 sc = device_get_softc(dev);
743 /* Stop hardware activity */
751 /* Allocate TX ring buffers */
753 nve_init_rings(struct nve_softc *sc)
757 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n");
759 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0;
760 /* Initialise RX ring */
761 for (i = 0; i < RX_RING_SIZE; i++) {
762 struct nve_rx_desc *desc = sc->rx_desc + i;
763 struct nve_map_buffer *buf = &desc->buf;
765 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
766 if (buf->mbuf == NULL) {
767 device_printf(sc->dev, "couldn't allocate mbuf\n");
771 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
772 m_adj(buf->mbuf, ETHER_ALIGN);
774 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
776 device_printf(sc->dev, "couldn't create dma map\n");
780 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
781 nve_dmamap_rx_cb, &desc->paddr, 0);
783 device_printf(sc->dev, "couldn't dma map mbuf\n");
787 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
789 desc->buflength = buf->mbuf->m_len;
790 desc->vaddr = mtod(buf->mbuf, caddr_t);
792 bus_dmamap_sync(sc->rtag, sc->rmap,
793 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
795 /* Initialize TX ring */
796 for (i = 0; i < TX_RING_SIZE; i++) {
797 struct nve_tx_desc *desc = sc->tx_desc + i;
798 struct nve_map_buffer *buf = &desc->buf;
802 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
804 device_printf(sc->dev, "couldn't create dma map\n");
809 bus_dmamap_sync(sc->ttag, sc->tmap,
810 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
812 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n");
817 /* Free the TX ring buffers */
819 nve_free_rings(struct nve_softc *sc)
823 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n");
825 for (i = 0; i < RX_RING_SIZE; i++) {
826 struct nve_rx_desc *desc = sc->rx_desc + i;
827 struct nve_map_buffer *buf = &desc->buf;
830 bus_dmamap_unload(sc->mtag, buf->map);
831 bus_dmamap_destroy(sc->mtag, buf->map);
837 for (i = 0; i < TX_RING_SIZE; i++) {
838 struct nve_tx_desc *desc = sc->tx_desc + i;
839 struct nve_map_buffer *buf = &desc->buf;
842 bus_dmamap_unload(sc->mtag, buf->map);
843 bus_dmamap_destroy(sc->mtag, buf->map);
849 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n");
852 /* Main loop for sending packets from OS to interface */
854 nve_ifstart(struct ifnet *ifp)
856 struct nve_softc *sc = ifp->if_softc;
859 nve_ifstart_locked(ifp);
864 nve_ifstart_locked(struct ifnet *ifp)
866 struct nve_softc *sc = ifp->if_softc;
867 struct nve_map_buffer *buf;
869 struct nve_tx_desc *desc;
870 ADAPTER_WRITE_DATA txdata;
873 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n");
877 /* If link is down/busy or queue is empty do nothing */
878 if (ifp->if_drv_flags & IFF_DRV_OACTIVE ||
879 IFQ_DRV_IS_EMPTY(&ifp->if_snd))
882 /* Transmit queued packets until sent or TX ring is full */
883 while (sc->pending_txs < TX_RING_SIZE) {
884 desc = sc->tx_desc + sc->cur_tx;
887 /* Get next packet to send. */
888 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
890 /* If nothing to send, return. */
895 * On nForce4, the chip doesn't interrupt on transmit,
896 * so try to flush transmitted packets from the queue
897 * if it's getting large (see note in nve_watchdog).
899 if (sc->pending_txs > TX_RING_SIZE/2) {
900 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
901 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
902 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
905 /* Map MBUF for DMA access */
906 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0,
907 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
909 if (error && error != EFBIG) {
915 * Packet has too many fragments - defrag into new mbuf
919 m = m_defrag(m0, M_DONTWAIT);
927 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m,
928 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
935 /* Do sync on DMA bounce buffer */
936 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE);
939 txdata.ulNumberOfElements = desc->numfrags;
940 txdata.pvID = (PVOID)desc;
942 /* Put fragments into API element list */
943 txdata.ulTotalLength = buf->mbuf->m_len;
944 for (i = 0; i < desc->numfrags; i++) {
945 txdata.sElement[i].ulLength =
946 (ulong)desc->frags[i].ds_len;
947 txdata.sElement[i].pPhysical =
948 (PVOID)desc->frags[i].ds_addr;
951 /* Send packet to Nvidia API for transmission */
952 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata);
955 case ADAPTERERR_NONE:
956 /* Packet was queued in API TX queue successfully */
958 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE;
961 case ADAPTERERR_TRANSMIT_QUEUE_FULL:
962 /* The API TX queue is full - requeue the packet */
963 device_printf(sc->dev,
964 "nve_ifstart: transmit queue is full\n");
965 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
966 bus_dmamap_unload(sc->mtag, buf->map);
967 IFQ_DRV_PREPEND(&ifp->if_snd, buf->mbuf);
972 /* The API failed to queue/send the packet so dump it */
973 device_printf(sc->dev, "nve_ifstart: transmit error\n");
974 bus_dmamap_unload(sc->mtag, buf->map);
980 /* Set watchdog timer. */
983 /* Copy packet to BPF tap */
986 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
988 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n");
991 /* Handle IOCTL events */
993 nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
995 struct nve_softc *sc = ifp->if_softc;
996 struct ifreq *ifr = (struct ifreq *) data;
997 struct mii_data *mii;
1000 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n");
1006 if (ifp->if_mtu == ifr->ifr_mtu) {
1010 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) {
1011 ifp->if_mtu = ifr->ifr_mtu;
1013 nve_init_locked(sc);
1020 /* Setup interface flags */
1022 if (ifp->if_flags & IFF_UP) {
1023 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1024 nve_init_locked(sc);
1029 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1035 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
1042 /* Setup multicast filter */
1044 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1052 /* Get/Set interface media parameters */
1053 mii = device_get_softc(sc->miibus);
1054 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1058 /* Everything else we forward to generic ether ioctl */
1059 error = ether_ioctl(ifp, command, data);
1063 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n");
1068 /* Interrupt service routine */
1072 struct nve_softc *sc = arg;
1073 struct ifnet *ifp = sc->ifp;
1075 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n");
1078 if (!ifp->if_flags & IFF_UP) {
1083 /* Handle interrupt event */
1084 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) {
1085 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1086 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1088 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1089 nve_ifstart_locked(ifp);
1091 /* If no pending packets we don't need a timeout */
1092 if (sc->pending_txs == 0)
1096 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n");
1101 /* Setup multicast filters */
1103 nve_setmulti(struct nve_softc *sc)
1106 struct ifmultiaddr *ifma;
1107 PACKET_FILTER hwfilter;
1109 u_int8_t andaddr[6], oraddr[6];
1111 NVE_LOCK_ASSERT(sc);
1113 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n");
1117 /* Initialize filter */
1118 hwfilter.ulFilterFlags = 0;
1119 for (i = 0; i < 6; i++) {
1120 hwfilter.acMulticastAddress[i] = 0;
1121 hwfilter.acMulticastMask[i] = 0;
1124 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1125 /* Accept all packets */
1126 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS;
1127 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1130 /* Setup multicast filter */
1131 if_maddr_rlock(ifp);
1132 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1135 if (ifma->ifma_addr->sa_family != AF_LINK)
1138 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1139 for (i = 0; i < 6; i++) {
1140 u_int8_t mcaddr = addrp[i];
1141 andaddr[i] &= mcaddr;
1142 oraddr[i] |= mcaddr;
1145 if_maddr_runlock(ifp);
1146 for (i = 0; i < 6; i++) {
1147 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i];
1148 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]);
1151 /* Send filter to NVIDIA API */
1152 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1154 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n");
1159 /* Change the current media/mediaopts */
1161 nve_ifmedia_upd(struct ifnet *ifp)
1163 struct nve_softc *sc = ifp->if_softc;
1166 nve_ifmedia_upd_locked(ifp);
1172 nve_ifmedia_upd_locked(struct ifnet *ifp)
1174 struct nve_softc *sc = ifp->if_softc;
1175 struct mii_data *mii;
1176 struct mii_softc *miisc;
1178 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n");
1180 NVE_LOCK_ASSERT(sc);
1181 mii = device_get_softc(sc->miibus);
1183 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1188 /* Update current miibus PHY status of media */
1190 nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1192 struct nve_softc *sc;
1193 struct mii_data *mii;
1195 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n");
1199 mii = device_get_softc(sc->miibus);
1202 ifmr->ifm_active = mii->mii_media_active;
1203 ifmr->ifm_status = mii->mii_media_status;
1209 /* miibus tick timer - maintain link status */
1213 struct nve_softc *sc = xsc;
1214 struct mii_data *mii;
1217 NVE_LOCK_ASSERT(sc);
1220 nve_update_stats(sc);
1222 mii = device_get_softc(sc->miibus);
1225 if (mii->mii_media_status & IFM_ACTIVE &&
1226 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1227 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1228 nve_ifstart_locked(ifp);
1231 if (sc->tx_timer > 0 && --sc->tx_timer == 0)
1233 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
1238 /* Update ifnet data structure with collected interface stats from API */
1240 nve_update_stats(struct nve_softc *sc)
1242 struct ifnet *ifp = sc->ifp;
1243 ADAPTER_STATS stats;
1245 NVE_LOCK_ASSERT(sc);
1248 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats);
1250 ifp->if_ipackets = stats.ulSuccessfulReceptions;
1251 ifp->if_ierrors = stats.ulMissedFrames +
1252 stats.ulFailedReceptions +
1254 stats.ulFramingErrors +
1255 stats.ulOverFlowErrors;
1257 ifp->if_opackets = stats.ulSuccessfulTransmissions;
1258 ifp->if_oerrors = sc->tx_errors +
1259 stats.ulFailedTransmissions +
1260 stats.ulRetryErrors +
1261 stats.ulUnderflowErrors +
1262 stats.ulLossOfCarrierErrors +
1263 stats.ulLateCollisionErrors;
1265 ifp->if_collisions = stats.ulLateCollisionErrors;
1271 /* miibus Read PHY register wrapper - calls Nvidia API entry point */
1273 nve_miibus_readreg(device_t dev, int phy, int reg)
1275 struct nve_softc *sc = device_get_softc(dev);
1278 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n");
1280 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data);
1282 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n");
1287 /* miibus Write PHY register wrapper - calls Nvidia API entry point */
1289 nve_miibus_writereg(device_t dev, int phy, int reg, int data)
1291 struct nve_softc *sc = device_get_softc(dev);
1293 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n");
1295 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data);
1297 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n");
1302 /* Watchdog timer to prevent PHY lockups */
1304 nve_watchdog(struct nve_softc *sc)
1307 int pending_txs_start;
1309 NVE_LOCK_ASSERT(sc);
1313 * The nvidia driver blob defers tx completion notifications.
1314 * Thus, sometimes the watchdog timer will go off when the
1315 * tx engine is fine, but the tx completions are just deferred.
1316 * Try kicking the driver blob to clear out any pending tx
1317 * completions. If that clears up any of the pending tx
1318 * operations, then just return without printing the warning
1319 * message or resetting the adapter, as we can then conclude
1320 * the chip hasn't actually crashed (it's still sending packets).
1322 pending_txs_start = sc->pending_txs;
1323 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
1324 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1325 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1326 if (sc->pending_txs < pending_txs_start)
1329 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs);
1334 nve_init_locked(sc);
1336 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1337 nve_ifstart_locked(ifp);
1340 /* --- Start of NVOSAPI interface --- */
1342 /* Allocate DMA enabled general use memory for API */
1344 nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem)
1346 struct nve_softc *sc;
1347 bus_addr_t mem_physical;
1349 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength);
1351 sc = (struct nve_softc *)ctx;
1353 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF,
1354 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
1356 if (!mem->pLogical) {
1357 device_printf(sc->dev, "memory allocation failed\n");
1360 memset(mem->pLogical, 0, (ulong)mem->uiLength);
1361 mem_physical = vtophys(mem->pLogical);
1362 mem->pPhysical = (PVOID)mem_physical;
1364 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n",
1365 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength);
1370 /* Free allocated memory */
1372 nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem)
1374 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n",
1375 (uint)mem->pLogical, (uint) mem->uiLength);
1377 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF);
1381 /* Copied directly from nvnet.c */
1383 nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1385 MEMORY_BLOCK mem_block;
1387 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n");
1389 mem_block_ex->pLogical = NULL;
1390 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength;
1392 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) &&
1393 (mem_block_ex->AlignmentSize > 1)) {
1394 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n",
1395 mem_block_ex->AlignmentSize);
1396 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize;
1398 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1400 if (nve_osalloc(ctx, &mem_block) == 0) {
1403 mem_block_ex->pLogicalOrig = mem_block.pLogical;
1404 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical;
1405 mem_block_ex->pPhysicalOrigHigh = 0;
1407 mem_block_ex->pPhysical = mem_block.pPhysical;
1408 mem_block_ex->pLogical = mem_block.pLogical;
1410 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) {
1411 unsigned int offset;
1412 offset = mem_block_ex->pPhysicalOrigLow &
1413 (mem_block_ex->AlignmentSize - 1);
1416 mem_block_ex->pPhysical =
1417 (PVOID)((ulong)mem_block_ex->pPhysical +
1418 mem_block_ex->AlignmentSize - offset);
1419 mem_block_ex->pLogical =
1420 (PVOID)((ulong)mem_block_ex->pLogical +
1421 mem_block_ex->AlignmentSize - offset);
1423 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */
1427 /* Copied directly from nvnet.c */
1429 nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1431 MEMORY_BLOCK mem_block;
1433 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n");
1435 mem_block.pLogical = mem_block_ex->pLogicalOrig;
1436 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow);
1437 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1439 return (nve_osfree(ctx, &mem_block));
1442 /* Clear memory region */
1444 nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length)
1446 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n");
1447 memset(mem, 0, length);
1451 /* Sleep for a tick */
1453 nve_osdelay(PNV_VOID ctx, NV_UINT32 usec)
1459 /* Allocate memory for rx buffer */
1461 nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id)
1463 struct nve_softc *sc = ctx;
1464 struct nve_rx_desc *desc;
1465 struct nve_map_buffer *buf;
1468 if (device_is_attached(sc->dev))
1469 NVE_LOCK_ASSERT(sc);
1471 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n");
1473 if (sc->pending_rxs == RX_RING_SIZE) {
1474 device_printf(sc->dev, "rx ring buffer is full\n");
1477 desc = sc->rx_desc + sc->cur_rx;
1480 if (buf->mbuf == NULL) {
1481 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1482 if (buf->mbuf == NULL) {
1483 device_printf(sc->dev, "failed to allocate memory\n");
1486 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
1487 m_adj(buf->mbuf, ETHER_ALIGN);
1489 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
1490 nve_dmamap_rx_cb, &desc->paddr, 0);
1492 device_printf(sc->dev, "failed to dmamap mbuf\n");
1497 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
1498 desc->buflength = buf->mbuf->m_len;
1499 desc->vaddr = mtod(buf->mbuf, caddr_t);
1502 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE;
1504 mem->pLogical = (void *)desc->vaddr;
1505 mem->pPhysical = (void *)desc->paddr;
1506 mem->uiLength = desc->buflength;
1515 /* Free the rx buffer */
1517 nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id)
1519 struct nve_softc *sc = ctx;
1520 struct nve_rx_desc *desc;
1521 struct nve_map_buffer *buf;
1523 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n");
1525 desc = (struct nve_rx_desc *) id;
1529 bus_dmamap_unload(sc->mtag, buf->map);
1530 bus_dmamap_destroy(sc->mtag, buf->map);
1539 /* This gets called by the Nvidia API after our TX packet has been sent */
1541 nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success)
1543 struct nve_softc *sc = ctx;
1544 struct nve_map_buffer *buf;
1545 struct nve_tx_desc *desc = (struct nve_tx_desc *) id;
1548 NVE_LOCK_ASSERT(sc);
1550 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n");
1556 /* Unload and free mbuf cluster */
1557 if (buf->mbuf == NULL)
1560 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE);
1561 bus_dmamap_unload(sc->mtag, buf->map);
1565 /* Send more packets if we have them */
1566 if (sc->pending_txs < TX_RING_SIZE)
1567 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1569 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) && sc->pending_txs < TX_RING_SIZE)
1570 nve_ifstart_locked(ifp);
1577 /* This gets called by the Nvidia API when a new packet has been received */
1578 /* XXX What is newbuf used for? XXX */
1580 nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf,
1583 struct nve_softc *sc = ctx;
1585 struct nve_rx_desc *desc;
1586 struct nve_map_buffer *buf;
1587 ADAPTER_READ_DATA *readdata;
1590 NVE_LOCK_ASSERT(sc);
1592 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n");
1596 readdata = (ADAPTER_READ_DATA *) data;
1597 desc = readdata->pvID;
1599 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1602 /* Sync DMA bounce buffer. */
1603 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1605 /* First mbuf in packet holds the ethernet and packet headers */
1606 buf->mbuf->m_pkthdr.rcvif = ifp;
1607 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len =
1608 readdata->ulTotalLength;
1610 bus_dmamap_unload(sc->mtag, buf->map);
1612 /* Blat the mbuf pointer, kernel will free the mbuf cluster */
1616 /* Give mbuf to OS. */
1618 (*ifp->if_input)(ifp, m);
1620 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH)
1624 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1625 bus_dmamap_unload(sc->mtag, buf->map);
1630 sc->cur_rx = desc - sc->rx_desc;
1636 /* This gets called by NVIDIA API when the PHY link state changes */
1638 nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled)
1641 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n");
1646 /* Setup a watchdog timer */
1648 nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer)
1650 struct nve_softc *sc = (struct nve_softc *)ctx;
1652 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n");
1654 callout_init(&sc->ostimer, CALLOUT_MPSAFE);
1655 *timer = &sc->ostimer;
1660 /* Free the timer */
1662 nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer)
1665 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n");
1667 callout_drain((struct callout *)timer);
1672 /* Setup timer parameters */
1674 nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters)
1676 struct nve_softc *sc = (struct nve_softc *)ctx;
1678 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n");
1680 sc->ostimer_func = func;
1681 sc->ostimer_params = parameters;
1686 /* Set the timer to go off */
1688 nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay)
1690 struct nve_softc *sc = ctx;
1692 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n");
1694 callout_reset((struct callout *)timer, delay, sc->ostimer_func,
1695 sc->ostimer_params);
1700 /* Cancel the timer */
1702 nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer)
1705 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n");
1707 callout_stop((struct callout *)timer);
1713 nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id,
1714 NV_UINT8 *newbuffer, NV_UINT8 priority)
1717 /* Not implemented */
1718 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1724 nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata)
1727 /* Not implemented */
1728 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1734 nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno)
1737 /* Not implemented */
1738 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n");
1743 /* Allocate mutex context (already done in nve_attach) */
1745 nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock)
1747 struct nve_softc *sc = (struct nve_softc *)ctx;
1749 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n");
1751 *pLock = (void **)sc;
1756 /* Obtain a spin lock */
1758 nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1761 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n");
1768 nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1771 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n");
1776 /* I have no idea what this is for */
1778 nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata)
1781 /* Not implemented */
1782 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n");
1783 panic("nve: nve_osreturnbufvirtual not implemented\n");
1788 /* --- End on NVOSAPI interface --- */