2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * PCI:PCI bridge support.
38 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/libkern.h>
42 #include <sys/malloc.h>
43 #include <sys/module.h>
45 #include <sys/sysctl.h>
46 #include <sys/systm.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
51 #include <dev/pci/pcivar.h>
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcib_private.h>
57 static int pcib_probe(device_t dev);
59 static device_method_t pcib_methods[] = {
60 /* Device interface */
61 DEVMETHOD(device_probe, pcib_probe),
62 DEVMETHOD(device_attach, pcib_attach),
63 DEVMETHOD(device_detach, bus_generic_detach),
64 DEVMETHOD(device_shutdown, bus_generic_shutdown),
65 DEVMETHOD(device_suspend, bus_generic_suspend),
66 DEVMETHOD(device_resume, bus_generic_resume),
69 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
70 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
71 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
73 DEVMETHOD(bus_adjust_resource, pcib_adjust_resource),
74 DEVMETHOD(bus_release_resource, pcib_release_resource),
76 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
77 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
79 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
80 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
81 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
82 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
85 DEVMETHOD(pcib_maxslots, pcib_maxslots),
86 DEVMETHOD(pcib_read_config, pcib_read_config),
87 DEVMETHOD(pcib_write_config, pcib_write_config),
88 DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
89 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
90 DEVMETHOD(pcib_release_msi, pcib_release_msi),
91 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
92 DEVMETHOD(pcib_release_msix, pcib_release_msix),
93 DEVMETHOD(pcib_map_msi, pcib_map_msi),
98 static devclass_t pcib_devclass;
100 DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
101 DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0);
106 * - properly handle the ISA enable bit. If it is set, we should change
107 * the behavior of the I/O window resource and rman to not allocate the
108 * blocked ranges (upper 768 bytes of each 1K in the first 64k of the
109 * I/O port address space).
113 * Is a resource from a child device sub-allocated from one of our
117 pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
122 return (rman_is_region_manager(r, &sc->io.rman));
124 /* Prefetchable resources may live in either memory rman. */
125 if (rman_get_flags(r) & RF_PREFETCHABLE &&
126 rman_is_region_manager(r, &sc->pmem.rman))
128 return (rman_is_region_manager(r, &sc->mem.rman));
134 pcib_is_window_open(struct pcib_window *pw)
137 return (pw->valid && pw->base < pw->limit);
141 * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
142 * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
143 * when allocating the resource windows and rely on the PCI bus driver
147 pcib_activate_window(struct pcib_softc *sc, int type)
150 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
154 pcib_write_windows(struct pcib_softc *sc, int mask)
160 if (sc->io.valid && mask & WIN_IO) {
161 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
162 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
163 pci_write_config(dev, PCIR_IOBASEH_1,
164 sc->io.base >> 16, 2);
165 pci_write_config(dev, PCIR_IOLIMITH_1,
166 sc->io.limit >> 16, 2);
168 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
169 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
172 if (mask & WIN_MEM) {
173 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
174 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
177 if (sc->pmem.valid && mask & WIN_PMEM) {
178 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
179 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
180 pci_write_config(dev, PCIR_PMBASEH_1,
181 sc->pmem.base >> 32, 4);
182 pci_write_config(dev, PCIR_PMLIMITH_1,
183 sc->pmem.limit >> 32, 4);
185 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
186 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
191 pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
192 int flags, pci_addr_t max_address)
197 if (max_address != (u_long)max_address)
199 w->rman.rm_start = 0;
200 w->rman.rm_end = max_address;
201 w->rman.rm_type = RMAN_ARRAY;
202 snprintf(buf, sizeof(buf), "%s %s window",
203 device_get_nameunit(sc->dev), w->name);
204 w->rman.rm_descr = strdup(buf, M_DEVBUF);
205 error = rman_init(&w->rman);
207 panic("Failed to initialize %s %s rman",
208 device_get_nameunit(sc->dev), w->name);
210 if (!pcib_is_window_open(w))
213 if (w->base > max_address || w->limit > max_address) {
214 device_printf(sc->dev,
215 "initial %s window has too many bits, ignoring\n", w->name);
219 w->res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
220 w->limit - w->base + 1, flags);
221 if (w->res == NULL) {
222 device_printf(sc->dev,
223 "failed to allocate initial %s window: %#jx-%#jx\n",
224 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
225 w->base = max_address;
227 pcib_write_windows(sc, w->mask);
230 pcib_activate_window(sc, type);
232 error = rman_manage_region(&w->rman, rman_get_start(w->res),
233 rman_get_end(w->res));
235 panic("Failed to initialize rman with resource");
239 * Initialize I/O windows.
242 pcib_probe_windows(struct pcib_softc *sc)
250 /* Determine if the I/O port window is implemented. */
251 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
254 * If 'val' is zero, then only 16-bits of I/O space
257 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
258 if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
260 pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
265 /* Read the existing I/O port window. */
267 sc->io.reg = PCIR_IOBASEL_1;
269 sc->io.mask = WIN_IO;
270 sc->io.name = "I/O port";
271 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
272 sc->io.base = PCI_PPBIOBASE(
273 pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
274 sc->io.limit = PCI_PPBIOLIMIT(
275 pci_read_config(dev, PCIR_IOLIMITH_1, 2),
276 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
279 sc->io.base = PCI_PPBIOBASE(0, val);
280 sc->io.limit = PCI_PPBIOLIMIT(0,
281 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
284 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
287 /* Read the existing memory window. */
289 sc->mem.reg = PCIR_MEMBASE_1;
291 sc->mem.mask = WIN_MEM;
292 sc->mem.name = "memory";
293 sc->mem.base = PCI_PPBMEMBASE(0,
294 pci_read_config(dev, PCIR_MEMBASE_1, 2));
295 sc->mem.limit = PCI_PPBMEMLIMIT(0,
296 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
297 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
299 /* Determine if the prefetchable memory window is implemented. */
300 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
303 * If 'val' is zero, then only 32-bits of memory space
306 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
307 if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
309 pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
314 /* Read the existing prefetchable memory window. */
315 if (sc->pmem.valid) {
316 sc->pmem.reg = PCIR_PMBASEL_1;
318 sc->pmem.mask = WIN_PMEM;
319 sc->pmem.name = "prefetch";
320 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
321 sc->pmem.base = PCI_PPBMEMBASE(
322 pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
323 sc->pmem.limit = PCI_PPBMEMLIMIT(
324 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
325 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
326 max = 0xffffffffffffffff;
328 sc->pmem.base = PCI_PPBMEMBASE(0, val);
329 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
330 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
333 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
334 RF_PREFETCHABLE, max);
341 * Is the prefetch window open (eg, can we allocate memory in it?)
344 pcib_is_prefetch_open(struct pcib_softc *sc)
346 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
350 * Is the nonprefetch window open (eg, can we allocate memory in it?)
353 pcib_is_nonprefetch_open(struct pcib_softc *sc)
355 return (sc->membase > 0 && sc->membase < sc->memlimit);
359 * Is the io window open (eg, can we allocate ports in it?)
362 pcib_is_io_open(struct pcib_softc *sc)
364 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
369 * Generic device interface
372 pcib_probe(device_t dev)
374 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
375 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
376 device_set_desc(dev, "PCI-PCI bridge");
383 pcib_attach_common(device_t dev)
385 struct pcib_softc *sc;
389 struct sysctl_ctx_list *sctx;
390 struct sysctl_oid *soid;
392 sc = device_get_softc(dev);
396 * Get current bridge configuration.
398 sc->command = pci_read_config(dev, PCIR_COMMAND, 1);
399 sc->domain = pci_get_domain(dev);
400 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1);
401 sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
402 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
403 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
404 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
405 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
408 * Setup sysctl reporting nodes
410 sctx = device_get_sysctl_ctx(dev);
411 soid = device_get_sysctl_tree(dev);
412 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
413 CTLFLAG_RD, &sc->domain, 0, "Domain number");
414 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
415 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
416 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
417 CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number");
418 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
419 CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
423 * Determine current I/O decode.
425 if (sc->command & PCIM_CMD_PORTEN) {
426 iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
427 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
428 sc->iobase = PCI_PPBIOBASE(pci_read_config(dev, PCIR_IOBASEH_1, 2),
429 pci_read_config(dev, PCIR_IOBASEL_1, 1));
431 sc->iobase = PCI_PPBIOBASE(0, pci_read_config(dev, PCIR_IOBASEL_1, 1));
434 iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
435 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
436 sc->iolimit = PCI_PPBIOLIMIT(pci_read_config(dev, PCIR_IOLIMITH_1, 2),
437 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
439 sc->iolimit = PCI_PPBIOLIMIT(0, pci_read_config(dev, PCIR_IOLIMITL_1, 1));
444 * Determine current memory decode.
446 if (sc->command & PCIM_CMD_MEMEN) {
447 sc->membase = PCI_PPBMEMBASE(0, pci_read_config(dev, PCIR_MEMBASE_1, 2));
448 sc->memlimit = PCI_PPBMEMLIMIT(0, pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
449 iolow = pci_read_config(dev, PCIR_PMBASEL_1, 1);
450 if ((iolow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
451 sc->pmembase = PCI_PPBMEMBASE(
452 pci_read_config(dev, PCIR_PMBASEH_1, 4),
453 pci_read_config(dev, PCIR_PMBASEL_1, 2));
455 sc->pmembase = PCI_PPBMEMBASE(0,
456 pci_read_config(dev, PCIR_PMBASEL_1, 2));
457 iolow = pci_read_config(dev, PCIR_PMLIMITL_1, 1);
458 if ((iolow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
459 sc->pmemlimit = PCI_PPBMEMLIMIT(
460 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
461 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
463 sc->pmemlimit = PCI_PPBMEMLIMIT(0,
464 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
471 switch (pci_get_devid(dev)) {
472 case 0x12258086: /* Intel 82454KX/GX (Orion) */
476 supbus = pci_read_config(dev, 0x41, 1);
477 if (supbus != 0xff) {
478 sc->secbus = supbus + 1;
479 sc->subbus = supbus + 1;
485 * The i82380FB mobile docking controller is a PCI-PCI bridge,
486 * and it is a subtractive bridge. However, the ProgIf is wrong
487 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
488 * happen. There's also a Toshiba bridge that behaves this
491 case 0x124b8086: /* Intel 82380FB Mobile */
492 case 0x060513d7: /* Toshiba ???? */
493 sc->flags |= PCIB_SUBTRACTIVE;
496 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
501 if ((cp = getenv("smbios.planar.maker")) == NULL)
503 if (strncmp(cp, "Compal", 6) != 0) {
508 if ((cp = getenv("smbios.planar.product")) == NULL)
510 if (strncmp(cp, "08A0", 4) != 0) {
515 if (sc->subbus < 0xa) {
516 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
517 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
523 if (pci_msi_device_blacklisted(dev))
524 sc->flags |= PCIB_DISABLE_MSI;
527 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
528 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
529 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
530 * This means they act as if they were subtractively decoding
531 * bridges and pass all transactions. Mark them and real ProgIf 1
532 * parts as subtractive.
534 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
535 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
536 sc->flags |= PCIB_SUBTRACTIVE;
539 pcib_probe_windows(sc);
542 device_printf(dev, " domain %d\n", sc->domain);
543 device_printf(dev, " secondary bus %d\n", sc->secbus);
544 device_printf(dev, " subordinate bus %d\n", sc->subbus);
546 if (pcib_is_window_open(&sc->io))
547 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
548 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
549 if (pcib_is_window_open(&sc->mem))
550 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
551 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
552 if (pcib_is_window_open(&sc->pmem))
553 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
554 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
556 if (pcib_is_io_open(sc))
557 device_printf(dev, " I/O decode 0x%x-0x%x\n",
558 sc->iobase, sc->iolimit);
559 if (pcib_is_nonprefetch_open(sc))
560 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
561 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
562 if (pcib_is_prefetch_open(sc))
563 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
564 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
567 device_printf(dev, " no prefetched decode\n");
568 if (sc->flags & PCIB_SUBTRACTIVE)
569 device_printf(dev, " Subtractively decoded bridge.\n");
573 * XXX If the secondary bus number is zero, we should assign a bus number
574 * since the BIOS hasn't, then initialise the bridge. A simple
575 * bus_alloc_resource with the a couple of busses seems like the right
576 * approach, but we don't know what busses the BIOS might have already
577 * assigned to other bridges on this bus that probe later than we do.
579 * If the subordinate bus number is less than the secondary bus number,
580 * we should pick a better value. One sensible alternative would be to
581 * pick 255; the only tradeoff here is that configuration transactions
582 * would be more widely routed than absolutely necessary. We could
583 * then do a walk of the tree later and fix it.
587 * Always enable busmastering on bridges so that transactions
588 * initiated on the secondary bus are passed through to the
591 pci_enable_busmaster(dev);
595 pcib_attach(device_t dev)
597 struct pcib_softc *sc;
600 pcib_attach_common(dev);
601 sc = device_get_softc(dev);
602 if (sc->secbus != 0) {
603 child = device_add_child(dev, "pci", sc->secbus);
605 return(bus_generic_attach(dev));
608 /* no secondary bus; we should have fixed this */
613 pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
615 struct pcib_softc *sc = device_get_softc(dev);
618 case PCIB_IVAR_DOMAIN:
619 *result = sc->domain;
622 *result = sc->secbus;
629 pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
631 struct pcib_softc *sc = device_get_softc(dev);
634 case PCIB_IVAR_DOMAIN:
645 pcib_child_name(device_t child)
649 if (device_get_nameunit(child) != NULL)
650 return (device_get_nameunit(child));
651 snprintf(buf, sizeof(buf), "pci%d:%d:%d:%d", pci_get_domain(child),
652 pci_get_bus(child), pci_get_slot(child), pci_get_function(child));
657 * Attempt to allocate a resource from the existing resources assigned
660 static struct resource *
661 pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
662 device_t child, int type, int *rid, u_long start, u_long end, u_long count,
665 struct resource *res;
667 if (!pcib_is_window_open(w))
670 res = rman_reserve_resource(&w->rman, start, end, count,
671 flags & ~RF_ACTIVE, child);
676 device_printf(sc->dev,
677 "allocated %s range (%#lx-%#lx) for rid %x of %s\n",
678 w->name, rman_get_start(res), rman_get_end(res), *rid,
679 pcib_child_name(child));
680 rman_set_rid(res, *rid);
683 * If the resource should be active, pass that request up the
684 * tree. This assumes the parent drivers can handle
685 * activating sub-allocated resources.
687 if (flags & RF_ACTIVE) {
688 if (bus_activate_resource(child, type, *rid, res) != 0) {
689 rman_release_resource(res);
698 * Attempt to grow a window to make room for a given resource request.
699 * The 'step' parameter is log_2 of the desired I/O window's alignment.
702 pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
703 u_long start, u_long end, u_long count, u_int flags)
705 u_long align, start_free, end_free, front, back, wmask;
709 * Clamp the desired resource range to the maximum address
710 * this window supports. Reject impossible requests.
714 if (end > w->rman.rm_end)
715 end = w->rman.rm_end;
716 if (start + count - 1 > end || start + count < start)
718 wmask = (1ul << w->step) - 1;
721 * If there is no resource at all, just try to allocate enough
722 * aligned space for this resource.
724 if (w->res == NULL) {
725 if (RF_ALIGNMENT(flags) < w->step) {
726 flags &= ~RF_ALIGNMENT_MASK;
727 flags |= RF_ALIGNMENT_LOG2(w->step);
731 count = roundup2(count, 1ul << w->step);
733 w->res = bus_alloc_resource(sc->dev, type, &rid, start, end,
734 count, flags & ~RF_ACTIVE);
735 if (w->res == NULL) {
737 device_printf(sc->dev,
738 "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n",
739 w->name, start, end, count);
743 device_printf(sc->dev,
744 "allocated initial %s window of %#lx-%#lx\n",
745 w->name, rman_get_start(w->res),
746 rman_get_end(w->res));
747 error = rman_manage_region(&w->rman, rman_get_start(w->res),
748 rman_get_end(w->res));
751 device_printf(sc->dev,
752 "failed to add initial %s window to rman\n",
754 bus_release_resource(sc->dev, type, w->reg, w->res);
758 pcib_activate_window(sc, type);
763 * See if growing the window would help. Compute the minimum
764 * amount of address space needed on both the front and back
765 * ends of the existing window to satisfy the allocation.
767 * For each end, build a candidate region adjusting for the
768 * required alignment, etc. If there is a free region at the
769 * edge of the window, grow from the inner edge of the free
770 * region. Otherwise grow from the window boundary.
772 * XXX: Special case: if w->res is completely empty and the
773 * request size is larger than w->res, we should find the
774 * optimal aligned buffer containing w->res and allocate that.
777 device_printf(sc->dev,
778 "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
779 w->name, start, end, count);
780 align = 1ul << RF_ALIGNMENT(flags);
781 if (start < rman_get_start(w->res)) {
782 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
783 0 || start_free != rman_get_start(w->res))
784 end_free = rman_get_start(w->res);
788 /* Move end_free down until it is properly aligned. */
789 end_free &= ~(align - 1);
791 front = end_free - (count - 1);
794 * The resource would now be allocated at (front,
795 * end_free). Ensure that fits in the (start, end)
796 * bounds. end_free is checked above. If 'front' is
797 * ok, ensure it is properly aligned for this window.
798 * Also check for underflow.
800 if (front >= start && front <= end_free) {
802 printf("\tfront candidate range: %#lx-%#lx\n",
805 front = rman_get_start(w->res) - front;
810 if (end > rman_get_end(w->res)) {
811 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
812 0 || end_free != rman_get_end(w->res))
813 start_free = rman_get_end(w->res) + 1;
814 if (start_free < start)
817 /* Move start_free up until it is properly aligned. */
818 start_free = roundup2(start_free, align);
819 back = start_free + count - 1;
822 * The resource would now be allocated at (start_free,
823 * back). Ensure that fits in the (start, end)
824 * bounds. start_free is checked above. If 'back' is
825 * ok, ensure it is properly aligned for this window.
826 * Also check for overflow.
828 if (back <= end && start_free <= back) {
830 printf("\tback candidate range: %#lx-%#lx\n",
833 back -= rman_get_end(w->res);
840 * Try to allocate the smallest needed region first.
841 * If that fails, fall back to the other region.
844 while (front != 0 || back != 0) {
845 if (front != 0 && (front <= back || back == 0)) {
846 error = bus_adjust_resource(sc->dev, type, w->res,
847 rman_get_start(w->res) - front,
848 rman_get_end(w->res));
853 error = bus_adjust_resource(sc->dev, type, w->res,
854 rman_get_start(w->res),
855 rman_get_end(w->res) + back);
865 device_printf(sc->dev, "grew %s window to %#lx-%#lx\n",
866 w->name, rman_get_start(w->res), rman_get_end(w->res));
868 /* Add the newly allocated region to the resource manager. */
869 if (w->base != rman_get_start(w->res)) {
870 KASSERT(w->limit == rman_get_end(w->res), ("both ends moved"));
871 error = rman_manage_region(&w->rman, rman_get_start(w->res),
874 KASSERT(w->limit != rman_get_end(w->res),
875 ("neither end moved"));
876 error = rman_manage_region(&w->rman, w->limit + 1,
877 rman_get_end(w->res));
881 device_printf(sc->dev,
882 "failed to expand %s resource manager\n", w->name);
883 bus_adjust_resource(sc->dev, type, w->res, w->base, w->limit);
888 /* Save the new window. */
889 w->base = rman_get_start(w->res);
890 w->limit = rman_get_end(w->res);
891 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
892 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
893 pcib_write_windows(sc, w->mask);
898 * We have to trap resource allocation requests and ensure that the bridge
899 * is set up to, or capable of handling them.
902 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
903 u_long start, u_long end, u_long count, u_int flags)
905 struct pcib_softc *sc;
908 sc = device_get_softc(dev);
911 * VGA resources are decoded iff the VGA enable bit is set in
912 * the bridge control register. VGA resources do not fall into
913 * the resource windows and are passed up to the parent.
915 if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
916 (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
917 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
918 return (bus_generic_alloc_resource(dev, child, type,
919 rid, start, end, count, flags));
926 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
928 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
930 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
932 r = pcib_suballoc_resource(sc, &sc->io, child, type,
933 rid, start, end, count, flags);
937 * For prefetchable resources, prefer the prefetchable
938 * memory window, but fall back to the regular memory
939 * window if that fails. Try both windows before
940 * attempting to grow a window in case the firmware
941 * has used a range in the regular memory window to
942 * map a prefetchable BAR.
944 if (flags & RF_PREFETCHABLE) {
945 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
946 rid, start, end, count, flags);
950 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
951 start, end, count, flags);
952 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
954 if (flags & RF_PREFETCHABLE) {
955 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
956 count, flags) == 0) {
957 r = pcib_suballoc_resource(sc, &sc->pmem, child,
958 type, rid, start, end, count, flags);
963 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
964 flags & ~RF_PREFETCHABLE) == 0)
965 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
966 rid, start, end, count, flags);
969 return (bus_generic_alloc_resource(dev, child, type, rid,
970 start, end, count, flags));
974 * If attempts to suballocate from the window fail but this is a
975 * subtractive bridge, pass the request up the tree.
977 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
978 return (bus_generic_alloc_resource(dev, child, type, rid,
979 start, end, count, flags));
984 pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
985 u_long start, u_long end)
987 struct pcib_softc *sc;
989 sc = device_get_softc(bus);
990 if (pcib_is_resource_managed(sc, type, r))
991 return (rman_adjust_resource(r, start, end));
992 return (bus_generic_adjust_resource(bus, child, type, r, start, end));
996 pcib_release_resource(device_t dev, device_t child, int type, int rid,
999 struct pcib_softc *sc;
1002 sc = device_get_softc(dev);
1003 if (pcib_is_resource_managed(sc, type, r)) {
1004 if (rman_get_flags(r) & RF_ACTIVE) {
1005 error = bus_deactivate_resource(child, type, rid, r);
1009 return (rman_release_resource(r));
1011 return (bus_generic_release_resource(dev, child, type, rid, r));
1015 * We have to trap resource allocation requests and ensure that the bridge
1016 * is set up to, or capable of handling them.
1019 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1020 u_long start, u_long end, u_long count, u_int flags)
1022 struct pcib_softc *sc = device_get_softc(dev);
1023 const char *name, *suffix;
1027 * Fail the allocation for this range if it's not supported.
1029 name = device_get_nameunit(child);
1036 case SYS_RES_IOPORT:
1038 if (!pcib_is_io_open(sc))
1040 ok = (start >= sc->iobase && end <= sc->iolimit);
1043 * Make sure we allow access to VGA I/O addresses when the
1044 * bridge has the "VGA Enable" bit set.
1046 if (!ok && pci_is_vga_ioport_range(start, end))
1047 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1049 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1051 if (start < sc->iobase)
1053 if (end > sc->iolimit)
1062 * If we overlap with the subtractive range, then
1063 * pick the upper range to use.
1065 if (start < sc->iolimit && end > sc->iobase)
1066 start = sc->iolimit + 1;
1070 device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
1077 device_printf(dev, "%s%srequested unsupported I/O "
1078 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
1079 name, suffix, start, end, sc->iobase, sc->iolimit);
1084 "%s%srequested I/O range 0x%lx-0x%lx: in range\n",
1085 name, suffix, start, end);
1088 case SYS_RES_MEMORY:
1090 if (pcib_is_nonprefetch_open(sc))
1091 ok = ok || (start >= sc->membase && end <= sc->memlimit);
1092 if (pcib_is_prefetch_open(sc))
1093 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
1096 * Make sure we allow access to VGA memory addresses when the
1097 * bridge has the "VGA Enable" bit set.
1099 if (!ok && pci_is_vga_memory_range(start, end))
1100 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1102 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1105 if (flags & RF_PREFETCHABLE) {
1106 if (pcib_is_prefetch_open(sc)) {
1107 if (start < sc->pmembase)
1108 start = sc->pmembase;
1109 if (end > sc->pmemlimit)
1110 end = sc->pmemlimit;
1114 } else { /* non-prefetchable */
1115 if (pcib_is_nonprefetch_open(sc)) {
1116 if (start < sc->membase)
1117 start = sc->membase;
1118 if (end > sc->memlimit)
1126 ok = 1; /* subtractive bridge: always ok */
1128 if (pcib_is_nonprefetch_open(sc)) {
1129 if (start < sc->memlimit && end > sc->membase)
1130 start = sc->memlimit + 1;
1132 if (pcib_is_prefetch_open(sc)) {
1133 if (start < sc->pmemlimit && end > sc->pmembase)
1134 start = sc->pmemlimit + 1;
1139 device_printf(dev, "memory: end (%lx) < start (%lx)\n",
1145 if (!ok && bootverbose)
1147 "%s%srequested unsupported memory range %#lx-%#lx "
1148 "(decoding %#jx-%#jx, %#jx-%#jx)\n",
1149 name, suffix, start, end,
1150 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
1151 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1155 device_printf(dev,"%s%srequested memory range "
1156 "0x%lx-0x%lx: good\n",
1157 name, suffix, start, end);
1164 * Bridge is OK decoding this resource, so pass it up.
1166 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1175 pcib_maxslots(device_t dev)
1177 return(PCI_SLOTMAX);
1181 * Since we are a child of a PCI bus, its parent must support the pcib interface.
1184 pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
1186 return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width));
1190 pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
1192 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);
1196 * Route an interrupt across a PCI bridge.
1199 pcib_route_interrupt(device_t pcib, device_t dev, int pin)
1207 * The PCI standard defines a swizzle of the child-side device/intpin to
1208 * the parent-side intpin as follows.
1210 * device = device on child bus
1211 * child_intpin = intpin on child bus slot (0-3)
1212 * parent_intpin = intpin on parent bus slot (0-3)
1214 * parent_intpin = (device + child_intpin) % 4
1216 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
1219 * Our parent is a PCI bus. Its parent must export the pcib interface
1220 * which includes the ability to route interrupts.
1222 bus = device_get_parent(pcib);
1223 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
1224 if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
1225 device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
1226 pci_get_slot(dev), 'A' + pin - 1, intnum);
1231 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
1233 pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
1235 struct pcib_softc *sc = device_get_softc(pcib);
1238 if (sc->flags & PCIB_DISABLE_MSI)
1240 bus = device_get_parent(pcib);
1241 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
1245 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
1247 pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
1251 bus = device_get_parent(pcib);
1252 return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
1255 /* Pass request to alloc an MSI-X message up to the parent bridge. */
1257 pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
1259 struct pcib_softc *sc = device_get_softc(pcib);
1262 if (sc->flags & PCIB_DISABLE_MSI)
1264 bus = device_get_parent(pcib);
1265 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
1268 /* Pass request to release an MSI-X message up to the parent bridge. */
1270 pcib_release_msix(device_t pcib, device_t dev, int irq)
1274 bus = device_get_parent(pcib);
1275 return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
1278 /* Pass request to map MSI/MSI-X message up to parent bridge. */
1280 pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
1286 bus = device_get_parent(pcib);
1287 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
1291 pci_ht_map_msi(pcib, *addr);
1296 * Try to read the bus number of a host-PCI bridge using appropriate config
1300 host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func,
1305 id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4);
1306 if (id == 0xffffffff)
1312 /* XXX This is a guess */
1313 /* *busnum = read_config(bus, slot, func, 0x41, 1); */
1317 /* Intel 82454KX/GX (Orion) */
1318 *busnum = read_config(bus, slot, func, 0x4a, 1);
1322 * For the 450nx chipset, there is a whole bundle of
1323 * things pretending to be host bridges. The MIOC will
1324 * be seen first and isn't really a pci bridge (the
1325 * actual busses are attached to the PXB's). We need to
1326 * read the registers of the MIOC to figure out the
1327 * bus numbers for the PXB channels.
1329 * Since the MIOC doesn't have a pci bus attached, we
1330 * pretend it wasn't there.
1336 /* Intel 82454NX PXB#0, Bus#A */
1337 *busnum = read_config(bus, 0x10, func, 0xd0, 1);
1340 /* Intel 82454NX PXB#0, Bus#B */
1341 *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1;
1344 /* Intel 82454NX PXB#1, Bus#A */
1345 *busnum = read_config(bus, 0x10, func, 0xd3, 1);
1348 /* Intel 82454NX PXB#1, Bus#B */
1349 *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1;
1354 /* ServerWorks -- vendor 0x1166 */
1368 *busnum = read_config(bus, slot, func, 0x44, 1);
1371 /* Compaq/HP -- vendor 0x0e11 */
1373 *busnum = read_config(bus, slot, func, 0xc8, 1);
1376 /* Don't know how to read bus number. */