2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * PCI:PCI bridge support.
38 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
44 #include <sys/sysctl.h>
45 #include <sys/systm.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pci_private.h>
50 #include <dev/pci/pcib_private.h>
54 static int pcib_probe(device_t dev);
55 static int pcib_suspend(device_t dev);
56 static int pcib_resume(device_t dev);
57 static int pcib_power_for_sleep(device_t pcib, device_t dev,
60 static device_method_t pcib_methods[] = {
61 /* Device interface */
62 DEVMETHOD(device_probe, pcib_probe),
63 DEVMETHOD(device_attach, pcib_attach),
64 DEVMETHOD(device_detach, bus_generic_detach),
65 DEVMETHOD(device_shutdown, bus_generic_shutdown),
66 DEVMETHOD(device_suspend, pcib_suspend),
67 DEVMETHOD(device_resume, pcib_resume),
70 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
71 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
72 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
74 DEVMETHOD(bus_adjust_resource, pcib_adjust_resource),
75 DEVMETHOD(bus_release_resource, pcib_release_resource),
77 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
78 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
80 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
81 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
82 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
83 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
86 DEVMETHOD(pcib_maxslots, pcib_maxslots),
87 DEVMETHOD(pcib_read_config, pcib_read_config),
88 DEVMETHOD(pcib_write_config, pcib_write_config),
89 DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
90 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
91 DEVMETHOD(pcib_release_msi, pcib_release_msi),
92 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
93 DEVMETHOD(pcib_release_msix, pcib_release_msix),
94 DEVMETHOD(pcib_map_msi, pcib_map_msi),
95 DEVMETHOD(pcib_power_for_sleep, pcib_power_for_sleep),
100 static devclass_t pcib_devclass;
102 DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
103 DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL);
106 SYSCTL_DECL(_hw_pci);
108 static int pci_clear_pcib;
109 TUNABLE_INT("hw.pci.clear_pcib", &pci_clear_pcib);
110 SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0,
111 "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
114 * Is a resource from a child device sub-allocated from one of our
118 pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
123 return (rman_is_region_manager(r, &sc->io.rman));
125 /* Prefetchable resources may live in either memory rman. */
126 if (rman_get_flags(r) & RF_PREFETCHABLE &&
127 rman_is_region_manager(r, &sc->pmem.rman))
129 return (rman_is_region_manager(r, &sc->mem.rman));
135 pcib_is_window_open(struct pcib_window *pw)
138 return (pw->valid && pw->base < pw->limit);
142 * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
143 * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
144 * when allocating the resource windows and rely on the PCI bus driver
148 pcib_activate_window(struct pcib_softc *sc, int type)
151 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
155 pcib_write_windows(struct pcib_softc *sc, int mask)
161 if (sc->io.valid && mask & WIN_IO) {
162 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
163 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
164 pci_write_config(dev, PCIR_IOBASEH_1,
165 sc->io.base >> 16, 2);
166 pci_write_config(dev, PCIR_IOLIMITH_1,
167 sc->io.limit >> 16, 2);
169 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
170 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
173 if (mask & WIN_MEM) {
174 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
175 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
178 if (sc->pmem.valid && mask & WIN_PMEM) {
179 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
180 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
181 pci_write_config(dev, PCIR_PMBASEH_1,
182 sc->pmem.base >> 32, 4);
183 pci_write_config(dev, PCIR_PMLIMITH_1,
184 sc->pmem.limit >> 32, 4);
186 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
187 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
192 * This is used to reject I/O port allocations that conflict with an
196 pcib_is_isa_range(struct pcib_softc *sc, u_long start, u_long end, u_long count)
200 if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE))
203 /* Only check fixed ranges for overlap. */
204 if (start + count - 1 != end)
207 /* ISA aliases are only in the lower 64KB of I/O space. */
211 /* Check for overlap with 0x000 - 0x0ff as a special case. */
216 * If the start address is an alias, the range is an alias.
217 * Otherwise, compute the start of the next alias range and
218 * check if it is before the end of the candidate range.
220 if ((start & 0x300) != 0)
222 next_alias = (start & ~0x3fful) | 0x100;
223 if (next_alias <= end)
229 device_printf(sc->dev,
230 "I/O range %#lx-%#lx overlaps with an ISA alias\n", start,
236 pcib_add_window_resources(struct pcib_window *w, struct resource **res,
239 struct resource **newarray;
242 newarray = malloc(sizeof(struct resource *) * (w->count + count),
245 bcopy(w->res, newarray, sizeof(struct resource *) * w->count);
246 bcopy(res, newarray + w->count, sizeof(struct resource *) * count);
247 free(w->res, M_DEVBUF);
251 for (i = 0; i < count; i++) {
252 error = rman_manage_region(&w->rman, rman_get_start(res[i]),
253 rman_get_end(res[i]));
255 panic("Failed to add resource to rman");
259 typedef void (nonisa_callback)(u_long start, u_long end, void *arg);
262 pcib_walk_nonisa_ranges(u_long start, u_long end, nonisa_callback *cb,
268 * If start is within an ISA alias range, move up to the start
269 * of the next non-alias range. As a special case, addresses
270 * in the range 0x000 - 0x0ff should also be skipped since
271 * those are used for various system I/O devices in ISA
274 if (start <= 65535) {
275 if (start < 0x100 || (start & 0x300) != 0) {
281 /* ISA aliases are only in the lower 64KB of I/O space. */
282 while (start <= MIN(end, 65535)) {
283 next_end = MIN(start | 0xff, end);
284 cb(start, next_end, arg);
293 count_ranges(u_long start, u_long end, void *arg)
302 struct resource **res;
303 struct pcib_softc *sc;
308 alloc_ranges(u_long start, u_long end, void *arg)
310 struct alloc_state *as;
311 struct pcib_window *w;
321 device_printf(as->sc->dev,
322 "allocating non-ISA range %#lx-%#lx\n", start, end);
323 as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT,
324 &rid, start, end, end - start + 1, 0);
325 if (as->res[as->count] == NULL)
332 pcib_alloc_nonisa_ranges(struct pcib_softc *sc, u_long start, u_long end)
334 struct alloc_state as;
337 /* First, see how many ranges we need. */
339 pcib_walk_nonisa_ranges(start, end, count_ranges, &new_count);
341 /* Second, allocate the ranges. */
342 as.res = malloc(sizeof(struct resource *) * new_count, M_DEVBUF,
347 pcib_walk_nonisa_ranges(start, end, alloc_ranges, &as);
349 for (i = 0; i < as.count; i++)
350 bus_release_resource(sc->dev, SYS_RES_IOPORT,
351 sc->io.reg, as.res[i]);
352 free(as.res, M_DEVBUF);
355 KASSERT(as.count == new_count, ("%s: count mismatch", __func__));
357 /* Third, add the ranges to the window. */
358 pcib_add_window_resources(&sc->io, as.res, as.count);
359 free(as.res, M_DEVBUF);
364 pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
365 int flags, pci_addr_t max_address)
367 struct resource *res;
371 if (max_address != (u_long)max_address)
373 w->rman.rm_start = 0;
374 w->rman.rm_end = max_address;
375 w->rman.rm_type = RMAN_ARRAY;
376 snprintf(buf, sizeof(buf), "%s %s window",
377 device_get_nameunit(sc->dev), w->name);
378 w->rman.rm_descr = strdup(buf, M_DEVBUF);
379 error = rman_init(&w->rman);
381 panic("Failed to initialize %s %s rman",
382 device_get_nameunit(sc->dev), w->name);
384 if (!pcib_is_window_open(w))
387 if (w->base > max_address || w->limit > max_address) {
388 device_printf(sc->dev,
389 "initial %s window has too many bits, ignoring\n", w->name);
392 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE)
393 (void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit);
396 res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
397 w->limit - w->base + 1, flags);
399 pcib_add_window_resources(w, &res, 1);
401 if (w->res == NULL) {
402 device_printf(sc->dev,
403 "failed to allocate initial %s window: %#jx-%#jx\n",
404 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
405 w->base = max_address;
407 pcib_write_windows(sc, w->mask);
410 pcib_activate_window(sc, type);
414 * Initialize I/O windows.
417 pcib_probe_windows(struct pcib_softc *sc)
425 if (pci_clear_pcib) {
426 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
427 pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
428 pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
429 pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
430 pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
431 pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
432 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
433 pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
434 pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
435 pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
438 /* Determine if the I/O port window is implemented. */
439 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
442 * If 'val' is zero, then only 16-bits of I/O space
445 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
446 if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
448 pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
453 /* Read the existing I/O port window. */
455 sc->io.reg = PCIR_IOBASEL_1;
457 sc->io.mask = WIN_IO;
458 sc->io.name = "I/O port";
459 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
460 sc->io.base = PCI_PPBIOBASE(
461 pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
462 sc->io.limit = PCI_PPBIOLIMIT(
463 pci_read_config(dev, PCIR_IOLIMITH_1, 2),
464 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
467 sc->io.base = PCI_PPBIOBASE(0, val);
468 sc->io.limit = PCI_PPBIOLIMIT(0,
469 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
472 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
475 /* Read the existing memory window. */
477 sc->mem.reg = PCIR_MEMBASE_1;
479 sc->mem.mask = WIN_MEM;
480 sc->mem.name = "memory";
481 sc->mem.base = PCI_PPBMEMBASE(0,
482 pci_read_config(dev, PCIR_MEMBASE_1, 2));
483 sc->mem.limit = PCI_PPBMEMLIMIT(0,
484 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
485 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
487 /* Determine if the prefetchable memory window is implemented. */
488 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
491 * If 'val' is zero, then only 32-bits of memory space
494 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
495 if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
497 pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
502 /* Read the existing prefetchable memory window. */
503 if (sc->pmem.valid) {
504 sc->pmem.reg = PCIR_PMBASEL_1;
506 sc->pmem.mask = WIN_PMEM;
507 sc->pmem.name = "prefetch";
508 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
509 sc->pmem.base = PCI_PPBMEMBASE(
510 pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
511 sc->pmem.limit = PCI_PPBMEMLIMIT(
512 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
513 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
514 max = 0xffffffffffffffff;
516 sc->pmem.base = PCI_PPBMEMBASE(0, val);
517 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
518 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
521 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
522 RF_PREFETCHABLE, max);
529 * Is the prefetch window open (eg, can we allocate memory in it?)
532 pcib_is_prefetch_open(struct pcib_softc *sc)
534 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
538 * Is the nonprefetch window open (eg, can we allocate memory in it?)
541 pcib_is_nonprefetch_open(struct pcib_softc *sc)
543 return (sc->membase > 0 && sc->membase < sc->memlimit);
547 * Is the io window open (eg, can we allocate ports in it?)
550 pcib_is_io_open(struct pcib_softc *sc)
552 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
556 * Get current I/O decode.
559 pcib_get_io_decode(struct pcib_softc *sc)
566 iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
567 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
568 sc->iobase = PCI_PPBIOBASE(
569 pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow);
571 sc->iobase = PCI_PPBIOBASE(0, iolow);
573 iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
574 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
575 sc->iolimit = PCI_PPBIOLIMIT(
576 pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow);
578 sc->iolimit = PCI_PPBIOLIMIT(0, iolow);
582 * Get current memory decode.
585 pcib_get_mem_decode(struct pcib_softc *sc)
592 sc->membase = PCI_PPBMEMBASE(0,
593 pci_read_config(dev, PCIR_MEMBASE_1, 2));
594 sc->memlimit = PCI_PPBMEMLIMIT(0,
595 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
597 pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2);
598 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
599 sc->pmembase = PCI_PPBMEMBASE(
600 pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow);
602 sc->pmembase = PCI_PPBMEMBASE(0, pmemlow);
604 pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2);
605 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
606 sc->pmemlimit = PCI_PPBMEMLIMIT(
607 pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow);
609 sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow);
613 * Restore previous I/O decode.
616 pcib_set_io_decode(struct pcib_softc *sc)
623 iohi = sc->iobase >> 16;
625 pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2);
626 pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1);
628 iohi = sc->iolimit >> 16;
630 pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2);
631 pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1);
635 * Restore previous memory decode.
638 pcib_set_mem_decode(struct pcib_softc *sc)
645 pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2);
646 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2);
648 pmemhi = sc->pmembase >> 32;
650 pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4);
651 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2);
653 pmemhi = sc->pmemlimit >> 32;
655 pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4);
656 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2);
661 * Get current bridge configuration.
664 pcib_cfg_save(struct pcib_softc *sc)
670 sc->command = pci_read_config(dev, PCIR_COMMAND, 2);
671 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1);
672 sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
673 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
674 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
675 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
677 if (sc->command & PCIM_CMD_PORTEN)
678 pcib_get_io_decode(sc);
679 if (sc->command & PCIM_CMD_MEMEN)
680 pcib_get_mem_decode(sc);
685 * Restore previous bridge configuration.
688 pcib_cfg_restore(struct pcib_softc *sc)
694 pci_write_config(dev, PCIR_COMMAND, sc->command, 2);
695 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
696 pci_write_config(dev, PCIR_SECBUS_1, sc->secbus, 1);
697 pci_write_config(dev, PCIR_SUBBUS_1, sc->subbus, 1);
698 pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2);
699 pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1);
701 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM);
703 if (sc->command & PCIM_CMD_PORTEN)
704 pcib_set_io_decode(sc);
705 if (sc->command & PCIM_CMD_MEMEN)
706 pcib_set_mem_decode(sc);
711 * Generic device interface
714 pcib_probe(device_t dev)
716 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
717 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
718 device_set_desc(dev, "PCI-PCI bridge");
725 pcib_attach_common(device_t dev)
727 struct pcib_softc *sc;
728 struct sysctl_ctx_list *sctx;
729 struct sysctl_oid *soid;
732 sc = device_get_softc(dev);
736 * Get current bridge configuration.
738 sc->domain = pci_get_domain(dev);
739 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
743 * Setup sysctl reporting nodes
745 sctx = device_get_sysctl_ctx(dev);
746 soid = device_get_sysctl_tree(dev);
747 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
748 CTLFLAG_RD, &sc->domain, 0, "Domain number");
749 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
750 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
751 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
752 CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number");
753 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
754 CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
759 switch (pci_get_devid(dev)) {
760 case 0x12258086: /* Intel 82454KX/GX (Orion) */
764 supbus = pci_read_config(dev, 0x41, 1);
765 if (supbus != 0xff) {
766 sc->secbus = supbus + 1;
767 sc->subbus = supbus + 1;
773 * The i82380FB mobile docking controller is a PCI-PCI bridge,
774 * and it is a subtractive bridge. However, the ProgIf is wrong
775 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
776 * happen. There's also a Toshiba bridge that behaves this
779 case 0x124b8086: /* Intel 82380FB Mobile */
780 case 0x060513d7: /* Toshiba ???? */
781 sc->flags |= PCIB_SUBTRACTIVE;
784 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
789 if ((cp = getenv("smbios.planar.maker")) == NULL)
791 if (strncmp(cp, "Compal", 6) != 0) {
796 if ((cp = getenv("smbios.planar.product")) == NULL)
798 if (strncmp(cp, "08A0", 4) != 0) {
803 if (sc->subbus < 0xa) {
804 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
805 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
811 if (pci_msi_device_blacklisted(dev))
812 sc->flags |= PCIB_DISABLE_MSI;
814 if (pci_msix_device_blacklisted(dev))
815 sc->flags |= PCIB_DISABLE_MSIX;
818 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
819 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
820 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
821 * This means they act as if they were subtractively decoding
822 * bridges and pass all transactions. Mark them and real ProgIf 1
823 * parts as subtractive.
825 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
826 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
827 sc->flags |= PCIB_SUBTRACTIVE;
830 pcib_probe_windows(sc);
833 device_printf(dev, " domain %d\n", sc->domain);
834 device_printf(dev, " secondary bus %d\n", sc->secbus);
835 device_printf(dev, " subordinate bus %d\n", sc->subbus);
837 if (pcib_is_window_open(&sc->io))
838 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
839 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
840 if (pcib_is_window_open(&sc->mem))
841 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
842 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
843 if (pcib_is_window_open(&sc->pmem))
844 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
845 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
847 if (pcib_is_io_open(sc))
848 device_printf(dev, " I/O decode 0x%x-0x%x\n",
849 sc->iobase, sc->iolimit);
850 if (pcib_is_nonprefetch_open(sc))
851 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
852 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
853 if (pcib_is_prefetch_open(sc))
854 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
855 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
857 if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) ||
858 sc->flags & PCIB_SUBTRACTIVE) {
859 device_printf(dev, " special decode ");
861 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) {
865 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) {
866 printf("%sVGA", comma ? ", " : "");
869 if (sc->flags & PCIB_SUBTRACTIVE)
870 printf("%ssubtractive", comma ? ", " : "");
876 * XXX If the secondary bus number is zero, we should assign a bus number
877 * since the BIOS hasn't, then initialise the bridge. A simple
878 * bus_alloc_resource with the a couple of busses seems like the right
879 * approach, but we don't know what busses the BIOS might have already
880 * assigned to other bridges on this bus that probe later than we do.
882 * If the subordinate bus number is less than the secondary bus number,
883 * we should pick a better value. One sensible alternative would be to
884 * pick 255; the only tradeoff here is that configuration transactions
885 * would be more widely routed than absolutely necessary. We could
886 * then do a walk of the tree later and fix it.
890 * Always enable busmastering on bridges so that transactions
891 * initiated on the secondary bus are passed through to the
894 pci_enable_busmaster(dev);
898 pcib_attach(device_t dev)
900 struct pcib_softc *sc;
903 pcib_attach_common(dev);
904 sc = device_get_softc(dev);
905 if (sc->secbus != 0) {
906 child = device_add_child(dev, "pci", sc->secbus);
908 return(bus_generic_attach(dev));
911 /* no secondary bus; we should have fixed this */
916 pcib_suspend(device_t dev)
921 pcib_cfg_save(device_get_softc(dev));
922 error = bus_generic_suspend(dev);
923 if (error == 0 && pci_do_power_suspend) {
924 dstate = PCI_POWERSTATE_D3;
925 pcib = device_get_parent(device_get_parent(dev));
926 if (PCIB_POWER_FOR_SLEEP(pcib, dev, &dstate) == 0)
927 pci_set_powerstate(dev, dstate);
933 pcib_resume(device_t dev)
937 if (pci_do_power_resume) {
938 pcib = device_get_parent(device_get_parent(dev));
939 if (PCIB_POWER_FOR_SLEEP(pcib, dev, NULL) == 0)
940 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
942 pcib_cfg_restore(device_get_softc(dev));
943 return (bus_generic_resume(dev));
947 pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
949 struct pcib_softc *sc = device_get_softc(dev);
952 case PCIB_IVAR_DOMAIN:
953 *result = sc->domain;
956 *result = sc->secbus;
963 pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
965 struct pcib_softc *sc = device_get_softc(dev);
968 case PCIB_IVAR_DOMAIN:
979 * Attempt to allocate a resource from the existing resources assigned
982 static struct resource *
983 pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
984 device_t child, int type, int *rid, u_long start, u_long end, u_long count,
987 struct resource *res;
989 if (!pcib_is_window_open(w))
992 res = rman_reserve_resource(&w->rman, start, end, count,
993 flags & ~RF_ACTIVE, child);
998 device_printf(sc->dev,
999 "allocated %s range (%#lx-%#lx) for rid %x of %s\n",
1000 w->name, rman_get_start(res), rman_get_end(res), *rid,
1001 pcib_child_name(child));
1002 rman_set_rid(res, *rid);
1005 * If the resource should be active, pass that request up the
1006 * tree. This assumes the parent drivers can handle
1007 * activating sub-allocated resources.
1009 if (flags & RF_ACTIVE) {
1010 if (bus_activate_resource(child, type, *rid, res) != 0) {
1011 rman_release_resource(res);
1019 /* Allocate a fresh resource range for an unconfigured window. */
1021 pcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1022 u_long start, u_long end, u_long count, u_int flags)
1024 struct resource *res;
1025 u_long base, limit, wmask;
1029 * If this is an I/O window on a bridge with ISA enable set
1030 * and the start address is below 64k, then try to allocate an
1031 * initial window of 0x1000 bytes long starting at address
1032 * 0xf000 and walking down. Note that if the original request
1033 * was larger than the non-aliased range size of 0x100 our
1034 * caller would have raised the start address up to 64k
1037 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1039 for (base = 0xf000; (long)base >= 0; base -= 0x1000) {
1040 limit = base + 0xfff;
1043 * Skip ranges that wouldn't work for the
1044 * original request. Note that the actual
1045 * window that overlaps are the non-alias
1046 * ranges within [base, limit], so this isn't
1047 * quite a simple comparison.
1049 if (start + count > limit - 0x400)
1053 * The first open region for the window at
1056 if (end - count + 1 < 0x400)
1059 if (end - count + 1 < base)
1063 if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) {
1072 wmask = (1ul << w->step) - 1;
1073 if (RF_ALIGNMENT(flags) < w->step) {
1074 flags &= ~RF_ALIGNMENT_MASK;
1075 flags |= RF_ALIGNMENT_LOG2(w->step);
1079 count = roundup2(count, 1ul << w->step);
1081 res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
1082 flags & ~RF_ACTIVE);
1085 pcib_add_window_resources(w, &res, 1);
1086 pcib_activate_window(sc, type);
1087 w->base = rman_get_start(res);
1088 w->limit = rman_get_end(res);
1092 /* Try to expand an existing window to the requested base and limit. */
1094 pcib_expand_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1095 u_long base, u_long limit)
1097 struct resource *res;
1098 int error, i, force_64k_base;
1100 KASSERT(base <= w->base && limit >= w->limit,
1101 ("attempting to shrink window"));
1104 * XXX: pcib_grow_window() doesn't try to do this anyway and
1105 * the error handling for all the edge cases would be tedious.
1107 KASSERT(limit == w->limit || base == w->base,
1108 ("attempting to grow both ends of a window"));
1111 * Yet more special handling for requests to expand an I/O
1112 * window behind an ISA-enabled bridge. Since I/O windows
1113 * have to grow in 0x1000 increments and the end of the 0xffff
1114 * range is an alias, growing a window below 64k will always
1115 * result in allocating new resources and never adjusting an
1116 * existing resource.
1118 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1119 (limit <= 65535 || (base <= 65535 && base != w->base))) {
1120 KASSERT(limit == w->limit || limit <= 65535,
1121 ("attempting to grow both ends across 64k ISA alias"));
1123 if (base != w->base)
1124 error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1);
1126 error = pcib_alloc_nonisa_ranges(sc, w->limit + 1,
1136 * Find the existing resource to adjust. Usually there is only one,
1137 * but for an ISA-enabled bridge we might be growing the I/O window
1138 * above 64k and need to find the existing resource that maps all
1139 * of the area above 64k.
1141 for (i = 0; i < w->count; i++) {
1142 if (rman_get_end(w->res[i]) == w->limit)
1145 KASSERT(i != w->count, ("did not find existing resource"));
1149 * Usually the resource we found should match the window's
1150 * existing range. The one exception is the ISA-enabled case
1151 * mentioned above in which case the resource should start at
1154 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1156 KASSERT(rman_get_start(res) == 65536,
1157 ("existing resource mismatch"));
1160 KASSERT(w->base == rman_get_start(res),
1161 ("existing resource mismatch"));
1165 error = bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1166 rman_get_start(res) : base, limit);
1170 /* Add the newly allocated region to the resource manager. */
1171 if (w->base != base) {
1172 error = rman_manage_region(&w->rman, base, w->base - 1);
1175 error = rman_manage_region(&w->rman, w->limit + 1, limit);
1180 device_printf(sc->dev,
1181 "failed to expand %s resource manager\n", w->name);
1182 (void)bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1183 rman_get_start(res) : w->base, w->limit);
1189 * Attempt to grow a window to make room for a given resource request.
1192 pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1193 u_long start, u_long end, u_long count, u_int flags)
1195 u_long align, start_free, end_free, front, back, wmask;
1199 * Clamp the desired resource range to the maximum address
1200 * this window supports. Reject impossible requests.
1202 * For I/O port requests behind a bridge with the ISA enable
1203 * bit set, force large allocations to start above 64k.
1207 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 &&
1210 if (end > w->rman.rm_end)
1211 end = w->rman.rm_end;
1212 if (start + count - 1 > end || start + count < start)
1214 wmask = (1ul << w->step) - 1;
1217 * If there is no resource at all, just try to allocate enough
1218 * aligned space for this resource.
1220 if (w->res == NULL) {
1221 error = pcib_alloc_new_window(sc, w, type, start, end, count,
1225 device_printf(sc->dev,
1226 "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n",
1227 w->name, start, end, count);
1231 device_printf(sc->dev,
1232 "allocated initial %s window of %#jx-%#jx\n",
1233 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1238 * See if growing the window would help. Compute the minimum
1239 * amount of address space needed on both the front and back
1240 * ends of the existing window to satisfy the allocation.
1242 * For each end, build a candidate region adjusting for the
1243 * required alignment, etc. If there is a free region at the
1244 * edge of the window, grow from the inner edge of the free
1245 * region. Otherwise grow from the window boundary.
1247 * Growing an I/O window below 64k for a bridge with the ISA
1248 * enable bit doesn't require any special magic as the step
1249 * size of an I/O window (1k) always includes multiple
1250 * non-alias ranges when it is grown in either direction.
1252 * XXX: Special case: if w->res is completely empty and the
1253 * request size is larger than w->res, we should find the
1254 * optimal aligned buffer containing w->res and allocate that.
1257 device_printf(sc->dev,
1258 "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
1259 w->name, start, end, count);
1260 align = 1ul << RF_ALIGNMENT(flags);
1261 if (start < w->base) {
1262 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
1263 0 || start_free != w->base)
1268 /* Move end_free down until it is properly aligned. */
1269 end_free &= ~(align - 1);
1271 front = end_free - (count - 1);
1274 * The resource would now be allocated at (front,
1275 * end_free). Ensure that fits in the (start, end)
1276 * bounds. end_free is checked above. If 'front' is
1277 * ok, ensure it is properly aligned for this window.
1278 * Also check for underflow.
1280 if (front >= start && front <= end_free) {
1282 printf("\tfront candidate range: %#lx-%#lx\n",
1285 front = w->base - front;
1290 if (end > w->limit) {
1291 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
1292 0 || end_free != w->limit)
1293 start_free = w->limit + 1;
1294 if (start_free < start)
1297 /* Move start_free up until it is properly aligned. */
1298 start_free = roundup2(start_free, align);
1299 back = start_free + count - 1;
1302 * The resource would now be allocated at (start_free,
1303 * back). Ensure that fits in the (start, end)
1304 * bounds. start_free is checked above. If 'back' is
1305 * ok, ensure it is properly aligned for this window.
1306 * Also check for overflow.
1308 if (back <= end && start_free <= back) {
1310 printf("\tback candidate range: %#lx-%#lx\n",
1320 * Try to allocate the smallest needed region first.
1321 * If that fails, fall back to the other region.
1324 while (front != 0 || back != 0) {
1325 if (front != 0 && (front <= back || back == 0)) {
1326 error = pcib_expand_window(sc, w, type, w->base - front,
1332 error = pcib_expand_window(sc, w, type, w->base,
1343 device_printf(sc->dev, "grew %s window to %#jx-%#jx\n",
1344 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1347 /* Write the new window. */
1348 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
1349 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
1350 pcib_write_windows(sc, w->mask);
1355 * We have to trap resource allocation requests and ensure that the bridge
1356 * is set up to, or capable of handling them.
1359 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1360 u_long start, u_long end, u_long count, u_int flags)
1362 struct pcib_softc *sc;
1365 sc = device_get_softc(dev);
1368 * VGA resources are decoded iff the VGA enable bit is set in
1369 * the bridge control register. VGA resources do not fall into
1370 * the resource windows and are passed up to the parent.
1372 if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
1373 (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
1374 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
1375 return (bus_generic_alloc_resource(dev, child, type,
1376 rid, start, end, count, flags));
1382 case SYS_RES_IOPORT:
1383 if (pcib_is_isa_range(sc, start, end, count))
1385 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
1387 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1389 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
1391 r = pcib_suballoc_resource(sc, &sc->io, child, type,
1392 rid, start, end, count, flags);
1394 case SYS_RES_MEMORY:
1396 * For prefetchable resources, prefer the prefetchable
1397 * memory window, but fall back to the regular memory
1398 * window if that fails. Try both windows before
1399 * attempting to grow a window in case the firmware
1400 * has used a range in the regular memory window to
1401 * map a prefetchable BAR.
1403 if (flags & RF_PREFETCHABLE) {
1404 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
1405 rid, start, end, count, flags);
1409 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
1410 start, end, count, flags);
1411 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1413 if (flags & RF_PREFETCHABLE) {
1414 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
1415 count, flags) == 0) {
1416 r = pcib_suballoc_resource(sc, &sc->pmem, child,
1417 type, rid, start, end, count, flags);
1422 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
1423 flags & ~RF_PREFETCHABLE) == 0)
1424 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
1425 rid, start, end, count, flags);
1428 return (bus_generic_alloc_resource(dev, child, type, rid,
1429 start, end, count, flags));
1433 * If attempts to suballocate from the window fail but this is a
1434 * subtractive bridge, pass the request up the tree.
1436 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
1437 return (bus_generic_alloc_resource(dev, child, type, rid,
1438 start, end, count, flags));
1443 pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
1444 u_long start, u_long end)
1446 struct pcib_softc *sc;
1448 sc = device_get_softc(bus);
1449 if (pcib_is_resource_managed(sc, type, r))
1450 return (rman_adjust_resource(r, start, end));
1451 return (bus_generic_adjust_resource(bus, child, type, r, start, end));
1455 pcib_release_resource(device_t dev, device_t child, int type, int rid,
1458 struct pcib_softc *sc;
1461 sc = device_get_softc(dev);
1462 if (pcib_is_resource_managed(sc, type, r)) {
1463 if (rman_get_flags(r) & RF_ACTIVE) {
1464 error = bus_deactivate_resource(child, type, rid, r);
1468 return (rman_release_resource(r));
1470 return (bus_generic_release_resource(dev, child, type, rid, r));
1474 * We have to trap resource allocation requests and ensure that the bridge
1475 * is set up to, or capable of handling them.
1478 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1479 u_long start, u_long end, u_long count, u_int flags)
1481 struct pcib_softc *sc = device_get_softc(dev);
1482 const char *name, *suffix;
1486 * Fail the allocation for this range if it's not supported.
1488 name = device_get_nameunit(child);
1495 case SYS_RES_IOPORT:
1497 if (!pcib_is_io_open(sc))
1499 ok = (start >= sc->iobase && end <= sc->iolimit);
1502 * Make sure we allow access to VGA I/O addresses when the
1503 * bridge has the "VGA Enable" bit set.
1505 if (!ok && pci_is_vga_ioport_range(start, end))
1506 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1508 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1510 if (start < sc->iobase)
1512 if (end > sc->iolimit)
1521 * If we overlap with the subtractive range, then
1522 * pick the upper range to use.
1524 if (start < sc->iolimit && end > sc->iobase)
1525 start = sc->iolimit + 1;
1529 device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
1536 device_printf(dev, "%s%srequested unsupported I/O "
1537 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
1538 name, suffix, start, end, sc->iobase, sc->iolimit);
1543 "%s%srequested I/O range 0x%lx-0x%lx: in range\n",
1544 name, suffix, start, end);
1547 case SYS_RES_MEMORY:
1549 if (pcib_is_nonprefetch_open(sc))
1550 ok = ok || (start >= sc->membase && end <= sc->memlimit);
1551 if (pcib_is_prefetch_open(sc))
1552 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
1555 * Make sure we allow access to VGA memory addresses when the
1556 * bridge has the "VGA Enable" bit set.
1558 if (!ok && pci_is_vga_memory_range(start, end))
1559 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1561 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1564 if (flags & RF_PREFETCHABLE) {
1565 if (pcib_is_prefetch_open(sc)) {
1566 if (start < sc->pmembase)
1567 start = sc->pmembase;
1568 if (end > sc->pmemlimit)
1569 end = sc->pmemlimit;
1573 } else { /* non-prefetchable */
1574 if (pcib_is_nonprefetch_open(sc)) {
1575 if (start < sc->membase)
1576 start = sc->membase;
1577 if (end > sc->memlimit)
1585 ok = 1; /* subtractive bridge: always ok */
1587 if (pcib_is_nonprefetch_open(sc)) {
1588 if (start < sc->memlimit && end > sc->membase)
1589 start = sc->memlimit + 1;
1591 if (pcib_is_prefetch_open(sc)) {
1592 if (start < sc->pmemlimit && end > sc->pmembase)
1593 start = sc->pmemlimit + 1;
1598 device_printf(dev, "memory: end (%lx) < start (%lx)\n",
1604 if (!ok && bootverbose)
1606 "%s%srequested unsupported memory range %#lx-%#lx "
1607 "(decoding %#jx-%#jx, %#jx-%#jx)\n",
1608 name, suffix, start, end,
1609 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
1610 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1614 device_printf(dev,"%s%srequested memory range "
1615 "0x%lx-0x%lx: good\n",
1616 name, suffix, start, end);
1623 * Bridge is OK decoding this resource, so pass it up.
1625 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1634 pcib_maxslots(device_t dev)
1636 return(PCI_SLOTMAX);
1640 * Since we are a child of a PCI bus, its parent must support the pcib interface.
1643 pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
1645 return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width));
1649 pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
1651 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);
1655 * Route an interrupt across a PCI bridge.
1658 pcib_route_interrupt(device_t pcib, device_t dev, int pin)
1666 * The PCI standard defines a swizzle of the child-side device/intpin to
1667 * the parent-side intpin as follows.
1669 * device = device on child bus
1670 * child_intpin = intpin on child bus slot (0-3)
1671 * parent_intpin = intpin on parent bus slot (0-3)
1673 * parent_intpin = (device + child_intpin) % 4
1675 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
1678 * Our parent is a PCI bus. Its parent must export the pcib interface
1679 * which includes the ability to route interrupts.
1681 bus = device_get_parent(pcib);
1682 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
1683 if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
1684 device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
1685 pci_get_slot(dev), 'A' + pin - 1, intnum);
1690 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
1692 pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
1694 struct pcib_softc *sc = device_get_softc(pcib);
1697 if (sc->flags & PCIB_DISABLE_MSI)
1699 bus = device_get_parent(pcib);
1700 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
1704 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
1706 pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
1710 bus = device_get_parent(pcib);
1711 return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
1714 /* Pass request to alloc an MSI-X message up to the parent bridge. */
1716 pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
1718 struct pcib_softc *sc = device_get_softc(pcib);
1721 if (sc->flags & PCIB_DISABLE_MSIX)
1723 bus = device_get_parent(pcib);
1724 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
1727 /* Pass request to release an MSI-X message up to the parent bridge. */
1729 pcib_release_msix(device_t pcib, device_t dev, int irq)
1733 bus = device_get_parent(pcib);
1734 return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
1737 /* Pass request to map MSI/MSI-X message up to parent bridge. */
1739 pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
1745 bus = device_get_parent(pcib);
1746 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
1750 pci_ht_map_msi(pcib, *addr);
1754 /* Pass request for device power state up to parent bridge. */
1756 pcib_power_for_sleep(device_t pcib, device_t dev, int *pstate)
1760 bus = device_get_parent(pcib);
1761 return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate));