2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * PCI:PCI bridge support.
38 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
44 #include <sys/sysctl.h>
45 #include <sys/systm.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pci_private.h>
50 #include <dev/pci/pcib_private.h>
54 static int pcib_probe(device_t dev);
55 static int pcib_suspend(device_t dev);
56 static int pcib_resume(device_t dev);
57 static int pcib_power_for_sleep(device_t pcib, device_t dev,
60 static device_method_t pcib_methods[] = {
61 /* Device interface */
62 DEVMETHOD(device_probe, pcib_probe),
63 DEVMETHOD(device_attach, pcib_attach),
64 DEVMETHOD(device_detach, bus_generic_detach),
65 DEVMETHOD(device_shutdown, bus_generic_shutdown),
66 DEVMETHOD(device_suspend, pcib_suspend),
67 DEVMETHOD(device_resume, pcib_resume),
70 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
71 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
72 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
74 DEVMETHOD(bus_adjust_resource, pcib_adjust_resource),
75 DEVMETHOD(bus_release_resource, pcib_release_resource),
77 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
78 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
80 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
81 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
82 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
83 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
86 DEVMETHOD(pcib_maxslots, pcib_maxslots),
87 DEVMETHOD(pcib_read_config, pcib_read_config),
88 DEVMETHOD(pcib_write_config, pcib_write_config),
89 DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
90 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
91 DEVMETHOD(pcib_release_msi, pcib_release_msi),
92 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
93 DEVMETHOD(pcib_release_msix, pcib_release_msix),
94 DEVMETHOD(pcib_map_msi, pcib_map_msi),
95 DEVMETHOD(pcib_power_for_sleep, pcib_power_for_sleep),
100 static devclass_t pcib_devclass;
102 DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
103 DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, 0, 0);
108 * - properly handle the ISA enable bit. If it is set, we should change
109 * the behavior of the I/O window resource and rman to not allocate the
110 * blocked ranges (upper 768 bytes of each 1K in the first 64k of the
111 * I/O port address space).
115 * Is a resource from a child device sub-allocated from one of our
119 pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
124 return (rman_is_region_manager(r, &sc->io.rman));
126 /* Prefetchable resources may live in either memory rman. */
127 if (rman_get_flags(r) & RF_PREFETCHABLE &&
128 rman_is_region_manager(r, &sc->pmem.rman))
130 return (rman_is_region_manager(r, &sc->mem.rman));
136 pcib_is_window_open(struct pcib_window *pw)
139 return (pw->valid && pw->base < pw->limit);
143 * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
144 * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
145 * when allocating the resource windows and rely on the PCI bus driver
149 pcib_activate_window(struct pcib_softc *sc, int type)
152 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
156 pcib_write_windows(struct pcib_softc *sc, int mask)
162 if (sc->io.valid && mask & WIN_IO) {
163 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
164 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
165 pci_write_config(dev, PCIR_IOBASEH_1,
166 sc->io.base >> 16, 2);
167 pci_write_config(dev, PCIR_IOLIMITH_1,
168 sc->io.limit >> 16, 2);
170 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
171 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
174 if (mask & WIN_MEM) {
175 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
176 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
179 if (sc->pmem.valid && mask & WIN_PMEM) {
180 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
181 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
182 pci_write_config(dev, PCIR_PMBASEH_1,
183 sc->pmem.base >> 32, 4);
184 pci_write_config(dev, PCIR_PMLIMITH_1,
185 sc->pmem.limit >> 32, 4);
187 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
188 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
193 pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
194 int flags, pci_addr_t max_address)
199 if (max_address != (u_long)max_address)
201 w->rman.rm_start = 0;
202 w->rman.rm_end = max_address;
203 w->rman.rm_type = RMAN_ARRAY;
204 snprintf(buf, sizeof(buf), "%s %s window",
205 device_get_nameunit(sc->dev), w->name);
206 w->rman.rm_descr = strdup(buf, M_DEVBUF);
207 error = rman_init(&w->rman);
209 panic("Failed to initialize %s %s rman",
210 device_get_nameunit(sc->dev), w->name);
212 if (!pcib_is_window_open(w))
215 if (w->base > max_address || w->limit > max_address) {
216 device_printf(sc->dev,
217 "initial %s window has too many bits, ignoring\n", w->name);
221 w->res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
222 w->limit - w->base + 1, flags);
223 if (w->res == NULL) {
224 device_printf(sc->dev,
225 "failed to allocate initial %s window: %#jx-%#jx\n",
226 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
227 w->base = max_address;
229 pcib_write_windows(sc, w->mask);
232 pcib_activate_window(sc, type);
234 error = rman_manage_region(&w->rman, rman_get_start(w->res),
235 rman_get_end(w->res));
237 panic("Failed to initialize rman with resource");
241 * Initialize I/O windows.
244 pcib_probe_windows(struct pcib_softc *sc)
252 /* Determine if the I/O port window is implemented. */
253 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
256 * If 'val' is zero, then only 16-bits of I/O space
259 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
260 if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
262 pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
267 /* Read the existing I/O port window. */
269 sc->io.reg = PCIR_IOBASEL_1;
271 sc->io.mask = WIN_IO;
272 sc->io.name = "I/O port";
273 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
274 sc->io.base = PCI_PPBIOBASE(
275 pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
276 sc->io.limit = PCI_PPBIOLIMIT(
277 pci_read_config(dev, PCIR_IOLIMITH_1, 2),
278 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
281 sc->io.base = PCI_PPBIOBASE(0, val);
282 sc->io.limit = PCI_PPBIOLIMIT(0,
283 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
286 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
289 /* Read the existing memory window. */
291 sc->mem.reg = PCIR_MEMBASE_1;
293 sc->mem.mask = WIN_MEM;
294 sc->mem.name = "memory";
295 sc->mem.base = PCI_PPBMEMBASE(0,
296 pci_read_config(dev, PCIR_MEMBASE_1, 2));
297 sc->mem.limit = PCI_PPBMEMLIMIT(0,
298 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
299 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
301 /* Determine if the prefetchable memory window is implemented. */
302 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
305 * If 'val' is zero, then only 32-bits of memory space
308 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
309 if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
311 pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
316 /* Read the existing prefetchable memory window. */
317 if (sc->pmem.valid) {
318 sc->pmem.reg = PCIR_PMBASEL_1;
320 sc->pmem.mask = WIN_PMEM;
321 sc->pmem.name = "prefetch";
322 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
323 sc->pmem.base = PCI_PPBMEMBASE(
324 pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
325 sc->pmem.limit = PCI_PPBMEMLIMIT(
326 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
327 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
328 max = 0xffffffffffffffff;
330 sc->pmem.base = PCI_PPBMEMBASE(0, val);
331 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
332 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
335 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
336 RF_PREFETCHABLE, max);
343 * Is the prefetch window open (eg, can we allocate memory in it?)
346 pcib_is_prefetch_open(struct pcib_softc *sc)
348 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
352 * Is the nonprefetch window open (eg, can we allocate memory in it?)
355 pcib_is_nonprefetch_open(struct pcib_softc *sc)
357 return (sc->membase > 0 && sc->membase < sc->memlimit);
361 * Is the io window open (eg, can we allocate ports in it?)
364 pcib_is_io_open(struct pcib_softc *sc)
366 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
370 * Get current I/O decode.
373 pcib_get_io_decode(struct pcib_softc *sc)
380 iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
381 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
382 sc->iobase = PCI_PPBIOBASE(
383 pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow);
385 sc->iobase = PCI_PPBIOBASE(0, iolow);
387 iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
388 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
389 sc->iolimit = PCI_PPBIOLIMIT(
390 pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow);
392 sc->iolimit = PCI_PPBIOLIMIT(0, iolow);
396 * Get current memory decode.
399 pcib_get_mem_decode(struct pcib_softc *sc)
406 sc->membase = PCI_PPBMEMBASE(0,
407 pci_read_config(dev, PCIR_MEMBASE_1, 2));
408 sc->memlimit = PCI_PPBMEMLIMIT(0,
409 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
411 pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2);
412 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
413 sc->pmembase = PCI_PPBMEMBASE(
414 pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow);
416 sc->pmembase = PCI_PPBMEMBASE(0, pmemlow);
418 pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2);
419 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
420 sc->pmemlimit = PCI_PPBMEMLIMIT(
421 pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow);
423 sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow);
427 * Restore previous I/O decode.
430 pcib_set_io_decode(struct pcib_softc *sc)
437 iohi = sc->iobase >> 16;
439 pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2);
440 pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1);
442 iohi = sc->iolimit >> 16;
444 pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2);
445 pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1);
449 * Restore previous memory decode.
452 pcib_set_mem_decode(struct pcib_softc *sc)
459 pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2);
460 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2);
462 pmemhi = sc->pmembase >> 32;
464 pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4);
465 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2);
467 pmemhi = sc->pmemlimit >> 32;
469 pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4);
470 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2);
475 * Get current bridge configuration.
478 pcib_cfg_save(struct pcib_softc *sc)
484 sc->command = pci_read_config(dev, PCIR_COMMAND, 2);
485 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1);
486 sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
487 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
488 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
489 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
491 if (sc->command & PCIM_CMD_PORTEN)
492 pcib_get_io_decode(sc);
493 if (sc->command & PCIM_CMD_MEMEN)
494 pcib_get_mem_decode(sc);
499 * Restore previous bridge configuration.
502 pcib_cfg_restore(struct pcib_softc *sc)
508 pci_write_config(dev, PCIR_COMMAND, sc->command, 2);
509 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
510 pci_write_config(dev, PCIR_SECBUS_1, sc->secbus, 1);
511 pci_write_config(dev, PCIR_SUBBUS_1, sc->subbus, 1);
512 pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2);
513 pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1);
515 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM);
517 if (sc->command & PCIM_CMD_PORTEN)
518 pcib_set_io_decode(sc);
519 if (sc->command & PCIM_CMD_MEMEN)
520 pcib_set_mem_decode(sc);
525 * Generic device interface
528 pcib_probe(device_t dev)
530 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
531 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
532 device_set_desc(dev, "PCI-PCI bridge");
539 pcib_attach_common(device_t dev)
541 struct pcib_softc *sc;
542 struct sysctl_ctx_list *sctx;
543 struct sysctl_oid *soid;
545 sc = device_get_softc(dev);
549 * Get current bridge configuration.
551 sc->domain = pci_get_domain(dev);
552 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
556 * Setup sysctl reporting nodes
558 sctx = device_get_sysctl_ctx(dev);
559 soid = device_get_sysctl_tree(dev);
560 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
561 CTLFLAG_RD, &sc->domain, 0, "Domain number");
562 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
563 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
564 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
565 CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number");
566 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
567 CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
572 switch (pci_get_devid(dev)) {
573 case 0x12258086: /* Intel 82454KX/GX (Orion) */
577 supbus = pci_read_config(dev, 0x41, 1);
578 if (supbus != 0xff) {
579 sc->secbus = supbus + 1;
580 sc->subbus = supbus + 1;
586 * The i82380FB mobile docking controller is a PCI-PCI bridge,
587 * and it is a subtractive bridge. However, the ProgIf is wrong
588 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
589 * happen. There's also a Toshiba bridge that behaves this
592 case 0x124b8086: /* Intel 82380FB Mobile */
593 case 0x060513d7: /* Toshiba ???? */
594 sc->flags |= PCIB_SUBTRACTIVE;
597 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
602 if ((cp = getenv("smbios.planar.maker")) == NULL)
604 if (strncmp(cp, "Compal", 6) != 0) {
609 if ((cp = getenv("smbios.planar.product")) == NULL)
611 if (strncmp(cp, "08A0", 4) != 0) {
616 if (sc->subbus < 0xa) {
617 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
618 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
624 if (pci_msi_device_blacklisted(dev))
625 sc->flags |= PCIB_DISABLE_MSI;
628 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
629 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
630 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
631 * This means they act as if they were subtractively decoding
632 * bridges and pass all transactions. Mark them and real ProgIf 1
633 * parts as subtractive.
635 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
636 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
637 sc->flags |= PCIB_SUBTRACTIVE;
640 pcib_probe_windows(sc);
643 device_printf(dev, " domain %d\n", sc->domain);
644 device_printf(dev, " secondary bus %d\n", sc->secbus);
645 device_printf(dev, " subordinate bus %d\n", sc->subbus);
647 if (pcib_is_window_open(&sc->io))
648 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
649 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
650 if (pcib_is_window_open(&sc->mem))
651 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
652 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
653 if (pcib_is_window_open(&sc->pmem))
654 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
655 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
657 if (pcib_is_io_open(sc))
658 device_printf(dev, " I/O decode 0x%x-0x%x\n",
659 sc->iobase, sc->iolimit);
660 if (pcib_is_nonprefetch_open(sc))
661 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
662 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
663 if (pcib_is_prefetch_open(sc))
664 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
665 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
668 device_printf(dev, " no prefetched decode\n");
669 if (sc->flags & PCIB_SUBTRACTIVE)
670 device_printf(dev, " Subtractively decoded bridge.\n");
674 * XXX If the secondary bus number is zero, we should assign a bus number
675 * since the BIOS hasn't, then initialise the bridge. A simple
676 * bus_alloc_resource with the a couple of busses seems like the right
677 * approach, but we don't know what busses the BIOS might have already
678 * assigned to other bridges on this bus that probe later than we do.
680 * If the subordinate bus number is less than the secondary bus number,
681 * we should pick a better value. One sensible alternative would be to
682 * pick 255; the only tradeoff here is that configuration transactions
683 * would be more widely routed than absolutely necessary. We could
684 * then do a walk of the tree later and fix it.
688 * Always enable busmastering on bridges so that transactions
689 * initiated on the secondary bus are passed through to the
692 pci_enable_busmaster(dev);
696 pcib_attach(device_t dev)
698 struct pcib_softc *sc;
701 pcib_attach_common(dev);
702 sc = device_get_softc(dev);
703 if (sc->secbus != 0) {
704 child = device_add_child(dev, "pci", sc->secbus);
706 return(bus_generic_attach(dev));
709 /* no secondary bus; we should have fixed this */
714 pcib_suspend(device_t dev)
719 pcib_cfg_save(device_get_softc(dev));
720 error = bus_generic_suspend(dev);
721 if (error == 0 && pci_do_power_suspend) {
722 dstate = PCI_POWERSTATE_D3;
723 pcib = device_get_parent(device_get_parent(dev));
724 if (PCIB_POWER_FOR_SLEEP(pcib, dev, &dstate) == 0)
725 pci_set_powerstate(dev, dstate);
731 pcib_resume(device_t dev)
735 if (pci_do_power_resume) {
736 pcib = device_get_parent(device_get_parent(dev));
737 if (PCIB_POWER_FOR_SLEEP(pcib, dev, NULL) == 0)
738 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
740 pcib_cfg_restore(device_get_softc(dev));
741 return (bus_generic_resume(dev));
745 pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
747 struct pcib_softc *sc = device_get_softc(dev);
750 case PCIB_IVAR_DOMAIN:
751 *result = sc->domain;
754 *result = sc->secbus;
761 pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
763 struct pcib_softc *sc = device_get_softc(dev);
766 case PCIB_IVAR_DOMAIN:
777 * Attempt to allocate a resource from the existing resources assigned
780 static struct resource *
781 pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
782 device_t child, int type, int *rid, u_long start, u_long end, u_long count,
785 struct resource *res;
787 if (!pcib_is_window_open(w))
790 res = rman_reserve_resource(&w->rman, start, end, count,
791 flags & ~RF_ACTIVE, child);
796 device_printf(sc->dev,
797 "allocated %s range (%#lx-%#lx) for rid %x of %s\n",
798 w->name, rman_get_start(res), rman_get_end(res), *rid,
799 pcib_child_name(child));
800 rman_set_rid(res, *rid);
803 * If the resource should be active, pass that request up the
804 * tree. This assumes the parent drivers can handle
805 * activating sub-allocated resources.
807 if (flags & RF_ACTIVE) {
808 if (bus_activate_resource(child, type, *rid, res) != 0) {
809 rman_release_resource(res);
818 * Attempt to grow a window to make room for a given resource request.
819 * The 'step' parameter is log_2 of the desired I/O window's alignment.
822 pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
823 u_long start, u_long end, u_long count, u_int flags)
825 u_long align, start_free, end_free, front, back, wmask;
829 * Clamp the desired resource range to the maximum address
830 * this window supports. Reject impossible requests.
834 if (end > w->rman.rm_end)
835 end = w->rman.rm_end;
836 if (start + count - 1 > end || start + count < start)
838 wmask = (1ul << w->step) - 1;
841 * If there is no resource at all, just try to allocate enough
842 * aligned space for this resource.
844 if (w->res == NULL) {
845 if (RF_ALIGNMENT(flags) < w->step) {
846 flags &= ~RF_ALIGNMENT_MASK;
847 flags |= RF_ALIGNMENT_LOG2(w->step);
851 count = roundup2(count, 1ul << w->step);
853 w->res = bus_alloc_resource(sc->dev, type, &rid, start, end,
854 count, flags & ~RF_ACTIVE);
855 if (w->res == NULL) {
857 device_printf(sc->dev,
858 "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n",
859 w->name, start, end, count);
863 device_printf(sc->dev,
864 "allocated initial %s window of %#lx-%#lx\n",
865 w->name, rman_get_start(w->res),
866 rman_get_end(w->res));
867 error = rman_manage_region(&w->rman, rman_get_start(w->res),
868 rman_get_end(w->res));
871 device_printf(sc->dev,
872 "failed to add initial %s window to rman\n",
874 bus_release_resource(sc->dev, type, w->reg, w->res);
878 pcib_activate_window(sc, type);
883 * See if growing the window would help. Compute the minimum
884 * amount of address space needed on both the front and back
885 * ends of the existing window to satisfy the allocation.
887 * For each end, build a candidate region adjusting for the
888 * required alignment, etc. If there is a free region at the
889 * edge of the window, grow from the inner edge of the free
890 * region. Otherwise grow from the window boundary.
892 * XXX: Special case: if w->res is completely empty and the
893 * request size is larger than w->res, we should find the
894 * optimal aligned buffer containing w->res and allocate that.
897 device_printf(sc->dev,
898 "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
899 w->name, start, end, count);
900 align = 1ul << RF_ALIGNMENT(flags);
901 if (start < rman_get_start(w->res)) {
902 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
903 0 || start_free != rman_get_start(w->res))
904 end_free = rman_get_start(w->res);
908 /* Move end_free down until it is properly aligned. */
909 end_free &= ~(align - 1);
911 front = end_free - (count - 1);
914 * The resource would now be allocated at (front,
915 * end_free). Ensure that fits in the (start, end)
916 * bounds. end_free is checked above. If 'front' is
917 * ok, ensure it is properly aligned for this window.
918 * Also check for underflow.
920 if (front >= start && front <= end_free) {
922 printf("\tfront candidate range: %#lx-%#lx\n",
925 front = rman_get_start(w->res) - front;
930 if (end > rman_get_end(w->res)) {
931 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
932 0 || end_free != rman_get_end(w->res))
933 start_free = rman_get_end(w->res) + 1;
934 if (start_free < start)
937 /* Move start_free up until it is properly aligned. */
938 start_free = roundup2(start_free, align);
939 back = start_free + count - 1;
942 * The resource would now be allocated at (start_free,
943 * back). Ensure that fits in the (start, end)
944 * bounds. start_free is checked above. If 'back' is
945 * ok, ensure it is properly aligned for this window.
946 * Also check for overflow.
948 if (back <= end && start_free <= back) {
950 printf("\tback candidate range: %#lx-%#lx\n",
953 back -= rman_get_end(w->res);
960 * Try to allocate the smallest needed region first.
961 * If that fails, fall back to the other region.
964 while (front != 0 || back != 0) {
965 if (front != 0 && (front <= back || back == 0)) {
966 error = bus_adjust_resource(sc->dev, type, w->res,
967 rman_get_start(w->res) - front,
968 rman_get_end(w->res));
973 error = bus_adjust_resource(sc->dev, type, w->res,
974 rman_get_start(w->res),
975 rman_get_end(w->res) + back);
985 device_printf(sc->dev, "grew %s window to %#lx-%#lx\n",
986 w->name, rman_get_start(w->res), rman_get_end(w->res));
988 /* Add the newly allocated region to the resource manager. */
989 if (w->base != rman_get_start(w->res)) {
990 KASSERT(w->limit == rman_get_end(w->res), ("both ends moved"));
991 error = rman_manage_region(&w->rman, rman_get_start(w->res),
994 KASSERT(w->limit != rman_get_end(w->res),
995 ("neither end moved"));
996 error = rman_manage_region(&w->rman, w->limit + 1,
997 rman_get_end(w->res));
1001 device_printf(sc->dev,
1002 "failed to expand %s resource manager\n", w->name);
1003 bus_adjust_resource(sc->dev, type, w->res, w->base, w->limit);
1008 /* Save the new window. */
1009 w->base = rman_get_start(w->res);
1010 w->limit = rman_get_end(w->res);
1011 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
1012 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
1013 pcib_write_windows(sc, w->mask);
1018 * We have to trap resource allocation requests and ensure that the bridge
1019 * is set up to, or capable of handling them.
1022 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1023 u_long start, u_long end, u_long count, u_int flags)
1025 struct pcib_softc *sc;
1028 sc = device_get_softc(dev);
1031 * VGA resources are decoded iff the VGA enable bit is set in
1032 * the bridge control register. VGA resources do not fall into
1033 * the resource windows and are passed up to the parent.
1035 if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
1036 (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
1037 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
1038 return (bus_generic_alloc_resource(dev, child, type,
1039 rid, start, end, count, flags));
1045 case SYS_RES_IOPORT:
1046 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
1048 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1050 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
1052 r = pcib_suballoc_resource(sc, &sc->io, child, type,
1053 rid, start, end, count, flags);
1055 case SYS_RES_MEMORY:
1057 * For prefetchable resources, prefer the prefetchable
1058 * memory window, but fall back to the regular memory
1059 * window if that fails. Try both windows before
1060 * attempting to grow a window in case the firmware
1061 * has used a range in the regular memory window to
1062 * map a prefetchable BAR.
1064 if (flags & RF_PREFETCHABLE) {
1065 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
1066 rid, start, end, count, flags);
1070 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
1071 start, end, count, flags);
1072 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1074 if (flags & RF_PREFETCHABLE) {
1075 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
1076 count, flags) == 0) {
1077 r = pcib_suballoc_resource(sc, &sc->pmem, child,
1078 type, rid, start, end, count, flags);
1083 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
1084 flags & ~RF_PREFETCHABLE) == 0)
1085 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
1086 rid, start, end, count, flags);
1089 return (bus_generic_alloc_resource(dev, child, type, rid,
1090 start, end, count, flags));
1094 * If attempts to suballocate from the window fail but this is a
1095 * subtractive bridge, pass the request up the tree.
1097 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
1098 return (bus_generic_alloc_resource(dev, child, type, rid,
1099 start, end, count, flags));
1104 pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
1105 u_long start, u_long end)
1107 struct pcib_softc *sc;
1109 sc = device_get_softc(bus);
1110 if (pcib_is_resource_managed(sc, type, r))
1111 return (rman_adjust_resource(r, start, end));
1112 return (bus_generic_adjust_resource(bus, child, type, r, start, end));
1116 pcib_release_resource(device_t dev, device_t child, int type, int rid,
1119 struct pcib_softc *sc;
1122 sc = device_get_softc(dev);
1123 if (pcib_is_resource_managed(sc, type, r)) {
1124 if (rman_get_flags(r) & RF_ACTIVE) {
1125 error = bus_deactivate_resource(child, type, rid, r);
1129 return (rman_release_resource(r));
1131 return (bus_generic_release_resource(dev, child, type, rid, r));
1135 * We have to trap resource allocation requests and ensure that the bridge
1136 * is set up to, or capable of handling them.
1139 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1140 u_long start, u_long end, u_long count, u_int flags)
1142 struct pcib_softc *sc = device_get_softc(dev);
1143 const char *name, *suffix;
1147 * Fail the allocation for this range if it's not supported.
1149 name = device_get_nameunit(child);
1156 case SYS_RES_IOPORT:
1158 if (!pcib_is_io_open(sc))
1160 ok = (start >= sc->iobase && end <= sc->iolimit);
1163 * Make sure we allow access to VGA I/O addresses when the
1164 * bridge has the "VGA Enable" bit set.
1166 if (!ok && pci_is_vga_ioport_range(start, end))
1167 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1169 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1171 if (start < sc->iobase)
1173 if (end > sc->iolimit)
1182 * If we overlap with the subtractive range, then
1183 * pick the upper range to use.
1185 if (start < sc->iolimit && end > sc->iobase)
1186 start = sc->iolimit + 1;
1190 device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
1197 device_printf(dev, "%s%srequested unsupported I/O "
1198 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
1199 name, suffix, start, end, sc->iobase, sc->iolimit);
1204 "%s%srequested I/O range 0x%lx-0x%lx: in range\n",
1205 name, suffix, start, end);
1208 case SYS_RES_MEMORY:
1210 if (pcib_is_nonprefetch_open(sc))
1211 ok = ok || (start >= sc->membase && end <= sc->memlimit);
1212 if (pcib_is_prefetch_open(sc))
1213 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
1216 * Make sure we allow access to VGA memory addresses when the
1217 * bridge has the "VGA Enable" bit set.
1219 if (!ok && pci_is_vga_memory_range(start, end))
1220 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1222 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1225 if (flags & RF_PREFETCHABLE) {
1226 if (pcib_is_prefetch_open(sc)) {
1227 if (start < sc->pmembase)
1228 start = sc->pmembase;
1229 if (end > sc->pmemlimit)
1230 end = sc->pmemlimit;
1234 } else { /* non-prefetchable */
1235 if (pcib_is_nonprefetch_open(sc)) {
1236 if (start < sc->membase)
1237 start = sc->membase;
1238 if (end > sc->memlimit)
1246 ok = 1; /* subtractive bridge: always ok */
1248 if (pcib_is_nonprefetch_open(sc)) {
1249 if (start < sc->memlimit && end > sc->membase)
1250 start = sc->memlimit + 1;
1252 if (pcib_is_prefetch_open(sc)) {
1253 if (start < sc->pmemlimit && end > sc->pmembase)
1254 start = sc->pmemlimit + 1;
1259 device_printf(dev, "memory: end (%lx) < start (%lx)\n",
1265 if (!ok && bootverbose)
1267 "%s%srequested unsupported memory range %#lx-%#lx "
1268 "(decoding %#jx-%#jx, %#jx-%#jx)\n",
1269 name, suffix, start, end,
1270 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
1271 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1275 device_printf(dev,"%s%srequested memory range "
1276 "0x%lx-0x%lx: good\n",
1277 name, suffix, start, end);
1284 * Bridge is OK decoding this resource, so pass it up.
1286 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1295 pcib_maxslots(device_t dev)
1297 return(PCI_SLOTMAX);
1301 * Since we are a child of a PCI bus, its parent must support the pcib interface.
1304 pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
1306 return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width));
1310 pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
1312 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);
1316 * Route an interrupt across a PCI bridge.
1319 pcib_route_interrupt(device_t pcib, device_t dev, int pin)
1327 * The PCI standard defines a swizzle of the child-side device/intpin to
1328 * the parent-side intpin as follows.
1330 * device = device on child bus
1331 * child_intpin = intpin on child bus slot (0-3)
1332 * parent_intpin = intpin on parent bus slot (0-3)
1334 * parent_intpin = (device + child_intpin) % 4
1336 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
1339 * Our parent is a PCI bus. Its parent must export the pcib interface
1340 * which includes the ability to route interrupts.
1342 bus = device_get_parent(pcib);
1343 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
1344 if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
1345 device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
1346 pci_get_slot(dev), 'A' + pin - 1, intnum);
1351 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
1353 pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
1355 struct pcib_softc *sc = device_get_softc(pcib);
1358 if (sc->flags & PCIB_DISABLE_MSI)
1360 bus = device_get_parent(pcib);
1361 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
1365 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
1367 pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
1371 bus = device_get_parent(pcib);
1372 return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
1375 /* Pass request to alloc an MSI-X message up to the parent bridge. */
1377 pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
1379 struct pcib_softc *sc = device_get_softc(pcib);
1382 if (sc->flags & PCIB_DISABLE_MSI)
1384 bus = device_get_parent(pcib);
1385 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
1388 /* Pass request to release an MSI-X message up to the parent bridge. */
1390 pcib_release_msix(device_t pcib, device_t dev, int irq)
1394 bus = device_get_parent(pcib);
1395 return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
1398 /* Pass request to map MSI/MSI-X message up to parent bridge. */
1400 pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
1406 bus = device_get_parent(pcib);
1407 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
1411 pci_ht_map_msi(pcib, *addr);
1415 /* Pass request for device power state up to parent bridge. */
1417 pcib_power_for_sleep(device_t pcib, device_t dev, int *pstate)
1421 bus = device_get_parent(pcib);
1422 return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate));