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1 /*-
2  * Copyright (c) 2017 Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  */
25
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/bus.h>
32 #include <sys/kernel.h>
33 #include <sys/lock.h>
34 #include <sys/module.h>
35 #include <sys/mutex.h>
36 #include <sys/resource.h>
37 #include <sys/rman.h>
38 #include <sys/sysctl.h>
39 #include <sys/taskqueue.h>
40
41 #include <machine/bus.h>
42 #include <machine/resource.h>
43
44 #include <contrib/dev/acpica/include/acpi.h>
45 #include <dev/acpica/acpivar.h>
46
47 #include <dev/mmc/bridge.h>
48
49 #include <dev/sdhci/sdhci.h>
50
51 #include "mmcbr_if.h"
52 #include "sdhci_if.h"
53
54 static const struct sdhci_acpi_device {
55         const char*     hid;
56         int             uid;
57         const char      *desc;
58         u_int           quirks;
59 } sdhci_acpi_devices[] = {
60         { "80860F14",   1, "Intel Bay Trail/Braswell eMMC 4.5/4.5.1 Controller",
61             SDHCI_QUIRK_INTEL_POWER_UP_RESET |
62             SDHCI_QUIRK_WAIT_WHILE_BUSY |
63             SDHCI_QUIRK_MMC_DDR52 |
64             SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
65             SDHCI_QUIRK_PRESET_VALUE_BROKEN },
66         { "80860F14",   3, "Intel Bay Trail/Braswell SDXC Controller",
67             SDHCI_QUIRK_WAIT_WHILE_BUSY |
68             SDHCI_QUIRK_PRESET_VALUE_BROKEN },
69         { "80860F16",   0, "Intel Bay Trail/Braswell SDXC Controller",
70             SDHCI_QUIRK_WAIT_WHILE_BUSY |
71             SDHCI_QUIRK_PRESET_VALUE_BROKEN },
72         { "80865ACA",   0, "Intel Apollo Lake SDXC Controller",
73             SDHCI_QUIRK_BROKEN_DMA |    /* APL18 erratum */
74             SDHCI_QUIRK_WAIT_WHILE_BUSY |
75             SDHCI_QUIRK_PRESET_VALUE_BROKEN },
76         { "80865ACC",   0, "Intel Apollo Lake eMMC 5.0 Controller",
77             SDHCI_QUIRK_BROKEN_DMA |    /* APL18 erratum */
78             SDHCI_QUIRK_INTEL_POWER_UP_RESET |
79             SDHCI_QUIRK_WAIT_WHILE_BUSY |
80             SDHCI_QUIRK_MMC_DDR52 |
81             SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 |
82             SDHCI_QUIRK_PRESET_VALUE_BROKEN },
83         { NULL, 0, NULL, 0}
84 };
85
86 static char *sdhci_ids[] = {
87         "80860F14",
88         "80860F16",
89         "80865ACA",
90         "80865ACC",
91         NULL
92 };
93
94 struct sdhci_acpi_softc {
95         u_int           quirks;         /* Chip specific quirks */
96         struct resource *irq_res;       /* IRQ resource */
97         void            *intrhand;      /* Interrupt handle */
98
99         struct sdhci_slot slot;
100         struct resource *mem_res;       /* Memory resource */
101 };
102
103 static void sdhci_acpi_intr(void *arg);
104 static int sdhci_acpi_detach(device_t dev);
105
106 static uint8_t
107 sdhci_acpi_read_1(device_t dev, struct sdhci_slot *slot __unused,
108     bus_size_t off)
109 {
110         struct sdhci_acpi_softc *sc = device_get_softc(dev);
111
112         bus_barrier(sc->mem_res, 0, 0xFF,
113             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
114         return bus_read_1(sc->mem_res, off);
115 }
116
117 static void
118 sdhci_acpi_write_1(device_t dev, struct sdhci_slot *slot __unused,
119     bus_size_t off, uint8_t val)
120 {
121         struct sdhci_acpi_softc *sc = device_get_softc(dev);
122
123         bus_barrier(sc->mem_res, 0, 0xFF,
124             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
125         bus_write_1(sc->mem_res, off, val);
126 }
127
128 static uint16_t
129 sdhci_acpi_read_2(device_t dev, struct sdhci_slot *slot __unused,
130     bus_size_t off)
131 {
132         struct sdhci_acpi_softc *sc = device_get_softc(dev);
133
134         bus_barrier(sc->mem_res, 0, 0xFF,
135             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
136         return bus_read_2(sc->mem_res, off);
137 }
138
139 static void
140 sdhci_acpi_write_2(device_t dev, struct sdhci_slot *slot __unused,
141     bus_size_t off, uint16_t val)
142 {
143         struct sdhci_acpi_softc *sc = device_get_softc(dev);
144
145         bus_barrier(sc->mem_res, 0, 0xFF,
146             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
147         bus_write_2(sc->mem_res, off, val);
148 }
149
150 static uint32_t
151 sdhci_acpi_read_4(device_t dev, struct sdhci_slot *slot __unused,
152     bus_size_t off)
153 {
154         struct sdhci_acpi_softc *sc = device_get_softc(dev);
155
156         bus_barrier(sc->mem_res, 0, 0xFF,
157             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
158         return bus_read_4(sc->mem_res, off);
159 }
160
161 static void
162 sdhci_acpi_write_4(device_t dev, struct sdhci_slot *slot __unused,
163     bus_size_t off, uint32_t val)
164 {
165         struct sdhci_acpi_softc *sc = device_get_softc(dev);
166
167         bus_barrier(sc->mem_res, 0, 0xFF,
168             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
169         bus_write_4(sc->mem_res, off, val);
170 }
171
172 static void
173 sdhci_acpi_read_multi_4(device_t dev, struct sdhci_slot *slot __unused,
174     bus_size_t off, uint32_t *data, bus_size_t count)
175 {
176         struct sdhci_acpi_softc *sc = device_get_softc(dev);
177
178         bus_read_multi_stream_4(sc->mem_res, off, data, count);
179 }
180
181 static void
182 sdhci_acpi_write_multi_4(device_t dev, struct sdhci_slot *slot __unused,
183     bus_size_t off, uint32_t *data, bus_size_t count)
184 {
185         struct sdhci_acpi_softc *sc = device_get_softc(dev);
186
187         bus_write_multi_stream_4(sc->mem_res, off, data, count);
188 }
189
190 static const struct sdhci_acpi_device *
191 sdhci_acpi_find_device(device_t dev)
192 {
193         const char *hid;
194         int i, uid;
195         ACPI_HANDLE handle;
196         ACPI_STATUS status;
197
198         hid = ACPI_ID_PROBE(device_get_parent(dev), dev, sdhci_ids);
199         if (hid == NULL)
200                 return (NULL);
201
202         handle = acpi_get_handle(dev);
203         status = acpi_GetInteger(handle, "_UID", &uid);
204         if (ACPI_FAILURE(status))
205                 uid = 0;
206
207         for (i = 0; sdhci_acpi_devices[i].hid != NULL; i++) {
208                 if (strcmp(sdhci_acpi_devices[i].hid, hid) != 0)
209                         continue;
210                 if ((sdhci_acpi_devices[i].uid != 0) &&
211                     (sdhci_acpi_devices[i].uid != uid))
212                         continue;
213                 return (&sdhci_acpi_devices[i]);
214         }
215
216         return (NULL);
217 }
218
219 static int
220 sdhci_acpi_probe(device_t dev)
221 {
222         const struct sdhci_acpi_device *acpi_dev;
223
224         acpi_dev = sdhci_acpi_find_device(dev);
225         if (acpi_dev == NULL)
226                 return (ENXIO);
227
228         device_set_desc(dev, acpi_dev->desc);
229
230         return (BUS_PROBE_DEFAULT);
231 }
232
233 static int
234 sdhci_acpi_attach(device_t dev)
235 {
236         struct sdhci_acpi_softc *sc = device_get_softc(dev);
237         int rid, err;
238         const struct sdhci_acpi_device *acpi_dev;
239
240         acpi_dev = sdhci_acpi_find_device(dev);
241         if (acpi_dev == NULL)
242                 return (ENXIO);
243
244         sc->quirks = acpi_dev->quirks;
245
246         /* Allocate IRQ. */
247         rid = 0;
248         sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
249                 RF_ACTIVE);
250         if (sc->irq_res == NULL) {
251                 device_printf(dev, "can't allocate IRQ\n");
252                 return (ENOMEM);
253         }
254
255         rid = 0;
256         sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
257             &rid, RF_ACTIVE);
258         if (sc->mem_res == NULL) {
259                 device_printf(dev, "can't allocate memory resource for slot\n");
260                 sdhci_acpi_detach(dev);
261                 return (ENOMEM);
262         }
263
264         /* Intel Braswell eMMC 4.5.1 controller quirk */
265         if (strcmp(acpi_dev->hid, "80860F14") == 0 && acpi_dev->uid == 1 &&
266             SDHCI_READ_4(dev, &sc->slot, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
267             SDHCI_READ_4(dev, &sc->slot, SDHCI_CAPABILITIES2) == 0x00000807)
268                 sc->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_1MHZ;
269         sc->quirks &= ~sdhci_quirk_clear;
270         sc->quirks |= sdhci_quirk_set;
271         sc->slot.quirks = sc->quirks;
272
273         err = sdhci_init_slot(dev, &sc->slot, 0);
274         if (err) {
275                 device_printf(dev, "failed to init slot\n");
276                 sdhci_acpi_detach(dev);
277                 return (err);
278         }
279
280         /* Activate the interrupt */
281         err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
282             NULL, sdhci_acpi_intr, sc, &sc->intrhand);
283         if (err) {
284                 device_printf(dev, "can't setup IRQ\n");
285                 sdhci_acpi_detach(dev);
286                 return (err);
287         }
288
289         /* Process cards detection. */
290         sdhci_start_slot(&sc->slot);
291
292         return (0);
293 }
294
295 static int
296 sdhci_acpi_detach(device_t dev)
297 {
298         struct sdhci_acpi_softc *sc = device_get_softc(dev);
299
300         if (sc->intrhand)
301                 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
302         if (sc->irq_res)
303                 bus_release_resource(dev, SYS_RES_IRQ,
304                     rman_get_rid(sc->irq_res), sc->irq_res);
305
306         if (sc->mem_res) {
307                 sdhci_cleanup_slot(&sc->slot);
308                 bus_release_resource(dev, SYS_RES_MEMORY,
309                     rman_get_rid(sc->mem_res), sc->mem_res);
310         }
311
312         return (0);
313 }
314
315 static int
316 sdhci_acpi_shutdown(device_t dev)
317 {
318
319         return (0);
320 }
321
322 static int
323 sdhci_acpi_suspend(device_t dev)
324 {
325         struct sdhci_acpi_softc *sc = device_get_softc(dev);
326         int err;
327
328         err = bus_generic_suspend(dev);
329         if (err)
330                 return (err);
331         sdhci_generic_suspend(&sc->slot);
332         return (0);
333 }
334
335 static int
336 sdhci_acpi_resume(device_t dev)
337 {
338         struct sdhci_acpi_softc *sc = device_get_softc(dev);
339         int err;
340
341         sdhci_generic_resume(&sc->slot);
342         err = bus_generic_resume(dev);
343         if (err)
344                 return (err);
345         return (0);
346 }
347
348 static void
349 sdhci_acpi_intr(void *arg)
350 {
351         struct sdhci_acpi_softc *sc = (struct sdhci_acpi_softc *)arg;
352
353         sdhci_generic_intr(&sc->slot);
354 }
355
356 static device_method_t sdhci_methods[] = {
357         /* device_if */
358         DEVMETHOD(device_probe, sdhci_acpi_probe),
359         DEVMETHOD(device_attach, sdhci_acpi_attach),
360         DEVMETHOD(device_detach, sdhci_acpi_detach),
361         DEVMETHOD(device_shutdown, sdhci_acpi_shutdown),
362         DEVMETHOD(device_suspend, sdhci_acpi_suspend),
363         DEVMETHOD(device_resume, sdhci_acpi_resume),
364
365         /* Bus interface */
366         DEVMETHOD(bus_read_ivar,        sdhci_generic_read_ivar),
367         DEVMETHOD(bus_write_ivar,       sdhci_generic_write_ivar),
368
369         /* mmcbr_if */
370         DEVMETHOD(mmcbr_update_ios,     sdhci_generic_update_ios),
371         DEVMETHOD(mmcbr_switch_vccq,    sdhci_generic_switch_vccq),
372         DEVMETHOD(mmcbr_tune,           sdhci_generic_tune),
373         DEVMETHOD(mmcbr_retune,         sdhci_generic_retune),
374         DEVMETHOD(mmcbr_request,        sdhci_generic_request),
375         DEVMETHOD(mmcbr_get_ro,         sdhci_generic_get_ro),
376         DEVMETHOD(mmcbr_acquire_host,   sdhci_generic_acquire_host),
377         DEVMETHOD(mmcbr_release_host,   sdhci_generic_release_host),
378
379         /* SDHCI accessors */
380         DEVMETHOD(sdhci_read_1,         sdhci_acpi_read_1),
381         DEVMETHOD(sdhci_read_2,         sdhci_acpi_read_2),
382         DEVMETHOD(sdhci_read_4,         sdhci_acpi_read_4),
383         DEVMETHOD(sdhci_read_multi_4,   sdhci_acpi_read_multi_4),
384         DEVMETHOD(sdhci_write_1,        sdhci_acpi_write_1),
385         DEVMETHOD(sdhci_write_2,        sdhci_acpi_write_2),
386         DEVMETHOD(sdhci_write_4,        sdhci_acpi_write_4),
387         DEVMETHOD(sdhci_write_multi_4,  sdhci_acpi_write_multi_4),
388         DEVMETHOD(sdhci_set_uhs_timing, sdhci_generic_set_uhs_timing),
389
390         DEVMETHOD_END
391 };
392
393 static driver_t sdhci_acpi_driver = {
394         "sdhci_acpi",
395         sdhci_methods,
396         sizeof(struct sdhci_acpi_softc),
397 };
398 static devclass_t sdhci_acpi_devclass;
399
400 DRIVER_MODULE(sdhci_acpi, acpi, sdhci_acpi_driver, sdhci_acpi_devclass, NULL,
401     NULL);
402 MODULE_DEPEND(sdhci_acpi, sdhci, 1, 1, 1);
403 MMC_DECLARE_BRIDGE(sdhci_acpi);