2 * Copyright (c) 2012 Thomas Skibo
3 * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 /* Generic driver to attach sdhci controllers on simplebus.
28 * Derived mainly from sdhci_pci.c
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/resource.h>
44 #include <sys/sysctl.h>
45 #include <sys/taskqueue.h>
47 #include <machine/bus.h>
48 #include <machine/resource.h>
49 #include <machine/stdarg.h>
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
55 #include <dev/mmc/bridge.h>
56 #include <dev/mmc/mmcreg.h>
57 #include <dev/mmc/mmcbrvar.h>
58 #include <dev/sdhci/sdhci.h>
65 struct sdhci_fdt_softc {
66 device_t dev; /* Controller device */
67 u_int quirks; /* Chip specific quirks */
68 u_int caps; /* If we override SDHCI_CAPABILITIES */
69 struct resource *irq_res; /* IRQ resource */
70 void *intrhand; /* Interrupt handle */
72 int num_slots; /* Number of slots on this controller*/
73 struct sdhci_slot slots[MAX_SLOTS];
74 struct resource *mem_res[MAX_SLOTS]; /* Memory resource */
78 sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
80 struct sdhci_fdt_softc *sc = device_get_softc(dev);
81 return (bus_read_1(sc->mem_res[slot->num], off));
85 sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
88 struct sdhci_fdt_softc *sc = device_get_softc(dev);
89 bus_write_1(sc->mem_res[slot->num], off, val);
93 sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
95 struct sdhci_fdt_softc *sc = device_get_softc(dev);
96 return (bus_read_2(sc->mem_res[slot->num], off));
100 sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
103 struct sdhci_fdt_softc *sc = device_get_softc(dev);
104 bus_write_2(sc->mem_res[slot->num], off, val);
108 sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
110 struct sdhci_fdt_softc *sc = device_get_softc(dev);
111 return (bus_read_4(sc->mem_res[slot->num], off));
115 sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
118 struct sdhci_fdt_softc *sc = device_get_softc(dev);
119 bus_write_4(sc->mem_res[slot->num], off, val);
123 sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot,
124 bus_size_t off, uint32_t *data, bus_size_t count)
126 struct sdhci_fdt_softc *sc = device_get_softc(dev);
127 bus_read_multi_4(sc->mem_res[slot->num], off, data, count);
131 sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot,
132 bus_size_t off, uint32_t *data, bus_size_t count)
134 struct sdhci_fdt_softc *sc = device_get_softc(dev);
135 bus_write_multi_4(sc->mem_res[slot->num], off, data, count);
139 sdhci_fdt_intr(void *arg)
141 struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg;
144 for (i = 0; i < sc->num_slots; i++) {
145 struct sdhci_slot *slot = &sc->slots[i];
146 sdhci_generic_intr(slot);
151 sdhci_fdt_probe(device_t dev)
153 struct sdhci_fdt_softc *sc = device_get_softc(dev);
160 if (ofw_bus_is_compatible(dev, "sdhci_generic")) {
161 device_set_desc(dev, "generic fdt SDHCI controller");
162 } else if (ofw_bus_is_compatible(dev, "xlnx,zy7_sdhci")) {
163 sc->quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
164 device_set_desc(dev, "Zynq-7000 generic fdt SDHCI controller");
168 node = ofw_bus_get_node(dev);
170 /* Allow dts to patch quirks and slots. */
171 if ((OF_getprop(node, "quirks", &cid, sizeof(cid))) > 0)
172 sc->quirks = fdt32_to_cpu(cid);
173 if ((OF_getprop(node, "num-slots", &cid, sizeof(cid))) > 0)
174 sc->num_slots = fdt32_to_cpu(cid);
180 sdhci_fdt_attach(device_t dev)
182 struct sdhci_fdt_softc *sc = device_get_softc(dev);
183 int err, slots, rid, i;
189 sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
191 if (sc->irq_res == NULL) {
192 device_printf(dev, "Can't allocate IRQ\n");
196 /* Scan all slots. */
197 slots = sc->num_slots; /* number of slots determined in probe(). */
199 for (i = 0; i < slots; i++) {
200 struct sdhci_slot *slot = &sc->slots[sc->num_slots];
202 /* Allocate memory. */
204 sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
206 if (sc->mem_res[i] == NULL) {
207 device_printf(dev, "Can't allocate memory for "
212 slot->quirks = sc->quirks;
213 slot->caps = sc->caps;
215 if (sdhci_init_slot(dev, slot, i) != 0)
220 device_printf(dev, "%d slot(s) allocated\n", sc->num_slots);
222 /* Activate the interrupt */
223 err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
224 NULL, sdhci_fdt_intr, sc, &sc->intrhand);
226 device_printf(dev, "Cannot setup IRQ\n");
230 /* Process cards detection. */
231 for (i = 0; i < sc->num_slots; i++) {
232 struct sdhci_slot *slot = &sc->slots[i];
233 sdhci_start_slot(slot);
240 sdhci_fdt_detach(device_t dev)
242 struct sdhci_fdt_softc *sc = device_get_softc(dev);
245 bus_generic_detach(dev);
246 bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
247 bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res),
250 for (i = 0; i < sc->num_slots; i++) {
251 struct sdhci_slot *slot = &sc->slots[i];
253 sdhci_cleanup_slot(slot);
254 bus_release_resource(dev, SYS_RES_MEMORY,
255 rman_get_rid(sc->mem_res[i]),
262 static device_method_t sdhci_fdt_methods[] = {
264 DEVMETHOD(device_probe, sdhci_fdt_probe),
265 DEVMETHOD(device_attach, sdhci_fdt_attach),
266 DEVMETHOD(device_detach, sdhci_fdt_detach),
269 DEVMETHOD(bus_read_ivar, sdhci_generic_read_ivar),
270 DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
273 DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
274 DEVMETHOD(mmcbr_request, sdhci_generic_request),
275 DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
276 DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
277 DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),
279 /* SDHCI registers accessors */
280 DEVMETHOD(sdhci_read_1, sdhci_fdt_read_1),
281 DEVMETHOD(sdhci_read_2, sdhci_fdt_read_2),
282 DEVMETHOD(sdhci_read_4, sdhci_fdt_read_4),
283 DEVMETHOD(sdhci_read_multi_4, sdhci_fdt_read_multi_4),
284 DEVMETHOD(sdhci_write_1, sdhci_fdt_write_1),
285 DEVMETHOD(sdhci_write_2, sdhci_fdt_write_2),
286 DEVMETHOD(sdhci_write_4, sdhci_fdt_write_4),
287 DEVMETHOD(sdhci_write_multi_4, sdhci_fdt_write_multi_4),
292 static driver_t sdhci_fdt_driver = {
295 sizeof(struct sdhci_fdt_softc),
297 static devclass_t sdhci_fdt_devclass;
299 DRIVER_MODULE(sdhci_fdt, simplebus, sdhci_fdt_driver, sdhci_fdt_devclass, 0,0);
300 MODULE_DEPEND(sdhci_fdt, sdhci, 1, 1, 1);