2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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26 * The views and conclusions contained in the software and documentation are
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28 * policies, either expressed or implied, of the FreeBSD Project.
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
36 #if EFSYS_OPT_MON_STATS
40 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
43 #define EFX_EV_QSTAT_INCR(_eep, _stat) \
45 (_eep)->ee_stat[_stat]++; \
46 _NOTE(CONSTANTCONDITION) \
49 #define EFX_EV_QSTAT_INCR(_eep, _stat)
53 static __checkReturn boolean_t
56 __in efx_qword_t *eqp,
57 __in const efx_ev_callbacks_t *eecp,
60 static __checkReturn boolean_t
63 __in efx_qword_t *eqp,
64 __in const efx_ev_callbacks_t *eecp,
67 static __checkReturn boolean_t
70 __in efx_qword_t *eqp,
71 __in const efx_ev_callbacks_t *eecp,
74 static __checkReturn boolean_t
77 __in efx_qword_t *eqp,
78 __in const efx_ev_callbacks_t *eecp,
81 static __checkReturn boolean_t
84 __in efx_qword_t *eqp,
85 __in const efx_ev_callbacks_t *eecp,
89 static __checkReturn efx_rc_t
92 __in uint32_t instance,
94 __in uint32_t timer_ns)
97 uint8_t payload[MAX(MC_CMD_SET_EVQ_TMR_IN_LEN,
98 MC_CMD_SET_EVQ_TMR_OUT_LEN)];
101 (void) memset(payload, 0, sizeof (payload));
102 req.emr_cmd = MC_CMD_SET_EVQ_TMR;
103 req.emr_in_buf = payload;
104 req.emr_in_length = MC_CMD_SET_EVQ_TMR_IN_LEN;
105 req.emr_out_buf = payload;
106 req.emr_out_length = MC_CMD_SET_EVQ_TMR_OUT_LEN;
108 MCDI_IN_SET_DWORD(req, SET_EVQ_TMR_IN_INSTANCE, instance);
109 MCDI_IN_SET_DWORD(req, SET_EVQ_TMR_IN_TMR_LOAD_REQ_NS, timer_ns);
110 MCDI_IN_SET_DWORD(req, SET_EVQ_TMR_IN_TMR_RELOAD_REQ_NS, timer_ns);
111 MCDI_IN_SET_DWORD(req, SET_EVQ_TMR_IN_TMR_MODE, mode);
113 efx_mcdi_execute(enp, &req);
115 if (req.emr_rc != 0) {
120 if (req.emr_out_length_used < MC_CMD_SET_EVQ_TMR_OUT_LEN) {
130 EFSYS_PROBE1(fail1, efx_rc_t, rc);
135 static __checkReturn efx_rc_t
138 __in unsigned int instance,
139 __in efsys_mem_t *esmp,
143 __in boolean_t low_latency)
147 MAX(MC_CMD_INIT_EVQ_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
148 MC_CMD_INIT_EVQ_OUT_LEN)];
149 efx_qword_t *dma_addr;
156 npages = EFX_EVQ_NBUFS(nevs);
157 if (MC_CMD_INIT_EVQ_IN_LEN(npages) > MC_CMD_INIT_EVQ_IN_LENMAX) {
162 (void) memset(payload, 0, sizeof (payload));
163 req.emr_cmd = MC_CMD_INIT_EVQ;
164 req.emr_in_buf = payload;
165 req.emr_in_length = MC_CMD_INIT_EVQ_IN_LEN(npages);
166 req.emr_out_buf = payload;
167 req.emr_out_length = MC_CMD_INIT_EVQ_OUT_LEN;
169 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_SIZE, nevs);
170 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_INSTANCE, instance);
171 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_IRQ_NUM, irq);
174 * On Huntington RX and TX event batching can only be requested together
175 * (even if the datapath firmware doesn't actually support RX
176 * batching). If event cut through is enabled no RX batching will occur.
178 * So always enable RX and TX event batching, and enable event cut
179 * through if we want low latency operation.
181 ev_cut_through = low_latency ? 1 : 0;
182 MCDI_IN_POPULATE_DWORD_6(req, INIT_EVQ_IN_FLAGS,
183 INIT_EVQ_IN_FLAG_INTERRUPTING, 1,
184 INIT_EVQ_IN_FLAG_RPTR_DOS, 0,
185 INIT_EVQ_IN_FLAG_INT_ARMD, 0,
186 INIT_EVQ_IN_FLAG_CUT_THRU, ev_cut_through,
187 INIT_EVQ_IN_FLAG_RX_MERGE, 1,
188 INIT_EVQ_IN_FLAG_TX_MERGE, 1);
190 /* If the value is zero then disable the timer */
192 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_MODE,
193 MC_CMD_INIT_EVQ_IN_TMR_MODE_DIS);
194 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_LOAD, 0);
195 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_RELOAD, 0);
199 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
202 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_MODE,
203 MC_CMD_INIT_EVQ_IN_TMR_INT_HLDOFF);
204 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_LOAD, ticks);
205 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_TMR_RELOAD, ticks);
208 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_COUNT_MODE,
209 MC_CMD_INIT_EVQ_IN_COUNT_MODE_DIS);
210 MCDI_IN_SET_DWORD(req, INIT_EVQ_IN_COUNT_THRSHLD, 0);
212 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_IN_DMA_ADDR);
213 addr = EFSYS_MEM_ADDR(esmp);
215 for (i = 0; i < npages; i++) {
216 EFX_POPULATE_QWORD_2(*dma_addr,
217 EFX_DWORD_1, (uint32_t)(addr >> 32),
218 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
221 addr += EFX_BUF_SIZE;
224 efx_mcdi_execute(enp, &req);
226 if (req.emr_rc != 0) {
231 if (req.emr_out_length_used < MC_CMD_INIT_EVQ_OUT_LEN) {
236 /* NOTE: ignore the returned IRQ param as firmware does not set it. */
247 EFSYS_PROBE1(fail1, efx_rc_t, rc);
253 static __checkReturn efx_rc_t
254 efx_mcdi_init_evq_v2(
256 __in unsigned int instance,
257 __in efsys_mem_t *esmp,
264 MAX(MC_CMD_INIT_EVQ_V2_IN_LEN(EFX_EVQ_NBUFS(EFX_EVQ_MAXNEVS)),
265 MC_CMD_INIT_EVQ_V2_OUT_LEN)];
266 efx_qword_t *dma_addr;
272 npages = EFX_EVQ_NBUFS(nevs);
273 if (MC_CMD_INIT_EVQ_V2_IN_LEN(npages) > MC_CMD_INIT_EVQ_V2_IN_LENMAX) {
278 (void) memset(payload, 0, sizeof (payload));
279 req.emr_cmd = MC_CMD_INIT_EVQ;
280 req.emr_in_buf = payload;
281 req.emr_in_length = MC_CMD_INIT_EVQ_V2_IN_LEN(npages);
282 req.emr_out_buf = payload;
283 req.emr_out_length = MC_CMD_INIT_EVQ_V2_OUT_LEN;
285 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_SIZE, nevs);
286 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_INSTANCE, instance);
287 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_IRQ_NUM, irq);
289 MCDI_IN_POPULATE_DWORD_4(req, INIT_EVQ_V2_IN_FLAGS,
290 INIT_EVQ_V2_IN_FLAG_INTERRUPTING, 1,
291 INIT_EVQ_V2_IN_FLAG_RPTR_DOS, 0,
292 INIT_EVQ_V2_IN_FLAG_INT_ARMD, 0,
293 INIT_EVQ_V2_IN_FLAG_TYPE, MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_AUTO);
295 /* If the value is zero then disable the timer */
297 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_MODE,
298 MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_DIS);
299 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_LOAD, 0);
300 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_RELOAD, 0);
304 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
307 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_MODE,
308 MC_CMD_INIT_EVQ_V2_IN_TMR_INT_HLDOFF);
309 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_LOAD, ticks);
310 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_TMR_RELOAD, ticks);
313 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_COUNT_MODE,
314 MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_DIS);
315 MCDI_IN_SET_DWORD(req, INIT_EVQ_V2_IN_COUNT_THRSHLD, 0);
317 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_V2_IN_DMA_ADDR);
318 addr = EFSYS_MEM_ADDR(esmp);
320 for (i = 0; i < npages; i++) {
321 EFX_POPULATE_QWORD_2(*dma_addr,
322 EFX_DWORD_1, (uint32_t)(addr >> 32),
323 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
326 addr += EFX_BUF_SIZE;
329 efx_mcdi_execute(enp, &req);
331 if (req.emr_rc != 0) {
336 if (req.emr_out_length_used < MC_CMD_INIT_EVQ_V2_OUT_LEN) {
341 /* NOTE: ignore the returned IRQ param as firmware does not set it. */
343 EFSYS_PROBE1(mcdi_evq_flags, uint32_t,
344 MCDI_OUT_DWORD(req, INIT_EVQ_V2_OUT_FLAGS));
355 EFSYS_PROBE1(fail1, efx_rc_t, rc);
360 static __checkReturn efx_rc_t
363 __in uint32_t instance)
366 uint8_t payload[MAX(MC_CMD_FINI_EVQ_IN_LEN,
367 MC_CMD_FINI_EVQ_OUT_LEN)];
370 (void) memset(payload, 0, sizeof (payload));
371 req.emr_cmd = MC_CMD_FINI_EVQ;
372 req.emr_in_buf = payload;
373 req.emr_in_length = MC_CMD_FINI_EVQ_IN_LEN;
374 req.emr_out_buf = payload;
375 req.emr_out_length = MC_CMD_FINI_EVQ_OUT_LEN;
377 MCDI_IN_SET_DWORD(req, FINI_EVQ_IN_INSTANCE, instance);
379 efx_mcdi_execute_quiet(enp, &req);
381 if (req.emr_rc != 0) {
389 EFSYS_PROBE1(fail1, efx_rc_t, rc);
396 __checkReturn efx_rc_t
400 _NOTE(ARGUNUSED(enp))
408 _NOTE(ARGUNUSED(enp))
411 __checkReturn efx_rc_t
414 __in unsigned int index,
415 __in efsys_mem_t *esmp,
421 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
425 _NOTE(ARGUNUSED(id)) /* buftbl id managed by MC */
426 EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
427 EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
429 if (!ISP2(n) || (n < EFX_EVQ_MINNEVS) || (n > EFX_EVQ_MAXNEVS)) {
434 if (index >= encp->enc_evq_limit) {
439 if (us > encp->enc_evq_timer_max_us) {
444 /* Set up the handler table */
445 eep->ee_rx = ef10_ev_rx;
446 eep->ee_tx = ef10_ev_tx;
447 eep->ee_driver = ef10_ev_driver;
448 eep->ee_drv_gen = ef10_ev_drv_gen;
449 eep->ee_mcdi = ef10_ev_mcdi;
451 /* Set up the event queue */
452 irq = index; /* INIT_EVQ expects function-relative vector number */
455 * Interrupts may be raised for events immediately after the queue is
456 * created. See bug58606.
459 if (encp->enc_init_evq_v2_supported) {
461 * On Medford the low latency license is required to enable RX
462 * and event cut through and to disable RX batching. We let the
463 * firmware decide the settings to use. If the adapter has a low
464 * latency license, it will choose the best settings for low
465 * latency, otherwise it choose the best settings for
468 rc = efx_mcdi_init_evq_v2(enp, index, esmp, n, irq, us);
473 * On Huntington we need to specify the settings to use. We
474 * favour latency if the adapter is running low-latency firmware
475 * and throughput otherwise, and assume not support RX batching
476 * implies the adapter is running low-latency firmware. (This
477 * is how it's been done since Huntington GA. It doesn't make
478 * much sense with hindsight as the 'low-latency' firmware
479 * variant is also best for throughput, and does now support RX
482 boolean_t low_latency = encp->enc_rx_batching_enabled ? 0 : 1;
483 rc = efx_mcdi_init_evq(enp, index, esmp, n, irq, us,
500 EFSYS_PROBE1(fail1, efx_rc_t, rc);
509 efx_nic_t *enp = eep->ee_enp;
511 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
512 enp->en_family == EFX_FAMILY_MEDFORD);
514 (void) efx_mcdi_fini_evq(eep->ee_enp, eep->ee_index);
517 __checkReturn efx_rc_t
520 __in unsigned int count)
522 efx_nic_t *enp = eep->ee_enp;
526 rptr = count & eep->ee_mask;
528 if (enp->en_nic_cfg.enc_bug35388_workaround) {
529 EFX_STATIC_ASSERT(EFX_EVQ_MINNEVS >
530 (1 << ERF_DD_EVQ_IND_RPTR_WIDTH));
531 EFX_STATIC_ASSERT(EFX_EVQ_MAXNEVS <
532 (1 << 2 * ERF_DD_EVQ_IND_RPTR_WIDTH));
534 EFX_POPULATE_DWORD_2(dword,
535 ERF_DD_EVQ_IND_RPTR_FLAGS,
536 EFE_DD_EVQ_IND_RPTR_FLAGS_HIGH,
538 (rptr >> ERF_DD_EVQ_IND_RPTR_WIDTH));
539 EFX_BAR_TBL_WRITED(enp, ER_DD_EVQ_INDIRECT, eep->ee_index,
542 EFX_POPULATE_DWORD_2(dword,
543 ERF_DD_EVQ_IND_RPTR_FLAGS,
544 EFE_DD_EVQ_IND_RPTR_FLAGS_LOW,
546 rptr & ((1 << ERF_DD_EVQ_IND_RPTR_WIDTH) - 1));
547 EFX_BAR_TBL_WRITED(enp, ER_DD_EVQ_INDIRECT, eep->ee_index,
550 EFX_POPULATE_DWORD_1(dword, ERF_DZ_EVQ_RPTR, rptr);
551 EFX_BAR_TBL_WRITED(enp, ER_DZ_EVQ_RPTR_REG, eep->ee_index,
558 static __checkReturn efx_rc_t
559 efx_mcdi_driver_event(
562 __in efx_qword_t data)
565 uint8_t payload[MAX(MC_CMD_DRIVER_EVENT_IN_LEN,
566 MC_CMD_DRIVER_EVENT_OUT_LEN)];
569 req.emr_cmd = MC_CMD_DRIVER_EVENT;
570 req.emr_in_buf = payload;
571 req.emr_in_length = MC_CMD_DRIVER_EVENT_IN_LEN;
572 req.emr_out_buf = payload;
573 req.emr_out_length = MC_CMD_DRIVER_EVENT_OUT_LEN;
575 MCDI_IN_SET_DWORD(req, DRIVER_EVENT_IN_EVQ, evq);
577 MCDI_IN_SET_DWORD(req, DRIVER_EVENT_IN_DATA_LO,
578 EFX_QWORD_FIELD(data, EFX_DWORD_0));
579 MCDI_IN_SET_DWORD(req, DRIVER_EVENT_IN_DATA_HI,
580 EFX_QWORD_FIELD(data, EFX_DWORD_1));
582 efx_mcdi_execute(enp, &req);
584 if (req.emr_rc != 0) {
592 EFSYS_PROBE1(fail1, efx_rc_t, rc);
602 efx_nic_t *enp = eep->ee_enp;
605 EFX_POPULATE_QWORD_3(event,
606 ESF_DZ_DRV_CODE, ESE_DZ_EV_CODE_DRV_GEN_EV,
607 ESF_DZ_DRV_SUB_CODE, 0,
608 ESF_DZ_DRV_SUB_DATA_DW0, (uint32_t)data);
610 (void) efx_mcdi_driver_event(enp, eep->ee_index, event);
613 __checkReturn efx_rc_t
616 __in unsigned int us)
618 efx_nic_t *enp = eep->ee_enp;
619 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
624 /* Check that hardware and MCDI use the same timer MODE values */
625 EFX_STATIC_ASSERT(FFE_CZ_TIMER_MODE_DIS ==
626 MC_CMD_SET_EVQ_TMR_IN_TIMER_MODE_DIS);
627 EFX_STATIC_ASSERT(FFE_CZ_TIMER_MODE_IMMED_START ==
628 MC_CMD_SET_EVQ_TMR_IN_TIMER_MODE_IMMED_START);
629 EFX_STATIC_ASSERT(FFE_CZ_TIMER_MODE_TRIG_START ==
630 MC_CMD_SET_EVQ_TMR_IN_TIMER_MODE_TRIG_START);
631 EFX_STATIC_ASSERT(FFE_CZ_TIMER_MODE_INT_HLDOFF ==
632 MC_CMD_SET_EVQ_TMR_IN_TIMER_MODE_INT_HLDOFF);
634 if (us > encp->enc_evq_timer_max_us) {
639 /* If the value is zero then disable the timer */
641 mode = FFE_CZ_TIMER_MODE_DIS;
643 mode = FFE_CZ_TIMER_MODE_INT_HLDOFF;
646 if (encp->enc_bug61265_workaround) {
647 uint32_t ns = us * 1000;
649 rc = efx_mcdi_set_evq_tmr(enp, eep->ee_index, mode, ns);
655 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
658 if (encp->enc_bug35388_workaround) {
659 EFX_POPULATE_DWORD_3(dword,
660 ERF_DD_EVQ_IND_TIMER_FLAGS,
661 EFE_DD_EVQ_IND_TIMER_FLAGS,
662 ERF_DD_EVQ_IND_TIMER_MODE, mode,
663 ERF_DD_EVQ_IND_TIMER_VAL, ticks);
664 EFX_BAR_TBL_WRITED(enp, ER_DD_EVQ_INDIRECT,
665 eep->ee_index, &dword, 0);
667 EFX_POPULATE_DWORD_2(dword,
668 ERF_DZ_TC_TIMER_MODE, mode,
669 ERF_DZ_TC_TIMER_VAL, ticks);
670 EFX_BAR_TBL_WRITED(enp, ER_DZ_EVQ_TMR_REG,
671 eep->ee_index, &dword, 0);
682 EFSYS_PROBE1(fail1, efx_rc_t, rc);
690 ef10_ev_qstats_update(
692 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat)
696 for (id = 0; id < EV_NQSTATS; id++) {
697 efsys_stat_t *essp = &stat[id];
699 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
700 eep->ee_stat[id] = 0;
703 #endif /* EFSYS_OPT_QSTATS */
706 static __checkReturn boolean_t
709 __in efx_qword_t *eqp,
710 __in const efx_ev_callbacks_t *eecp,
713 efx_nic_t *enp = eep->ee_enp;
717 uint32_t eth_tag_class;
720 uint32_t next_read_lbits;
723 boolean_t should_abort;
724 efx_evq_rxq_state_t *eersp;
725 unsigned int desc_count;
726 unsigned int last_used_id;
728 EFX_EV_QSTAT_INCR(eep, EV_RX);
730 /* Discard events after RXQ/TXQ errors */
731 if (enp->en_reset_flags & (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR))
734 /* Basic packet information */
735 size = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_BYTES);
736 next_read_lbits = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_DSC_PTR_LBITS);
737 label = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_QLABEL);
738 eth_tag_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ETH_TAG_CLASS);
739 mac_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_MAC_CLASS);
740 l3_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_L3_CLASS);
741 l4_class = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_L4_CLASS);
742 cont = EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_CONT);
744 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_DROP_EVENT) != 0) {
745 /* Drop this event */
752 * This may be part of a scattered frame, or it may be a
753 * truncated frame if scatter is disabled on this RXQ.
754 * Overlength frames can be received if e.g. a VF is configured
755 * for 1500 MTU but connected to a port set to 9000 MTU
757 * FIXME: There is not yet any driver that supports scatter on
758 * Huntington. Scatter support is required for OSX.
760 flags |= EFX_PKT_CONT;
763 if (mac_class == ESE_DZ_MAC_CLASS_UCAST)
764 flags |= EFX_PKT_UNICAST;
766 /* Increment the count of descriptors read */
767 eersp = &eep->ee_rxq_state[label];
768 desc_count = (next_read_lbits - eersp->eers_rx_read_ptr) &
769 EFX_MASK32(ESF_DZ_RX_DSC_PTR_LBITS);
770 eersp->eers_rx_read_ptr += desc_count;
773 * FIXME: add error checking to make sure this a batched event.
774 * This could also be an aborted scatter, see Bug36629.
776 if (desc_count > 1) {
777 EFX_EV_QSTAT_INCR(eep, EV_RX_BATCH);
778 flags |= EFX_PKT_PREFIX_LEN;
781 /* Calculate the index of the the last descriptor consumed */
782 last_used_id = (eersp->eers_rx_read_ptr - 1) & eersp->eers_rx_mask;
784 /* Check for errors that invalidate checksum and L3/L4 fields */
785 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ECC_ERR) != 0) {
786 /* RX frame truncated (error flag is misnamed) */
787 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
788 flags |= EFX_DISCARD;
791 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_ECRC_ERR) != 0) {
792 /* Bad Ethernet frame CRC */
793 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
794 flags |= EFX_DISCARD;
797 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_PARSE_INCOMPLETE)) {
799 * Hardware parse failed, due to malformed headers
800 * or headers that are too long for the parser.
801 * Headers and checksums must be validated by the host.
803 /* TODO: EFX_EV_QSTAT_INCR(eep, EV_RX_PARSE_INCOMPLETE); */
807 if ((eth_tag_class == ESE_DZ_ETH_TAG_CLASS_VLAN1) ||
808 (eth_tag_class == ESE_DZ_ETH_TAG_CLASS_VLAN2)) {
809 flags |= EFX_PKT_VLAN_TAGGED;
813 case ESE_DZ_L3_CLASS_IP4:
814 case ESE_DZ_L3_CLASS_IP4_FRAG:
815 flags |= EFX_PKT_IPV4;
816 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_IPCKSUM_ERR)) {
817 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
819 flags |= EFX_CKSUM_IPV4;
822 if (l4_class == ESE_DZ_L4_CLASS_TCP) {
823 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
824 flags |= EFX_PKT_TCP;
825 } else if (l4_class == ESE_DZ_L4_CLASS_UDP) {
826 EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
827 flags |= EFX_PKT_UDP;
829 EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
833 case ESE_DZ_L3_CLASS_IP6:
834 case ESE_DZ_L3_CLASS_IP6_FRAG:
835 flags |= EFX_PKT_IPV6;
837 if (l4_class == ESE_DZ_L4_CLASS_TCP) {
838 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
839 flags |= EFX_PKT_TCP;
840 } else if (l4_class == ESE_DZ_L4_CLASS_UDP) {
841 EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
842 flags |= EFX_PKT_UDP;
844 EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
849 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
853 if (flags & (EFX_PKT_TCP | EFX_PKT_UDP)) {
854 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_RX_TCPUDP_CKSUM_ERR)) {
855 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
857 flags |= EFX_CKSUM_TCPUDP;
862 /* If we're not discarding the packet then it is ok */
863 if (~flags & EFX_DISCARD)
864 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
866 EFSYS_ASSERT(eecp->eec_rx != NULL);
867 should_abort = eecp->eec_rx(arg, label, last_used_id, size, flags);
869 return (should_abort);
872 static __checkReturn boolean_t
875 __in efx_qword_t *eqp,
876 __in const efx_ev_callbacks_t *eecp,
879 efx_nic_t *enp = eep->ee_enp;
882 boolean_t should_abort;
884 EFX_EV_QSTAT_INCR(eep, EV_TX);
886 /* Discard events after RXQ/TXQ errors */
887 if (enp->en_reset_flags & (EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR))
890 if (EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_DROP_EVENT) != 0) {
891 /* Drop this event */
895 /* Per-packet TX completion (was per-descriptor for Falcon/Siena) */
896 id = EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_DESCR_INDX);
897 label = EFX_QWORD_FIELD(*eqp, ESF_DZ_TX_QLABEL);
899 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
901 EFSYS_ASSERT(eecp->eec_tx != NULL);
902 should_abort = eecp->eec_tx(arg, label, id);
904 return (should_abort);
907 static __checkReturn boolean_t
910 __in efx_qword_t *eqp,
911 __in const efx_ev_callbacks_t *eecp,
915 boolean_t should_abort;
917 EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
918 should_abort = B_FALSE;
920 code = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_SUB_CODE);
922 case ESE_DZ_DRV_TIMER_EV: {
925 id = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_TMR_ID);
927 EFSYS_ASSERT(eecp->eec_timer != NULL);
928 should_abort = eecp->eec_timer(arg, id);
932 case ESE_DZ_DRV_WAKE_UP_EV: {
935 id = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_EVQ_ID);
937 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
938 should_abort = eecp->eec_wake_up(arg, id);
942 case ESE_DZ_DRV_START_UP_EV:
943 EFSYS_ASSERT(eecp->eec_initialized != NULL);
944 should_abort = eecp->eec_initialized(arg);
948 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
949 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
950 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
954 return (should_abort);
957 static __checkReturn boolean_t
960 __in efx_qword_t *eqp,
961 __in const efx_ev_callbacks_t *eecp,
965 boolean_t should_abort;
967 EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
968 should_abort = B_FALSE;
970 data = EFX_QWORD_FIELD(*eqp, ESF_DZ_DRV_SUB_DATA_DW0);
971 if (data >= ((uint32_t)1 << 16)) {
972 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
973 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
974 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
979 EFSYS_ASSERT(eecp->eec_software != NULL);
980 should_abort = eecp->eec_software(arg, (uint16_t)data);
982 return (should_abort);
985 static __checkReturn boolean_t
988 __in efx_qword_t *eqp,
989 __in const efx_ev_callbacks_t *eecp,
992 efx_nic_t *enp = eep->ee_enp;
994 boolean_t should_abort = B_FALSE;
996 EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
998 code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
1000 case MCDI_EVENT_CODE_BADSSERT:
1001 efx_mcdi_ev_death(enp, EINTR);
1004 case MCDI_EVENT_CODE_CMDDONE:
1005 efx_mcdi_ev_cpl(enp,
1006 MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1007 MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1008 MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1011 #if EFSYS_OPT_MCDI_PROXY_AUTH
1012 case MCDI_EVENT_CODE_PROXY_RESPONSE:
1014 * This event notifies a function that an authorization request
1015 * has been processed. If the request was authorized then the
1016 * function can now re-send the original MCDI request.
1017 * See SF-113652-SW "SR-IOV Proxied Network Access Control".
1019 efx_mcdi_ev_proxy_response(enp,
1020 MCDI_EV_FIELD(eqp, PROXY_RESPONSE_HANDLE),
1021 MCDI_EV_FIELD(eqp, PROXY_RESPONSE_RC));
1023 #endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
1025 case MCDI_EVENT_CODE_LINKCHANGE: {
1026 efx_link_mode_t link_mode;
1028 ef10_phy_link_ev(enp, eqp, &link_mode);
1029 should_abort = eecp->eec_link_change(arg, link_mode);
1033 case MCDI_EVENT_CODE_SENSOREVT: {
1034 #if EFSYS_OPT_MON_STATS
1036 efx_mon_stat_value_t value;
1039 /* Decode monitor stat for MCDI sensor (if supported) */
1040 if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0) {
1041 /* Report monitor stat change */
1042 should_abort = eecp->eec_monitor(arg, id, value);
1043 } else if (rc == ENOTSUP) {
1044 should_abort = eecp->eec_exception(arg,
1045 EFX_EXCEPTION_UNKNOWN_SENSOREVT,
1046 MCDI_EV_FIELD(eqp, DATA));
1048 EFSYS_ASSERT(rc == ENODEV); /* Wrong port */
1054 case MCDI_EVENT_CODE_SCHEDERR:
1055 /* Informational only */
1058 case MCDI_EVENT_CODE_REBOOT:
1059 /* Falcon/Siena only (should not been seen with Huntington). */
1060 efx_mcdi_ev_death(enp, EIO);
1063 case MCDI_EVENT_CODE_MC_REBOOT:
1064 /* MC_REBOOT event is used for Huntington (EF10) and later. */
1065 efx_mcdi_ev_death(enp, EIO);
1068 case MCDI_EVENT_CODE_MAC_STATS_DMA:
1069 #if EFSYS_OPT_MAC_STATS
1070 if (eecp->eec_mac_stats != NULL) {
1071 eecp->eec_mac_stats(arg,
1072 MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
1077 case MCDI_EVENT_CODE_FWALERT: {
1078 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1080 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1081 should_abort = eecp->eec_exception(arg,
1082 EFX_EXCEPTION_FWALERT_SRAM,
1083 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1085 should_abort = eecp->eec_exception(arg,
1086 EFX_EXCEPTION_UNKNOWN_FWALERT,
1087 MCDI_EV_FIELD(eqp, DATA));
1091 case MCDI_EVENT_CODE_TX_ERR: {
1093 * After a TXQ error is detected, firmware sends a TX_ERR event.
1094 * This may be followed by TX completions (which we discard),
1095 * and then finally by a TX_FLUSH event. Firmware destroys the
1096 * TXQ automatically after sending the TX_FLUSH event.
1098 enp->en_reset_flags |= EFX_RESET_TXQ_ERR;
1100 EFSYS_PROBE2(tx_descq_err,
1101 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1102 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1104 /* Inform the driver that a reset is required. */
1105 eecp->eec_exception(arg, EFX_EXCEPTION_TX_ERROR,
1106 MCDI_EV_FIELD(eqp, TX_ERR_DATA));
1110 case MCDI_EVENT_CODE_TX_FLUSH: {
1111 uint32_t txq_index = MCDI_EV_FIELD(eqp, TX_FLUSH_TXQ);
1114 * EF10 firmware sends two TX_FLUSH events: one to the txq's
1115 * event queue, and one to evq 0 (with TX_FLUSH_TO_DRIVER set).
1116 * We want to wait for all completions, so ignore the events
1117 * with TX_FLUSH_TO_DRIVER.
1119 if (MCDI_EV_FIELD(eqp, TX_FLUSH_TO_DRIVER) != 0) {
1120 should_abort = B_FALSE;
1124 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
1126 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
1128 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
1129 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
1133 case MCDI_EVENT_CODE_RX_ERR: {
1135 * After an RXQ error is detected, firmware sends an RX_ERR
1136 * event. This may be followed by RX events (which we discard),
1137 * and then finally by an RX_FLUSH event. Firmware destroys the
1138 * RXQ automatically after sending the RX_FLUSH event.
1140 enp->en_reset_flags |= EFX_RESET_RXQ_ERR;
1142 EFSYS_PROBE2(rx_descq_err,
1143 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1144 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1146 /* Inform the driver that a reset is required. */
1147 eecp->eec_exception(arg, EFX_EXCEPTION_RX_ERROR,
1148 MCDI_EV_FIELD(eqp, RX_ERR_DATA));
1152 case MCDI_EVENT_CODE_RX_FLUSH: {
1153 uint32_t rxq_index = MCDI_EV_FIELD(eqp, RX_FLUSH_RXQ);
1156 * EF10 firmware sends two RX_FLUSH events: one to the rxq's
1157 * event queue, and one to evq 0 (with RX_FLUSH_TO_DRIVER set).
1158 * We want to wait for all completions, so ignore the events
1159 * with RX_FLUSH_TO_DRIVER.
1161 if (MCDI_EV_FIELD(eqp, RX_FLUSH_TO_DRIVER) != 0) {
1162 should_abort = B_FALSE;
1166 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
1168 EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
1170 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
1171 should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
1176 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
1177 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1178 uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1182 return (should_abort);
1186 ef10_ev_rxlabel_init(
1187 __in efx_evq_t *eep,
1188 __in efx_rxq_t *erp,
1189 __in unsigned int label)
1191 efx_evq_rxq_state_t *eersp;
1193 EFSYS_ASSERT3U(label, <, EFX_ARRAY_SIZE(eep->ee_rxq_state));
1194 eersp = &eep->ee_rxq_state[label];
1196 EFSYS_ASSERT3U(eersp->eers_rx_mask, ==, 0);
1198 eersp->eers_rx_read_ptr = 0;
1199 eersp->eers_rx_mask = erp->er_mask;
1203 ef10_ev_rxlabel_fini(
1204 __in efx_evq_t *eep,
1205 __in unsigned int label)
1207 efx_evq_rxq_state_t *eersp;
1209 EFSYS_ASSERT3U(label, <, EFX_ARRAY_SIZE(eep->ee_rxq_state));
1210 eersp = &eep->ee_rxq_state[label];
1212 EFSYS_ASSERT3U(eersp->eers_rx_mask, !=, 0);
1214 eersp->eers_rx_read_ptr = 0;
1215 eersp->eers_rx_mask = 0;
1218 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */