2 * Copyright (c) 2007-2016 Solarflare Communications Inc.
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6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
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31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
42 static __checkReturn efx_rc_t
50 static __checkReturn efx_rc_t
54 static __checkReturn efx_rc_t
57 __inout efx_filter_spec_t *spec,
58 __in boolean_t may_replace);
60 static __checkReturn efx_rc_t
63 __inout efx_filter_spec_t *spec);
65 static __checkReturn efx_rc_t
66 siena_filter_supported_filters(
69 __out size_t *length);
71 #endif /* EFSYS_OPT_SIENA */
74 static const efx_filter_ops_t __efx_filter_siena_ops = {
75 siena_filter_init, /* efo_init */
76 siena_filter_fini, /* efo_fini */
77 siena_filter_restore, /* efo_restore */
78 siena_filter_add, /* efo_add */
79 siena_filter_delete, /* efo_delete */
80 siena_filter_supported_filters, /* efo_supported_filters */
81 NULL, /* efo_reconfigure */
83 #endif /* EFSYS_OPT_SIENA */
85 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
86 static const efx_filter_ops_t __efx_filter_ef10_ops = {
87 ef10_filter_init, /* efo_init */
88 ef10_filter_fini, /* efo_fini */
89 ef10_filter_restore, /* efo_restore */
90 ef10_filter_add, /* efo_add */
91 ef10_filter_delete, /* efo_delete */
92 ef10_filter_supported_filters, /* efo_supported_filters */
93 ef10_filter_reconfigure, /* efo_reconfigure */
95 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
97 __checkReturn efx_rc_t
100 __inout efx_filter_spec_t *spec)
102 const efx_filter_ops_t *efop = enp->en_efop;
104 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
105 EFSYS_ASSERT3P(spec, !=, NULL);
106 EFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX);
108 return (efop->efo_add(enp, spec, B_FALSE));
111 __checkReturn efx_rc_t
114 __inout efx_filter_spec_t *spec)
116 const efx_filter_ops_t *efop = enp->en_efop;
118 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
119 EFSYS_ASSERT3P(spec, !=, NULL);
120 EFSYS_ASSERT3U(spec->efs_flags, &, EFX_FILTER_FLAG_RX);
122 #if EFSYS_OPT_RX_SCALE
123 spec->efs_rss_context = enp->en_rss_context;
126 return (efop->efo_delete(enp, spec));
129 __checkReturn efx_rc_t
135 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
137 if ((rc = enp->en_efop->efo_restore(enp)) != 0)
143 EFSYS_PROBE1(fail1, efx_rc_t, rc);
148 __checkReturn efx_rc_t
152 const efx_filter_ops_t *efop;
155 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
156 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
157 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_FILTER));
159 switch (enp->en_family) {
161 case EFX_FAMILY_SIENA:
162 efop = &__efx_filter_siena_ops;
164 #endif /* EFSYS_OPT_SIENA */
166 #if EFSYS_OPT_HUNTINGTON
167 case EFX_FAMILY_HUNTINGTON:
168 efop = &__efx_filter_ef10_ops;
170 #endif /* EFSYS_OPT_HUNTINGTON */
172 #if EFSYS_OPT_MEDFORD
173 case EFX_FAMILY_MEDFORD:
174 efop = &__efx_filter_ef10_ops;
176 #endif /* EFSYS_OPT_MEDFORD */
184 if ((rc = efop->efo_init(enp)) != 0)
188 enp->en_mod_flags |= EFX_MOD_FILTER;
194 EFSYS_PROBE1(fail1, efx_rc_t, rc);
197 enp->en_mod_flags &= ~EFX_MOD_FILTER;
205 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
206 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
207 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
209 enp->en_efop->efo_fini(enp);
212 enp->en_mod_flags &= ~EFX_MOD_FILTER;
215 __checkReturn efx_rc_t
216 efx_filter_supported_filters(
218 __out uint32_t *list,
219 __out size_t *length)
223 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
224 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
225 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
226 EFSYS_ASSERT(enp->en_efop->efo_supported_filters != NULL);
228 if ((rc = enp->en_efop->efo_supported_filters(enp, list, length)) != 0)
234 EFSYS_PROBE1(fail1, efx_rc_t, rc);
239 __checkReturn efx_rc_t
240 efx_filter_reconfigure(
242 __in_ecount(6) uint8_t const *mac_addr,
243 __in boolean_t all_unicst,
244 __in boolean_t mulcst,
245 __in boolean_t all_mulcst,
246 __in boolean_t brdcst,
247 __in_ecount(6*count) uint8_t const *addrs,
252 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
253 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
254 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_FILTER);
256 if (enp->en_efop->efo_reconfigure != NULL) {
257 if ((rc = enp->en_efop->efo_reconfigure(enp, mac_addr,
267 EFSYS_PROBE1(fail1, efx_rc_t, rc);
273 efx_filter_spec_init_rx(
274 __out efx_filter_spec_t *spec,
275 __in efx_filter_priority_t priority,
276 __in efx_filter_flags_t flags,
279 EFSYS_ASSERT3P(spec, !=, NULL);
280 EFSYS_ASSERT3P(erp, !=, NULL);
281 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS |
282 EFX_FILTER_FLAG_RX_SCATTER)) == 0);
284 memset(spec, 0, sizeof (*spec));
285 spec->efs_priority = priority;
286 spec->efs_flags = EFX_FILTER_FLAG_RX | flags;
287 spec->efs_rss_context = EFX_FILTER_SPEC_RSS_CONTEXT_DEFAULT;
288 spec->efs_dmaq_id = (uint16_t)erp->er_index;
292 efx_filter_spec_init_tx(
293 __out efx_filter_spec_t *spec,
296 EFSYS_ASSERT3P(spec, !=, NULL);
297 EFSYS_ASSERT3P(etp, !=, NULL);
299 memset(spec, 0, sizeof (*spec));
300 spec->efs_priority = EFX_FILTER_PRI_REQUIRED;
301 spec->efs_flags = EFX_FILTER_FLAG_TX;
302 spec->efs_dmaq_id = (uint16_t)etp->et_index;
307 * Specify IPv4 host, transport protocol and port in a filter specification
309 __checkReturn efx_rc_t
310 efx_filter_spec_set_ipv4_local(
311 __inout efx_filter_spec_t *spec,
316 EFSYS_ASSERT3P(spec, !=, NULL);
318 spec->efs_match_flags |=
319 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
320 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT;
321 spec->efs_ether_type = EFX_ETHER_TYPE_IPV4;
322 spec->efs_ip_proto = proto;
323 spec->efs_loc_host.eo_u32[0] = host;
324 spec->efs_loc_port = port;
329 * Specify IPv4 hosts, transport protocol and ports in a filter specification
331 __checkReturn efx_rc_t
332 efx_filter_spec_set_ipv4_full(
333 __inout efx_filter_spec_t *spec,
340 EFSYS_ASSERT3P(spec, !=, NULL);
342 spec->efs_match_flags |=
343 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
344 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
345 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
346 spec->efs_ether_type = EFX_ETHER_TYPE_IPV4;
347 spec->efs_ip_proto = proto;
348 spec->efs_loc_host.eo_u32[0] = lhost;
349 spec->efs_loc_port = lport;
350 spec->efs_rem_host.eo_u32[0] = rhost;
351 spec->efs_rem_port = rport;
356 * Specify local Ethernet address and/or VID in filter specification
358 __checkReturn efx_rc_t
359 efx_filter_spec_set_eth_local(
360 __inout efx_filter_spec_t *spec,
362 __in const uint8_t *addr)
364 EFSYS_ASSERT3P(spec, !=, NULL);
365 EFSYS_ASSERT3P(addr, !=, NULL);
367 if (vid == EFX_FILTER_SPEC_VID_UNSPEC && addr == NULL)
370 if (vid != EFX_FILTER_SPEC_VID_UNSPEC) {
371 spec->efs_match_flags |= EFX_FILTER_MATCH_OUTER_VID;
372 spec->efs_outer_vid = vid;
375 spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC;
376 memcpy(spec->efs_loc_mac, addr, EFX_MAC_ADDR_LEN);
382 * Specify matching otherwise-unmatched unicast in a filter specification
384 __checkReturn efx_rc_t
385 efx_filter_spec_set_uc_def(
386 __inout efx_filter_spec_t *spec)
388 EFSYS_ASSERT3P(spec, !=, NULL);
390 spec->efs_match_flags |= EFX_FILTER_MATCH_UNKNOWN_UCAST_DST;
395 * Specify matching otherwise-unmatched multicast in a filter specification
397 __checkReturn efx_rc_t
398 efx_filter_spec_set_mc_def(
399 __inout efx_filter_spec_t *spec)
401 EFSYS_ASSERT3P(spec, !=, NULL);
403 spec->efs_match_flags |= EFX_FILTER_MATCH_UNKNOWN_MCAST_DST;
412 * "Fudge factors" - difference between programmed value and actual depth.
413 * Due to pipelined implementation we need to program H/W with a value that
414 * is larger than the hop limit we want.
416 #define FILTER_CTL_SRCH_FUDGE_WILD 3
417 #define FILTER_CTL_SRCH_FUDGE_FULL 1
420 * Hard maximum hop limit. Hardware will time-out beyond 200-something.
421 * We also need to avoid infinite loops in efx_filter_search() when the
424 #define FILTER_CTL_SRCH_MAX 200
426 static __checkReturn efx_rc_t
427 siena_filter_spec_from_gen_spec(
428 __out siena_filter_spec_t *sf_spec,
429 __in efx_filter_spec_t *gen_spec)
432 boolean_t is_full = B_FALSE;
434 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX)
435 EFSYS_ASSERT3U(gen_spec->efs_flags, ==, EFX_FILTER_FLAG_TX);
437 EFSYS_ASSERT3U(gen_spec->efs_flags, &, EFX_FILTER_FLAG_RX);
439 /* Falconsiena only has one RSS context */
440 if ((gen_spec->efs_flags & EFX_FILTER_FLAG_RX_RSS) &&
441 gen_spec->efs_rss_context != 0) {
446 sf_spec->sfs_flags = gen_spec->efs_flags;
447 sf_spec->sfs_dmaq_id = gen_spec->efs_dmaq_id;
449 switch (gen_spec->efs_match_flags) {
450 case EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
451 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
452 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT:
455 case EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
456 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT: {
457 uint32_t rhost, host1, host2;
458 uint16_t rport, port1, port2;
460 if (gen_spec->efs_ether_type != EFX_ETHER_TYPE_IPV4) {
464 if (gen_spec->efs_loc_port == 0 ||
465 (is_full && gen_spec->efs_rem_port == 0)) {
469 switch (gen_spec->efs_ip_proto) {
470 case EFX_IPPROTO_TCP:
471 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
472 sf_spec->sfs_type = (is_full ?
473 EFX_SIENA_FILTER_TX_TCP_FULL :
474 EFX_SIENA_FILTER_TX_TCP_WILD);
476 sf_spec->sfs_type = (is_full ?
477 EFX_SIENA_FILTER_RX_TCP_FULL :
478 EFX_SIENA_FILTER_RX_TCP_WILD);
481 case EFX_IPPROTO_UDP:
482 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
483 sf_spec->sfs_type = (is_full ?
484 EFX_SIENA_FILTER_TX_UDP_FULL :
485 EFX_SIENA_FILTER_TX_UDP_WILD);
487 sf_spec->sfs_type = (is_full ?
488 EFX_SIENA_FILTER_RX_UDP_FULL :
489 EFX_SIENA_FILTER_RX_UDP_WILD);
497 * The filter is constructed in terms of source and destination,
498 * with the odd wrinkle that the ports are swapped in a UDP
499 * wildcard filter. We need to convert from local and remote
500 * addresses (zero for a wildcard).
502 rhost = is_full ? gen_spec->efs_rem_host.eo_u32[0] : 0;
503 rport = is_full ? gen_spec->efs_rem_port : 0;
504 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
505 host1 = gen_spec->efs_loc_host.eo_u32[0];
509 host2 = gen_spec->efs_loc_host.eo_u32[0];
511 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
512 if (sf_spec->sfs_type ==
513 EFX_SIENA_FILTER_TX_UDP_WILD) {
515 port2 = gen_spec->efs_loc_port;
517 port1 = gen_spec->efs_loc_port;
521 if (sf_spec->sfs_type ==
522 EFX_SIENA_FILTER_RX_UDP_WILD) {
523 port1 = gen_spec->efs_loc_port;
527 port2 = gen_spec->efs_loc_port;
530 sf_spec->sfs_dword[0] = (host1 << 16) | port1;
531 sf_spec->sfs_dword[1] = (port2 << 16) | (host1 >> 16);
532 sf_spec->sfs_dword[2] = host2;
536 case EFX_FILTER_MATCH_LOC_MAC | EFX_FILTER_MATCH_OUTER_VID:
539 case EFX_FILTER_MATCH_LOC_MAC:
540 if (gen_spec->efs_flags & EFX_FILTER_FLAG_TX) {
541 sf_spec->sfs_type = (is_full ?
542 EFX_SIENA_FILTER_TX_MAC_FULL :
543 EFX_SIENA_FILTER_TX_MAC_WILD);
545 sf_spec->sfs_type = (is_full ?
546 EFX_SIENA_FILTER_RX_MAC_FULL :
547 EFX_SIENA_FILTER_RX_MAC_WILD);
549 sf_spec->sfs_dword[0] = is_full ? gen_spec->efs_outer_vid : 0;
550 sf_spec->sfs_dword[1] =
551 gen_spec->efs_loc_mac[2] << 24 |
552 gen_spec->efs_loc_mac[3] << 16 |
553 gen_spec->efs_loc_mac[4] << 8 |
554 gen_spec->efs_loc_mac[5];
555 sf_spec->sfs_dword[2] =
556 gen_spec->efs_loc_mac[0] << 8 |
557 gen_spec->efs_loc_mac[1];
561 EFSYS_ASSERT(B_FALSE);
577 EFSYS_PROBE1(fail1, efx_rc_t, rc);
583 * The filter hash function is LFSR polynomial x^16 + x^3 + 1 of a 32-bit
584 * key derived from the n-tuple.
587 siena_filter_tbl_hash(
592 /* First 16 rounds */
593 tmp = 0x1fff ^ (uint16_t)(key >> 16);
594 tmp = tmp ^ tmp >> 3 ^ tmp >> 6;
595 tmp = tmp ^ tmp >> 9;
598 tmp = tmp ^ tmp << 13 ^ (uint16_t)(key & 0xffff);
599 tmp = tmp ^ tmp >> 3 ^ tmp >> 6;
600 tmp = tmp ^ tmp >> 9;
606 * To allow for hash collisions, filter search continues at these
607 * increments from the first possible entry selected by the hash.
610 siena_filter_tbl_increment(
613 return ((uint16_t)(key * 2 - 1));
616 static __checkReturn boolean_t
617 siena_filter_test_used(
618 __in siena_filter_tbl_t *sftp,
619 __in unsigned int index)
621 EFSYS_ASSERT3P(sftp->sft_bitmap, !=, NULL);
622 return ((sftp->sft_bitmap[index / 32] & (1 << (index % 32))) != 0);
626 siena_filter_set_used(
627 __in siena_filter_tbl_t *sftp,
628 __in unsigned int index)
630 EFSYS_ASSERT3P(sftp->sft_bitmap, !=, NULL);
631 sftp->sft_bitmap[index / 32] |= (1 << (index % 32));
636 siena_filter_clear_used(
637 __in siena_filter_tbl_t *sftp,
638 __in unsigned int index)
640 EFSYS_ASSERT3P(sftp->sft_bitmap, !=, NULL);
641 sftp->sft_bitmap[index / 32] &= ~(1 << (index % 32));
644 EFSYS_ASSERT3U(sftp->sft_used, >=, 0);
648 static siena_filter_tbl_id_t
650 __in siena_filter_type_t type)
652 siena_filter_tbl_id_t tbl_id;
655 case EFX_SIENA_FILTER_RX_TCP_FULL:
656 case EFX_SIENA_FILTER_RX_TCP_WILD:
657 case EFX_SIENA_FILTER_RX_UDP_FULL:
658 case EFX_SIENA_FILTER_RX_UDP_WILD:
659 tbl_id = EFX_SIENA_FILTER_TBL_RX_IP;
662 case EFX_SIENA_FILTER_RX_MAC_FULL:
663 case EFX_SIENA_FILTER_RX_MAC_WILD:
664 tbl_id = EFX_SIENA_FILTER_TBL_RX_MAC;
667 case EFX_SIENA_FILTER_TX_TCP_FULL:
668 case EFX_SIENA_FILTER_TX_TCP_WILD:
669 case EFX_SIENA_FILTER_TX_UDP_FULL:
670 case EFX_SIENA_FILTER_TX_UDP_WILD:
671 tbl_id = EFX_SIENA_FILTER_TBL_TX_IP;
674 case EFX_SIENA_FILTER_TX_MAC_FULL:
675 case EFX_SIENA_FILTER_TX_MAC_WILD:
676 tbl_id = EFX_SIENA_FILTER_TBL_TX_MAC;
680 EFSYS_ASSERT(B_FALSE);
681 tbl_id = EFX_SIENA_FILTER_NTBLS;
688 siena_filter_reset_search_depth(
689 __inout siena_filter_t *sfp,
690 __in siena_filter_tbl_id_t tbl_id)
693 case EFX_SIENA_FILTER_TBL_RX_IP:
694 sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_FULL] = 0;
695 sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_WILD] = 0;
696 sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_FULL] = 0;
697 sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_WILD] = 0;
700 case EFX_SIENA_FILTER_TBL_RX_MAC:
701 sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_FULL] = 0;
702 sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_WILD] = 0;
705 case EFX_SIENA_FILTER_TBL_TX_IP:
706 sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_FULL] = 0;
707 sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_WILD] = 0;
708 sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_FULL] = 0;
709 sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_WILD] = 0;
712 case EFX_SIENA_FILTER_TBL_TX_MAC:
713 sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_FULL] = 0;
714 sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_WILD] = 0;
718 EFSYS_ASSERT(B_FALSE);
724 siena_filter_push_rx_limits(
727 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
730 EFX_BAR_READO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword);
732 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_FULL_SRCH_LIMIT,
733 sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_FULL] +
734 FILTER_CTL_SRCH_FUDGE_FULL);
735 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_WILD_SRCH_LIMIT,
736 sfp->sf_depth[EFX_SIENA_FILTER_RX_TCP_WILD] +
737 FILTER_CTL_SRCH_FUDGE_WILD);
738 EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_FULL_SRCH_LIMIT,
739 sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_FULL] +
740 FILTER_CTL_SRCH_FUDGE_FULL);
741 EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_WILD_SRCH_LIMIT,
742 sfp->sf_depth[EFX_SIENA_FILTER_RX_UDP_WILD] +
743 FILTER_CTL_SRCH_FUDGE_WILD);
745 if (sfp->sf_tbl[EFX_SIENA_FILTER_TBL_RX_MAC].sft_size) {
746 EFX_SET_OWORD_FIELD(oword,
747 FRF_CZ_ETHERNET_FULL_SEARCH_LIMIT,
748 sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_FULL] +
749 FILTER_CTL_SRCH_FUDGE_FULL);
750 EFX_SET_OWORD_FIELD(oword,
751 FRF_CZ_ETHERNET_WILDCARD_SEARCH_LIMIT,
752 sfp->sf_depth[EFX_SIENA_FILTER_RX_MAC_WILD] +
753 FILTER_CTL_SRCH_FUDGE_WILD);
756 EFX_BAR_WRITEO(enp, FR_AZ_RX_FILTER_CTL_REG, &oword);
760 siena_filter_push_tx_limits(
763 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
766 EFX_BAR_READO(enp, FR_AZ_TX_CFG_REG, &oword);
768 if (sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_IP].sft_size != 0) {
769 EFX_SET_OWORD_FIELD(oword,
770 FRF_CZ_TX_TCPIP_FILTER_FULL_SEARCH_RANGE,
771 sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_FULL] +
772 FILTER_CTL_SRCH_FUDGE_FULL);
773 EFX_SET_OWORD_FIELD(oword,
774 FRF_CZ_TX_TCPIP_FILTER_WILD_SEARCH_RANGE,
775 sfp->sf_depth[EFX_SIENA_FILTER_TX_TCP_WILD] +
776 FILTER_CTL_SRCH_FUDGE_WILD);
777 EFX_SET_OWORD_FIELD(oword,
778 FRF_CZ_TX_UDPIP_FILTER_FULL_SEARCH_RANGE,
779 sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_FULL] +
780 FILTER_CTL_SRCH_FUDGE_FULL);
781 EFX_SET_OWORD_FIELD(oword,
782 FRF_CZ_TX_UDPIP_FILTER_WILD_SEARCH_RANGE,
783 sfp->sf_depth[EFX_SIENA_FILTER_TX_UDP_WILD] +
784 FILTER_CTL_SRCH_FUDGE_WILD);
787 if (sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_MAC].sft_size != 0) {
789 oword, FRF_CZ_TX_ETH_FILTER_FULL_SEARCH_RANGE,
790 sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_FULL] +
791 FILTER_CTL_SRCH_FUDGE_FULL);
793 oword, FRF_CZ_TX_ETH_FILTER_WILD_SEARCH_RANGE,
794 sfp->sf_depth[EFX_SIENA_FILTER_TX_MAC_WILD] +
795 FILTER_CTL_SRCH_FUDGE_WILD);
798 EFX_BAR_WRITEO(enp, FR_AZ_TX_CFG_REG, &oword);
801 /* Build a filter entry and return its n-tuple key. */
802 static __checkReturn uint32_t
804 __out efx_oword_t *filter,
805 __in siena_filter_spec_t *spec)
809 uint8_t type = spec->sfs_type;
810 uint32_t flags = spec->sfs_flags;
812 switch (siena_filter_tbl_id(type)) {
813 case EFX_SIENA_FILTER_TBL_RX_IP: {
814 boolean_t is_udp = (type == EFX_SIENA_FILTER_RX_UDP_FULL ||
815 type == EFX_SIENA_FILTER_RX_UDP_WILD);
816 EFX_POPULATE_OWORD_7(*filter,
818 (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0,
820 (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0,
821 FRF_AZ_TCP_UDP, is_udp,
822 FRF_AZ_RXQ_ID, spec->sfs_dmaq_id,
823 EFX_DWORD_2, spec->sfs_dword[2],
824 EFX_DWORD_1, spec->sfs_dword[1],
825 EFX_DWORD_0, spec->sfs_dword[0]);
830 case EFX_SIENA_FILTER_TBL_RX_MAC: {
831 boolean_t is_wild = (type == EFX_SIENA_FILTER_RX_MAC_WILD);
832 EFX_POPULATE_OWORD_7(*filter,
834 (flags & EFX_FILTER_FLAG_RX_RSS) ? 1 : 0,
835 FRF_CZ_RMFT_SCATTER_EN,
836 (flags & EFX_FILTER_FLAG_RX_SCATTER) ? 1 : 0,
837 FRF_CZ_RMFT_RXQ_ID, spec->sfs_dmaq_id,
838 FRF_CZ_RMFT_WILDCARD_MATCH, is_wild,
839 FRF_CZ_RMFT_DEST_MAC_DW1, spec->sfs_dword[2],
840 FRF_CZ_RMFT_DEST_MAC_DW0, spec->sfs_dword[1],
841 FRF_CZ_RMFT_VLAN_ID, spec->sfs_dword[0]);
846 case EFX_SIENA_FILTER_TBL_TX_IP: {
847 boolean_t is_udp = (type == EFX_SIENA_FILTER_TX_UDP_FULL ||
848 type == EFX_SIENA_FILTER_TX_UDP_WILD);
849 EFX_POPULATE_OWORD_5(*filter,
850 FRF_CZ_TIFT_TCP_UDP, is_udp,
851 FRF_CZ_TIFT_TXQ_ID, spec->sfs_dmaq_id,
852 EFX_DWORD_2, spec->sfs_dword[2],
853 EFX_DWORD_1, spec->sfs_dword[1],
854 EFX_DWORD_0, spec->sfs_dword[0]);
855 dword3 = is_udp | spec->sfs_dmaq_id << 1;
859 case EFX_SIENA_FILTER_TBL_TX_MAC: {
860 boolean_t is_wild = (type == EFX_SIENA_FILTER_TX_MAC_WILD);
861 EFX_POPULATE_OWORD_5(*filter,
862 FRF_CZ_TMFT_TXQ_ID, spec->sfs_dmaq_id,
863 FRF_CZ_TMFT_WILDCARD_MATCH, is_wild,
864 FRF_CZ_TMFT_SRC_MAC_DW1, spec->sfs_dword[2],
865 FRF_CZ_TMFT_SRC_MAC_DW0, spec->sfs_dword[1],
866 FRF_CZ_TMFT_VLAN_ID, spec->sfs_dword[0]);
867 dword3 = is_wild | spec->sfs_dmaq_id << 1;
872 EFSYS_ASSERT(B_FALSE);
885 static __checkReturn efx_rc_t
886 siena_filter_push_entry(
887 __inout efx_nic_t *enp,
888 __in siena_filter_type_t type,
890 __in efx_oword_t *eop)
895 case EFX_SIENA_FILTER_RX_TCP_FULL:
896 case EFX_SIENA_FILTER_RX_TCP_WILD:
897 case EFX_SIENA_FILTER_RX_UDP_FULL:
898 case EFX_SIENA_FILTER_RX_UDP_WILD:
899 EFX_BAR_TBL_WRITEO(enp, FR_AZ_RX_FILTER_TBL0, index,
903 case EFX_SIENA_FILTER_RX_MAC_FULL:
904 case EFX_SIENA_FILTER_RX_MAC_WILD:
905 EFX_BAR_TBL_WRITEO(enp, FR_CZ_RX_MAC_FILTER_TBL0, index,
909 case EFX_SIENA_FILTER_TX_TCP_FULL:
910 case EFX_SIENA_FILTER_TX_TCP_WILD:
911 case EFX_SIENA_FILTER_TX_UDP_FULL:
912 case EFX_SIENA_FILTER_TX_UDP_WILD:
913 EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_FILTER_TBL0, index,
917 case EFX_SIENA_FILTER_TX_MAC_FULL:
918 case EFX_SIENA_FILTER_TX_MAC_WILD:
919 EFX_BAR_TBL_WRITEO(enp, FR_CZ_TX_MAC_FILTER_TBL0, index,
924 EFSYS_ASSERT(B_FALSE);
935 static __checkReturn boolean_t
937 __in const siena_filter_spec_t *left,
938 __in const siena_filter_spec_t *right)
940 siena_filter_tbl_id_t tbl_id;
942 tbl_id = siena_filter_tbl_id(left->sfs_type);
945 if (left->sfs_type != right->sfs_type)
948 if (memcmp(left->sfs_dword, right->sfs_dword,
949 sizeof (left->sfs_dword)))
952 if ((tbl_id == EFX_SIENA_FILTER_TBL_TX_IP ||
953 tbl_id == EFX_SIENA_FILTER_TBL_TX_MAC) &&
954 left->sfs_dmaq_id != right->sfs_dmaq_id)
960 static __checkReturn efx_rc_t
962 __in siena_filter_tbl_t *sftp,
963 __in siena_filter_spec_t *spec,
965 __in boolean_t for_insert,
966 __out int *filter_index,
967 __out unsigned int *depth_required)
969 unsigned int hash, incr, filter_idx, depth;
971 hash = siena_filter_tbl_hash(key);
972 incr = siena_filter_tbl_increment(key);
974 filter_idx = hash & (sftp->sft_size - 1);
979 * Return success if entry is used and matches this spec
980 * or entry is unused and we are trying to insert.
982 if (siena_filter_test_used(sftp, filter_idx) ?
983 siena_filter_equal(spec,
984 &sftp->sft_spec[filter_idx]) :
986 *filter_index = filter_idx;
987 *depth_required = depth;
991 /* Return failure if we reached the maximum search depth */
992 if (depth == FILTER_CTL_SRCH_MAX)
993 return (for_insert ? EBUSY : ENOENT);
995 filter_idx = (filter_idx + incr) & (sftp->sft_size - 1);
1001 siena_filter_clear_entry(
1002 __in efx_nic_t *enp,
1003 __in siena_filter_tbl_t *sftp,
1008 if (siena_filter_test_used(sftp, index)) {
1009 siena_filter_clear_used(sftp, index);
1011 EFX_ZERO_OWORD(filter);
1012 siena_filter_push_entry(enp,
1013 sftp->sft_spec[index].sfs_type,
1016 memset(&sftp->sft_spec[index],
1017 0, sizeof (sftp->sft_spec[0]));
1022 siena_filter_tbl_clear(
1023 __in efx_nic_t *enp,
1024 __in siena_filter_tbl_id_t tbl_id)
1026 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1027 siena_filter_tbl_t *sftp = &sfp->sf_tbl[tbl_id];
1029 efsys_lock_state_t state;
1031 EFSYS_LOCK(enp->en_eslp, state);
1033 for (index = 0; index < sftp->sft_size; ++index) {
1034 siena_filter_clear_entry(enp, sftp, index);
1037 if (sftp->sft_used == 0)
1038 siena_filter_reset_search_depth(sfp, tbl_id);
1040 EFSYS_UNLOCK(enp->en_eslp, state);
1043 static __checkReturn efx_rc_t
1045 __in efx_nic_t *enp)
1047 siena_filter_t *sfp;
1048 siena_filter_tbl_t *sftp;
1052 EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (siena_filter_t), sfp);
1059 enp->en_filter.ef_siena_filter = sfp;
1061 switch (enp->en_family) {
1062 case EFX_FAMILY_SIENA:
1063 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_RX_IP];
1064 sftp->sft_size = FR_AZ_RX_FILTER_TBL0_ROWS;
1066 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_RX_MAC];
1067 sftp->sft_size = FR_CZ_RX_MAC_FILTER_TBL0_ROWS;
1069 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_IP];
1070 sftp->sft_size = FR_CZ_TX_FILTER_TBL0_ROWS;
1072 sftp = &sfp->sf_tbl[EFX_SIENA_FILTER_TBL_TX_MAC];
1073 sftp->sft_size = FR_CZ_TX_MAC_FILTER_TBL0_ROWS;
1081 for (tbl_id = 0; tbl_id < EFX_SIENA_FILTER_NTBLS; tbl_id++) {
1082 unsigned int bitmap_size;
1084 sftp = &sfp->sf_tbl[tbl_id];
1085 if (sftp->sft_size == 0)
1088 EFX_STATIC_ASSERT(sizeof (sftp->sft_bitmap[0]) ==
1091 (sftp->sft_size + (sizeof (uint32_t) * 8) - 1) / 8;
1093 EFSYS_KMEM_ALLOC(enp->en_esip, bitmap_size, sftp->sft_bitmap);
1094 if (!sftp->sft_bitmap) {
1099 EFSYS_KMEM_ALLOC(enp->en_esip,
1100 sftp->sft_size * sizeof (*sftp->sft_spec),
1102 if (!sftp->sft_spec) {
1106 memset(sftp->sft_spec, 0,
1107 sftp->sft_size * sizeof (*sftp->sft_spec));
1120 siena_filter_fini(enp);
1123 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1129 __in efx_nic_t *enp)
1131 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1132 siena_filter_tbl_id_t tbl_id;
1134 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1135 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
1140 for (tbl_id = 0; tbl_id < EFX_SIENA_FILTER_NTBLS; tbl_id++) {
1141 siena_filter_tbl_t *sftp = &sfp->sf_tbl[tbl_id];
1142 unsigned int bitmap_size;
1144 EFX_STATIC_ASSERT(sizeof (sftp->sft_bitmap[0]) ==
1147 (sftp->sft_size + (sizeof (uint32_t) * 8) - 1) / 8;
1149 if (sftp->sft_bitmap != NULL) {
1150 EFSYS_KMEM_FREE(enp->en_esip, bitmap_size,
1152 sftp->sft_bitmap = NULL;
1155 if (sftp->sft_spec != NULL) {
1156 EFSYS_KMEM_FREE(enp->en_esip, sftp->sft_size *
1157 sizeof (*sftp->sft_spec), sftp->sft_spec);
1158 sftp->sft_spec = NULL;
1162 EFSYS_KMEM_FREE(enp->en_esip, sizeof (siena_filter_t),
1163 enp->en_filter.ef_siena_filter);
1166 /* Restore filter state after a reset */
1167 static __checkReturn efx_rc_t
1168 siena_filter_restore(
1169 __in efx_nic_t *enp)
1171 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1172 siena_filter_tbl_id_t tbl_id;
1173 siena_filter_tbl_t *sftp;
1174 siena_filter_spec_t *spec;
1177 efsys_lock_state_t state;
1181 EFSYS_LOCK(enp->en_eslp, state);
1183 for (tbl_id = 0; tbl_id < EFX_SIENA_FILTER_NTBLS; tbl_id++) {
1184 sftp = &sfp->sf_tbl[tbl_id];
1185 for (filter_idx = 0;
1186 filter_idx < sftp->sft_size;
1188 if (!siena_filter_test_used(sftp, filter_idx))
1191 spec = &sftp->sft_spec[filter_idx];
1192 if ((key = siena_filter_build(&filter, spec)) == 0) {
1196 if ((rc = siena_filter_push_entry(enp,
1197 spec->sfs_type, filter_idx, &filter)) != 0)
1202 siena_filter_push_rx_limits(enp);
1203 siena_filter_push_tx_limits(enp);
1205 EFSYS_UNLOCK(enp->en_eslp, state);
1213 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1215 EFSYS_UNLOCK(enp->en_eslp, state);
1220 static __checkReturn efx_rc_t
1222 __in efx_nic_t *enp,
1223 __inout efx_filter_spec_t *spec,
1224 __in boolean_t may_replace)
1227 siena_filter_spec_t sf_spec;
1228 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1229 siena_filter_tbl_id_t tbl_id;
1230 siena_filter_tbl_t *sftp;
1231 siena_filter_spec_t *saved_sf_spec;
1235 efsys_lock_state_t state;
1239 EFSYS_ASSERT3P(spec, !=, NULL);
1241 if ((rc = siena_filter_spec_from_gen_spec(&sf_spec, spec)) != 0)
1244 tbl_id = siena_filter_tbl_id(sf_spec.sfs_type);
1245 sftp = &sfp->sf_tbl[tbl_id];
1247 if (sftp->sft_size == 0) {
1252 key = siena_filter_build(&filter, &sf_spec);
1254 EFSYS_LOCK(enp->en_eslp, state);
1256 rc = siena_filter_search(sftp, &sf_spec, key, B_TRUE,
1257 &filter_idx, &depth);
1261 EFSYS_ASSERT3U(filter_idx, <, sftp->sft_size);
1262 saved_sf_spec = &sftp->sft_spec[filter_idx];
1264 if (siena_filter_test_used(sftp, filter_idx)) {
1265 if (may_replace == B_FALSE) {
1270 siena_filter_set_used(sftp, filter_idx);
1271 *saved_sf_spec = sf_spec;
1273 if (sfp->sf_depth[sf_spec.sfs_type] < depth) {
1274 sfp->sf_depth[sf_spec.sfs_type] = depth;
1275 if (tbl_id == EFX_SIENA_FILTER_TBL_TX_IP ||
1276 tbl_id == EFX_SIENA_FILTER_TBL_TX_MAC)
1277 siena_filter_push_tx_limits(enp);
1279 siena_filter_push_rx_limits(enp);
1282 siena_filter_push_entry(enp, sf_spec.sfs_type,
1283 filter_idx, &filter);
1285 EFSYS_UNLOCK(enp->en_eslp, state);
1292 EFSYS_UNLOCK(enp->en_eslp, state);
1299 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1303 static __checkReturn efx_rc_t
1304 siena_filter_delete(
1305 __in efx_nic_t *enp,
1306 __inout efx_filter_spec_t *spec)
1309 siena_filter_spec_t sf_spec;
1310 siena_filter_t *sfp = enp->en_filter.ef_siena_filter;
1311 siena_filter_tbl_id_t tbl_id;
1312 siena_filter_tbl_t *sftp;
1316 efsys_lock_state_t state;
1319 EFSYS_ASSERT3P(spec, !=, NULL);
1321 if ((rc = siena_filter_spec_from_gen_spec(&sf_spec, spec)) != 0)
1324 tbl_id = siena_filter_tbl_id(sf_spec.sfs_type);
1325 sftp = &sfp->sf_tbl[tbl_id];
1327 key = siena_filter_build(&filter, &sf_spec);
1329 EFSYS_LOCK(enp->en_eslp, state);
1331 rc = siena_filter_search(sftp, &sf_spec, key, B_FALSE,
1332 &filter_idx, &depth);
1336 siena_filter_clear_entry(enp, sftp, filter_idx);
1337 if (sftp->sft_used == 0)
1338 siena_filter_reset_search_depth(sfp, tbl_id);
1340 EFSYS_UNLOCK(enp->en_eslp, state);
1344 EFSYS_UNLOCK(enp->en_eslp, state);
1348 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1352 #define MAX_SUPPORTED 4
1354 static __checkReturn efx_rc_t
1355 siena_filter_supported_filters(
1356 __in efx_nic_t *enp,
1357 __out uint32_t *list,
1358 __out size_t *length)
1361 uint32_t rx_matches[MAX_SUPPORTED];
1369 rx_matches[index++] =
1370 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
1371 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT |
1372 EFX_FILTER_MATCH_REM_HOST | EFX_FILTER_MATCH_REM_PORT;
1374 rx_matches[index++] =
1375 EFX_FILTER_MATCH_ETHER_TYPE | EFX_FILTER_MATCH_IP_PROTO |
1376 EFX_FILTER_MATCH_LOC_HOST | EFX_FILTER_MATCH_LOC_PORT;
1378 if (enp->en_features & EFX_FEATURE_MAC_HEADER_FILTERS) {
1379 rx_matches[index++] =
1380 EFX_FILTER_MATCH_OUTER_VID | EFX_FILTER_MATCH_LOC_MAC;
1382 rx_matches[index++] = EFX_FILTER_MATCH_LOC_MAC;
1385 EFSYS_ASSERT3U(index, <=, MAX_SUPPORTED);
1388 memcpy(list, rx_matches, *length);
1397 #undef MAX_SUPPORTED
1399 #endif /* EFSYS_OPT_SIENA */
1401 #endif /* EFSYS_OPT_FILTER */