2 * Copyright 2007-2009 Solarflare Communications Inc. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #ifndef _SYS_SIENA_FLASH_H
29 #define _SYS_SIENA_FLASH_H
33 /* Fixed locations near the start of flash (which may be in the internal PHY
34 * firmware header) point to the boot header.
36 * - parsed by MC boot ROM and firmware
37 * - reserved (but not parsed) by PHY firmware
41 #define SIENA_MC_BOOT_PHY_FW_HDR_LEN (0x20)
43 #define SIENA_MC_BOOT_PTR_LOCATION (0x18) /* First thing we try to boot */
44 #define SIENA_MC_BOOT_ALT_PTR_LOCATION (0x1c) /* Alternative if that fails */
46 #define SIENA_MC_BOOT_HDR_LEN (0x200)
48 #define SIENA_MC_BOOT_MAGIC (0x51E4A001)
49 #define SIENA_MC_BOOT_VERSION (1)
51 typedef struct siena_mc_boot_hdr_s { /* GENERATED BY scripts/genfwdef */
52 efx_dword_t magic; /* = SIENA_MC_BOOT_MAGIC */
53 efx_word_t hdr_version; /* this structure definition is version 1 */
54 efx_byte_t board_type;
55 efx_byte_t firmware_version_a;
56 efx_byte_t firmware_version_b;
57 efx_byte_t firmware_version_c;
58 efx_word_t checksum; /* of whole header area + firmware image */
59 efx_word_t firmware_version_d;
60 efx_word_t reserved_a[1]; /* (set to 0) */
61 efx_dword_t firmware_text_offset; /* offset to firmware .text */
62 efx_dword_t firmware_text_size; /* length of firmware .text, in bytes */
63 efx_dword_t firmware_data_offset; /* offset to firmware .data */
64 efx_dword_t firmware_data_size; /* length of firmware .data, in bytes */
65 efx_dword_t reserved_b[8]; /* (set to 0) */
66 } siena_mc_boot_hdr_t;
68 #define SIENA_MC_STATIC_CONFIG_MAGIC (0xBDCF5555)
69 #define SIENA_MC_STATIC_CONFIG_VERSION (0)
71 typedef struct siena_mc_static_config_hdr_s { /* GENERATED BY scripts/genfwdef */
72 efx_dword_t magic; /* = SIENA_MC_STATIC_CONFIG_MAGIC */
73 efx_word_t length; /* of header area (i.e. not including VPD) */
75 efx_byte_t csum; /* over header area (i.e. not including VPD) */
76 efx_dword_t static_vpd_offset;
77 efx_dword_t static_vpd_length;
78 efx_dword_t capabilities;
79 efx_byte_t mac_addr_base[6];
80 efx_byte_t green_mode_cal; /* Green mode calibration result */
81 efx_byte_t green_mode_valid; /* Whether cal holds a valid value */
82 efx_word_t mac_addr_count;
83 efx_word_t mac_addr_stride;
84 efx_dword_t reserved2[2]; /* (write as zero) */
85 efx_dword_t num_dbi_items;
88 efx_word_t byte_enables;
91 } siena_mc_static_config_hdr_t;
93 #define SIENA_MC_DYNAMIC_CONFIG_MAGIC (0xBDCFDDDD)
94 #define SIENA_MC_DYNAMIC_CONFIG_VERSION (0)
96 typedef struct siena_mc_fw_version_s { /* GENERATED BY scripts/genfwdef */
97 efx_dword_t fw_subtype;
100 efx_word_t version_y;
101 efx_word_t version_z;
102 } siena_mc_fw_version_t;
104 typedef struct siena_mc_dynamic_config_hdr_s { /* GENERATED BY scripts/genfwdef */
105 efx_dword_t magic; /* = SIENA_MC_DYNAMIC_CONFIG_MAGIC */
106 efx_word_t length; /* of header area (i.e. not including VPD) */
108 efx_byte_t csum; /* over header area (i.e. not including VPD) */
109 efx_dword_t dynamic_vpd_offset;
110 efx_dword_t dynamic_vpd_length;
111 efx_dword_t num_fw_version_items;
112 siena_mc_fw_version_t fw_version[];
113 } siena_mc_dynamic_config_hdr_t;
115 #define SIENA_MC_EXPROM_SINGLE_MAGIC (0xAA55) /* little-endian uint16_t */
117 #define SIENA_MC_EXPROM_COMBO_MAGIC (0xB0070102) /* little-endian uint32_t */
119 typedef struct siena_mc_combo_rom_hdr_s { /* GENERATED BY scripts/genfwdef */
120 efx_dword_t magic; /* = SIENA_MC_EXPROM_COMBO_MAGIC */
121 efx_dword_t len1; /* length of first image */
122 efx_dword_t len2; /* length of second image */
123 efx_dword_t off1; /* offset of first byte to edit to combine images */
124 efx_dword_t off2; /* offset of second byte to edit to combine images */
125 efx_word_t infoblk0_off; /* infoblk offset */
126 efx_word_t infoblk1_off; /* infoblk offset */
127 efx_byte_t infoblk_len; /* length of space reserved for infoblk structures */
128 efx_byte_t reserved[7]; /* (set to 0) */
129 } siena_mc_combo_rom_hdr_t;
133 #endif /* _SYS_SIENA_FLASH_H */