2 * Copyright 2009 Solarflare Communications Inc. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
37 __in uint32_t mcdi_cap,
38 __out uint32_t *maskp)
43 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
44 mask |= (1 << EFX_PHY_CAP_10HDX);
45 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
46 mask |= (1 << EFX_PHY_CAP_10FDX);
47 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
48 mask |= (1 << EFX_PHY_CAP_100HDX);
49 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
50 mask |= (1 << EFX_PHY_CAP_100FDX);
51 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
52 mask |= (1 << EFX_PHY_CAP_1000HDX);
53 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
54 mask |= (1 << EFX_PHY_CAP_1000FDX);
55 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
56 mask |= (1 << EFX_PHY_CAP_10000FDX);
57 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
58 mask |= (1 << EFX_PHY_CAP_PAUSE);
59 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
60 mask |= (1 << EFX_PHY_CAP_ASYM);
61 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
62 mask |= (1 << EFX_PHY_CAP_AN);
68 siena_phy_decode_link_mode(
70 __in uint32_t link_flags,
71 __in unsigned int speed,
72 __in unsigned int fcntl,
73 __out efx_link_mode_t *link_modep,
74 __out unsigned int *fcntlp)
76 boolean_t fd = !!(link_flags &
77 (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
78 boolean_t up = !!(link_flags &
79 (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
84 *link_modep = EFX_LINK_DOWN;
85 else if (speed == 10000 && fd)
86 *link_modep = EFX_LINK_10000FDX;
87 else if (speed == 1000)
88 *link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX;
89 else if (speed == 100)
90 *link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX;
92 *link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX;
94 *link_modep = EFX_LINK_UNKNOWN;
96 if (fcntl == MC_CMD_FCNTL_OFF)
98 else if (fcntl == MC_CMD_FCNTL_RESPOND)
99 *fcntlp = EFX_FCNTL_RESPOND;
100 else if (fcntl == MC_CMD_FCNTL_BIDIR)
101 *fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
103 EFSYS_PROBE1(mc_pcol_error, int, fcntl);
111 __in efx_qword_t *eqp,
112 __out efx_link_mode_t *link_modep)
114 efx_port_t *epp = &(enp->en_port);
115 unsigned int link_flags;
118 efx_link_mode_t link_mode;
119 uint32_t lp_cap_mask;
122 * Convert the LINKCHANGE speed enumeration into mbit/s, in the
123 * same way as GET_LINK encodes the speed
125 switch (MCDI_EV_FIELD(*eqp, LINKCHANGE_SPEED)) {
126 case MCDI_EVENT_LINKCHANGE_SPEED_100M:
129 case MCDI_EVENT_LINKCHANGE_SPEED_1G:
132 case MCDI_EVENT_LINKCHANGE_SPEED_10G:
140 link_flags = MCDI_EV_FIELD(*eqp, LINKCHANGE_LINK_FLAGS);
141 siena_phy_decode_link_mode(enp, link_flags, speed,
142 MCDI_EV_FIELD(*eqp, LINKCHANGE_FCNTL),
144 siena_phy_decode_cap(MCDI_EV_FIELD(*eqp, LINKCHANGE_LP_CAP),
148 * It's safe to update ep_lp_cap_mask without the driver's port lock
149 * because presumably any concurrently running efx_port_poll() is
150 * only going to arrive at the same value.
152 * ep_fcntl has two meanings. It's either the link common fcntl
153 * (if the PHY supports AN), or it's the forced link state. If
154 * the former, it's safe to update the value for the same reason as
155 * for ep_lp_cap_mask. If the latter, then just ignore the value,
156 * because we can race with efx_mac_fcntl_set().
158 epp->ep_lp_cap_mask = lp_cap_mask;
159 if (epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_AN))
160 epp->ep_fcntl = fcntl;
162 *link_modep = link_mode;
168 __in boolean_t power)
175 /* Check if the PHY is a zombie */
176 if ((rc = siena_phy_verify(enp)) != 0)
179 enp->en_reset_flags |= EFX_RESET_PHY;
184 EFSYS_PROBE1(fail1, int, rc);
192 __out siena_link_state_t *slsp)
195 uint8_t outbuf[MC_CMD_GET_LINK_OUT_LEN];
198 req.emr_cmd = MC_CMD_GET_LINK;
199 EFX_STATIC_ASSERT(MC_CMD_GET_LINK_IN_LEN == 0);
200 req.emr_in_buf = NULL;
201 req.emr_in_length = 0;
202 req.emr_out_buf = outbuf;
203 req.emr_out_length = sizeof (outbuf);
205 efx_mcdi_execute(enp, &req);
207 if (req.emr_rc != 0) {
212 if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) {
217 siena_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
218 &slsp->sls_adv_cap_mask);
219 siena_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
220 &slsp->sls_lp_cap_mask);
222 siena_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
223 MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
224 MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
225 &slsp->sls_link_mode, &slsp->sls_fcntl);
227 #if EFSYS_OPT_LOOPBACK
228 /* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */
229 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF);
230 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA);
231 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC);
232 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII);
233 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS);
234 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI);
235 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII);
236 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII);
237 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR);
238 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI);
239 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR);
240 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR);
241 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR);
242 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR);
243 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY);
244 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS);
245 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS);
246 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD);
248 slsp->sls_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE);
249 #endif /* EFSYS_OPT_LOOPBACK */
251 slsp->sls_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0;
258 EFSYS_PROBE1(fail1, int, rc);
264 siena_phy_reconfigure(
267 efx_port_t *epp = &(enp->en_port);
269 uint8_t payload[MAX(MC_CMD_SET_ID_LED_IN_LEN,
270 MC_CMD_SET_LINK_IN_LEN)];
272 unsigned int led_mode;
276 req.emr_cmd = MC_CMD_SET_LINK;
277 req.emr_in_buf = payload;
278 req.emr_in_length = MC_CMD_SET_LINK_IN_LEN;
279 EFX_STATIC_ASSERT(MC_CMD_SET_LINK_OUT_LEN == 0);
280 req.emr_out_buf = NULL;
281 req.emr_out_length = 0;
283 cap_mask = epp->ep_adv_cap_mask;
284 MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP,
285 PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1,
286 PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1,
287 PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1,
288 PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1,
289 PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1,
290 PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1,
291 PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1,
292 PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1,
293 PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1,
294 PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);
296 #if EFSYS_OPT_LOOPBACK
297 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
298 epp->ep_loopback_type);
299 switch (epp->ep_loopback_link_mode) {
300 case EFX_LINK_100FDX:
303 case EFX_LINK_1000FDX:
306 case EFX_LINK_10000FDX:
313 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE);
315 #endif /* EFSYS_OPT_LOOPBACK */
316 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
318 #if EFSYS_OPT_PHY_FLAGS
319 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
321 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
322 #endif /* EFSYS_OPT_PHY_FLAGS */
324 efx_mcdi_execute(enp, &req);
326 if (req.emr_rc != 0) {
331 /* And set the blink mode */
332 req.emr_cmd = MC_CMD_SET_ID_LED;
333 req.emr_in_buf = payload;
334 req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN;
335 EFX_STATIC_ASSERT(MC_CMD_SET_ID_LED_OUT_LEN == 0);
336 req.emr_out_buf = NULL;
337 req.emr_out_length = 0;
339 #if EFSYS_OPT_PHY_LED_CONTROL
340 switch (epp->ep_phy_led_mode) {
341 case EFX_PHY_LED_DEFAULT:
342 led_mode = MC_CMD_LED_DEFAULT;
344 case EFX_PHY_LED_OFF:
345 led_mode = MC_CMD_LED_OFF;
348 led_mode = MC_CMD_LED_ON;
352 led_mode = MC_CMD_LED_DEFAULT;
355 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode);
357 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT);
358 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
360 efx_mcdi_execute(enp, &req);
362 if (req.emr_rc != 0) {
372 EFSYS_PROBE1(fail1, int, rc);
382 uint8_t outbuf[MC_CMD_GET_PHY_STATE_OUT_LEN];
386 req.emr_cmd = MC_CMD_GET_PHY_STATE;
387 EFX_STATIC_ASSERT(MC_CMD_GET_PHY_STATE_IN_LEN == 0);
388 req.emr_in_buf = NULL;
389 req.emr_in_length = 0;
390 req.emr_out_buf = outbuf;
391 req.emr_out_length = sizeof (outbuf);
393 efx_mcdi_execute(enp, &req);
395 if (req.emr_rc != 0) {
400 if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) {
405 state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE);
406 if (state != MC_CMD_PHY_STATE_OK) {
407 if (state != MC_CMD_PHY_STATE_ZOMBIE)
408 EFSYS_PROBE1(mc_pcol_error, int, state);
420 EFSYS_PROBE1(fail1, int, rc);
428 __out uint32_t *ouip)
430 _NOTE(ARGUNUSED(enp, ouip))
435 #if EFSYS_OPT_PHY_STATS
437 #define SIENA_SIMPLE_STAT_SET(_vmask, _esmp, _smask, _stat, \
438 _mc_record, _efx_record) \
439 if ((_vmask) & (1ULL << (_mc_record))) { \
440 (_smask) |= (1ULL << (_efx_record)); \
441 if ((_stat) != NULL && !EFSYS_MEM_IS_NULL(_esmp)) { \
443 EFSYS_MEM_READD(_esmp, (_mc_record) * 4, &dword);\
444 (_stat)[_efx_record] = \
445 EFX_DWORD_FIELD(dword, EFX_DWORD_0); \
449 #define SIENA_SIMPLE_STAT_SET2(_vmask, _esmp, _smask, _stat, _record) \
450 SIENA_SIMPLE_STAT_SET(_vmask, _esmp, _smask, _stat, \
451 MC_CMD_ ## _record, \
452 EFX_PHY_STAT_ ## _record)
455 siena_phy_decode_stats(
458 __in_opt efsys_mem_t *esmp,
459 __out_opt uint64_t *smaskp,
460 __out_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat)
464 _NOTE(ARGUNUSED(enp))
466 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, OUI);
467 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PMA_PMD_LINK_UP);
468 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PMA_PMD_RX_FAULT);
469 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PMA_PMD_TX_FAULT);
471 if (vmask & (1 << MC_CMD_PMA_PMD_SIGNAL)) {
472 smask |= ((1ULL << EFX_PHY_STAT_PMA_PMD_SIGNAL_A) |
473 (1ULL << EFX_PHY_STAT_PMA_PMD_SIGNAL_B) |
474 (1ULL << EFX_PHY_STAT_PMA_PMD_SIGNAL_C) |
475 (1ULL << EFX_PHY_STAT_PMA_PMD_SIGNAL_D));
476 if (stat != NULL && esmp != NULL && !EFSYS_MEM_IS_NULL(esmp)) {
479 EFSYS_MEM_READD(esmp, 4 * MC_CMD_PMA_PMD_SIGNAL,
481 sig = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
482 stat[EFX_PHY_STAT_PMA_PMD_SIGNAL_A] = (sig >> 1) & 1;
483 stat[EFX_PHY_STAT_PMA_PMD_SIGNAL_B] = (sig >> 2) & 1;
484 stat[EFX_PHY_STAT_PMA_PMD_SIGNAL_C] = (sig >> 3) & 1;
485 stat[EFX_PHY_STAT_PMA_PMD_SIGNAL_D] = (sig >> 4) & 1;
489 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_A,
491 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_B,
493 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_C,
495 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PMA_PMD_SNR_D,
498 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_LINK_UP);
499 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_RX_FAULT);
500 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_TX_FAULT);
501 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_BER);
502 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, PCS_BLOCK_ERRORS);
504 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_LINK_UP,
505 EFX_PHY_STAT_PHY_XS_LINK_UP);
506 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_RX_FAULT,
507 EFX_PHY_STAT_PHY_XS_RX_FAULT);
508 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_TX_FAULT,
509 EFX_PHY_STAT_PHY_XS_TX_FAULT);
510 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_PHYXS_ALIGN,
511 EFX_PHY_STAT_PHY_XS_ALIGN);
513 if (vmask & (1 << MC_CMD_PHYXS_SYNC)) {
514 smask |= ((1 << EFX_PHY_STAT_PHY_XS_SYNC_A) |
515 (1 << EFX_PHY_STAT_PHY_XS_SYNC_B) |
516 (1 << EFX_PHY_STAT_PHY_XS_SYNC_C) |
517 (1 << EFX_PHY_STAT_PHY_XS_SYNC_D));
518 if (stat != NULL && !EFSYS_MEM_IS_NULL(esmp)) {
521 EFSYS_MEM_READD(esmp, 4 * MC_CMD_PHYXS_SYNC, &dword);
522 sync = EFX_DWORD_FIELD(dword, EFX_DWORD_0);
523 stat[EFX_PHY_STAT_PHY_XS_SYNC_A] = (sync >> 0) & 1;
524 stat[EFX_PHY_STAT_PHY_XS_SYNC_B] = (sync >> 1) & 1;
525 stat[EFX_PHY_STAT_PHY_XS_SYNC_C] = (sync >> 2) & 1;
526 stat[EFX_PHY_STAT_PHY_XS_SYNC_D] = (sync >> 3) & 1;
530 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, AN_LINK_UP);
531 SIENA_SIMPLE_STAT_SET2(vmask, esmp, smask, stat, AN_COMPLETE);
533 SIENA_SIMPLE_STAT_SET(vmask, esmp, smask, stat, MC_CMD_CL22_LINK_UP,
534 EFX_PHY_STAT_CL22EXT_LINK_UP);
541 siena_phy_stats_update(
543 __in efsys_mem_t *esmp,
544 __out_ecount(EFX_PHY_NSTATS) uint32_t *stat)
546 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
547 uint32_t vmask = encp->enc_siena_phy_stat_mask;
548 uint8_t payload[MC_CMD_PHY_STATS_IN_LEN];
553 req.emr_cmd = MC_CMD_PHY_STATS;
554 req.emr_in_buf = payload;
555 req.emr_in_length = sizeof (payload);
556 EFX_STATIC_ASSERT(MC_CMD_PHY_STATS_OUT_DMA_LEN == 0);
557 req.emr_out_buf = NULL;
558 req.emr_out_length = 0;
560 MCDI_IN_SET_DWORD(req, PHY_STATS_IN_DMA_ADDR_LO,
561 EFSYS_MEM_ADDR(esmp) & 0xffffffff);
562 MCDI_IN_SET_DWORD(req, PHY_STATS_IN_DMA_ADDR_HI,
563 EFSYS_MEM_ADDR(esmp) >> 32);
565 efx_mcdi_execute(enp, &req);
567 if (req.emr_rc != 0) {
571 EFSYS_ASSERT3U(req.emr_out_length, ==, MC_CMD_PHY_STATS_OUT_DMA_LEN);
573 siena_phy_decode_stats(enp, vmask, esmp, &smask, stat);
574 EFSYS_ASSERT(smask == encp->enc_phy_stat_mask);
579 EFSYS_PROBE1(fail1, int, rc);
584 #endif /* EFSYS_OPT_PHY_STATS */
586 #if EFSYS_OPT_PHY_PROPS
590 extern const char __cs *
593 __in unsigned int id)
595 _NOTE(ARGUNUSED(enp, id))
600 #endif /* EFSYS_OPT_NAMES */
602 extern __checkReturn int
605 __in unsigned int id,
607 __out uint32_t *valp)
609 _NOTE(ARGUNUSED(enp, id, flags, valp))
614 extern __checkReturn int
617 __in unsigned int id,
620 _NOTE(ARGUNUSED(enp, id, val))
625 #endif /* EFSYS_OPT_PHY_PROPS */
627 #if EFSYS_OPT_PHY_BIST
630 siena_phy_bist_start(
632 __in efx_phy_bist_type_t type)
634 uint8_t payload[MC_CMD_START_BIST_IN_LEN];
638 req.emr_cmd = MC_CMD_START_BIST;
639 req.emr_in_buf = payload;
640 req.emr_in_length = sizeof (payload);
641 EFX_STATIC_ASSERT(MC_CMD_START_BIST_OUT_LEN == 0);
642 req.emr_out_buf = NULL;
643 req.emr_out_length = 0;
646 case EFX_PHY_BIST_TYPE_NORMAL:
647 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
649 case EFX_PHY_BIST_TYPE_CABLE_SHORT:
650 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
651 MC_CMD_PHY_BIST_CABLE_SHORT);
653 case EFX_PHY_BIST_TYPE_CABLE_LONG:
654 MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
655 MC_CMD_PHY_BIST_CABLE_LONG);
661 efx_mcdi_execute(enp, &req);
663 if (req.emr_rc != 0) {
671 EFSYS_PROBE1(fail1, int, rc);
676 static __checkReturn unsigned long
677 siena_phy_sft9001_bist_status(
681 case MC_CMD_POLL_BIST_SFT9001_PAIR_BUSY:
682 return (EFX_PHY_CABLE_STATUS_BUSY);
683 case MC_CMD_POLL_BIST_SFT9001_INTER_PAIR_SHORT:
684 return (EFX_PHY_CABLE_STATUS_INTERPAIRSHORT);
685 case MC_CMD_POLL_BIST_SFT9001_INTRA_PAIR_SHORT:
686 return (EFX_PHY_CABLE_STATUS_INTRAPAIRSHORT);
687 case MC_CMD_POLL_BIST_SFT9001_PAIR_OPEN:
688 return (EFX_PHY_CABLE_STATUS_OPEN);
689 case MC_CMD_POLL_BIST_SFT9001_PAIR_OK:
690 return (EFX_PHY_CABLE_STATUS_OK);
692 return (EFX_PHY_CABLE_STATUS_INVALID);
699 __in efx_phy_bist_type_t type,
700 __out efx_phy_bist_result_t *resultp,
701 __out_opt __drv_when(count > 0, __notnull)
702 uint32_t *value_maskp,
703 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
704 unsigned long *valuesp,
707 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
708 uint8_t payload[MCDI_CTL_SDU_LEN_MAX];
709 uint32_t value_mask = 0;
714 req.emr_cmd = MC_CMD_POLL_BIST;
715 _NOTE(CONSTANTCONDITION)
716 EFSYS_ASSERT(MC_CMD_POLL_BIST_IN_LEN == 0);
717 req.emr_in_buf = NULL;
718 req.emr_in_length = 0;
719 req.emr_out_buf = payload;
720 req.emr_out_length = sizeof (payload);
722 efx_mcdi_execute(enp, &req);
724 if (req.emr_rc != 0) {
729 if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {
735 (void) memset(valuesp, '\0', count * sizeof (unsigned long));
737 result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);
739 /* Extract PHY specific results */
740 if (result == MC_CMD_POLL_BIST_PASSED &&
741 encp->enc_phy_type == EFX_PHY_SFT9001B &&
742 req.emr_out_length_used >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN &&
743 (type == EFX_PHY_BIST_TYPE_CABLE_SHORT ||
744 type == EFX_PHY_BIST_TYPE_CABLE_LONG)) {
747 if (count > EFX_PHY_BIST_CABLE_LENGTH_A) {
749 valuesp[EFX_PHY_BIST_CABLE_LENGTH_A] =
751 POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A);
752 value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_A);
755 if (count > EFX_PHY_BIST_CABLE_LENGTH_B) {
757 valuesp[EFX_PHY_BIST_CABLE_LENGTH_B] =
759 POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B);
760 value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_B);
763 if (count > EFX_PHY_BIST_CABLE_LENGTH_C) {
765 valuesp[EFX_PHY_BIST_CABLE_LENGTH_C] =
767 POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C);
768 value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_C);
771 if (count > EFX_PHY_BIST_CABLE_LENGTH_D) {
773 valuesp[EFX_PHY_BIST_CABLE_LENGTH_D] =
775 POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D);
776 value_mask |= (1 << EFX_PHY_BIST_CABLE_LENGTH_D);
779 if (count > EFX_PHY_BIST_CABLE_STATUS_A) {
780 if (valuesp != NULL) {
781 word = MCDI_OUT_WORD(req,
782 POLL_BIST_OUT_SFT9001_CABLE_STATUS_A);
783 valuesp[EFX_PHY_BIST_CABLE_STATUS_A] =
784 siena_phy_sft9001_bist_status(word);
786 value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_A);
789 if (count > EFX_PHY_BIST_CABLE_STATUS_B) {
790 if (valuesp != NULL) {
791 word = MCDI_OUT_WORD(req,
792 POLL_BIST_OUT_SFT9001_CABLE_STATUS_B);
793 valuesp[EFX_PHY_BIST_CABLE_STATUS_B] =
794 siena_phy_sft9001_bist_status(word);
796 value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_B);
799 if (count > EFX_PHY_BIST_CABLE_STATUS_C) {
800 if (valuesp != NULL) {
801 word = MCDI_OUT_WORD(req,
802 POLL_BIST_OUT_SFT9001_CABLE_STATUS_C);
803 valuesp[EFX_PHY_BIST_CABLE_STATUS_C] =
804 siena_phy_sft9001_bist_status(word);
806 value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_C);
809 if (count > EFX_PHY_BIST_CABLE_STATUS_D) {
810 if (valuesp != NULL) {
811 word = MCDI_OUT_WORD(req,
812 POLL_BIST_OUT_SFT9001_CABLE_STATUS_D);
813 valuesp[EFX_PHY_BIST_CABLE_STATUS_D] =
814 siena_phy_sft9001_bist_status(word);
816 value_mask |= (1 << EFX_PHY_BIST_CABLE_STATUS_D);
819 } else if (result == MC_CMD_POLL_BIST_FAILED &&
820 encp->enc_phy_type == EFX_PHY_QLX111V &&
821 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&
822 count > EFX_PHY_BIST_FAULT_CODE) {
824 valuesp[EFX_PHY_BIST_FAULT_CODE] =
825 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);
826 value_mask |= 1 << EFX_PHY_BIST_FAULT_CODE;
829 if (value_maskp != NULL)
830 *value_maskp = value_mask;
832 EFSYS_ASSERT(resultp != NULL);
833 if (result == MC_CMD_POLL_BIST_RUNNING)
834 *resultp = EFX_PHY_BIST_RESULT_RUNNING;
835 else if (result == MC_CMD_POLL_BIST_PASSED)
836 *resultp = EFX_PHY_BIST_RESULT_PASSED;
838 *resultp = EFX_PHY_BIST_RESULT_FAILED;
845 EFSYS_PROBE1(fail1, int, rc);
853 __in efx_phy_bist_type_t type)
855 /* There is no way to stop BIST on Siena */
856 _NOTE(ARGUNUSED(enp, type))
859 #endif /* EFSYS_OPT_PHY_BIST */
861 #endif /* EFSYS_OPT_SIENA */