2 * Copyright (c) 2010-2015 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/mutex.h>
45 #include <sys/socket.h>
46 #include <sys/taskqueue.h>
47 #include <sys/sockio.h>
48 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcivar.h>
55 #include <net/ethernet.h>
57 #include <net/if_media.h>
58 #include <net/if_types.h>
60 #include "common/efx.h"
64 #include "sfxge_ioc.h"
65 #include "sfxge_version.h"
67 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \
68 IFCAP_RXCSUM | IFCAP_TXCSUM | \
69 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \
70 IFCAP_TSO4 | IFCAP_TSO6 | \
72 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE)
73 #define SFXGE_CAP_ENABLE SFXGE_CAP
74 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \
75 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE)
77 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver");
80 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD, 0,
81 "SFXGE driver parameters");
83 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring)
84 static int sfxge_rx_ring_entries = SFXGE_NDESCS;
85 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries);
86 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN,
87 &sfxge_rx_ring_entries, 0,
88 "Maximum number of descriptors in a receive ring");
90 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring)
91 static int sfxge_tx_ring_entries = SFXGE_NDESCS;
92 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries);
93 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN,
94 &sfxge_tx_ring_entries, 0,
95 "Maximum number of descriptors in a transmit ring");
98 sfxge_reset(void *arg, int npending);
101 sfxge_estimate_rsrc_limits(struct sfxge_softc *sc)
103 efx_drv_limits_t limits;
105 unsigned int evq_max;
106 uint32_t evq_allocated;
107 uint32_t rxq_allocated;
108 uint32_t txq_allocated;
111 * Limit the number of event queues to:
113 * - hardwire maximum RSS channels
114 * - administratively specified maximum RSS channels
116 evq_max = MIN(mp_ncpus, EFX_MAXRSS);
117 if (sc->max_rss_channels > 0)
118 evq_max = MIN(evq_max, sc->max_rss_channels);
120 memset(&limits, 0, sizeof(limits));
122 limits.edl_min_evq_count = 1;
123 limits.edl_max_evq_count = evq_max;
124 limits.edl_min_txq_count = SFXGE_TXQ_NTYPES;
125 limits.edl_max_txq_count = evq_max + SFXGE_TXQ_NTYPES - 1;
126 limits.edl_min_rxq_count = 1;
127 limits.edl_max_rxq_count = evq_max;
129 efx_nic_set_drv_limits(sc->enp, &limits);
131 if ((rc = efx_nic_init(sc->enp)) != 0)
134 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated,
137 efx_nic_fini(sc->enp);
141 KASSERT(txq_allocated >= SFXGE_TXQ_NTYPES,
142 ("txq_allocated < SFXGE_TXQ_NTYPES"));
144 sc->evq_max = MIN(evq_allocated, evq_max);
145 sc->evq_max = MIN(rxq_allocated, sc->evq_max);
146 sc->evq_max = MIN(txq_allocated - (SFXGE_TXQ_NTYPES - 1),
149 KASSERT(sc->evq_max <= evq_max,
150 ("allocated more than maximum requested"));
153 * NIC is kept initialized in the case of success to be able to
154 * initialize port to find out media types.
160 sfxge_set_drv_limits(struct sfxge_softc *sc)
162 efx_drv_limits_t limits;
164 memset(&limits, 0, sizeof(limits));
166 /* Limits are strict since take into account initial estimation */
167 limits.edl_min_evq_count = limits.edl_max_evq_count =
169 limits.edl_min_txq_count = limits.edl_max_txq_count =
170 sc->intr.n_alloc + SFXGE_TXQ_NTYPES - 1;
171 limits.edl_min_rxq_count = limits.edl_max_rxq_count =
174 return (efx_nic_set_drv_limits(sc->enp, &limits));
178 sfxge_start(struct sfxge_softc *sc)
182 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
184 if (sc->init_state == SFXGE_STARTED)
187 if (sc->init_state != SFXGE_REGISTERED) {
192 /* Set required resource limits */
193 if ((rc = sfxge_set_drv_limits(sc)) != 0)
196 if ((rc = efx_nic_init(sc->enp)) != 0)
199 /* Start processing interrupts. */
200 if ((rc = sfxge_intr_start(sc)) != 0)
203 /* Start processing events. */
204 if ((rc = sfxge_ev_start(sc)) != 0)
207 /* Fire up the port. */
208 if ((rc = sfxge_port_start(sc)) != 0)
211 /* Start the receiver side. */
212 if ((rc = sfxge_rx_start(sc)) != 0)
215 /* Start the transmitter side. */
216 if ((rc = sfxge_tx_start(sc)) != 0)
219 sc->init_state = SFXGE_STARTED;
221 /* Tell the stack we're running. */
222 sc->ifnet->if_drv_flags |= IFF_DRV_RUNNING;
223 sc->ifnet->if_drv_flags &= ~IFF_DRV_OACTIVE;
240 efx_nic_fini(sc->enp);
243 device_printf(sc->dev, "sfxge_start: %d\n", rc);
249 sfxge_if_init(void *arg)
251 struct sfxge_softc *sc;
253 sc = (struct sfxge_softc *)arg;
255 SFXGE_ADAPTER_LOCK(sc);
256 (void)sfxge_start(sc);
257 SFXGE_ADAPTER_UNLOCK(sc);
261 sfxge_stop(struct sfxge_softc *sc)
263 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
265 if (sc->init_state != SFXGE_STARTED)
268 sc->init_state = SFXGE_REGISTERED;
270 /* Stop the transmitter. */
273 /* Stop the receiver. */
279 /* Stop processing events. */
282 /* Stop processing interrupts. */
285 efx_nic_fini(sc->enp);
287 sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING;
292 sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc)
294 efx_vpd_value_t value;
297 switch (ioc->u.vpd.op) {
298 case SFXGE_VPD_OP_GET_KEYWORD:
299 value.evv_tag = ioc->u.vpd.tag;
300 value.evv_keyword = ioc->u.vpd.keyword;
301 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value);
304 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length);
305 if (ioc->u.vpd.payload != 0) {
306 rc = copyout(value.evv_value, ioc->u.vpd.payload,
310 case SFXGE_VPD_OP_SET_KEYWORD:
311 if (ioc->u.vpd.len > sizeof(value.evv_value))
313 value.evv_tag = ioc->u.vpd.tag;
314 value.evv_keyword = ioc->u.vpd.keyword;
315 value.evv_length = ioc->u.vpd.len;
316 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length);
319 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value);
322 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size);
325 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size);
336 sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc)
340 return (sfxge_mcdi_ioctl(sc, ioc));
341 case SFXGE_NVRAM_IOC:
342 return (sfxge_nvram_ioctl(sc, ioc));
344 return (sfxge_vpd_ioctl(sc, ioc));
352 sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
354 struct sfxge_softc *sc;
359 ifr = (struct ifreq *)data;
365 SFXGE_ADAPTER_LOCK(sc);
366 if (ifp->if_flags & IFF_UP) {
367 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
368 if ((ifp->if_flags ^ sc->if_flags) &
369 (IFF_PROMISC | IFF_ALLMULTI)) {
370 sfxge_mac_filter_set(sc);
375 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
377 sc->if_flags = ifp->if_flags;
378 SFXGE_ADAPTER_UNLOCK(sc);
381 if (ifr->ifr_mtu == ifp->if_mtu) {
384 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) {
386 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
387 ifp->if_mtu = ifr->ifr_mtu;
390 /* Restart required */
391 SFXGE_ADAPTER_LOCK(sc);
393 ifp->if_mtu = ifr->ifr_mtu;
394 error = sfxge_start(sc);
395 SFXGE_ADAPTER_UNLOCK(sc);
397 ifp->if_flags &= ~IFF_UP;
398 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
405 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
406 sfxge_mac_filter_set(sc);
410 int reqcap = ifr->ifr_reqcap;
413 SFXGE_ADAPTER_LOCK(sc);
415 /* Capabilities to be changed in accordance with request */
416 capchg_mask = ifp->if_capenable ^ reqcap;
419 * The networking core already rejects attempts to
420 * enable capabilities we don't have. We still have
421 * to reject attempts to disable capabilities that we
422 * can't (yet) disable.
424 KASSERT((reqcap & ~ifp->if_capabilities) == 0,
425 ("Unsupported capabilities 0x%x requested 0x%x vs "
427 reqcap & ~ifp->if_capabilities,
428 reqcap , ifp->if_capabilities));
429 if (capchg_mask & SFXGE_CAP_FIXED) {
431 SFXGE_ADAPTER_UNLOCK(sc);
435 /* Check request before any changes */
436 if ((capchg_mask & IFCAP_TSO4) &&
437 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) {
439 SFXGE_ADAPTER_UNLOCK(sc);
440 if_printf(ifp, "enable txcsum before tso4\n");
443 if ((capchg_mask & IFCAP_TSO6) &&
444 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) {
446 SFXGE_ADAPTER_UNLOCK(sc);
447 if_printf(ifp, "enable txcsum6 before tso6\n");
451 if (reqcap & IFCAP_TXCSUM) {
452 ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP);
454 ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP);
455 if (reqcap & IFCAP_TSO4) {
456 reqcap &= ~IFCAP_TSO4;
458 "tso4 disabled due to -txcsum\n");
461 if (reqcap & IFCAP_TXCSUM_IPV6) {
462 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
464 ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
465 if (reqcap & IFCAP_TSO6) {
466 reqcap &= ~IFCAP_TSO6;
468 "tso6 disabled due to -txcsum6\n");
473 * The kernel takes both IFCAP_TSOx and CSUM_TSO into
474 * account before using TSO. So, we do not touch
475 * checksum flags when IFCAP_TSOx is modified.
476 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO),
477 * but both bits are set in IPv4 and IPv6 mbufs.
480 ifp->if_capenable = reqcap;
482 SFXGE_ADAPTER_UNLOCK(sc);
487 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
490 error = priv_check(curthread, PRIV_DRIVER);
493 error = copyin(ifr->ifr_data, &ioc, sizeof(ioc));
496 error = sfxge_private_ioctl(sc, &ioc);
498 error = copyout(&ioc, ifr->ifr_data, sizeof(ioc));
502 error = ether_ioctl(ifp, command, data);
509 sfxge_ifnet_fini(struct ifnet *ifp)
511 struct sfxge_softc *sc = ifp->if_softc;
513 SFXGE_ADAPTER_LOCK(sc);
515 SFXGE_ADAPTER_UNLOCK(sc);
517 ifmedia_removeall(&sc->media);
523 sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc)
525 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);
532 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
533 ifp->if_init = sfxge_if_init;
535 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
536 ifp->if_ioctl = sfxge_if_ioctl;
538 ifp->if_capabilities = SFXGE_CAP;
539 ifp->if_capenable = SFXGE_CAP_ENABLE;
542 ifp->if_capabilities |= IFCAP_LRO;
543 ifp->if_capenable |= IFCAP_LRO;
546 if (encp->enc_hw_tx_insert_vlan_enabled) {
547 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
548 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING;
550 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO |
551 CSUM_TCP_IPV6 | CSUM_UDP_IPV6;
553 ether_ifattach(ifp, encp->enc_mac_addr);
555 ifp->if_transmit = sfxge_if_transmit;
556 ifp->if_qflush = sfxge_if_qflush;
558 DBGPRINT(sc->dev, "ifmedia_init");
559 if ((rc = sfxge_port_ifmedia_init(sc)) != 0)
565 ether_ifdetach(sc->ifnet);
570 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp)
572 KASSERT(sc->buffer_table_next + n <=
573 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit,
574 ("buffer table full"));
576 *idp = sc->buffer_table_next;
577 sc->buffer_table_next += n;
581 sfxge_bar_init(struct sfxge_softc *sc)
583 efsys_bar_t *esbp = &sc->bar;
585 esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR);
586 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
587 &esbp->esb_rid, RF_ACTIVE)) == NULL) {
588 device_printf(sc->dev, "Cannot allocate BAR region %d\n",
592 esbp->esb_tag = rman_get_bustag(esbp->esb_res);
593 esbp->esb_handle = rman_get_bushandle(esbp->esb_res);
595 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev));
601 sfxge_bar_fini(struct sfxge_softc *sc)
603 efsys_bar_t *esbp = &sc->bar;
605 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid,
607 SFXGE_BAR_LOCK_DESTROY(esbp);
611 sfxge_create(struct sfxge_softc *sc)
616 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))];
620 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev));
622 sc->max_rss_channels = 0;
623 snprintf(rss_param_name, sizeof(rss_param_name),
624 SFXGE_PARAM(%d.max_rss_channels),
625 (int)device_get_unit(dev));
626 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels);
628 sc->stats_node = SYSCTL_ADD_NODE(
629 device_get_sysctl_ctx(dev),
630 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
631 OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics");
632 if (sc->stats_node == NULL) {
637 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc);
639 (void) pci_enable_busmaster(dev);
641 /* Initialize DMA mappings. */
642 DBGPRINT(sc->dev, "dma_init...");
643 if ((error = sfxge_dma_init(sc)) != 0)
646 /* Map the device registers. */
647 DBGPRINT(sc->dev, "bar_init...");
648 if ((error = sfxge_bar_init(sc)) != 0)
651 error = efx_family(pci_get_vendor(dev), pci_get_device(dev),
653 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()"));
655 DBGPRINT(sc->dev, "nic_create...");
657 /* Create the common code nic object. */
658 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock,
659 device_get_nameunit(sc->dev), "nic");
660 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc,
661 &sc->bar, &sc->enp_lock, &enp)) != 0)
665 if (!ISP2(sfxge_rx_ring_entries) ||
666 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) ||
667 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) {
668 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
669 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries,
670 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS);
672 goto fail_rx_ring_entries;
674 sc->rxq_entries = sfxge_rx_ring_entries;
676 if (!ISP2(sfxge_tx_ring_entries) ||
677 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) ||
678 (sfxge_tx_ring_entries > EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)))) {
679 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
680 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries,
681 EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)));
683 goto fail_tx_ring_entries;
685 sc->txq_entries = sfxge_tx_ring_entries;
687 /* Initialize MCDI to talk to the microcontroller. */
688 DBGPRINT(sc->dev, "mcdi_init...");
689 if ((error = sfxge_mcdi_init(sc)) != 0)
692 /* Probe the NIC and build the configuration data area. */
693 DBGPRINT(sc->dev, "nic_probe...");
694 if ((error = efx_nic_probe(enp)) != 0)
697 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
698 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
699 OID_AUTO, "version", CTLFLAG_RD,
700 SFXGE_VERSION_STRING, 0,
703 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
704 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
705 OID_AUTO, "phy_type", CTLFLAG_RD,
706 NULL, efx_nic_cfg_get(enp)->enc_phy_type,
709 /* Initialize the NVRAM. */
710 DBGPRINT(sc->dev, "nvram_init...");
711 if ((error = efx_nvram_init(enp)) != 0)
714 /* Initialize the VPD. */
715 DBGPRINT(sc->dev, "vpd_init...");
716 if ((error = efx_vpd_init(enp)) != 0)
719 efx_mcdi_new_epoch(enp);
722 DBGPRINT(sc->dev, "nic_reset...");
723 if ((error = efx_nic_reset(enp)) != 0)
726 /* Initialize buffer table allocation. */
727 sc->buffer_table_next = 0;
730 * Guarantee minimum and estimate maximum number of event queues
731 * to take it into account when MSI-X interrupts are allocated.
732 * It initializes NIC and keeps it initialized on success.
734 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0)
737 /* Set up interrupts. */
738 DBGPRINT(sc->dev, "intr_init...");
739 if ((error = sfxge_intr_init(sc)) != 0)
742 /* Initialize event processing state. */
743 DBGPRINT(sc->dev, "ev_init...");
744 if ((error = sfxge_ev_init(sc)) != 0)
747 /* Initialize port state. */
748 DBGPRINT(sc->dev, "port_init...");
749 if ((error = sfxge_port_init(sc)) != 0)
752 /* Initialize receive state. */
753 DBGPRINT(sc->dev, "rx_init...");
754 if ((error = sfxge_rx_init(sc)) != 0)
757 /* Initialize transmit state. */
758 DBGPRINT(sc->dev, "tx_init...");
759 if ((error = sfxge_tx_init(sc)) != 0)
762 sc->init_state = SFXGE_INITIALIZED;
764 DBGPRINT(sc->dev, "success");
780 efx_nic_fini(sc->enp);
789 efx_nic_unprobe(enp);
795 fail_tx_ring_entries:
796 fail_rx_ring_entries:
798 efx_nic_destroy(enp);
799 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock);
803 (void) pci_disable_busmaster(sc->dev);
806 DBGPRINT(sc->dev, "failed %d", error);
808 SFXGE_ADAPTER_LOCK_DESTROY(sc);
813 sfxge_destroy(struct sfxge_softc *sc)
817 /* Clean up transmit state. */
820 /* Clean up receive state. */
823 /* Clean up port state. */
826 /* Clean up event processing state. */
829 /* Clean up interrupts. */
832 /* Tear down common code subsystems. */
833 efx_nic_reset(sc->enp);
834 efx_vpd_fini(sc->enp);
835 efx_nvram_fini(sc->enp);
836 efx_nic_unprobe(sc->enp);
838 /* Tear down MCDI. */
841 /* Destroy common code context. */
844 efx_nic_destroy(enp);
846 /* Free DMA memory. */
849 /* Free mapped BARs. */
852 (void) pci_disable_busmaster(sc->dev);
854 taskqueue_drain(taskqueue_thread, &sc->task_reset);
856 /* Destroy the softc lock. */
857 SFXGE_ADAPTER_LOCK_DESTROY(sc);
861 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS)
863 struct sfxge_softc *sc = arg1;
864 efx_vpd_value_t value;
867 value.evv_tag = arg2 >> 16;
868 value.evv_keyword = arg2 & 0xffff;
869 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value))
873 return (SYSCTL_OUT(req, value.evv_value, value.evv_length));
877 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list,
878 efx_vpd_tag_t tag, const char *keyword)
880 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
881 efx_vpd_value_t value;
883 /* Check whether VPD tag/keyword is present */
885 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]);
886 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0)
890 ctx, list, OID_AUTO, keyword, CTLTYPE_STRING|CTLFLAG_RD,
891 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]),
892 sfxge_vpd_handler, "A", "");
896 sfxge_vpd_init(struct sfxge_softc *sc)
898 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
899 struct sysctl_oid *vpd_node;
900 struct sysctl_oid_list *vpd_list;
902 efx_vpd_value_t value;
905 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) {
907 * Unpriviledged functions deny VPD access.
908 * Simply skip VPD in this case.
914 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK);
915 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0)
918 /* Copy ID (product name) into device description, and log it. */
919 value.evv_tag = EFX_VPD_ID;
920 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) {
921 value.evv_value[value.evv_length] = 0;
922 device_set_desc_copy(sc->dev, value.evv_value);
923 device_printf(sc->dev, "%s\n", value.evv_value);
926 vpd_node = SYSCTL_ADD_NODE(
927 ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
928 OID_AUTO, "vpd", CTLFLAG_RD, NULL, "Vital Product Data");
929 vpd_list = SYSCTL_CHILDREN(vpd_node);
931 /* Add sysctls for all expected and any vendor-defined keywords. */
932 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN");
933 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC");
934 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN");
937 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++)
938 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
939 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++)
940 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
946 free(sc->vpd_data, M_SFXGE);
952 sfxge_vpd_fini(struct sfxge_softc *sc)
954 free(sc->vpd_data, M_SFXGE);
958 sfxge_reset(void *arg, int npending)
960 struct sfxge_softc *sc;
966 sc = (struct sfxge_softc *)arg;
968 SFXGE_ADAPTER_LOCK(sc);
970 if (sc->init_state != SFXGE_STARTED)
974 efx_nic_reset(sc->enp);
975 for (attempt = 0; attempt < 3; ++attempt) {
976 if ((rc = sfxge_start(sc)) == 0)
979 device_printf(sc->dev, "start on reset failed (%d)\n", rc);
983 device_printf(sc->dev, "reset failed; interface is now stopped\n");
986 SFXGE_ADAPTER_UNLOCK(sc);
990 sfxge_schedule_reset(struct sfxge_softc *sc)
992 taskqueue_enqueue(taskqueue_thread, &sc->task_reset);
996 sfxge_attach(device_t dev)
998 struct sfxge_softc *sc;
1002 sc = device_get_softc(dev);
1005 /* Allocate ifnet. */
1006 ifp = if_alloc(IFT_ETHER);
1008 device_printf(dev, "Couldn't allocate ifnet\n");
1014 /* Initialize hardware. */
1015 DBGPRINT(sc->dev, "create nic");
1016 if ((error = sfxge_create(sc)) != 0)
1019 /* Create the ifnet for the port. */
1020 DBGPRINT(sc->dev, "init ifnet");
1021 if ((error = sfxge_ifnet_init(ifp, sc)) != 0)
1024 DBGPRINT(sc->dev, "init vpd");
1025 if ((error = sfxge_vpd_init(sc)) != 0)
1029 * NIC is initialized inside sfxge_create() and kept inialized
1030 * to be able to initialize port to discover media types in
1031 * sfxge_ifnet_init().
1033 efx_nic_fini(sc->enp);
1035 sc->init_state = SFXGE_REGISTERED;
1037 DBGPRINT(sc->dev, "success");
1041 sfxge_ifnet_fini(ifp);
1043 efx_nic_fini(sc->enp);
1050 DBGPRINT(sc->dev, "failed %d", error);
1055 sfxge_detach(device_t dev)
1057 struct sfxge_softc *sc;
1059 sc = device_get_softc(dev);
1063 /* Destroy the ifnet. */
1064 sfxge_ifnet_fini(sc->ifnet);
1066 /* Tear down hardware. */
1073 sfxge_probe(device_t dev)
1075 uint16_t pci_vendor_id;
1076 uint16_t pci_device_id;
1077 efx_family_t family;
1080 pci_vendor_id = pci_get_vendor(dev);
1081 pci_device_id = pci_get_device(dev);
1083 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id);
1084 rc = efx_family(pci_vendor_id, pci_device_id, &family);
1086 DBGPRINT(dev, "efx_family fail %d", rc);
1090 if (family == EFX_FAMILY_SIENA) {
1091 device_set_desc(dev, "Solarflare SFC9000 family");
1095 if (family == EFX_FAMILY_HUNTINGTON) {
1096 device_set_desc(dev, "Solarflare SFC9100 family");
1100 DBGPRINT(dev, "impossible controller family %d", family);
1104 static device_method_t sfxge_methods[] = {
1105 DEVMETHOD(device_probe, sfxge_probe),
1106 DEVMETHOD(device_attach, sfxge_attach),
1107 DEVMETHOD(device_detach, sfxge_detach),
1112 static devclass_t sfxge_devclass;
1114 static driver_t sfxge_driver = {
1117 sizeof(struct sfxge_softc)
1120 DRIVER_MODULE(sfxge, pci, sfxge_driver, sfxge_devclass, 0, 0);