2 * Copyright (c) 2010-2011 Solarflare Communications, Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
34 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/socket.h>
42 #include <sys/taskqueue.h>
43 #include <sys/sockio.h>
44 #include <sys/sysctl.h>
45 #include <sys/syslog.h>
47 #include <dev/pci/pcireg.h>
48 #include <dev/pci/pcivar.h>
50 #include <net/ethernet.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
55 #include "common/efx.h"
59 #include "sfxge_version.h"
61 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \
62 IFCAP_RXCSUM | IFCAP_TXCSUM | IFCAP_TSO | \
63 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \
64 IFCAP_JUMBO_MTU | IFCAP_LRO | \
65 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE)
66 #define SFXGE_CAP_ENABLE SFXGE_CAP
67 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \
68 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE)
70 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver");
73 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD, 0,
74 "SFXGE driver parameters");
76 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring)
77 static int sfxge_rx_ring_entries = SFXGE_NDESCS;
78 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries);
79 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN,
80 &sfxge_rx_ring_entries, 0,
81 "Maximum number of descriptors in a receive ring");
83 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring)
84 static int sfxge_tx_ring_entries = SFXGE_NDESCS;
85 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries);
86 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN,
87 &sfxge_tx_ring_entries, 0,
88 "Maximum number of descriptors in a transmit ring");
92 sfxge_reset(void *arg, int npending);
95 sfxge_start(struct sfxge_softc *sc)
99 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
101 if (sc->init_state == SFXGE_STARTED)
104 if (sc->init_state != SFXGE_REGISTERED) {
109 if ((rc = efx_nic_init(sc->enp)) != 0)
112 /* Start processing interrupts. */
113 if ((rc = sfxge_intr_start(sc)) != 0)
116 /* Start processing events. */
117 if ((rc = sfxge_ev_start(sc)) != 0)
120 /* Start the receiver side. */
121 if ((rc = sfxge_rx_start(sc)) != 0)
124 /* Start the transmitter side. */
125 if ((rc = sfxge_tx_start(sc)) != 0)
128 /* Fire up the port. */
129 if ((rc = sfxge_port_start(sc)) != 0)
132 sc->init_state = SFXGE_STARTED;
134 /* Tell the stack we're running. */
135 sc->ifnet->if_drv_flags |= IFF_DRV_RUNNING;
136 sc->ifnet->if_drv_flags &= ~IFF_DRV_OACTIVE;
153 efx_nic_fini(sc->enp);
156 device_printf(sc->dev, "sfxge_start: %d\n", rc);
162 sfxge_if_init(void *arg)
164 struct sfxge_softc *sc;
166 sc = (struct sfxge_softc *)arg;
168 SFXGE_ADAPTER_LOCK(sc);
169 (void)sfxge_start(sc);
170 SFXGE_ADAPTER_UNLOCK(sc);
174 sfxge_stop(struct sfxge_softc *sc)
176 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
178 if (sc->init_state != SFXGE_STARTED)
181 sc->init_state = SFXGE_REGISTERED;
186 /* Stop the transmitter. */
189 /* Stop the receiver. */
192 /* Stop processing events. */
195 /* Stop processing interrupts. */
198 efx_nic_fini(sc->enp);
200 sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING;
204 sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
206 struct sfxge_softc *sc;
210 ifr = (struct ifreq *)data;
216 SFXGE_ADAPTER_LOCK(sc);
217 if (ifp->if_flags & IFF_UP) {
218 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
219 if ((ifp->if_flags ^ sc->if_flags) &
220 (IFF_PROMISC | IFF_ALLMULTI)) {
221 sfxge_mac_filter_set(sc);
226 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
228 sc->if_flags = ifp->if_flags;
229 SFXGE_ADAPTER_UNLOCK(sc);
232 if (ifr->ifr_mtu == ifp->if_mtu) {
235 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) {
237 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
238 ifp->if_mtu = ifr->ifr_mtu;
241 /* Restart required */
242 SFXGE_ADAPTER_LOCK(sc);
244 ifp->if_mtu = ifr->ifr_mtu;
245 error = sfxge_start(sc);
246 SFXGE_ADAPTER_UNLOCK(sc);
248 ifp->if_flags &= ~IFF_UP;
249 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
256 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
257 sfxge_mac_filter_set(sc);
260 SFXGE_ADAPTER_LOCK(sc);
263 * The networking core already rejects attempts to
264 * enable capabilities we don't have. We still have
265 * to reject attempts to disable capabilities that we
266 * can't (yet) disable.
268 if (~ifr->ifr_reqcap & SFXGE_CAP_FIXED) {
270 SFXGE_ADAPTER_UNLOCK(sc);
274 ifp->if_capenable = ifr->ifr_reqcap;
275 if (ifp->if_capenable & IFCAP_TXCSUM)
276 ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP);
278 ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP);
279 if (ifp->if_capenable & IFCAP_TXCSUM_IPV6)
280 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
282 ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
285 * The kernel takes both IFCAP_TSOx and CSUM_TSO into
286 * account before using TSO. So, we do not touch
287 * checksum flags when IFCAP_TSOx is modified.
288 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO),
289 * but both bits are set in IPv4 and IPv6 mbufs.
292 SFXGE_ADAPTER_UNLOCK(sc);
296 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
299 error = ether_ioctl(ifp, command, data);
306 sfxge_ifnet_fini(struct ifnet *ifp)
308 struct sfxge_softc *sc = ifp->if_softc;
310 SFXGE_ADAPTER_LOCK(sc);
312 SFXGE_ADAPTER_UNLOCK(sc);
314 ifmedia_removeall(&sc->media);
320 sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc)
322 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);
329 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
330 ifp->if_init = sfxge_if_init;
332 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
333 ifp->if_ioctl = sfxge_if_ioctl;
335 ifp->if_capabilities = SFXGE_CAP;
336 ifp->if_capenable = SFXGE_CAP_ENABLE;
337 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO |
338 CSUM_TCP_IPV6 | CSUM_UDP_IPV6;
340 ether_ifattach(ifp, encp->enc_mac_addr);
342 ifp->if_transmit = sfxge_if_transmit;
343 ifp->if_qflush = sfxge_if_qflush;
345 if ((rc = sfxge_port_ifmedia_init(sc)) != 0)
351 ether_ifdetach(sc->ifnet);
356 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp)
358 KASSERT(sc->buffer_table_next + n <=
359 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit,
360 ("buffer table full"));
362 *idp = sc->buffer_table_next;
363 sc->buffer_table_next += n;
367 sfxge_bar_init(struct sfxge_softc *sc)
369 efsys_bar_t *esbp = &sc->bar;
371 esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR);
372 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
373 &esbp->esb_rid, RF_ACTIVE)) == NULL) {
374 device_printf(sc->dev, "Cannot allocate BAR region %d\n",
378 esbp->esb_tag = rman_get_bustag(esbp->esb_res);
379 esbp->esb_handle = rman_get_bushandle(esbp->esb_res);
381 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev));
387 sfxge_bar_fini(struct sfxge_softc *sc)
389 efsys_bar_t *esbp = &sc->bar;
391 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid,
393 SFXGE_BAR_LOCK_DESTROY(esbp);
397 sfxge_create(struct sfxge_softc *sc)
402 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))];
406 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev));
408 sc->max_rss_channels = 0;
409 snprintf(rss_param_name, sizeof(rss_param_name),
410 SFXGE_PARAM(%d.max_rss_channels),
411 (int)device_get_unit(dev));
412 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels);
414 sc->stats_node = SYSCTL_ADD_NODE(
415 device_get_sysctl_ctx(dev),
416 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
417 OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics");
418 if (sc->stats_node == NULL) {
423 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc);
425 (void) pci_enable_busmaster(dev);
427 /* Initialize DMA mappings. */
428 if ((error = sfxge_dma_init(sc)) != 0)
431 /* Map the device registers. */
432 if ((error = sfxge_bar_init(sc)) != 0)
435 error = efx_family(pci_get_vendor(dev), pci_get_device(dev),
437 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()"));
439 /* Create the common code nic object. */
440 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock,
441 device_get_nameunit(sc->dev), "nic");
442 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc,
443 &sc->bar, &sc->enp_lock, &enp)) != 0)
447 if (!ISP2(sfxge_rx_ring_entries) ||
448 !(sfxge_rx_ring_entries & EFX_RXQ_NDESCS_MASK)) {
449 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
450 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries,
451 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS);
453 goto fail_rx_ring_entries;
455 sc->rxq_entries = sfxge_rx_ring_entries;
457 if (!ISP2(sfxge_tx_ring_entries) ||
458 !(sfxge_tx_ring_entries & EFX_TXQ_NDESCS_MASK)) {
459 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
460 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries,
461 EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS);
463 goto fail_tx_ring_entries;
465 sc->txq_entries = sfxge_tx_ring_entries;
467 /* Initialize MCDI to talk to the microcontroller. */
468 if ((error = sfxge_mcdi_init(sc)) != 0)
471 /* Probe the NIC and build the configuration data area. */
472 if ((error = efx_nic_probe(enp)) != 0)
475 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
476 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
477 OID_AUTO, "version", CTLFLAG_RD,
478 SFXGE_VERSION_STRING, 0,
481 /* Initialize the NVRAM. */
482 if ((error = efx_nvram_init(enp)) != 0)
485 /* Initialize the VPD. */
486 if ((error = efx_vpd_init(enp)) != 0)
490 if ((error = efx_nic_reset(enp)) != 0)
493 /* Initialize buffer table allocation. */
494 sc->buffer_table_next = 0;
496 /* Set up interrupts. */
497 if ((error = sfxge_intr_init(sc)) != 0)
500 /* Initialize event processing state. */
501 if ((error = sfxge_ev_init(sc)) != 0)
504 /* Initialize receive state. */
505 if ((error = sfxge_rx_init(sc)) != 0)
508 /* Initialize transmit state. */
509 if ((error = sfxge_tx_init(sc)) != 0)
512 /* Initialize port state. */
513 if ((error = sfxge_port_init(sc)) != 0)
516 sc->init_state = SFXGE_INITIALIZED;
539 efx_nic_unprobe(enp);
545 fail_tx_ring_entries:
546 fail_rx_ring_entries:
548 efx_nic_destroy(enp);
549 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock);
553 (void) pci_disable_busmaster(sc->dev);
557 SFXGE_ADAPTER_LOCK_DESTROY(sc);
562 sfxge_destroy(struct sfxge_softc *sc)
566 /* Clean up port state. */
569 /* Clean up transmit state. */
572 /* Clean up receive state. */
575 /* Clean up event processing state. */
578 /* Clean up interrupts. */
581 /* Tear down common code subsystems. */
582 efx_nic_reset(sc->enp);
583 efx_vpd_fini(sc->enp);
584 efx_nvram_fini(sc->enp);
585 efx_nic_unprobe(sc->enp);
587 /* Tear down MCDI. */
590 /* Destroy common code context. */
593 efx_nic_destroy(enp);
595 /* Free DMA memory. */
598 /* Free mapped BARs. */
601 (void) pci_disable_busmaster(sc->dev);
603 taskqueue_drain(taskqueue_thread, &sc->task_reset);
605 /* Destroy the softc lock. */
606 SFXGE_ADAPTER_LOCK_DESTROY(sc);
610 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS)
612 struct sfxge_softc *sc = arg1;
613 efx_vpd_value_t value;
616 value.evv_tag = arg2 >> 16;
617 value.evv_keyword = arg2 & 0xffff;
618 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value))
622 return (SYSCTL_OUT(req, value.evv_value, value.evv_length));
626 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list,
627 efx_vpd_tag_t tag, const char *keyword)
629 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
630 efx_vpd_value_t value;
632 /* Check whether VPD tag/keyword is present */
634 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]);
635 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0)
639 ctx, list, OID_AUTO, keyword, CTLTYPE_STRING|CTLFLAG_RD,
640 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]),
641 sfxge_vpd_handler, "A", "");
645 sfxge_vpd_init(struct sfxge_softc *sc)
647 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
648 struct sysctl_oid *vpd_node;
649 struct sysctl_oid_list *vpd_list;
651 efx_vpd_value_t value;
654 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0)
656 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK);
657 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0)
660 /* Copy ID (product name) into device description, and log it. */
661 value.evv_tag = EFX_VPD_ID;
662 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) {
663 value.evv_value[value.evv_length] = 0;
664 device_set_desc_copy(sc->dev, value.evv_value);
665 device_printf(sc->dev, "%s\n", value.evv_value);
668 vpd_node = SYSCTL_ADD_NODE(
669 ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
670 OID_AUTO, "vpd", CTLFLAG_RD, NULL, "Vital Product Data");
671 vpd_list = SYSCTL_CHILDREN(vpd_node);
673 /* Add sysctls for all expected and any vendor-defined keywords. */
674 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN");
675 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC");
676 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN");
679 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++)
680 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
681 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++)
682 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
687 free(sc->vpd_data, M_SFXGE);
693 sfxge_vpd_fini(struct sfxge_softc *sc)
695 free(sc->vpd_data, M_SFXGE);
699 sfxge_reset(void *arg, int npending)
701 struct sfxge_softc *sc;
706 sc = (struct sfxge_softc *)arg;
708 SFXGE_ADAPTER_LOCK(sc);
710 if (sc->init_state != SFXGE_STARTED)
714 efx_nic_reset(sc->enp);
715 if ((rc = sfxge_start(sc)) != 0)
716 device_printf(sc->dev,
717 "reset failed (%d); interface is now stopped\n",
721 SFXGE_ADAPTER_UNLOCK(sc);
725 sfxge_schedule_reset(struct sfxge_softc *sc)
727 taskqueue_enqueue(taskqueue_thread, &sc->task_reset);
731 sfxge_attach(device_t dev)
733 struct sfxge_softc *sc;
737 sc = device_get_softc(dev);
740 /* Allocate ifnet. */
741 ifp = if_alloc(IFT_ETHER);
743 device_printf(dev, "Couldn't allocate ifnet\n");
749 /* Initialize hardware. */
750 if ((error = sfxge_create(sc)) != 0)
753 /* Create the ifnet for the port. */
754 if ((error = sfxge_ifnet_init(ifp, sc)) != 0)
757 if ((error = sfxge_vpd_init(sc)) != 0)
760 sc->init_state = SFXGE_REGISTERED;
765 sfxge_ifnet_fini(ifp);
777 sfxge_detach(device_t dev)
779 struct sfxge_softc *sc;
781 sc = device_get_softc(dev);
785 /* Destroy the ifnet. */
786 sfxge_ifnet_fini(sc->ifnet);
788 /* Tear down hardware. */
795 sfxge_probe(device_t dev)
797 uint16_t pci_vendor_id;
798 uint16_t pci_device_id;
802 pci_vendor_id = pci_get_vendor(dev);
803 pci_device_id = pci_get_device(dev);
805 rc = efx_family(pci_vendor_id, pci_device_id, &family);
809 KASSERT(family == EFX_FAMILY_SIENA, ("impossible controller family"));
810 device_set_desc(dev, "Solarflare SFC9000 family");
814 static device_method_t sfxge_methods[] = {
815 DEVMETHOD(device_probe, sfxge_probe),
816 DEVMETHOD(device_attach, sfxge_attach),
817 DEVMETHOD(device_detach, sfxge_detach),
822 static devclass_t sfxge_devclass;
824 static driver_t sfxge_driver = {
827 sizeof(struct sfxge_softc)
830 DRIVER_MODULE(sfxge, pci, sfxge_driver, sfxge_devclass, 0, 0);