2 * Copyright (c) 2010-2016 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
34 /* Theory of operation:
36 * Tx queues allocation and mapping on Siena
38 * One Tx queue with enabled checksum offload is allocated per Rx channel
39 * (event queue). Also 2 Tx queues (one without checksum offload and one
40 * with IP checksum offload only) are allocated and bound to event queue 0.
41 * sfxge_txq_type is used as Tx queue label.
43 * So, event queue plus label mapping to Tx queue index is:
44 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES)
45 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1
46 * See sfxge_get_txq_by_label() sfxge_ev.c
48 * Tx queue allocation and mapping on EF10
50 * One Tx queue with enabled checksum offload is allocated per Rx
51 * channel (event queue). Checksum offload on all Tx queues is enabled or
52 * disabled dynamically by inserting option descriptors, so the additional
53 * queues used on Siena are not required.
55 * TxQ label is always set to zero on EF10 hardware.
56 * So, event queue to Tx queue mapping is simple:
57 * TxQ-index = EvQ-index
60 #include <sys/cdefs.h>
61 __FBSDID("$FreeBSD$");
63 #include <sys/types.h>
66 #include <sys/socket.h>
67 #include <sys/sysctl.h>
68 #include <sys/syslog.h>
69 #include <sys/limits.h>
72 #include <net/ethernet.h>
74 #include <net/if_vlan_var.h>
76 #include <netinet/in.h>
77 #include <netinet/ip.h>
78 #include <netinet/ip6.h>
79 #include <netinet/tcp.h>
81 #include "common/efx.h"
87 #define SFXGE_PARAM_TX_DPL_GET_MAX SFXGE_PARAM(tx_dpl_get_max)
88 static int sfxge_tx_dpl_get_max = SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT;
89 TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_MAX, &sfxge_tx_dpl_get_max);
90 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_max, CTLFLAG_RDTUN,
91 &sfxge_tx_dpl_get_max, 0,
92 "Maximum number of any packets in deferred packet get-list");
94 #define SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX \
95 SFXGE_PARAM(tx_dpl_get_non_tcp_max)
96 static int sfxge_tx_dpl_get_non_tcp_max =
97 SFXGE_TX_DPL_GET_NON_TCP_PKT_LIMIT_DEFAULT;
98 TUNABLE_INT(SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX, &sfxge_tx_dpl_get_non_tcp_max);
99 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_get_non_tcp_max, CTLFLAG_RDTUN,
100 &sfxge_tx_dpl_get_non_tcp_max, 0,
101 "Maximum number of non-TCP packets in deferred packet get-list");
103 #define SFXGE_PARAM_TX_DPL_PUT_MAX SFXGE_PARAM(tx_dpl_put_max)
104 static int sfxge_tx_dpl_put_max = SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT;
105 TUNABLE_INT(SFXGE_PARAM_TX_DPL_PUT_MAX, &sfxge_tx_dpl_put_max);
106 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_dpl_put_max, CTLFLAG_RDTUN,
107 &sfxge_tx_dpl_put_max, 0,
108 "Maximum number of any packets in deferred packet put-list");
110 #define SFXGE_PARAM_TSO_FW_ASSISTED SFXGE_PARAM(tso_fw_assisted)
111 static int sfxge_tso_fw_assisted = (SFXGE_FATSOV1 | SFXGE_FATSOV2);
112 TUNABLE_INT(SFXGE_PARAM_TSO_FW_ASSISTED, &sfxge_tso_fw_assisted);
113 SYSCTL_INT(_hw_sfxge, OID_AUTO, tso_fw_assisted, CTLFLAG_RDTUN,
114 &sfxge_tso_fw_assisted, 0,
115 "Bitmask of FW-assisted TSO allowed to use if supported by NIC firmware");
118 static const struct {
121 } sfxge_tx_stats[] = {
122 #define SFXGE_TX_STAT(name, member) \
123 { #name, offsetof(struct sfxge_txq, member) }
124 SFXGE_TX_STAT(tso_bursts, tso_bursts),
125 SFXGE_TX_STAT(tso_packets, tso_packets),
126 SFXGE_TX_STAT(tso_long_headers, tso_long_headers),
127 SFXGE_TX_STAT(tso_pdrop_too_many, tso_pdrop_too_many),
128 SFXGE_TX_STAT(tso_pdrop_no_rsrc, tso_pdrop_no_rsrc),
129 SFXGE_TX_STAT(tx_collapses, collapses),
130 SFXGE_TX_STAT(tx_drops, drops),
131 SFXGE_TX_STAT(tx_get_overflow, get_overflow),
132 SFXGE_TX_STAT(tx_get_non_tcp_overflow, get_non_tcp_overflow),
133 SFXGE_TX_STAT(tx_put_overflow, put_overflow),
134 SFXGE_TX_STAT(tx_netdown_drops, netdown_drops),
138 /* Forward declarations. */
139 static void sfxge_tx_qdpl_service(struct sfxge_txq *txq);
140 static void sfxge_tx_qlist_post(struct sfxge_txq *txq);
141 static void sfxge_tx_qunblock(struct sfxge_txq *txq);
142 static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
143 const bus_dma_segment_t *dma_seg, int n_dma_seg,
147 sfxge_next_stmp(struct sfxge_txq *txq, struct sfxge_tx_mapping **pstmp)
149 KASSERT((*pstmp)->flags == 0, ("stmp flags are not 0"));
150 if (__predict_false(*pstmp ==
151 &txq->stmp[txq->ptr_mask]))
152 *pstmp = &txq->stmp[0];
158 sfxge_tx_maybe_toggle_cksum_offload(struct sfxge_txq *txq, struct mbuf *mbuf,
159 struct sfxge_tx_mapping **pstmp)
161 uint16_t new_hw_cksum_flags;
164 if (mbuf->m_pkthdr.csum_flags &
165 (CSUM_DELAY_DATA | CSUM_DELAY_DATA_IPV6 | CSUM_TSO)) {
167 * We always set EFX_TXQ_CKSUM_IPV4 here because this
168 * configuration is the most useful, and this won't
169 * cause any trouble in case of IPv6 traffic anyway.
171 new_hw_cksum_flags = EFX_TXQ_CKSUM_IPV4 | EFX_TXQ_CKSUM_TCPUDP;
172 } else if (mbuf->m_pkthdr.csum_flags & CSUM_DELAY_IP) {
173 new_hw_cksum_flags = EFX_TXQ_CKSUM_IPV4;
175 new_hw_cksum_flags = 0;
178 if (new_hw_cksum_flags == txq->hw_cksum_flags)
181 desc = &txq->pend_desc[txq->n_pend_desc];
182 efx_tx_qdesc_checksum_create(txq->common, new_hw_cksum_flags, desc);
183 txq->hw_cksum_flags = new_hw_cksum_flags;
186 sfxge_next_stmp(txq, pstmp);
192 sfxge_tx_maybe_insert_tag(struct sfxge_txq *txq, struct mbuf *mbuf,
193 struct sfxge_tx_mapping **pstmp)
195 uint16_t this_tag = ((mbuf->m_flags & M_VLANTAG) ?
196 mbuf->m_pkthdr.ether_vtag :
200 if (this_tag == txq->hw_vlan_tci)
203 desc = &txq->pend_desc[txq->n_pend_desc];
204 efx_tx_qdesc_vlantci_create(txq->common, bswap16(this_tag), desc);
205 txq->hw_vlan_tci = this_tag;
208 sfxge_next_stmp(txq, pstmp);
214 sfxge_tx_qcomplete(struct sfxge_txq *txq, struct sfxge_evq *evq)
216 unsigned int completed;
218 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq);
220 completed = txq->completed;
221 while (completed != txq->pending) {
222 struct sfxge_tx_mapping *stmp;
225 id = completed++ & txq->ptr_mask;
227 stmp = &txq->stmp[id];
228 if (stmp->flags & TX_BUF_UNMAP) {
229 bus_dmamap_unload(txq->packet_dma_tag, stmp->map);
230 if (stmp->flags & TX_BUF_MBUF) {
231 struct mbuf *m = stmp->u.mbuf;
236 free(stmp->u.heap_buf, M_SFXGE);
241 txq->completed = completed;
243 /* Check whether we need to unblock the queue. */
248 level = txq->added - txq->completed;
249 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries))
250 sfxge_tx_qunblock(txq);
255 sfxge_is_mbuf_non_tcp(struct mbuf *mbuf)
257 /* Absense of TCP checksum flags does not mean that it is non-TCP
258 * but it should be true if user wants to achieve high throughput.
260 return (!(mbuf->m_pkthdr.csum_flags & (CSUM_IP_TCP | CSUM_IP6_TCP)));
264 * Reorder the put list and append it to the get list.
267 sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq)
269 struct sfxge_tx_dpl *stdp;
270 struct mbuf *mbuf, *get_next, **get_tailp;
271 volatile uintptr_t *putp;
274 unsigned int non_tcp_count;
276 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
280 /* Acquire the put list. */
281 putp = &stdp->std_put;
282 put = atomic_readandclear_ptr(putp);
288 /* Reverse the put list. */
289 get_tailp = &mbuf->m_nextpkt;
295 struct mbuf *put_next;
297 non_tcp_count += sfxge_is_mbuf_non_tcp(mbuf);
298 put_next = mbuf->m_nextpkt;
299 mbuf->m_nextpkt = get_next;
304 } while (mbuf != NULL);
306 if (count > stdp->std_put_hiwat)
307 stdp->std_put_hiwat = count;
309 /* Append the reversed put list to the get list. */
310 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL"));
311 *stdp->std_getp = get_next;
312 stdp->std_getp = get_tailp;
313 stdp->std_get_count += count;
314 stdp->std_get_non_tcp_count += non_tcp_count;
318 sfxge_tx_qreap(struct sfxge_txq *txq)
320 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
322 txq->reaped = txq->completed;
326 sfxge_tx_qlist_post(struct sfxge_txq *txq)
328 unsigned int old_added;
329 unsigned int block_level;
333 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
335 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0"));
336 KASSERT(txq->n_pend_desc <= txq->max_pkt_desc,
337 ("txq->n_pend_desc too large"));
338 KASSERT(!txq->blocked, ("txq->blocked"));
340 old_added = txq->added;
342 /* Post the fragment list. */
343 rc = efx_tx_qdesc_post(txq->common, txq->pend_desc, txq->n_pend_desc,
344 txq->reaped, &txq->added);
345 KASSERT(rc == 0, ("efx_tx_qdesc_post() failed"));
347 /* If efx_tx_qdesc_post() had to refragment, our information about
348 * buffers to free may be associated with the wrong
351 KASSERT(txq->added - old_added == txq->n_pend_desc,
352 ("efx_tx_qdesc_post() refragmented descriptors"));
354 level = txq->added - txq->reaped;
355 KASSERT(level <= txq->entries, ("overfilled TX queue"));
357 /* Clear the fragment list. */
358 txq->n_pend_desc = 0;
361 * Set the block level to ensure there is space to generate a
362 * large number of descriptors for TSO.
364 block_level = EFX_TXQ_LIMIT(txq->entries) - txq->max_pkt_desc;
366 /* Have we reached the block level? */
367 if (level < block_level)
370 /* Reap, and check again */
372 level = txq->added - txq->reaped;
373 if (level < block_level)
379 * Avoid a race with completion interrupt handling that could leave
384 level = txq->added - txq->reaped;
385 if (level < block_level) {
391 static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf)
393 bus_dmamap_t *used_map;
395 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG];
397 struct sfxge_tx_mapping *stmp;
403 uint16_t hw_cksum_flags_prev;
404 uint16_t hw_vlan_tci_prev;
407 KASSERT(!txq->blocked, ("txq->blocked"));
409 #if SFXGE_TX_PARSE_EARLY
411 * If software TSO is used, we still need to copy packet header,
412 * even if we have already parsed it early before enqueue.
414 if ((mbuf->m_pkthdr.csum_flags & CSUM_TSO) &&
415 (txq->tso_fw_assisted == 0))
416 prefetch_read_many(mbuf->m_data);
419 * Prefetch packet header since we need to parse it and extract
420 * IP ID, TCP sequence number and flags.
422 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO)
423 prefetch_read_many(mbuf->m_data);
426 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED)) {
431 /* Load the packet for DMA. */
432 id = txq->added & txq->ptr_mask;
433 stmp = &txq->stmp[id];
434 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map,
435 mbuf, dma_seg, &n_dma_seg, 0);
438 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT,
439 SFXGE_TX_MAPPING_MAX_SEG);
440 if (new_mbuf == NULL)
444 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag,
446 dma_seg, &n_dma_seg, 0);
451 /* Make the packet visible to the hardware. */
452 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE);
454 used_map = &stmp->map;
456 hw_cksum_flags_prev = txq->hw_cksum_flags;
457 hw_vlan_tci_prev = txq->hw_vlan_tci;
460 * The order of option descriptors, which are used to leverage VLAN tag
461 * and checksum offloads, might be important. Changing checksum offload
462 * between VLAN option and packet descriptors probably does not work.
464 n_extra_descs = sfxge_tx_maybe_toggle_cksum_offload(txq, mbuf, &stmp);
465 n_extra_descs += sfxge_tx_maybe_insert_tag(txq, mbuf, &stmp);
467 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) {
468 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg,
472 stmp = &txq->stmp[(rc - 1) & txq->ptr_mask];
474 /* Add the mapping to the fragment list, and set flags
480 desc = &txq->pend_desc[i + n_extra_descs];
481 eop = (i == n_dma_seg - 1);
482 efx_tx_qdesc_dma_create(txq->common,
490 sfxge_next_stmp(txq, &stmp);
492 txq->n_pend_desc = n_dma_seg + n_extra_descs;
496 * If the mapping required more than one descriptor
497 * then we need to associate the DMA map with the last
498 * descriptor, not the first.
500 if (used_map != &stmp->map) {
502 stmp->map = *used_map;
507 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF;
509 /* Post the fragment list. */
510 sfxge_tx_qlist_post(txq);
515 txq->hw_vlan_tci = hw_vlan_tci_prev;
516 txq->hw_cksum_flags = hw_cksum_flags_prev;
517 bus_dmamap_unload(txq->packet_dma_tag, *used_map);
519 /* Drop the packet on the floor. */
527 * Drain the deferred packet list into the transmit queue.
530 sfxge_tx_qdpl_drain(struct sfxge_txq *txq)
532 struct sfxge_softc *sc;
533 struct sfxge_tx_dpl *stdp;
534 struct mbuf *mbuf, *next;
536 unsigned int non_tcp_count;
540 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
546 if (__predict_true(txq->init_state == SFXGE_TXQ_STARTED)) {
547 prefetch_read_many(sc->enp);
548 prefetch_read_many(txq->common);
551 mbuf = stdp->std_get;
552 count = stdp->std_get_count;
553 non_tcp_count = stdp->std_get_non_tcp_count;
555 if (count > stdp->std_get_hiwat)
556 stdp->std_get_hiwat = count;
559 KASSERT(mbuf != NULL, ("mbuf == NULL"));
561 next = mbuf->m_nextpkt;
562 mbuf->m_nextpkt = NULL;
564 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */
567 prefetch_read_many(next);
569 rc = sfxge_tx_queue_mbuf(txq, mbuf);
571 non_tcp_count -= sfxge_is_mbuf_non_tcp(mbuf);
579 /* Push the fragments to the hardware in batches. */
580 if (txq->added - pushed >= SFXGE_TX_BATCH) {
581 efx_tx_qpush(txq->common, txq->added, pushed);
587 KASSERT(mbuf == NULL, ("mbuf != NULL"));
588 KASSERT(non_tcp_count == 0,
589 ("inconsistent TCP/non-TCP detection"));
590 stdp->std_get = NULL;
591 stdp->std_get_count = 0;
592 stdp->std_get_non_tcp_count = 0;
593 stdp->std_getp = &stdp->std_get;
595 stdp->std_get = mbuf;
596 stdp->std_get_count = count;
597 stdp->std_get_non_tcp_count = non_tcp_count;
600 if (txq->added != pushed)
601 efx_tx_qpush(txq->common, txq->added, pushed);
603 KASSERT(txq->blocked || stdp->std_get_count == 0,
604 ("queue unblocked but count is non-zero"));
607 #define SFXGE_TX_QDPL_PENDING(_txq) ((_txq)->dpl.std_put != 0)
610 * Service the deferred packet list.
612 * NOTE: drops the txq mutex!
615 sfxge_tx_qdpl_service(struct sfxge_txq *txq)
617 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
620 if (SFXGE_TX_QDPL_PENDING(txq))
621 sfxge_tx_qdpl_swizzle(txq);
624 sfxge_tx_qdpl_drain(txq);
626 SFXGE_TXQ_UNLOCK(txq);
627 } while (SFXGE_TX_QDPL_PENDING(txq) &&
628 SFXGE_TXQ_TRYLOCK(txq));
632 * Put a packet on the deferred packet get-list.
635 sfxge_tx_qdpl_put_locked(struct sfxge_txq *txq, struct mbuf *mbuf)
637 struct sfxge_tx_dpl *stdp;
641 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL"));
643 SFXGE_TXQ_LOCK_ASSERT_OWNED(txq);
645 if (stdp->std_get_count >= stdp->std_get_max) {
649 if (sfxge_is_mbuf_non_tcp(mbuf)) {
650 if (stdp->std_get_non_tcp_count >=
651 stdp->std_get_non_tcp_max) {
652 txq->get_non_tcp_overflow++;
655 stdp->std_get_non_tcp_count++;
658 *(stdp->std_getp) = mbuf;
659 stdp->std_getp = &mbuf->m_nextpkt;
660 stdp->std_get_count++;
666 * Put a packet on the deferred packet put-list.
668 * We overload the csum_data field in the mbuf to keep track of this length
669 * because there is no cheap alternative to avoid races.
672 sfxge_tx_qdpl_put_unlocked(struct sfxge_txq *txq, struct mbuf *mbuf)
674 struct sfxge_tx_dpl *stdp;
675 volatile uintptr_t *putp;
678 unsigned int put_count;
680 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL"));
682 SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(txq);
685 putp = &stdp->std_put;
686 new = (uintptr_t)mbuf;
691 struct mbuf *mp = (struct mbuf *)old;
692 put_count = mp->m_pkthdr.csum_data;
695 if (put_count >= stdp->std_put_max) {
696 atomic_add_long(&txq->put_overflow, 1);
699 mbuf->m_pkthdr.csum_data = put_count + 1;
700 mbuf->m_nextpkt = (void *)old;
701 } while (atomic_cmpset_ptr(putp, old, new) == 0);
707 * Called from if_transmit - will try to grab the txq lock and enqueue to the
708 * put list if it succeeds, otherwise try to push onto the defer list if space.
711 sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m)
715 if (!SFXGE_LINK_UP(txq->sc)) {
716 atomic_add_long(&txq->netdown_drops, 1);
721 * Try to grab the txq lock. If we are able to get the lock,
722 * the packet will be appended to the "get list" of the deferred
723 * packet list. Otherwise, it will be pushed on the "put list".
725 if (SFXGE_TXQ_TRYLOCK(txq)) {
726 /* First swizzle put-list to get-list to keep order */
727 sfxge_tx_qdpl_swizzle(txq);
729 rc = sfxge_tx_qdpl_put_locked(txq, m);
731 /* Try to service the list. */
732 sfxge_tx_qdpl_service(txq);
733 /* Lock has been dropped. */
735 rc = sfxge_tx_qdpl_put_unlocked(txq, m);
738 * Try to grab the lock again.
740 * If we are able to get the lock, we need to process
741 * the deferred packet list. If we are not able to get
742 * the lock, another thread is processing the list.
744 if ((rc == 0) && SFXGE_TXQ_TRYLOCK(txq)) {
745 sfxge_tx_qdpl_service(txq);
746 /* Lock has been dropped. */
750 SFXGE_TXQ_LOCK_ASSERT_NOTOWNED(txq);
756 sfxge_tx_qdpl_flush(struct sfxge_txq *txq)
758 struct sfxge_tx_dpl *stdp = &txq->dpl;
759 struct mbuf *mbuf, *next;
763 sfxge_tx_qdpl_swizzle(txq);
764 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) {
765 next = mbuf->m_nextpkt;
768 stdp->std_get = NULL;
769 stdp->std_get_count = 0;
770 stdp->std_get_non_tcp_count = 0;
771 stdp->std_getp = &stdp->std_get;
773 SFXGE_TXQ_UNLOCK(txq);
777 sfxge_if_qflush(struct ifnet *ifp)
779 struct sfxge_softc *sc;
784 for (i = 0; i < sc->txq_count; i++)
785 sfxge_tx_qdpl_flush(sc->txq[i]);
788 #if SFXGE_TX_PARSE_EARLY
790 /* There is little space for user data in mbuf pkthdr, so we
791 * use l*hlen fields which are not used by the driver otherwise
792 * to store header offsets.
793 * The fields are 8-bit, but it's ok, no header may be longer than 255 bytes.
797 #define TSO_MBUF_PROTO(_mbuf) ((_mbuf)->m_pkthdr.PH_loc.sixteen[0])
798 /* We abuse l5hlen here because PH_loc can hold only 64 bits of data */
799 #define TSO_MBUF_FLAGS(_mbuf) ((_mbuf)->m_pkthdr.l5hlen)
800 #define TSO_MBUF_PACKETID(_mbuf) ((_mbuf)->m_pkthdr.PH_loc.sixteen[1])
801 #define TSO_MBUF_SEQNUM(_mbuf) ((_mbuf)->m_pkthdr.PH_loc.thirtytwo[1])
803 static void sfxge_parse_tx_packet(struct mbuf *mbuf)
805 struct ether_header *eh = mtod(mbuf, struct ether_header *);
806 const struct tcphdr *th;
807 struct tcphdr th_copy;
809 /* Find network protocol and header */
810 TSO_MBUF_PROTO(mbuf) = eh->ether_type;
811 if (TSO_MBUF_PROTO(mbuf) == htons(ETHERTYPE_VLAN)) {
812 struct ether_vlan_header *veh =
813 mtod(mbuf, struct ether_vlan_header *);
814 TSO_MBUF_PROTO(mbuf) = veh->evl_proto;
815 mbuf->m_pkthdr.l2hlen = sizeof(*veh);
817 mbuf->m_pkthdr.l2hlen = sizeof(*eh);
820 /* Find TCP header */
821 if (TSO_MBUF_PROTO(mbuf) == htons(ETHERTYPE_IP)) {
822 const struct ip *iph = (const struct ip *)mtodo(mbuf, mbuf->m_pkthdr.l2hlen);
824 KASSERT(iph->ip_p == IPPROTO_TCP,
825 ("TSO required on non-TCP packet"));
826 mbuf->m_pkthdr.l3hlen = mbuf->m_pkthdr.l2hlen + 4 * iph->ip_hl;
827 TSO_MBUF_PACKETID(mbuf) = iph->ip_id;
829 KASSERT(TSO_MBUF_PROTO(mbuf) == htons(ETHERTYPE_IPV6),
830 ("TSO required on non-IP packet"));
831 KASSERT(((const struct ip6_hdr *)mtodo(mbuf, mbuf->m_pkthdr.l2hlen))->ip6_nxt ==
833 ("TSO required on non-TCP packet"));
834 mbuf->m_pkthdr.l3hlen = mbuf->m_pkthdr.l2hlen + sizeof(struct ip6_hdr);
835 TSO_MBUF_PACKETID(mbuf) = 0;
838 KASSERT(mbuf->m_len >= mbuf->m_pkthdr.l3hlen,
839 ("network header is fragmented in mbuf"));
841 /* We need TCP header including flags (window is the next) */
842 if (mbuf->m_len < mbuf->m_pkthdr.l3hlen + offsetof(struct tcphdr, th_win)) {
843 m_copydata(mbuf, mbuf->m_pkthdr.l3hlen, sizeof(th_copy),
847 th = (const struct tcphdr *)mtodo(mbuf, mbuf->m_pkthdr.l3hlen);
850 mbuf->m_pkthdr.l4hlen = mbuf->m_pkthdr.l3hlen + 4 * th->th_off;
851 TSO_MBUF_SEQNUM(mbuf) = ntohl(th->th_seq);
853 /* These flags must not be duplicated */
855 * RST should not be duplicated as well, but FreeBSD kernel
856 * generates TSO packets with RST flag. So, do not assert
859 KASSERT(!(th->th_flags & (TH_URG | TH_SYN)),
860 ("incompatible TCP flag 0x%x on TSO packet",
861 th->th_flags & (TH_URG | TH_SYN)));
862 TSO_MBUF_FLAGS(mbuf) = th->th_flags;
867 * TX start -- called by the stack.
870 sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m)
872 struct sfxge_softc *sc;
873 struct sfxge_txq *txq;
876 sc = (struct sfxge_softc *)ifp->if_softc;
879 * Transmit may be called when interface is up from the kernel
880 * point of view, but not yet up (in progress) from the driver
881 * point of view. I.e. link aggregation bring up.
882 * Transmit may be called when interface is up from the driver
883 * point of view, but already down from the kernel point of
884 * view. I.e. Rx when interface shutdown is in progress.
886 KASSERT((ifp->if_flags & IFF_UP) || (sc->if_flags & IFF_UP),
887 ("interface not up"));
889 /* Pick the desired transmit queue. */
890 if (sc->txq_dynamic_cksum_toggle_supported |
891 (m->m_pkthdr.csum_flags &
892 (CSUM_DELAY_DATA | CSUM_TCP_IPV6 | CSUM_UDP_IPV6 | CSUM_TSO))) {
895 /* check if flowid is set */
896 if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) {
897 uint32_t hash = m->m_pkthdr.flowid;
898 uint32_t idx = hash % nitems(sc->rx_indir_table);
900 index = sc->rx_indir_table[idx];
902 #if SFXGE_TX_PARSE_EARLY
903 if (m->m_pkthdr.csum_flags & CSUM_TSO)
904 sfxge_parse_tx_packet(m);
906 index += (sc->txq_dynamic_cksum_toggle_supported == B_FALSE) ?
907 SFXGE_TXQ_IP_TCP_UDP_CKSUM : 0;
908 txq = sc->txq[index];
909 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) {
910 txq = sc->txq[SFXGE_TXQ_IP_CKSUM];
912 txq = sc->txq[SFXGE_TXQ_NON_CKSUM];
915 rc = sfxge_tx_packet_add(txq, m);
923 * Software "TSO". Not quite as good as doing it in hardware, but
924 * still faster than segmenting in the stack.
927 struct sfxge_tso_state {
928 /* Output position */
929 unsigned out_len; /* Remaining length in current segment */
930 unsigned seqnum; /* Current sequence number */
931 unsigned packet_space; /* Remaining space in current packet */
932 unsigned segs_space; /* Remaining number of DMA segments
933 for the packet (FATSOv2 only) */
936 uint64_t dma_addr; /* DMA address of current position */
937 unsigned in_len; /* Remaining length in current mbuf */
939 const struct mbuf *mbuf; /* Input mbuf (head of chain) */
940 u_short protocol; /* Network protocol (after VLAN decap) */
941 ssize_t nh_off; /* Offset of network header */
942 ssize_t tcph_off; /* Offset of TCP header */
943 unsigned header_len; /* Number of bytes of header */
944 unsigned seg_size; /* TCP segment size */
945 int fw_assisted; /* Use FW-assisted TSO */
946 u_short packet_id; /* IPv4 packet ID from the original packet */
947 uint8_t tcp_flags; /* TCP flags */
948 efx_desc_t header_desc; /* Precomputed header descriptor for
952 #if !SFXGE_TX_PARSE_EARLY
953 static const struct ip *tso_iph(const struct sfxge_tso_state *tso)
955 KASSERT(tso->protocol == htons(ETHERTYPE_IP),
956 ("tso_iph() in non-IPv4 state"));
957 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off);
960 static __unused const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso)
962 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
963 ("tso_ip6h() in non-IPv6 state"));
964 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off);
967 static const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso)
969 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off);
974 /* Size of preallocated TSO header buffers. Larger blocks must be
975 * allocated from the heap.
977 #define TSOH_STD_SIZE 128
979 /* At most half the descriptors in the queue at any time will refer to
980 * a TSO header buffer, since they must always be followed by a
981 * payload descriptor referring to an mbuf.
983 #define TSOH_COUNT(_txq_entries) ((_txq_entries) / 2u)
984 #define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE)
985 #define TSOH_PAGE_COUNT(_txq_entries) \
986 ((TSOH_COUNT(_txq_entries) + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE)
988 static int tso_init(struct sfxge_txq *txq)
990 struct sfxge_softc *sc = txq->sc;
991 unsigned int tsoh_page_count = TSOH_PAGE_COUNT(sc->txq_entries);
994 /* Allocate TSO header buffers */
995 txq->tsoh_buffer = malloc(tsoh_page_count * sizeof(txq->tsoh_buffer[0]),
998 for (i = 0; i < tsoh_page_count; i++) {
999 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]);
1008 sfxge_dma_free(&txq->tsoh_buffer[i]);
1009 free(txq->tsoh_buffer, M_SFXGE);
1010 txq->tsoh_buffer = NULL;
1014 static void tso_fini(struct sfxge_txq *txq)
1018 if (txq->tsoh_buffer != NULL) {
1019 for (i = 0; i < TSOH_PAGE_COUNT(txq->sc->txq_entries); i++)
1020 sfxge_dma_free(&txq->tsoh_buffer[i]);
1021 free(txq->tsoh_buffer, M_SFXGE);
1025 static void tso_start(struct sfxge_txq *txq, struct sfxge_tso_state *tso,
1026 const bus_dma_segment_t *hdr_dma_seg,
1029 const efx_nic_cfg_t *encp = efx_nic_cfg_get(txq->sc->enp);
1030 #if !SFXGE_TX_PARSE_EARLY
1031 struct ether_header *eh = mtod(mbuf, struct ether_header *);
1032 const struct tcphdr *th;
1033 struct tcphdr th_copy;
1036 tso->fw_assisted = txq->tso_fw_assisted;
1039 /* Find network protocol and header */
1040 #if !SFXGE_TX_PARSE_EARLY
1041 tso->protocol = eh->ether_type;
1042 if (tso->protocol == htons(ETHERTYPE_VLAN)) {
1043 struct ether_vlan_header *veh =
1044 mtod(mbuf, struct ether_vlan_header *);
1045 tso->protocol = veh->evl_proto;
1046 tso->nh_off = sizeof(*veh);
1048 tso->nh_off = sizeof(*eh);
1051 tso->protocol = TSO_MBUF_PROTO(mbuf);
1052 tso->nh_off = mbuf->m_pkthdr.l2hlen;
1053 tso->tcph_off = mbuf->m_pkthdr.l3hlen;
1054 tso->packet_id = ntohs(TSO_MBUF_PACKETID(mbuf));
1057 #if !SFXGE_TX_PARSE_EARLY
1058 /* Find TCP header */
1059 if (tso->protocol == htons(ETHERTYPE_IP)) {
1060 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP,
1061 ("TSO required on non-TCP packet"));
1062 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl;
1063 tso->packet_id = ntohs(tso_iph(tso)->ip_id);
1065 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
1066 ("TSO required on non-IP packet"));
1067 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP,
1068 ("TSO required on non-TCP packet"));
1069 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr);
1075 if (tso->fw_assisted &&
1076 __predict_false(tso->tcph_off >
1077 encp->enc_tx_tso_tcp_header_offset_limit)) {
1078 tso->fw_assisted = 0;
1082 #if !SFXGE_TX_PARSE_EARLY
1083 KASSERT(mbuf->m_len >= tso->tcph_off,
1084 ("network header is fragmented in mbuf"));
1085 /* We need TCP header including flags (window is the next) */
1086 if (mbuf->m_len < tso->tcph_off + offsetof(struct tcphdr, th_win)) {
1087 m_copydata(tso->mbuf, tso->tcph_off, sizeof(th_copy),
1093 tso->header_len = tso->tcph_off + 4 * th->th_off;
1095 tso->header_len = mbuf->m_pkthdr.l4hlen;
1097 tso->seg_size = mbuf->m_pkthdr.tso_segsz;
1099 #if !SFXGE_TX_PARSE_EARLY
1100 tso->seqnum = ntohl(th->th_seq);
1102 /* These flags must not be duplicated */
1104 * RST should not be duplicated as well, but FreeBSD kernel
1105 * generates TSO packets with RST flag. So, do not assert
1108 KASSERT(!(th->th_flags & (TH_URG | TH_SYN)),
1109 ("incompatible TCP flag 0x%x on TSO packet",
1110 th->th_flags & (TH_URG | TH_SYN)));
1111 tso->tcp_flags = th->th_flags;
1113 tso->seqnum = TSO_MBUF_SEQNUM(mbuf);
1114 tso->tcp_flags = TSO_MBUF_FLAGS(mbuf);
1117 tso->out_len = mbuf->m_pkthdr.len - tso->header_len;
1119 if (tso->fw_assisted) {
1120 if (hdr_dma_seg->ds_len >= tso->header_len)
1121 efx_tx_qdesc_dma_create(txq->common,
1122 hdr_dma_seg->ds_addr,
1127 tso->fw_assisted = 0;
1132 * tso_fill_packet_with_fragment - form descriptors for the current fragment
1134 * Form descriptors for the current fragment, until we reach the end
1135 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
1138 static void tso_fill_packet_with_fragment(struct sfxge_txq *txq,
1139 struct sfxge_tso_state *tso)
1143 uint64_t dma_addr = tso->dma_addr;
1146 if (tso->in_len == 0 || tso->packet_space == 0)
1149 KASSERT(tso->in_len > 0, ("TSO input length went negative"));
1150 KASSERT(tso->packet_space > 0, ("TSO packet space went negative"));
1152 if (tso->fw_assisted & SFXGE_FATSOV2) {
1157 if (n < tso->packet_space) {
1158 tso->packet_space -= n;
1161 tso->packet_space = tso->seg_size -
1162 (n - tso->packet_space) % tso->seg_size;
1164 EFX_TX_FATSOV2_DMA_SEGS_PER_PKT_MAX - 1 -
1165 (tso->packet_space != tso->seg_size);
1168 n = min(tso->in_len, tso->packet_space);
1169 tso->packet_space -= n;
1176 * It is OK to use binary OR below to avoid extra branching
1177 * since all conditions may always be checked.
1179 eop = (tso->out_len == 0) | (tso->packet_space == 0) |
1180 (tso->segs_space == 0);
1182 desc = &txq->pend_desc[txq->n_pend_desc++];
1183 efx_tx_qdesc_dma_create(txq->common, dma_addr, n, eop, desc);
1186 /* Callback from bus_dmamap_load() for long TSO headers. */
1187 static void tso_map_long_header(void *dma_addr_ret,
1188 bus_dma_segment_t *segs, int nseg,
1191 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) &&
1192 __predict_true(nseg == 1)) ?
1197 * tso_start_new_packet - generate a new header and prepare for the new packet
1199 * Generate a new header and prepare for the new packet. Return 0 on
1200 * success, or an error code if failed to alloc header.
1202 static int tso_start_new_packet(struct sfxge_txq *txq,
1203 struct sfxge_tso_state *tso,
1206 unsigned int id = *idp;
1207 struct tcphdr *tsoh_th;
1215 if (tso->fw_assisted) {
1216 if (tso->fw_assisted & SFXGE_FATSOV2) {
1217 /* Add 2 FATSOv2 option descriptors */
1218 desc = &txq->pend_desc[txq->n_pend_desc];
1219 efx_tx_qdesc_tso2_create(txq->common,
1224 EFX_TX_FATSOV2_OPT_NDESCS);
1225 desc += EFX_TX_FATSOV2_OPT_NDESCS;
1226 txq->n_pend_desc += EFX_TX_FATSOV2_OPT_NDESCS;
1227 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0"));
1228 id = (id + EFX_TX_FATSOV2_OPT_NDESCS) & txq->ptr_mask;
1231 EFX_TX_FATSOV2_DMA_SEGS_PER_PKT_MAX - 1;
1233 uint8_t tcp_flags = tso->tcp_flags;
1235 if (tso->out_len > tso->seg_size)
1236 tcp_flags &= ~(TH_FIN | TH_PUSH);
1238 /* Add FATSOv1 option descriptor */
1239 desc = &txq->pend_desc[txq->n_pend_desc++];
1240 efx_tx_qdesc_tso_create(txq->common,
1245 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0"));
1246 id = (id + 1) & txq->ptr_mask;
1248 tso->seqnum += tso->seg_size;
1249 tso->segs_space = UINT_MAX;
1252 /* Header DMA descriptor */
1253 *desc = tso->header_desc;
1255 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0"));
1256 id = (id + 1) & txq->ptr_mask;
1258 /* Allocate a DMA-mapped header buffer. */
1259 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) {
1260 unsigned int page_index = (id / 2) / TSOH_PER_PAGE;
1261 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE;
1263 header = (txq->tsoh_buffer[page_index].esm_base +
1264 buf_index * TSOH_STD_SIZE);
1265 dma_addr = (txq->tsoh_buffer[page_index].esm_addr +
1266 buf_index * TSOH_STD_SIZE);
1267 map = txq->tsoh_buffer[page_index].esm_map;
1269 KASSERT(txq->stmp[id].flags == 0,
1270 ("stmp flags are not 0"));
1272 struct sfxge_tx_mapping *stmp = &txq->stmp[id];
1274 /* We cannot use bus_dmamem_alloc() as that may sleep */
1275 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT);
1276 if (__predict_false(!header))
1278 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map,
1279 header, tso->header_len,
1280 tso_map_long_header, &dma_addr,
1282 if (__predict_false(dma_addr == 0)) {
1284 /* Succeeded but got >1 segment */
1285 bus_dmamap_unload(txq->packet_dma_tag,
1289 free(header, M_SFXGE);
1294 txq->tso_long_headers++;
1295 stmp->u.heap_buf = header;
1296 stmp->flags = TX_BUF_UNMAP;
1299 tsoh_th = (struct tcphdr *)(header + tso->tcph_off);
1301 /* Copy and update the headers. */
1302 m_copydata(tso->mbuf, 0, tso->header_len, header);
1304 tsoh_th->th_seq = htonl(tso->seqnum);
1305 tso->seqnum += tso->seg_size;
1306 if (tso->out_len > tso->seg_size) {
1307 /* This packet will not finish the TSO burst. */
1308 ip_length = tso->header_len - tso->nh_off + tso->seg_size;
1309 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH);
1311 /* This packet will be the last in the TSO burst. */
1312 ip_length = tso->header_len - tso->nh_off + tso->out_len;
1315 if (tso->protocol == htons(ETHERTYPE_IP)) {
1316 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off);
1317 tsoh_iph->ip_len = htons(ip_length);
1318 /* XXX We should increment ip_id, but FreeBSD doesn't
1319 * currently allocate extra IDs for multiple segments.
1322 struct ip6_hdr *tsoh_iph =
1323 (struct ip6_hdr *)(header + tso->nh_off);
1324 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph));
1327 /* Make the header visible to the hardware. */
1328 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE);
1330 /* Form a descriptor for this header. */
1331 desc = &txq->pend_desc[txq->n_pend_desc++];
1332 efx_tx_qdesc_dma_create(txq->common,
1337 id = (id + 1) & txq->ptr_mask;
1339 tso->segs_space = UINT_MAX;
1341 tso->packet_space = tso->seg_size;
1349 sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
1350 const bus_dma_segment_t *dma_seg, int n_dma_seg,
1353 struct sfxge_tso_state tso;
1355 unsigned skipped = 0;
1357 tso_start(txq, &tso, dma_seg, mbuf);
1359 while (dma_seg->ds_len + skipped <= tso.header_len) {
1360 skipped += dma_seg->ds_len;
1362 KASSERT(n_dma_seg, ("no payload found in TSO packet"));
1365 tso.in_len = dma_seg->ds_len - (tso.header_len - skipped);
1366 tso.dma_addr = dma_seg->ds_addr + (tso.header_len - skipped);
1368 id = (txq->added + n_extra_descs) & txq->ptr_mask;
1369 if (__predict_false(tso_start_new_packet(txq, &tso, &id)))
1373 tso_fill_packet_with_fragment(txq, &tso);
1374 /* Exactly one DMA descriptor is added */
1375 KASSERT(txq->stmp[id].flags == 0, ("stmp flags are not 0"));
1376 id = (id + 1) & txq->ptr_mask;
1378 /* Move onto the next fragment? */
1379 if (tso.in_len == 0) {
1384 tso.in_len = dma_seg->ds_len;
1385 tso.dma_addr = dma_seg->ds_addr;
1388 /* End of packet? */
1389 if ((tso.packet_space == 0) | (tso.segs_space == 0)) {
1390 unsigned int n_fatso_opt_desc =
1391 (tso.fw_assisted & SFXGE_FATSOV2) ?
1392 EFX_TX_FATSOV2_OPT_NDESCS :
1393 (tso.fw_assisted & SFXGE_FATSOV1) ? 1 : 0;
1395 /* If the queue is now full due to tiny MSS,
1396 * or we can't create another header, discard
1397 * the remainder of the input mbuf but do not
1398 * roll back the work we have done.
1400 if (txq->n_pend_desc + n_fatso_opt_desc +
1401 1 /* header */ + n_dma_seg > txq->max_pkt_desc) {
1402 txq->tso_pdrop_too_many++;
1405 if (__predict_false(tso_start_new_packet(txq, &tso,
1407 txq->tso_pdrop_no_rsrc++;
1418 sfxge_tx_qunblock(struct sfxge_txq *txq)
1420 struct sfxge_softc *sc;
1421 struct sfxge_evq *evq;
1424 evq = sc->evq[txq->evq_index];
1426 SFXGE_EVQ_LOCK_ASSERT_OWNED(evq);
1428 if (__predict_false(txq->init_state != SFXGE_TXQ_STARTED))
1431 SFXGE_TXQ_LOCK(txq);
1436 level = txq->added - txq->completed;
1437 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL(txq->entries)) {
1438 /* reaped must be in sync with blocked */
1439 sfxge_tx_qreap(txq);
1444 sfxge_tx_qdpl_service(txq);
1445 /* note: lock has been dropped */
1449 sfxge_tx_qflush_done(struct sfxge_txq *txq)
1452 txq->flush_state = SFXGE_FLUSH_DONE;
1456 sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index)
1458 struct sfxge_txq *txq;
1459 struct sfxge_evq *evq;
1462 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
1464 txq = sc->txq[index];
1465 evq = sc->evq[txq->evq_index];
1467 SFXGE_EVQ_LOCK(evq);
1468 SFXGE_TXQ_LOCK(txq);
1470 KASSERT(txq->init_state == SFXGE_TXQ_STARTED,
1471 ("txq->init_state != SFXGE_TXQ_STARTED"));
1473 txq->init_state = SFXGE_TXQ_INITIALIZED;
1475 if (txq->flush_state != SFXGE_FLUSH_DONE) {
1476 txq->flush_state = SFXGE_FLUSH_PENDING;
1478 SFXGE_EVQ_UNLOCK(evq);
1479 SFXGE_TXQ_UNLOCK(txq);
1481 /* Flush the transmit queue. */
1482 if (efx_tx_qflush(txq->common) != 0) {
1483 log(LOG_ERR, "%s: Flushing Tx queue %u failed\n",
1484 device_get_nameunit(sc->dev), index);
1485 txq->flush_state = SFXGE_FLUSH_DONE;
1489 /* Spin for 100ms. */
1491 if (txq->flush_state != SFXGE_FLUSH_PENDING)
1493 } while (++count < 20);
1495 SFXGE_EVQ_LOCK(evq);
1496 SFXGE_TXQ_LOCK(txq);
1498 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED,
1499 ("txq->flush_state == SFXGE_FLUSH_FAILED"));
1501 if (txq->flush_state != SFXGE_FLUSH_DONE) {
1503 log(LOG_ERR, "%s: Cannot flush Tx queue %u\n",
1504 device_get_nameunit(sc->dev), index);
1505 txq->flush_state = SFXGE_FLUSH_DONE;
1510 txq->pending = txq->added;
1512 sfxge_tx_qcomplete(txq, evq);
1513 KASSERT(txq->completed == txq->added,
1514 ("txq->completed != txq->added"));
1516 sfxge_tx_qreap(txq);
1517 KASSERT(txq->reaped == txq->completed,
1518 ("txq->reaped != txq->completed"));
1525 /* Destroy the common code transmit queue. */
1526 efx_tx_qdestroy(txq->common);
1529 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1530 EFX_TXQ_NBUFS(sc->txq_entries));
1532 txq->hw_cksum_flags = 0;
1534 SFXGE_EVQ_UNLOCK(evq);
1535 SFXGE_TXQ_UNLOCK(txq);
1539 * Estimate maximum number of Tx descriptors required for TSO packet.
1540 * With minimum MSS and maximum mbuf length we might need more (even
1541 * than a ring-ful of descriptors), but this should not happen in
1542 * practice except due to deliberate attack. In that case we will
1543 * truncate the output at a packet boundary.
1546 sfxge_tx_max_pkt_desc(const struct sfxge_softc *sc, enum sfxge_txq_type type,
1547 unsigned int tso_fw_assisted)
1549 /* One descriptor for every input fragment */
1550 unsigned int max_descs = SFXGE_TX_MAPPING_MAX_SEG;
1551 unsigned int sw_tso_max_descs;
1552 unsigned int fa_tso_v1_max_descs = 0;
1553 unsigned int fa_tso_v2_max_descs = 0;
1555 /* Checksum offload Tx option descriptor may be required */
1556 if (sc->txq_dynamic_cksum_toggle_supported)
1559 /* VLAN tagging Tx option descriptor may be required */
1560 if (efx_nic_cfg_get(sc->enp)->enc_hw_tx_insert_vlan_enabled)
1563 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM) {
1565 * Plus header and payload descriptor for each output segment.
1566 * Minus one since header fragment is already counted.
1567 * Even if FATSO is used, we should be ready to fallback
1568 * to do it in the driver.
1570 sw_tso_max_descs = SFXGE_TSO_MAX_SEGS * 2 - 1;
1572 /* FW assisted TSOv1 requires one more descriptor per segment
1573 * in comparison to SW TSO */
1574 if (tso_fw_assisted & SFXGE_FATSOV1)
1575 fa_tso_v1_max_descs =
1576 sw_tso_max_descs + SFXGE_TSO_MAX_SEGS;
1578 /* FW assisted TSOv2 requires 3 (2 FATSO plus header) extra
1579 * descriptors per superframe limited by number of DMA fetches
1580 * per packet. The first packet header is already counted.
1582 if (tso_fw_assisted & SFXGE_FATSOV2) {
1583 fa_tso_v2_max_descs =
1584 howmany(SFXGE_TX_MAPPING_MAX_SEG,
1585 EFX_TX_FATSOV2_DMA_SEGS_PER_PKT_MAX - 1) *
1586 (EFX_TX_FATSOV2_OPT_NDESCS + 1) - 1;
1589 max_descs += MAX(sw_tso_max_descs,
1590 MAX(fa_tso_v1_max_descs, fa_tso_v2_max_descs));
1597 sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index)
1599 struct sfxge_txq *txq;
1602 unsigned int tso_fw_assisted;
1604 struct sfxge_evq *evq;
1605 unsigned int desc_index;
1608 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
1610 txq = sc->txq[index];
1612 evq = sc->evq[txq->evq_index];
1614 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1615 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1616 KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
1617 ("evq->init_state != SFXGE_EVQ_STARTED"));
1619 /* Program the buffer table. */
1620 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp,
1621 EFX_TXQ_NBUFS(sc->txq_entries))) != 0)
1624 /* Determine the kind of queue we are creating. */
1625 tso_fw_assisted = 0;
1626 switch (txq->type) {
1627 case SFXGE_TXQ_NON_CKSUM:
1630 case SFXGE_TXQ_IP_CKSUM:
1631 flags = EFX_TXQ_CKSUM_IPV4;
1633 case SFXGE_TXQ_IP_TCP_UDP_CKSUM:
1634 flags = EFX_TXQ_CKSUM_IPV4 | EFX_TXQ_CKSUM_TCPUDP;
1635 tso_fw_assisted = sc->tso_fw_assisted;
1636 if (tso_fw_assisted & SFXGE_FATSOV2)
1637 flags |= EFX_TXQ_FATSOV2;
1640 KASSERT(0, ("Impossible TX queue"));
1645 label = (sc->txq_dynamic_cksum_toggle_supported) ? 0 : txq->type;
1647 /* Create the common code transmit queue. */
1648 if ((rc = efx_tx_qcreate(sc->enp, index, label, esmp,
1649 sc->txq_entries, txq->buf_base_id, flags, evq->common,
1650 &txq->common, &desc_index)) != 0) {
1651 /* Retry if no FATSOv2 resources, otherwise fail */
1652 if ((rc != ENOSPC) || (~flags & EFX_TXQ_FATSOV2))
1655 /* Looks like all FATSOv2 contexts are used */
1656 flags &= ~EFX_TXQ_FATSOV2;
1657 tso_fw_assisted &= ~SFXGE_FATSOV2;
1658 if ((rc = efx_tx_qcreate(sc->enp, index, label, esmp,
1659 sc->txq_entries, txq->buf_base_id, flags, evq->common,
1660 &txq->common, &desc_index)) != 0)
1664 /* Initialise queue descriptor indexes */
1665 txq->added = txq->pending = txq->completed = txq->reaped = desc_index;
1667 SFXGE_TXQ_LOCK(txq);
1669 /* Enable the transmit queue. */
1670 efx_tx_qenable(txq->common);
1672 txq->init_state = SFXGE_TXQ_STARTED;
1673 txq->flush_state = SFXGE_FLUSH_REQUIRED;
1674 txq->tso_fw_assisted = tso_fw_assisted;
1676 txq->max_pkt_desc = sfxge_tx_max_pkt_desc(sc, txq->type,
1679 txq->hw_vlan_tci = 0;
1681 txq->hw_cksum_flags = flags &
1682 (EFX_TXQ_CKSUM_IPV4 | EFX_TXQ_CKSUM_TCPUDP);
1684 SFXGE_TXQ_UNLOCK(txq);
1689 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1690 EFX_TXQ_NBUFS(sc->txq_entries));
1695 sfxge_tx_stop(struct sfxge_softc *sc)
1699 index = sc->txq_count;
1700 while (--index >= 0)
1701 sfxge_tx_qstop(sc, index);
1703 /* Tear down the transmit module */
1704 efx_tx_fini(sc->enp);
1708 sfxge_tx_start(struct sfxge_softc *sc)
1713 /* Initialize the common code transmit module. */
1714 if ((rc = efx_tx_init(sc->enp)) != 0)
1717 for (index = 0; index < sc->txq_count; index++) {
1718 if ((rc = sfxge_tx_qstart(sc, index)) != 0)
1725 while (--index >= 0)
1726 sfxge_tx_qstop(sc, index);
1728 efx_tx_fini(sc->enp);
1734 sfxge_txq_stat_init(struct sfxge_txq *txq, struct sysctl_oid *txq_node)
1736 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(txq->sc->dev);
1737 struct sysctl_oid *stat_node;
1740 stat_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(txq_node), OID_AUTO,
1741 "stats", CTLFLAG_RD, NULL,
1742 "Tx queue statistics");
1743 if (stat_node == NULL)
1746 for (id = 0; id < nitems(sfxge_tx_stats); id++) {
1748 ctx, SYSCTL_CHILDREN(stat_node), OID_AUTO,
1749 sfxge_tx_stats[id].name, CTLFLAG_RD | CTLFLAG_STATS,
1750 (unsigned long *)((caddr_t)txq + sfxge_tx_stats[id].offset),
1758 * Destroy a transmit queue.
1761 sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index)
1763 struct sfxge_txq *txq;
1766 txq = sc->txq[index];
1768 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1769 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1771 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM)
1774 /* Free the context arrays. */
1775 free(txq->pend_desc, M_SFXGE);
1776 nmaps = sc->txq_entries;
1777 while (nmaps-- != 0)
1778 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1779 free(txq->stmp, M_SFXGE);
1781 /* Release DMA memory mapping. */
1782 sfxge_dma_free(&txq->mem);
1784 sc->txq[index] = NULL;
1786 SFXGE_TXQ_LOCK_DESTROY(txq);
1792 sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index,
1793 enum sfxge_txq_type type, unsigned int evq_index)
1795 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);
1797 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
1798 struct sysctl_oid *txq_node;
1799 struct sfxge_txq *txq;
1800 struct sfxge_evq *evq;
1801 struct sfxge_tx_dpl *stdp;
1802 struct sysctl_oid *dpl_node;
1807 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK);
1809 txq->entries = sc->txq_entries;
1810 txq->ptr_mask = txq->entries - 1;
1812 sc->txq[txq_index] = txq;
1815 evq = sc->evq[evq_index];
1817 /* Allocate and zero DMA space for the descriptor ring. */
1818 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(sc->txq_entries), esmp)) != 0)
1821 /* Allocate buffer table entries. */
1822 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(sc->txq_entries),
1825 /* Create a DMA tag for packet mappings. */
1826 if (bus_dma_tag_create(sc->parent_dma_tag, 1,
1827 encp->enc_tx_dma_desc_boundary,
1828 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL,
1829 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG,
1830 encp->enc_tx_dma_desc_size_max, 0, NULL, NULL,
1831 &txq->packet_dma_tag) != 0) {
1832 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n");
1837 /* Allocate pending descriptor array for batching writes. */
1838 txq->pend_desc = malloc(sizeof(efx_desc_t) * sc->txq_entries,
1839 M_SFXGE, M_ZERO | M_WAITOK);
1841 /* Allocate and initialise mbuf DMA mapping array. */
1842 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * sc->txq_entries,
1843 M_SFXGE, M_ZERO | M_WAITOK);
1844 for (nmaps = 0; nmaps < sc->txq_entries; nmaps++) {
1845 rc = bus_dmamap_create(txq->packet_dma_tag, 0,
1846 &txq->stmp[nmaps].map);
1851 snprintf(name, sizeof(name), "%u", txq_index);
1852 txq_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(sc->txqs_node),
1853 OID_AUTO, name, CTLFLAG_RD, NULL, "");
1854 if (txq_node == NULL) {
1859 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM &&
1860 (rc = tso_init(txq)) != 0)
1863 /* Initialize the deferred packet list. */
1865 stdp->std_put_max = sfxge_tx_dpl_put_max;
1866 stdp->std_get_max = sfxge_tx_dpl_get_max;
1867 stdp->std_get_non_tcp_max = sfxge_tx_dpl_get_non_tcp_max;
1868 stdp->std_getp = &stdp->std_get;
1870 SFXGE_TXQ_LOCK_INIT(txq, device_get_nameunit(sc->dev), txq_index);
1872 dpl_node = SYSCTL_ADD_NODE(ctx, SYSCTL_CHILDREN(txq_node), OID_AUTO,
1873 "dpl", CTLFLAG_RD, NULL,
1874 "Deferred packet list statistics");
1875 if (dpl_node == NULL) {
1880 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO,
1881 "get_count", CTLFLAG_RD | CTLFLAG_STATS,
1882 &stdp->std_get_count, 0, "");
1883 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO,
1884 "get_non_tcp_count", CTLFLAG_RD | CTLFLAG_STATS,
1885 &stdp->std_get_non_tcp_count, 0, "");
1886 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO,
1887 "get_hiwat", CTLFLAG_RD | CTLFLAG_STATS,
1888 &stdp->std_get_hiwat, 0, "");
1889 SYSCTL_ADD_UINT(ctx, SYSCTL_CHILDREN(dpl_node), OID_AUTO,
1890 "put_hiwat", CTLFLAG_RD | CTLFLAG_STATS,
1891 &stdp->std_put_hiwat, 0, "");
1893 rc = sfxge_txq_stat_init(txq, txq_node);
1895 goto fail_txq_stat_init;
1898 txq->evq_index = evq_index;
1899 txq->init_state = SFXGE_TXQ_INITIALIZED;
1907 free(txq->pend_desc, M_SFXGE);
1909 while (nmaps-- != 0)
1910 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1911 free(txq->stmp, M_SFXGE);
1912 bus_dma_tag_destroy(txq->packet_dma_tag);
1915 sfxge_dma_free(esmp);
1921 sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS)
1923 struct sfxge_softc *sc = arg1;
1924 unsigned int id = arg2;
1928 /* Sum across all TX queues */
1930 for (index = 0; index < sc->txq_count; index++)
1931 sum += *(unsigned long *)((caddr_t)sc->txq[index] +
1932 sfxge_tx_stats[id].offset);
1934 return (SYSCTL_OUT(req, &sum, sizeof(sum)));
1938 sfxge_tx_stat_init(struct sfxge_softc *sc)
1940 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
1941 struct sysctl_oid_list *stat_list;
1944 stat_list = SYSCTL_CHILDREN(sc->stats_node);
1946 for (id = 0; id < nitems(sfxge_tx_stats); id++) {
1949 OID_AUTO, sfxge_tx_stats[id].name,
1950 CTLTYPE_ULONG|CTLFLAG_RD,
1951 sc, id, sfxge_tx_stat_handler, "LU",
1957 sfxge_tx_get_drops(struct sfxge_softc *sc)
1961 struct sfxge_txq *txq;
1963 /* Sum across all TX queues */
1964 for (index = 0; index < sc->txq_count; index++) {
1965 txq = sc->txq[index];
1967 * In theory, txq->put_overflow and txq->netdown_drops
1968 * should use atomic operation and other should be
1969 * obtained under txq lock, but it is just statistics.
1971 drops += txq->drops + txq->get_overflow +
1972 txq->get_non_tcp_overflow +
1973 txq->put_overflow + txq->netdown_drops +
1974 txq->tso_pdrop_too_many + txq->tso_pdrop_no_rsrc;
1980 sfxge_tx_update_stats(struct sfxge_softc *sc)
1982 sc->ifnet->if_oerrors += sfxge_tx_get_drops(sc);
1986 sfxge_tx_fini(struct sfxge_softc *sc)
1990 index = sc->txq_count;
1991 while (--index >= 0)
1992 sfxge_tx_qfini(sc, index);
1999 sfxge_tx_init(struct sfxge_softc *sc)
2001 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);
2002 struct sfxge_intr *intr;
2008 KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
2009 ("intr->state != SFXGE_INTR_INITIALIZED"));
2011 if (sfxge_tx_dpl_get_max <= 0) {
2012 log(LOG_ERR, "%s=%d must be greater than 0",
2013 SFXGE_PARAM_TX_DPL_GET_MAX, sfxge_tx_dpl_get_max);
2015 goto fail_tx_dpl_get_max;
2017 if (sfxge_tx_dpl_get_non_tcp_max <= 0) {
2018 log(LOG_ERR, "%s=%d must be greater than 0",
2019 SFXGE_PARAM_TX_DPL_GET_NON_TCP_MAX,
2020 sfxge_tx_dpl_get_non_tcp_max);
2022 goto fail_tx_dpl_get_non_tcp_max;
2024 if (sfxge_tx_dpl_put_max < 0) {
2025 log(LOG_ERR, "%s=%d must be greater or equal to 0",
2026 SFXGE_PARAM_TX_DPL_PUT_MAX, sfxge_tx_dpl_put_max);
2028 goto fail_tx_dpl_put_max;
2031 sc->txq_count = SFXGE_EVQ0_N_TXQ(sc) - 1 + sc->intr.n_alloc;
2033 sc->tso_fw_assisted = sfxge_tso_fw_assisted;
2034 if ((~encp->enc_features & EFX_FEATURE_FW_ASSISTED_TSO) ||
2035 (!encp->enc_fw_assisted_tso_enabled))
2036 sc->tso_fw_assisted &= ~SFXGE_FATSOV1;
2037 if ((~encp->enc_features & EFX_FEATURE_FW_ASSISTED_TSO_V2) ||
2038 (!encp->enc_fw_assisted_tso_v2_enabled))
2039 sc->tso_fw_assisted &= ~SFXGE_FATSOV2;
2041 sc->txqs_node = SYSCTL_ADD_NODE(
2042 device_get_sysctl_ctx(sc->dev),
2043 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
2044 OID_AUTO, "txq", CTLFLAG_RD, NULL, "Tx queues");
2045 if (sc->txqs_node == NULL) {
2050 /* Initialize the transmit queues */
2051 if (sc->txq_dynamic_cksum_toggle_supported == B_FALSE) {
2052 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM,
2053 SFXGE_TXQ_NON_CKSUM, 0)) != 0)
2056 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM,
2057 SFXGE_TXQ_IP_CKSUM, 0)) != 0)
2062 index < sc->txq_count - SFXGE_EVQ0_N_TXQ(sc) + 1;
2064 if ((rc = sfxge_tx_qinit(sc, SFXGE_EVQ0_N_TXQ(sc) - 1 + index,
2065 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0)
2069 sfxge_tx_stat_init(sc);
2074 while (--index >= 0)
2075 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
2077 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM);
2080 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM);
2085 fail_tx_dpl_put_max:
2086 fail_tx_dpl_get_non_tcp_max:
2087 fail_tx_dpl_get_max: