1 /* $NecBSD: dp83932subr.c,v 1.5.6.2 1999/10/09 05:47:23 kmatsuda Exp $ */
5 * Copyright (c) 1997, 1998, 1999
6 * Kouichi Matsuda. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Kouichi Matsuda for
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 * Routines of NEC PC-9801-83, 84, 103, 104, PC-9801N-25 and PC-9801N-J02, J02R
39 * Ethernet interface for NetBSD/pc98, ported by Kouichi Matsuda.
41 * These cards use National Semiconductor DP83934AVQB as Ethernet Controller
42 * and National Semiconductor NS46C46 as (64 * 16 bits) Microwire Serial EEPROM.
46 * Modified for FreeBSD(98) 4.0 from NetBSD/pc98 1.4.2 by Motomichi Matsuzaki.
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/protosw.h>
52 #include <sys/socket.h>
54 #include <net/ethernet.h>
56 #include <net/if_arp.h>
57 #include <net/if_media.h>
60 #include <machine/bus.h>
62 #include <dev/snc/dp83932reg.h>
63 #include <dev/snc/dp83932var.h>
64 #include <dev/snc/if_sncreg.h>
65 #include <dev/snc/dp83932subr.h>
67 static __inline u_int16_t snc_nec16_select_bank
68 (struct snc_softc *, u_int32_t, u_int32_t);
71 * Interface exists: make available by filling in network interface
72 * record. System will initialize the interface when it is ready
76 sncsetup(struct snc_softc *sc, u_int8_t *lladdr)
83 * Put the pup in reset mode (sncinit() will fix it later),
84 * stop the timer, disable all interrupts and clear any interrupts.
86 NIC_PUT(sc, SNCR_CR, CR_STP);
88 NIC_PUT(sc, SNCR_CR, CR_RST);
90 NIC_PUT(sc, SNCR_IMR, 0);
92 NIC_PUT(sc, SNCR_ISR, ISR_ALL);
96 * because the SONIC is basically 16bit device it 'concatenates'
97 * a higher buffer address to a 16 bit offset--this will cause wrap
98 * around problems near the end of 64k !!
102 for (i = 0; i < NRRA; i++) {
103 sc->v_rra[i] = SONIC_GETDMA(p);
104 p += RXRSRC_SIZE(sc);
106 sc->v_rea = SONIC_GETDMA(p);
110 sc->v_cda = SONIC_GETDMA(p);
115 for (i = 0; i < NTDA; i++) {
116 struct mtd *mtdp = &sc->mtda[i];
117 mtdp->mtd_vtxp = SONIC_GETDMA(p);
123 if ((p - pp) > PAGE_SIZE) {
124 device_printf (sc->sc_dev, "sizeof RRA (%ld) + CDA (%ld) +"
125 "TDA (%ld) > PAGE_SIZE (%d). Punt!\n",
126 (u_long)sc->v_cda - (u_long)sc->v_rra[0],
127 (u_long)sc->mtda[0].mtd_vtxp - (u_long)sc->v_cda,
128 (u_long)p - (u_long)sc->mtda[0].mtd_vtxp,
136 sc->sc_nrda = PAGE_SIZE / RXPKT_SIZE(sc);
137 sc->v_rda = SONIC_GETDMA(p);
141 for (i = 0; i < NRBA; i++) {
148 for (i = 0; i < NTDA; i++) {
149 struct mtd *mtdp = &sc->mtda[i];
151 mtdp->mtd_vbuf = SONIC_GETDMA(p);
153 if (offset < PAGE_SIZE) {
166 * miscellaneous NEC/SONIC detect functions.
170 * check if a specified irq is acceptable.
173 snc_nec16_validate_irq(int irq)
175 const u_int8_t encoded_irq[16] = {
176 -1, -1, -1, 0, -1, 1, 2, -1, -1, 3, 4, -1, 5, 6, -1, -1
179 return encoded_irq[irq];
183 * specify irq to board.
186 snc_nec16_register_irq(struct snc_softc *sc, int irq)
188 bus_space_tag_t iot = sc->sc_iot;
189 bus_space_handle_t ioh = sc->sc_ioh;
190 u_int8_t encoded_irq;
192 encoded_irq = snc_nec16_validate_irq(irq);
193 if (encoded_irq == (u_int8_t) -1) {
194 printf("snc_nec16_register_irq: unsupported irq (%d)\n", irq);
198 /* select SNECR_IRQSEL register */
199 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_IRQSEL);
200 /* write encoded irq value */
201 bus_space_write_1(iot, ioh, SNEC_CTRLB, encoded_irq);
207 * check if a specified memory base address is acceptable.
210 snc_nec16_validate_mem(int maddr)
213 /* Check on Normal mode with max range, only */
214 if ((maddr & ~0x1E000) != 0xC0000) {
215 printf("snc_nec16_validate_mem: "
216 "unsupported window base (0x%x)\n", maddr);
224 * specify memory base address to board and map to first bank.
227 snc_nec16_register_mem(struct snc_softc *sc, int maddr)
229 bus_space_tag_t iot = sc->sc_iot;
230 bus_space_handle_t ioh = sc->sc_ioh;
232 if (snc_nec16_validate_mem(maddr) == 0)
235 /* select SNECR_MEMSEL register */
236 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMSEL);
237 /* write encoded memory base select value */
238 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_MEMSEL_PHYS2EN(maddr));
241 * set current bank to 0 (bottom) and map
243 /* select SNECR_MEMBS register */
244 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
245 /* select new bank */
246 bus_space_write_1(iot, ioh, SNEC_CTRLB,
247 SNECR_MEMBS_B2EB(0) | SNECR_MEMBS_BSEN);
248 /* set current bank to 0 */
255 snc_nec16_check_memory(bus_space_tag_t iot, bus_space_handle_t ioh,
256 bus_space_tag_t memt, bus_space_handle_t memh)
262 for (i = 0; i < SNEC_NBANK; i++) {
263 /* select new bank */
264 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
265 bus_space_write_1(iot, ioh, SNEC_CTRLB,
266 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
268 /* write test pattern */
269 for (j = 0; j < SNEC_NMEMS / 2; j++) {
270 bus_space_write_2(memt, memh, j * 2, val + j);
276 for (i = 0; i < SNEC_NBANK; i++) {
277 /* select new bank */
278 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
279 bus_space_write_1(iot, ioh, SNEC_CTRLB,
280 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
282 /* read test pattern */
283 for (j = 0; j < SNEC_NMEMS / 2; j++) {
284 if (bus_space_read_2(memt, memh, j * 2) != val + j)
288 if (j < SNEC_NMEMS / 2) {
289 printf("snc_nec16_check_memory: "
290 "memory check failed at 0x%04x%04x"
291 "val 0x%04x != expected 0x%04x\n", i, j,
292 bus_space_read_2(memt, memh, j * 2),
300 for (i = 0; i < SNEC_NBANK; i++) {
301 /* select new bank */
302 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
303 bus_space_write_1(iot, ioh, SNEC_CTRLB,
304 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
306 bus_space_set_region_4(memt, memh, 0, 0, SNEC_NMEMS >> 2);
309 /* again read test if these are 0 */
310 for (i = 0; i < SNEC_NBANK; i++) {
311 /* select new bank */
312 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
313 bus_space_write_1(iot, ioh, SNEC_CTRLB,
314 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
316 /* check if cleared */
317 for (j = 0; j < SNEC_NMEMS; j += 2) {
318 if (bus_space_read_2(memt, memh, j) != 0)
322 if (j != SNEC_NMEMS) {
323 printf("snc_nec16_check_memory: "
324 "memory zero clear failed at 0x%04x%04x\n", i, j);
333 snc_nec16_detectsubr(bus_space_tag_t iot, bus_space_handle_t ioh,
334 bus_space_tag_t memt, bus_space_handle_t memh, int irq, int maddr,
341 if (snc_nec16_validate_irq(irq) == (u_int8_t) -1)
343 /* XXX: maddr already checked */
344 if (snc_nec16_validate_mem(maddr) == 0)
347 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_IDENT);
348 ident = bus_space_read_1(iot, ioh, SNEC_CTRLB);
349 if (ident == 0xff || ident == 0x00) {
355 case SNEC_TYPE_LEGACY:
356 rv = (ident == SNECR_IDENT_LEGACY_CBUS);
359 rv = ((ident == SNECR_IDENT_PNP_CBUS) ||
360 (ident == SNECR_IDENT_PNP_PCMCIABUS));
367 printf("snc_nec16_detectsubr: parent bus mismatch\n");
371 /* select SONIC register SNCR_CR */
372 bus_space_write_1(iot, ioh, SNEC_ADDR, SNCR_CR);
373 bus_space_write_2(iot, ioh, SNEC_CTRL, CR_RXDIS | CR_STP | CR_RST);
376 cr = bus_space_read_2(iot, ioh, SNEC_CTRL);
377 if (cr != (CR_RXDIS | CR_STP | CR_RST)) {
379 printf("snc_nec16_detectsubr: card reset failed, cr = 0x%04x\n",
385 if (snc_nec16_check_memory(iot, ioh, memt, memh) == 0)
392 #define SNC_VENDOR_NEC 0x00004c
393 #define SNC_NEC_SERIES_LEGACY_CBUS 0xa5
394 #define SNC_NEC_SERIES_PNP_PCMCIA 0xd5
395 #define SNC_NEC_SERIES_PNP_PCMCIA2 0x6d /* XXX */
396 #define SNC_NEC_SERIES_PNP_CBUS 0x0d
397 #define SNC_NEC_SERIES_PNP_CBUS2 0x3d
400 snc_nec16_detect_type(u_int8_t *myea)
402 u_int32_t vendor = (myea[0] << 16) | (myea[1] << 8) | myea[2];
403 u_int8_t series = myea[3];
404 u_int8_t type = myea[4] & 0x80;
410 case SNC_NEC_SERIES_LEGACY_CBUS:
412 typestr = "NEC PC-9801-84";
414 typestr = "NEC PC-9801-83";
416 case SNC_NEC_SERIES_PNP_CBUS:
417 case SNC_NEC_SERIES_PNP_CBUS2:
419 typestr = "NEC PC-9801-104";
421 typestr = "NEC PC-9801-103";
423 case SNC_NEC_SERIES_PNP_PCMCIA:
424 case SNC_NEC_SERIES_PNP_PCMCIA2:
427 typestr = "NEC PC-9801N-J02R";
429 typestr = "NEC PC-9801N-J02";
432 typestr = "NEC unknown (PC-9801N-25?)";
437 typestr = "unknown (3rd vendor?)";
445 snc_nec16_get_enaddr(bus_space_tag_t iot, bus_space_handle_t ioh,
448 u_int8_t eeprom[SNEC_EEPROM_SIZE];
449 u_int8_t rom_sum, sum = 0x00;
452 snc_nec16_read_eeprom(iot, ioh, eeprom);
454 for (i = SNEC_EEPROM_KEY0; i < SNEC_EEPROM_CKSUM; i++) {
455 sum = sum ^ eeprom[i];
458 rom_sum = eeprom[SNEC_EEPROM_CKSUM];
460 if (sum != rom_sum) {
461 printf("snc_nec16_get_enaddr: "
462 "checksum mismatch; calculated %02x != read %02x",
467 for (i = 0; i < ETHER_ADDR_LEN; i++)
468 myea[i] = eeprom[SNEC_EEPROM_SA0 + i];
474 * read from NEC/SONIC NIC register.
477 snc_nec16_nic_get(struct snc_softc *sc, u_int8_t reg)
481 /* select SONIC register */
482 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SNEC_ADDR, reg);
483 val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SNEC_CTRL);
489 * write to NEC/SONIC NIC register.
492 snc_nec16_nic_put(struct snc_softc *sc, u_int8_t reg, u_int16_t val)
495 /* select SONIC register */
496 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SNEC_ADDR, reg);
497 bus_space_write_2(sc->sc_iot, sc->sc_ioh, SNEC_CTRL, val);
502 * select memory bank and map
503 * where exists specified (internal buffer memory) offset.
505 static __inline u_int16_t
506 snc_nec16_select_bank(struct snc_softc *sc, u_int32_t base, u_int32_t offset)
508 bus_space_tag_t iot = sc->sc_iot;
509 bus_space_handle_t ioh = sc->sc_ioh;
513 /* bitmode is fixed to 16 bit. */
514 bank = (base + offset * 2) >> 13;
515 noffset = (base + offset * 2) & (SNEC_NMEMS - 1);
519 device_printf(sc->sc_dev, "noffset is odd (0x%04x)\n",
522 #endif /* SNCDEBUG */
524 if (sc->curbank != bank) {
525 /* select SNECR_MEMBS register */
526 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
527 /* select new bank */
528 bus_space_write_1(iot, ioh, SNEC_CTRLB,
529 SNECR_MEMBS_B2EB(bank) | SNECR_MEMBS_BSEN);
530 /* update current bank */
538 * write to SONIC descriptors.
541 snc_nec16_writetodesc(struct snc_softc *sc, u_int32_t base, u_int32_t offset,
544 bus_space_tag_t memt = sc->sc_memt;
545 bus_space_handle_t memh = sc->sc_memh;
548 noffset = snc_nec16_select_bank(sc, base, offset);
550 bus_space_write_2(memt, memh, noffset, val);
554 * read from SONIC descriptors.
557 snc_nec16_readfromdesc(struct snc_softc *sc, u_int32_t base, u_int32_t offset)
559 bus_space_tag_t memt = sc->sc_memt;
560 bus_space_handle_t memh = sc->sc_memh;
563 noffset = snc_nec16_select_bank(sc, base, offset);
565 return bus_space_read_2(memt, memh, noffset);
569 * read from SONIC data buffer.
572 snc_nec16_copyfrombuf(struct snc_softc *sc, void *dst, u_int32_t offset,
575 bus_space_tag_t memt = sc->sc_memt;
576 bus_space_handle_t memh = sc->sc_memh;
578 u_int8_t* bptr = dst;
580 noffset = snc_nec16_select_bank(sc, offset, 0);
582 /* XXX: should check if offset + size < 0x2000. */
584 bus_space_barrier(memt, memh, noffset, size,
585 BUS_SPACE_BARRIER_READ);
589 size_t asize = 4 - (noffset & 3);
591 bus_space_read_region_1(memt, memh, noffset,
597 bus_space_read_region_4(memt, memh, noffset,
598 (u_int32_t *) bptr, size >> 2);
600 noffset += size & ~3;
604 bus_space_read_region_1(memt, memh, noffset, bptr, size);
608 * write to SONIC data buffer.
611 snc_nec16_copytobuf(struct snc_softc *sc, void *src, u_int32_t offset,
614 bus_space_tag_t memt = sc->sc_memt;
615 bus_space_handle_t memh = sc->sc_memh;
616 u_int16_t noffset, onoffset;
618 u_int8_t* bptr = src;
620 noffset = snc_nec16_select_bank(sc, offset, 0);
623 /* XXX: should check if offset + size < 0x2000. */
627 size_t asize = 4 - (noffset & 3);
629 bus_space_write_region_1(memt, memh, noffset,
635 bus_space_write_region_4(memt, memh, noffset,
636 (u_int32_t *)bptr, size >> 2);
638 noffset += size & ~3;
642 bus_space_write_region_1(memt, memh, noffset, bptr, size);
644 bus_space_barrier(memt, memh, onoffset, osize,
645 BUS_SPACE_BARRIER_WRITE);
649 * write (fill) 0 to SONIC data buffer.
652 snc_nec16_zerobuf(struct snc_softc *sc, u_int32_t offset, size_t size)
654 bus_space_tag_t memt = sc->sc_memt;
655 bus_space_handle_t memh = sc->sc_memh;
656 u_int16_t noffset, onoffset;
659 noffset = snc_nec16_select_bank(sc, offset, 0);
662 /* XXX: should check if offset + size < 0x2000. */
666 size_t asize = 4 - (noffset & 3);
668 bus_space_set_region_1(memt, memh, noffset, 0, asize);
672 bus_space_set_region_4(memt, memh, noffset, 0, size >> 2);
673 noffset += size & ~3;
677 bus_space_set_region_1(memt, memh, noffset, 0, size);
679 bus_space_barrier(memt, memh, onoffset, osize,
680 BUS_SPACE_BARRIER_WRITE);
685 * Routines to read bytes sequentially from EEPROM through NEC PC-9801-83,
686 * 84, 103, 104, PC-9801N-25 and PC-9801N-J02, J02R for NetBSD/pc98.
687 * Ported by Kouichi Matsuda.
689 * This algorism is generic to read data sequentially from 4-Wire
690 * Microwire Serial EEPROM.
693 #define SNEC_EEP_DELAY 1000
696 snc_nec16_read_eeprom(bus_space_tag_t iot, bus_space_handle_t ioh,
699 u_int8_t n, val, bit;
701 /* Read bytes from EEPROM; two bytes per an iteration. */
702 for (n = 0; n < SNEC_EEPROM_SIZE / 2; n++) {
703 /* select SNECR_EEP */
704 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_EEP);
706 bus_space_write_1(iot, ioh, SNEC_CTRLB, 0x00);
707 DELAY(SNEC_EEP_DELAY);
709 /* Start EEPROM access. */
710 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
711 DELAY(SNEC_EEP_DELAY);
713 bus_space_write_1(iot, ioh, SNEC_CTRLB,
714 SNECR_EEP_CS | SNECR_EEP_SK);
715 DELAY(SNEC_EEP_DELAY);
717 bus_space_write_1(iot, ioh, SNEC_CTRLB,
718 SNECR_EEP_CS | SNECR_EEP_DI);
719 DELAY(SNEC_EEP_DELAY);
721 bus_space_write_1(iot, ioh, SNEC_CTRLB,
722 SNECR_EEP_CS | SNECR_EEP_SK | SNECR_EEP_DI);
723 DELAY(SNEC_EEP_DELAY);
725 bus_space_write_1(iot, ioh, SNEC_CTRLB,
726 SNECR_EEP_CS | SNECR_EEP_DI);
727 DELAY(SNEC_EEP_DELAY);
729 bus_space_write_1(iot, ioh, SNEC_CTRLB,
730 SNECR_EEP_CS | SNECR_EEP_SK | SNECR_EEP_DI);
731 DELAY(SNEC_EEP_DELAY);
733 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
734 DELAY(SNEC_EEP_DELAY);
736 bus_space_write_1(iot, ioh, SNEC_CTRLB,
737 SNECR_EEP_CS | SNECR_EEP_SK);
738 DELAY(SNEC_EEP_DELAY);
740 /* Pass the iteration count to the chip. */
741 for (bit = 0x20; bit != 0x00; bit >>= 1) {
742 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS |
743 ((n & bit) ? SNECR_EEP_DI : 0x00));
744 DELAY(SNEC_EEP_DELAY);
746 bus_space_write_1(iot, ioh, SNEC_CTRLB,
747 SNECR_EEP_CS | SNECR_EEP_SK |
748 ((n & bit) ? SNECR_EEP_DI : 0x00));
749 DELAY(SNEC_EEP_DELAY);
752 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
753 (void) bus_space_read_1(iot, ioh, SNEC_CTRLB); /* ACK */
754 DELAY(SNEC_EEP_DELAY);
758 for (bit = 0x80; bit != 0x00; bit >>= 1) {
759 bus_space_write_1(iot, ioh, SNEC_CTRLB,
760 SNECR_EEP_CS | SNECR_EEP_SK);
761 DELAY(SNEC_EEP_DELAY);
763 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
765 if (bus_space_read_1(iot, ioh, SNEC_CTRLB) & SNECR_EEP_DO)
770 /* Read one more byte. */
772 for (bit = 0x80; bit != 0x00; bit >>= 1) {
773 bus_space_write_1(iot, ioh, SNEC_CTRLB,
774 SNECR_EEP_CS | SNECR_EEP_SK);
775 DELAY(SNEC_EEP_DELAY);
777 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
779 if (bus_space_read_1(iot, ioh, SNEC_CTRLB) & SNECR_EEP_DO)
784 bus_space_write_1(iot, ioh, SNEC_CTRLB, 0x00);
785 DELAY(SNEC_EEP_DELAY);
789 /* Report what we got. */
790 data -= SNEC_EEPROM_SIZE;
791 log(LOG_INFO, "%s: EEPROM:"
792 " %02x%02x%02x%02x %02x%02x%02x%02x -"
793 " %02x%02x%02x%02x %02x%02x%02x%02x -"
794 " %02x%02x%02x%02x %02x%02x%02x%02x -"
795 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
796 "snc_nec16_read_eeprom",
797 data[ 0], data[ 1], data[ 2], data[ 3],
798 data[ 4], data[ 5], data[ 6], data[ 7],
799 data[ 8], data[ 9], data[10], data[11],
800 data[12], data[13], data[14], data[15],
801 data[16], data[17], data[18], data[19],
802 data[20], data[21], data[22], data[23],
803 data[24], data[25], data[26], data[27],
804 data[28], data[29], data[30], data[31]);
810 snc_nec16_dump_reg(bus_space_tag_t iot, bus_space_handle_t ioh)
815 printf("SONIC registers (word):");
816 for (n = 0; n < SNC_NREGS; n++) {
817 /* select required SONIC register */
818 bus_space_write_1(iot, ioh, SNEC_ADDR, n);
820 val = bus_space_read_2(iot, ioh, SNEC_CTRL);
822 printf("\n%04x ", val);
824 printf("%04x ", val);
828 printf("NEC/SONIC registers (byte):\n");
829 for (n = SNECR_MEMBS; n <= SNECR_IDENT; n += 2) {
830 /* select required SONIC register */
831 bus_space_write_1(iot, ioh, SNEC_ADDR, n);
833 val = (u_int16_t) bus_space_read_1(iot, ioh, SNEC_CTRLB);
834 printf("%04x ", val);
839 #endif /* SNCDEBUG */