2 * Copyright (c) 2005 Ariff Abdullah <ariff@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
28 * FreeBSD pcm driver for ATI IXP 150/200/250/300 AC97 controllers
31 * * 16bit playback / recording
32 * * 32bit native playback - yay!
33 * * 32bit native recording (seems broken on few hardwares)
37 * * Support for more than 2 channels.
39 * * 32bit native recording seems broken on few hardwares, most
40 * probably because of incomplete VRA/DRA cleanup.
45 * Shaharil @ SCAN Associates whom relentlessly providing me the
46 * mind blowing Acer Ferrari 4002 WLMi with this ATI IXP hardware.
48 * Reinoud Zandijk <reinoud@NetBSD.org> (auixp), which this driver is
49 * largely based upon although large part of it has been reworked. His
50 * driver is the primary reference and pretty much well documented.
52 * Takashi Iwai (ALSA snd-atiixp), for register definitions and some
53 * random ninja hackery.
56 #ifdef HAVE_KERNEL_OPTION_HEADERS
60 #include <dev/sound/pcm/sound.h>
61 #include <dev/sound/pcm/ac97.h>
63 #include <dev/pci/pcireg.h>
64 #include <dev/pci/pcivar.h>
65 #include <sys/sysctl.h>
66 #include <sys/endian.h>
68 #include <dev/sound/pci/atiixp.h>
70 SND_DECLARE_FILE("$FreeBSD$");
72 #define ATI_IXP_DMA_RETRY_MAX 100
74 #define ATI_IXP_BUFSZ_MIN 4096
75 #define ATI_IXP_BUFSZ_MAX 65536
76 #define ATI_IXP_BUFSZ_DEFAULT 16384
78 #define ATI_IXP_BLK_MIN 32
79 #define ATI_IXP_BLK_ALIGN (~(ATI_IXP_BLK_MIN - 1))
81 #define ATI_IXP_CHN_RUNNING 0x00000001
82 #define ATI_IXP_CHN_SUSPEND 0x00000002
84 struct atiixp_dma_op {
85 volatile uint32_t addr;
86 volatile uint16_t status;
87 volatile uint16_t size;
88 volatile uint32_t next;
93 struct atiixp_chinfo {
94 struct snd_dbuf *buffer;
95 struct pcm_channel *channel;
96 struct atiixp_info *parent;
97 struct atiixp_dma_op *sgd_table;
99 uint32_t enable_bit, flush_bit, linkptr_bit, dt_cur_bit;
100 uint32_t blksz, blkcnt;
101 uint32_t ptr, prevptr;
111 bus_space_handle_t sh;
112 bus_dma_tag_t parent_dmat;
113 bus_dma_tag_t sgd_dmat;
114 bus_dmamap_t sgd_dmamap;
117 struct resource *reg, *irq;
118 int regtype, regid, irqid;
120 struct ac97_info *codec;
122 struct atiixp_chinfo pch;
123 struct atiixp_chinfo rch;
124 struct atiixp_dma_op *sgd_table;
125 struct intr_config_hook delayed_attach;
128 uint32_t codec_not_ready_bits, codec_idx, codec_found;
130 int registered_channels;
133 struct callout poll_timer;
134 int poll_ticks, polling;
137 #define atiixp_rd(_sc, _reg) \
138 bus_space_read_4((_sc)->st, (_sc)->sh, _reg)
139 #define atiixp_wr(_sc, _reg, _val) \
140 bus_space_write_4((_sc)->st, (_sc)->sh, _reg, _val)
142 #define atiixp_lock(_sc) snd_mtxlock((_sc)->lock)
143 #define atiixp_unlock(_sc) snd_mtxunlock((_sc)->lock)
144 #define atiixp_assert(_sc) snd_mtxassert((_sc)->lock)
146 static uint32_t atiixp_fmt_32bit[] = {
147 SND_FORMAT(AFMT_S16_LE, 2, 0),
148 SND_FORMAT(AFMT_S32_LE, 2, 0),
152 static uint32_t atiixp_fmt[] = {
153 SND_FORMAT(AFMT_S16_LE, 2, 0),
157 static struct pcmchan_caps atiixp_caps_32bit = {
163 static struct pcmchan_caps atiixp_caps = {
169 static const struct {
174 { ATI_VENDOR_ID, ATI_IXP_200_ID, "ATI IXP 200" },
175 { ATI_VENDOR_ID, ATI_IXP_300_ID, "ATI IXP 300" },
176 { ATI_VENDOR_ID, ATI_IXP_400_ID, "ATI IXP 400" },
177 { ATI_VENDOR_ID, ATI_IXP_SB600_ID, "ATI IXP SB600" },
180 static void atiixp_enable_interrupts(struct atiixp_info *);
181 static void atiixp_disable_interrupts(struct atiixp_info *);
182 static void atiixp_reset_aclink(struct atiixp_info *);
183 static void atiixp_flush_dma(struct atiixp_chinfo *);
184 static void atiixp_enable_dma(struct atiixp_chinfo *);
185 static void atiixp_disable_dma(struct atiixp_chinfo *);
187 static int atiixp_waitready_codec(struct atiixp_info *);
188 static int atiixp_rdcd(kobj_t, void *, int);
189 static int atiixp_wrcd(kobj_t, void *, int, uint32_t);
191 static void *atiixp_chan_init(kobj_t, void *, struct snd_dbuf *,
192 struct pcm_channel *, int);
193 static int atiixp_chan_setformat(kobj_t, void *, uint32_t);
194 static uint32_t atiixp_chan_setspeed(kobj_t, void *, uint32_t);
195 static int atiixp_chan_setfragments(kobj_t, void *, uint32_t, uint32_t);
196 static uint32_t atiixp_chan_setblocksize(kobj_t, void *, uint32_t);
197 static void atiixp_buildsgdt(struct atiixp_chinfo *);
198 static int atiixp_chan_trigger(kobj_t, void *, int);
199 static __inline uint32_t atiixp_dmapos(struct atiixp_chinfo *);
200 static uint32_t atiixp_chan_getptr(kobj_t, void *);
201 static struct pcmchan_caps *atiixp_chan_getcaps(kobj_t, void *);
203 static void atiixp_intr(void *);
204 static void atiixp_dma_cb(void *, bus_dma_segment_t *, int, int);
205 static void atiixp_chip_pre_init(struct atiixp_info *);
206 static void atiixp_chip_post_init(void *);
207 static void atiixp_release_resource(struct atiixp_info *);
208 static int atiixp_pci_probe(device_t);
209 static int atiixp_pci_attach(device_t);
210 static int atiixp_pci_detach(device_t);
211 static int atiixp_pci_suspend(device_t);
212 static int atiixp_pci_resume(device_t);
215 * ATI IXP helper functions
218 atiixp_enable_interrupts(struct atiixp_info *sc)
222 /* clear all pending */
223 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff);
225 /* enable all relevant interrupt sources we can handle */
226 value = atiixp_rd(sc, ATI_REG_IER);
228 value |= ATI_REG_IER_IO_STATUS_EN;
231 * Disable / ignore internal xrun/spdf interrupt flags
232 * since it doesn't interest us (for now).
235 value &= ~(ATI_REG_IER_IN_XRUN_EN | ATI_REG_IER_OUT_XRUN_EN |
236 ATI_REG_IER_SPDF_XRUN_EN | ATI_REG_IER_SPDF_STATUS_EN);
238 value |= ATI_REG_IER_IN_XRUN_EN;
239 value |= ATI_REG_IER_OUT_XRUN_EN;
241 value |= ATI_REG_IER_SPDF_XRUN_EN;
242 value |= ATI_REG_IER_SPDF_STATUS_EN;
245 atiixp_wr(sc, ATI_REG_IER, value);
249 atiixp_disable_interrupts(struct atiixp_info *sc)
251 /* disable all interrupt sources */
252 atiixp_wr(sc, ATI_REG_IER, 0);
254 /* clear all pending */
255 atiixp_wr(sc, ATI_REG_ISR, 0xffffffff);
259 atiixp_reset_aclink(struct atiixp_info *sc)
261 uint32_t value, timeout;
263 /* if power is down, power it up */
264 value = atiixp_rd(sc, ATI_REG_CMD);
265 if (value & ATI_REG_CMD_POWERDOWN) {
266 /* explicitly enable power */
267 value &= ~ATI_REG_CMD_POWERDOWN;
268 atiixp_wr(sc, ATI_REG_CMD, value);
270 /* have to wait at least 10 usec for it to initialise */
274 /* perform a soft reset */
275 value = atiixp_rd(sc, ATI_REG_CMD);
276 value |= ATI_REG_CMD_AC_SOFT_RESET;
277 atiixp_wr(sc, ATI_REG_CMD, value);
279 /* need to read the CMD reg and wait aprox. 10 usec to init */
280 value = atiixp_rd(sc, ATI_REG_CMD);
283 /* clear soft reset flag again */
284 value = atiixp_rd(sc, ATI_REG_CMD);
285 value &= ~ATI_REG_CMD_AC_SOFT_RESET;
286 atiixp_wr(sc, ATI_REG_CMD, value);
288 /* check if the ac-link is working; reset device otherwise */
290 value = atiixp_rd(sc, ATI_REG_CMD);
291 while (!(value & ATI_REG_CMD_ACLINK_ACTIVE) && --timeout) {
293 device_printf(sc->dev, "not up; resetting aclink hardware\n");
296 /* dip aclink reset but keep the acsync */
297 value &= ~ATI_REG_CMD_AC_RESET;
298 value |= ATI_REG_CMD_AC_SYNC;
299 atiixp_wr(sc, ATI_REG_CMD, value);
301 /* need to read CMD again and wait again (clocking in issue?) */
302 value = atiixp_rd(sc, ATI_REG_CMD);
305 /* assert aclink reset again */
306 value = atiixp_rd(sc, ATI_REG_CMD);
307 value |= ATI_REG_CMD_AC_RESET;
308 atiixp_wr(sc, ATI_REG_CMD, value);
310 /* check if its active now */
311 value = atiixp_rd(sc, ATI_REG_CMD);
315 device_printf(sc->dev, "giving up aclink reset\n");
318 device_printf(sc->dev, "aclink hardware reset successful\n");
321 /* assert reset and sync for safety */
322 value = atiixp_rd(sc, ATI_REG_CMD);
323 value |= ATI_REG_CMD_AC_SYNC | ATI_REG_CMD_AC_RESET;
324 atiixp_wr(sc, ATI_REG_CMD, value);
328 atiixp_flush_dma(struct atiixp_chinfo *ch)
330 atiixp_wr(ch->parent, ATI_REG_FIFO_FLUSH, ch->flush_bit);
334 atiixp_enable_dma(struct atiixp_chinfo *ch)
338 value = atiixp_rd(ch->parent, ATI_REG_CMD);
339 if (!(value & ch->enable_bit)) {
340 value |= ch->enable_bit;
341 atiixp_wr(ch->parent, ATI_REG_CMD, value);
346 atiixp_disable_dma(struct atiixp_chinfo *ch)
350 value = atiixp_rd(ch->parent, ATI_REG_CMD);
351 if (value & ch->enable_bit) {
352 value &= ~ch->enable_bit;
353 atiixp_wr(ch->parent, ATI_REG_CMD, value);
361 atiixp_waitready_codec(struct atiixp_info *sc)
366 if ((atiixp_rd(sc, ATI_REG_PHYS_OUT_ADDR) &
367 ATI_REG_PHYS_OUT_ADDR_EN) == 0)
376 atiixp_rdcd(kobj_t obj, void *devinfo, int reg)
378 struct atiixp_info *sc = devinfo;
382 if (atiixp_waitready_codec(sc))
385 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
386 ATI_REG_PHYS_OUT_ADDR_EN | ATI_REG_PHYS_OUT_RW | sc->codec_idx;
388 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data);
390 if (atiixp_waitready_codec(sc))
395 data = atiixp_rd(sc, ATI_REG_PHYS_IN_ADDR);
396 if (data & ATI_REG_PHYS_IN_READ_FLAG)
397 return (data >> ATI_REG_PHYS_IN_DATA_SHIFT);
402 device_printf(sc->dev, "codec read timeout! (reg 0x%x)\n", reg);
408 atiixp_wrcd(kobj_t obj, void *devinfo, int reg, uint32_t data)
410 struct atiixp_info *sc = devinfo;
412 if (atiixp_waitready_codec(sc))
415 data = (data << ATI_REG_PHYS_OUT_DATA_SHIFT) |
416 (((uint32_t)reg) << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
417 ATI_REG_PHYS_OUT_ADDR_EN | sc->codec_idx;
419 atiixp_wr(sc, ATI_REG_PHYS_OUT_ADDR, data);
424 static kobj_method_t atiixp_ac97_methods[] = {
425 KOBJMETHOD(ac97_read, atiixp_rdcd),
426 KOBJMETHOD(ac97_write, atiixp_wrcd),
429 AC97_DECLARE(atiixp_ac97);
432 * Playback / Record channel interface
435 atiixp_chan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
436 struct pcm_channel *c, int dir)
438 struct atiixp_info *sc = devinfo;
439 struct atiixp_chinfo *ch;
444 if (dir == PCMDIR_PLAY) {
446 ch->linkptr_bit = ATI_REG_OUT_DMA_LINKPTR;
447 ch->enable_bit = ATI_REG_CMD_OUT_DMA_EN | ATI_REG_CMD_SEND_EN;
448 ch->flush_bit = ATI_REG_FIFO_OUT_FLUSH;
449 ch->dt_cur_bit = ATI_REG_OUT_DMA_DT_CUR;
450 /* Native 32bit playback working properly */
454 ch->linkptr_bit = ATI_REG_IN_DMA_LINKPTR;
455 ch->enable_bit = ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_RECEIVE_EN;
456 ch->flush_bit = ATI_REG_FIFO_IN_FLUSH;
457 ch->dt_cur_bit = ATI_REG_IN_DMA_DT_CUR;
458 /* XXX Native 32bit recording appear to be broken */
466 ch->blkcnt = sc->blkcnt;
467 ch->blksz = sc->bufsz / ch->blkcnt;
471 if (sndbuf_alloc(ch->buffer, sc->parent_dmat, 0, sc->bufsz) == -1)
475 num = sc->registered_channels++;
476 ch->sgd_table = &sc->sgd_table[num * ATI_IXP_DMA_CHSEGS_MAX];
477 ch->sgd_addr = sc->sgd_addr + (num * ATI_IXP_DMA_CHSEGS_MAX *
478 sizeof(struct atiixp_dma_op));
479 atiixp_disable_dma(ch);
486 atiixp_chan_setformat(kobj_t obj, void *data, uint32_t format)
488 struct atiixp_chinfo *ch = data;
489 struct atiixp_info *sc = ch->parent;
493 if (ch->dir == PCMDIR_REC) {
494 value = atiixp_rd(sc, ATI_REG_CMD);
495 value &= ~ATI_REG_CMD_INTERLEAVE_IN;
496 if ((format & AFMT_32BIT) == 0)
497 value |= ATI_REG_CMD_INTERLEAVE_IN;
498 atiixp_wr(sc, ATI_REG_CMD, value);
500 value = atiixp_rd(sc, ATI_REG_OUT_DMA_SLOT);
501 value &= ~ATI_REG_OUT_DMA_SLOT_MASK;
502 /* We do not have support for more than 2 channels, _yet_. */
503 value |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
504 ATI_REG_OUT_DMA_SLOT_BIT(4);
505 value |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
506 atiixp_wr(sc, ATI_REG_OUT_DMA_SLOT, value);
507 value = atiixp_rd(sc, ATI_REG_CMD);
508 value &= ~ATI_REG_CMD_INTERLEAVE_OUT;
509 if ((format & AFMT_32BIT) == 0)
510 value |= ATI_REG_CMD_INTERLEAVE_OUT;
511 atiixp_wr(sc, ATI_REG_CMD, value);
512 value = atiixp_rd(sc, ATI_REG_6CH_REORDER);
513 value &= ~ATI_REG_6CH_REORDER_EN;
514 atiixp_wr(sc, ATI_REG_6CH_REORDER, value);
523 atiixp_chan_setspeed(kobj_t obj, void *data, uint32_t spd)
525 /* XXX We're supposed to do VRA/DRA processing right here */
526 return (ATI_IXP_BASE_RATE);
530 atiixp_chan_setfragments(kobj_t obj, void *data,
531 uint32_t blksz, uint32_t blkcnt)
533 struct atiixp_chinfo *ch = data;
534 struct atiixp_info *sc = ch->parent;
536 blksz &= ATI_IXP_BLK_ALIGN;
538 if (blksz > (sndbuf_getmaxsize(ch->buffer) / ATI_IXP_DMA_CHSEGS_MIN))
539 blksz = sndbuf_getmaxsize(ch->buffer) / ATI_IXP_DMA_CHSEGS_MIN;
540 if (blksz < ATI_IXP_BLK_MIN)
541 blksz = ATI_IXP_BLK_MIN;
542 if (blkcnt > ATI_IXP_DMA_CHSEGS_MAX)
543 blkcnt = ATI_IXP_DMA_CHSEGS_MAX;
544 if (blkcnt < ATI_IXP_DMA_CHSEGS_MIN)
545 blkcnt = ATI_IXP_DMA_CHSEGS_MIN;
547 while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->buffer)) {
548 if ((blkcnt >> 1) >= ATI_IXP_DMA_CHSEGS_MIN)
550 else if ((blksz >> 1) >= ATI_IXP_BLK_MIN)
556 if ((sndbuf_getblksz(ch->buffer) != blksz ||
557 sndbuf_getblkcnt(ch->buffer) != blkcnt) &&
558 sndbuf_resize(ch->buffer, blkcnt, blksz) != 0)
559 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
560 __func__, blksz, blkcnt);
562 ch->blksz = sndbuf_getblksz(ch->buffer);
563 ch->blkcnt = sndbuf_getblkcnt(ch->buffer);
569 atiixp_chan_setblocksize(kobj_t obj, void *data, uint32_t blksz)
571 struct atiixp_chinfo *ch = data;
572 struct atiixp_info *sc = ch->parent;
574 atiixp_chan_setfragments(obj, data, blksz, sc->blkcnt);
580 atiixp_buildsgdt(struct atiixp_chinfo *ch)
582 struct atiixp_info *sc = ch->parent;
583 uint32_t addr, blksz, blkcnt;
586 addr = sndbuf_getbufaddr(ch->buffer);
588 if (sc->polling != 0) {
589 blksz = ch->blksz * ch->blkcnt;
596 for (i = 0; i < blkcnt; i++) {
597 ch->sgd_table[i].addr = htole32(addr + (i * blksz));
598 ch->sgd_table[i].status = htole16(0);
599 ch->sgd_table[i].size = htole16(blksz >> 2);
600 ch->sgd_table[i].next = htole32((uint32_t)ch->sgd_addr +
601 (((i + 1) % blkcnt) * sizeof(struct atiixp_dma_op)));
605 static __inline uint32_t
606 atiixp_dmapos(struct atiixp_chinfo *ch)
608 struct atiixp_info *sc = ch->parent;
609 uint32_t reg, addr, sz, retry;
610 volatile uint32_t ptr;
612 reg = ch->dt_cur_bit;
613 addr = sndbuf_getbufaddr(ch->buffer);
614 sz = ch->blkcnt * ch->blksz;
615 retry = ATI_IXP_DMA_RETRY_MAX;
618 ptr = atiixp_rd(sc, reg);
625 if ((ptr & ~(ch->blksz - 1)) != ch->ptr) {
628 delta = (sz + ptr - ch->prevptr) % sz;
629 #ifndef ATI_IXP_DEBUG_VERBOSE
630 if (delta < ch->blksz)
632 device_printf(sc->dev,
633 "PCMDIR_%s: incoherent DMA "
636 "[delta=%u != blksz=%u] "
638 (ch->dir == PCMDIR_PLAY) ?
643 (delta < ch->blksz) ?
644 "OVERLAPPED!" : "Ok");
645 ch->ptr = ptr & ~(ch->blksz - 1);
654 device_printf(sc->dev, "PCMDIR_%s: invalid DMA pointer ptr=%u\n",
655 (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", ptr);
661 atiixp_poll_channel(struct atiixp_chinfo *ch)
664 volatile uint32_t ptr;
666 if (!(ch->flags & ATI_IXP_CHN_RUNNING))
669 sz = ch->blksz * ch->blkcnt;
670 ptr = atiixp_dmapos(ch);
673 ptr &= ~(ch->blksz - 1);
674 delta = (sz + ptr - ch->prevptr) % sz;
676 if (delta < ch->blksz)
684 #define atiixp_chan_active(sc) (((sc)->pch.flags | (sc)->rch.flags) & \
688 atiixp_poll_callback(void *arg)
690 struct atiixp_info *sc = arg;
691 uint32_t trigger = 0;
697 if (sc->polling == 0 || atiixp_chan_active(sc) == 0) {
702 trigger |= (atiixp_poll_channel(&sc->pch) != 0) ? 1 : 0;
703 trigger |= (atiixp_poll_channel(&sc->rch) != 0) ? 2 : 0;
706 callout_reset(&sc->poll_timer, 1/*sc->poll_ticks*/,
707 atiixp_poll_callback, sc);
712 chn_intr(sc->pch.channel);
714 chn_intr(sc->rch.channel);
718 atiixp_chan_trigger(kobj_t obj, void *data, int go)
720 struct atiixp_chinfo *ch = data;
721 struct atiixp_info *sc = ch->parent;
725 if (!PCMTRIG_COMMON(go))
732 atiixp_flush_dma(ch);
733 atiixp_buildsgdt(ch);
734 atiixp_wr(sc, ch->linkptr_bit, 0);
735 atiixp_enable_dma(ch);
736 atiixp_wr(sc, ch->linkptr_bit,
737 (uint32_t)ch->sgd_addr | ATI_REG_LINKPTR_EN);
738 if (sc->polling != 0) {
741 pollticks = ((uint64_t)hz * ch->blksz) /
742 ((uint64_t)sndbuf_getalign(ch->buffer) *
743 sndbuf_getspd(ch->buffer));
749 if (atiixp_chan_active(sc) == 0 ||
750 pollticks < sc->poll_ticks) {
752 if (atiixp_chan_active(sc) == 0)
753 device_printf(sc->dev,
754 "%s: pollticks=%d\n",
755 __func__, pollticks);
757 device_printf(sc->dev,
758 "%s: pollticks %d -> %d\n",
759 __func__, sc->poll_ticks,
762 sc->poll_ticks = pollticks;
763 callout_reset(&sc->poll_timer, 1,
764 atiixp_poll_callback, sc);
767 ch->flags |= ATI_IXP_CHN_RUNNING;
771 atiixp_disable_dma(ch);
772 atiixp_flush_dma(ch);
773 ch->flags &= ~ATI_IXP_CHN_RUNNING;
774 if (sc->polling != 0) {
775 if (atiixp_chan_active(sc) == 0) {
776 callout_stop(&sc->poll_timer);
779 if (sc->pch.flags & ATI_IXP_CHN_RUNNING)
783 pollticks = ((uint64_t)hz * ch->blksz) /
784 ((uint64_t)sndbuf_getalign(ch->buffer) *
785 sndbuf_getspd(ch->buffer));
791 if (pollticks > sc->poll_ticks) {
793 device_printf(sc->dev,
794 "%s: pollticks %d -> %d\n",
795 __func__, sc->poll_ticks,
797 sc->poll_ticks = pollticks;
798 callout_reset(&sc->poll_timer,
799 1, atiixp_poll_callback,
811 /* Update bus busy status */
812 value = atiixp_rd(sc, ATI_REG_IER);
813 if (atiixp_rd(sc, ATI_REG_CMD) & (ATI_REG_CMD_SEND_EN |
814 ATI_REG_CMD_RECEIVE_EN | ATI_REG_CMD_SPDF_OUT_EN))
815 value |= ATI_REG_IER_SET_BUS_BUSY;
817 value &= ~ATI_REG_IER_SET_BUS_BUSY;
818 atiixp_wr(sc, ATI_REG_IER, value);
826 atiixp_chan_getptr(kobj_t obj, void *data)
828 struct atiixp_chinfo *ch = data;
829 struct atiixp_info *sc = ch->parent;
833 if (sc->polling != 0)
836 ptr = atiixp_dmapos(ch);
842 static struct pcmchan_caps *
843 atiixp_chan_getcaps(kobj_t obj, void *data)
845 struct atiixp_chinfo *ch = data;
848 return (&atiixp_caps_32bit);
849 return (&atiixp_caps);
852 static kobj_method_t atiixp_chan_methods[] = {
853 KOBJMETHOD(channel_init, atiixp_chan_init),
854 KOBJMETHOD(channel_setformat, atiixp_chan_setformat),
855 KOBJMETHOD(channel_setspeed, atiixp_chan_setspeed),
856 KOBJMETHOD(channel_setblocksize, atiixp_chan_setblocksize),
857 KOBJMETHOD(channel_setfragments, atiixp_chan_setfragments),
858 KOBJMETHOD(channel_trigger, atiixp_chan_trigger),
859 KOBJMETHOD(channel_getptr, atiixp_chan_getptr),
860 KOBJMETHOD(channel_getcaps, atiixp_chan_getcaps),
863 CHANNEL_DECLARE(atiixp_chan);
866 * PCI driver interface
871 struct atiixp_info *sc = p;
872 uint32_t status, enable, detected_codecs;
873 uint32_t trigger = 0;
876 if (sc->polling != 0) {
880 status = atiixp_rd(sc, ATI_REG_ISR);
887 if ((status & ATI_REG_ISR_OUT_STATUS) &&
888 (sc->pch.flags & ATI_IXP_CHN_RUNNING))
890 if ((status & ATI_REG_ISR_IN_STATUS) &&
891 (sc->rch.flags & ATI_IXP_CHN_RUNNING))
895 if (status & ATI_REG_ISR_IN_XRUN) {
896 device_printf(sc->dev,
897 "Recieve IN XRUN interrupt\n");
899 if (status & ATI_REG_ISR_OUT_XRUN) {
900 device_printf(sc->dev,
901 "Recieve OUT XRUN interrupt\n");
905 if (status & CODEC_CHECK_BITS) {
906 /* mark missing codecs as not ready */
907 detected_codecs = status & CODEC_CHECK_BITS;
908 sc->codec_not_ready_bits |= detected_codecs;
910 /* disable detected interrupt sources */
911 enable = atiixp_rd(sc, ATI_REG_IER);
912 enable &= ~detected_codecs;
913 atiixp_wr(sc, ATI_REG_IER, enable);
918 atiixp_wr(sc, ATI_REG_ISR, status);
922 chn_intr(sc->pch.channel);
924 chn_intr(sc->rch.channel);
928 atiixp_dma_cb(void *p, bus_dma_segment_t *bds, int a, int b)
930 struct atiixp_info *sc = (struct atiixp_info *)p;
931 sc->sgd_addr = bds->ds_addr;
935 atiixp_chip_pre_init(struct atiixp_info *sc)
941 /* disable interrupts */
942 atiixp_disable_interrupts(sc);
944 /* clear all DMA enables (preserving rest of settings) */
945 value = atiixp_rd(sc, ATI_REG_CMD);
946 value &= ~(ATI_REG_CMD_IN_DMA_EN | ATI_REG_CMD_OUT_DMA_EN |
947 ATI_REG_CMD_SPDF_OUT_EN );
948 atiixp_wr(sc, ATI_REG_CMD, value);
951 atiixp_reset_aclink(sc);
953 sc->codec_not_ready_bits = 0;
955 /* enable all codecs to interrupt as well as the new frame interrupt */
956 atiixp_wr(sc, ATI_REG_IER, CODEC_CHECK_BITS);
962 sysctl_atiixp_polling(SYSCTL_HANDLER_ARGS)
964 struct atiixp_info *sc;
968 dev = oidp->oid_arg1;
969 sc = pcm_getdevinfo(dev);
975 err = sysctl_handle_int(oidp, &val, 0, req);
977 if (err || req->newptr == NULL)
979 if (val < 0 || val > 1)
983 if (val != sc->polling) {
984 if (atiixp_chan_active(sc) != 0)
987 atiixp_enable_interrupts(sc);
991 atiixp_disable_interrupts(sc);
1002 atiixp_chip_post_init(void *arg)
1004 struct atiixp_info *sc = (struct atiixp_info *)arg;
1006 int i, timeout, found, polling;
1007 char status[SND_STATUSLEN];
1011 if (sc->delayed_attach.ich_func) {
1012 config_intrhook_disestablish(&sc->delayed_attach);
1013 sc->delayed_attach.ich_func = NULL;
1016 polling = sc->polling;
1020 if (sc->codec_not_ready_bits == 0) {
1021 /* wait for the interrupts to happen */
1023 msleep(sc, sc->lock, PWAIT, "ixpslp", max(hz / 10, 1));
1024 if (sc->codec_not_ready_bits != 0)
1026 } while (--timeout);
1029 sc->polling = polling;
1030 atiixp_disable_interrupts(sc);
1032 if (sc->codec_not_ready_bits == 0 && timeout == 0) {
1033 device_printf(sc->dev,
1034 "WARNING: timeout during codec detection; "
1035 "codecs might be present but haven't interrupted\n");
1043 * ATI IXP can have upto 3 codecs, but single codec should be
1046 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC0_NOT_READY)) {
1047 /* codec 0 present */
1053 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC1_NOT_READY)) {
1054 /* codec 1 present */
1058 if (!(sc->codec_not_ready_bits & ATI_REG_ISR_CODEC2_NOT_READY)) {
1059 /* codec 2 present */
1068 /* create/init mixer */
1069 sc->codec = AC97_CREATE(sc->dev, sc, atiixp_ac97);
1070 if (sc->codec == NULL)
1073 subdev = (pci_get_subdevice(sc->dev) << 16) |
1074 pci_get_subvendor(sc->dev);
1076 case 0x11831043: /* ASUS A6R */
1077 case 0x2043161f: /* Maxselect x710s - http://maxselect.ru/ */
1078 ac97_setflags(sc->codec, ac97_getflags(sc->codec) |
1085 mixer_init(sc->dev, ac97_getmixerclass(), sc->codec);
1087 if (pcm_register(sc->dev, sc, ATI_IXP_NPCHAN, ATI_IXP_NRCHAN))
1090 for (i = 0; i < ATI_IXP_NPCHAN; i++)
1091 pcm_addchan(sc->dev, PCMDIR_PLAY, &atiixp_chan_class, sc);
1092 for (i = 0; i < ATI_IXP_NRCHAN; i++)
1093 pcm_addchan(sc->dev, PCMDIR_REC, &atiixp_chan_class, sc);
1095 SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
1096 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
1097 "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
1098 sysctl_atiixp_polling, "I", "Enable polling mode");
1100 snprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s",
1101 rman_get_start(sc->reg), rman_get_start(sc->irq),
1102 PCM_KLDSTRING(snd_atiixp));
1104 pcm_setstatus(sc->dev, status);
1107 if (sc->polling == 0)
1108 atiixp_enable_interrupts(sc);
1114 atiixp_release_resource(sc);
1118 atiixp_release_resource(struct atiixp_info *sc)
1122 if (sc->registered_channels != 0) {
1125 callout_stop(&sc->poll_timer);
1127 callout_drain(&sc->poll_timer);
1130 ac97_destroy(sc->codec);
1134 bus_teardown_intr(sc->dev, sc->irq, sc->ih);
1138 bus_release_resource(sc->dev, sc->regtype, sc->regid, sc->reg);
1142 bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irqid, sc->irq);
1145 if (sc->parent_dmat) {
1146 bus_dma_tag_destroy(sc->parent_dmat);
1147 sc->parent_dmat = NULL;
1150 bus_dmamap_unload(sc->sgd_dmat, sc->sgd_dmamap);
1151 if (sc->sgd_table) {
1152 bus_dmamem_free(sc->sgd_dmat, sc->sgd_table, sc->sgd_dmamap);
1153 sc->sgd_table = NULL;
1155 sc->sgd_dmamap = NULL;
1157 bus_dma_tag_destroy(sc->sgd_dmat);
1158 sc->sgd_dmat = NULL;
1161 snd_mtxfree(sc->lock);
1168 atiixp_pci_probe(device_t dev)
1171 uint16_t devid, vendor;
1173 vendor = pci_get_vendor(dev);
1174 devid = pci_get_device(dev);
1175 for (i = 0; i < sizeof(atiixp_hw) / sizeof(atiixp_hw[0]); i++) {
1176 if (vendor == atiixp_hw[i].vendor &&
1177 devid == atiixp_hw[i].devid) {
1178 device_set_desc(dev, atiixp_hw[i].desc);
1179 return (BUS_PROBE_DEFAULT);
1187 atiixp_pci_attach(device_t dev)
1189 struct atiixp_info *sc;
1192 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
1193 sc->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_atiixp softc");
1196 callout_init(&sc->poll_timer, CALLOUT_MPSAFE);
1199 if (resource_int_value(device_get_name(sc->dev),
1200 device_get_unit(sc->dev), "polling", &i) == 0 && i != 0)
1205 pci_enable_busmaster(dev);
1207 sc->regid = PCIR_BAR(0);
1208 sc->regtype = SYS_RES_MEMORY;
1209 sc->reg = bus_alloc_resource_any(dev, sc->regtype,
1210 &sc->regid, RF_ACTIVE);
1213 device_printf(dev, "unable to allocate register space\n");
1217 sc->st = rman_get_bustag(sc->reg);
1218 sc->sh = rman_get_bushandle(sc->reg);
1220 sc->bufsz = pcm_getbuffersize(dev, ATI_IXP_BUFSZ_MIN,
1221 ATI_IXP_BUFSZ_DEFAULT, ATI_IXP_BUFSZ_MAX);
1224 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
1225 RF_ACTIVE | RF_SHAREABLE);
1226 if (!sc->irq || snd_setup_intr(dev, sc->irq, INTR_MPSAFE,
1227 atiixp_intr, sc, &sc->ih)) {
1228 device_printf(dev, "unable to map interrupt\n");
1233 * Let the user choose the best DMA segments.
1235 if (resource_int_value(device_get_name(dev),
1236 device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
1237 i &= ATI_IXP_BLK_ALIGN;
1238 if (i < ATI_IXP_BLK_MIN)
1239 i = ATI_IXP_BLK_MIN;
1240 sc->blkcnt = sc->bufsz / i;
1242 while (sc->blkcnt >> i)
1244 sc->blkcnt = 1 << (i - 1);
1245 if (sc->blkcnt < ATI_IXP_DMA_CHSEGS_MIN)
1246 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MIN;
1247 else if (sc->blkcnt > ATI_IXP_DMA_CHSEGS_MAX)
1248 sc->blkcnt = ATI_IXP_DMA_CHSEGS_MAX;
1251 sc->blkcnt = ATI_IXP_DMA_CHSEGS;
1254 * DMA tag for scatter-gather buffers and link pointers
1256 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
1258 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1259 /*highaddr*/BUS_SPACE_MAXADDR,
1260 /*filter*/NULL, /*filterarg*/NULL,
1261 /*maxsize*/sc->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
1262 /*flags*/0, /*lockfunc*/NULL,
1263 /*lockarg*/NULL, &sc->parent_dmat) != 0) {
1264 device_printf(dev, "unable to create dma tag\n");
1268 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
1270 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
1271 /*highaddr*/BUS_SPACE_MAXADDR,
1272 /*filter*/NULL, /*filterarg*/NULL,
1273 /*maxsize*/ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS *
1274 sizeof(struct atiixp_dma_op),
1275 /*nsegments*/1, /*maxsegz*/0x3ffff,
1276 /*flags*/0, /*lockfunc*/NULL,
1277 /*lockarg*/NULL, &sc->sgd_dmat) != 0) {
1278 device_printf(dev, "unable to create dma tag\n");
1282 if (bus_dmamem_alloc(sc->sgd_dmat, (void **)&sc->sgd_table,
1283 BUS_DMA_NOWAIT, &sc->sgd_dmamap) == -1)
1286 if (bus_dmamap_load(sc->sgd_dmat, sc->sgd_dmamap, sc->sgd_table,
1287 ATI_IXP_DMA_CHSEGS_MAX * ATI_IXP_NCHANS *
1288 sizeof(struct atiixp_dma_op), atiixp_dma_cb, sc, 0))
1292 atiixp_chip_pre_init(sc);
1294 sc->delayed_attach.ich_func = atiixp_chip_post_init;
1295 sc->delayed_attach.ich_arg = sc;
1297 config_intrhook_establish(&sc->delayed_attach) != 0) {
1298 sc->delayed_attach.ich_func = NULL;
1299 atiixp_chip_post_init(sc);
1305 atiixp_release_resource(sc);
1310 atiixp_pci_detach(device_t dev)
1313 struct atiixp_info *sc;
1315 sc = pcm_getdevinfo(dev);
1317 if (sc->codec != NULL) {
1318 r = pcm_unregister(dev);
1323 if (sc->st != 0 && sc->sh != 0)
1324 atiixp_disable_interrupts(sc);
1325 atiixp_release_resource(sc);
1331 atiixp_pci_suspend(device_t dev)
1333 struct atiixp_info *sc = pcm_getdevinfo(dev);
1336 /* quickly disable interrupts and save channels active state */
1338 atiixp_disable_interrupts(sc);
1341 /* stop everything */
1342 if (sc->pch.flags & ATI_IXP_CHN_RUNNING) {
1343 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_STOP);
1344 sc->pch.flags |= ATI_IXP_CHN_SUSPEND;
1346 if (sc->rch.flags & ATI_IXP_CHN_RUNNING) {
1347 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_STOP);
1348 sc->rch.flags |= ATI_IXP_CHN_SUSPEND;
1351 /* power down aclink and pci bus */
1353 value = atiixp_rd(sc, ATI_REG_CMD);
1354 value |= ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET;
1355 atiixp_wr(sc, ATI_REG_CMD, ATI_REG_CMD_POWERDOWN);
1362 atiixp_pci_resume(device_t dev)
1364 struct atiixp_info *sc = pcm_getdevinfo(dev);
1367 /* reset / power up aclink */
1368 atiixp_reset_aclink(sc);
1371 if (mixer_reinit(dev) == -1) {
1372 device_printf(dev, "unable to reinitialize the mixer\n");
1377 * Resume channel activities. Reset channel format regardless
1378 * of its previous state.
1380 if (sc->pch.channel != NULL) {
1381 if (sc->pch.fmt != 0)
1382 atiixp_chan_setformat(NULL, &sc->pch, sc->pch.fmt);
1383 if (sc->pch.flags & ATI_IXP_CHN_SUSPEND) {
1384 sc->pch.flags &= ~ATI_IXP_CHN_SUSPEND;
1385 atiixp_chan_trigger(NULL, &sc->pch, PCMTRIG_START);
1388 if (sc->rch.channel != NULL) {
1389 if (sc->rch.fmt != 0)
1390 atiixp_chan_setformat(NULL, &sc->rch, sc->rch.fmt);
1391 if (sc->rch.flags & ATI_IXP_CHN_SUSPEND) {
1392 sc->rch.flags &= ~ATI_IXP_CHN_SUSPEND;
1393 atiixp_chan_trigger(NULL, &sc->rch, PCMTRIG_START);
1397 /* enable interrupts */
1399 if (sc->polling == 0)
1400 atiixp_enable_interrupts(sc);
1406 static device_method_t atiixp_methods[] = {
1407 DEVMETHOD(device_probe, atiixp_pci_probe),
1408 DEVMETHOD(device_attach, atiixp_pci_attach),
1409 DEVMETHOD(device_detach, atiixp_pci_detach),
1410 DEVMETHOD(device_suspend, atiixp_pci_suspend),
1411 DEVMETHOD(device_resume, atiixp_pci_resume),
1415 static driver_t atiixp_driver = {
1421 DRIVER_MODULE(snd_atiixp, pci, atiixp_driver, pcm_devclass, 0, 0);
1422 MODULE_DEPEND(snd_atiixp, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
1423 MODULE_VERSION(snd_atiixp, 1);