sys/dev/sound/pci/hda/hda_reg.h

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef _HDA_REG_H_
  30 #define _HDA_REG_H_
  31
  32 /****************************************************************************
  33  * HDA Device Verbs
  34  ****************************************************************************/
  35
  36 /* HDA Command */
  37 #define HDA_CMD_VERB_MASK                               0x000fffff
  38 #define HDA_CMD_VERB_SHIFT                              0
  39 #define HDA_CMD_NID_MASK                                0x0ff00000
  40 #define HDA_CMD_NID_SHIFT                               20
  41 #define HDA_CMD_CAD_MASK                                0xf0000000
  42 #define HDA_CMD_CAD_SHIFT                               28
  43
  44 #define HDA_CMD_VERB_4BIT_SHIFT                         16
  45 #define HDA_CMD_VERB_12BIT_SHIFT                        8
  46
  47 #define HDA_CMD_VERB_4BIT(verb, payload)                                \
  48     (((verb) << HDA_CMD_VERB_4BIT_SHIFT) | (payload))
  49 #define HDA_CMD_4BIT(cad, nid, verb, payload)                           \
  50     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  51     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  52     (HDA_CMD_VERB_4BIT((verb), (payload))))
  53
  54 #define HDA_CMD_VERB_12BIT(verb, payload)                               \
  55     (((verb) << HDA_CMD_VERB_12BIT_SHIFT) | (payload))
  56 #define HDA_CMD_12BIT(cad, nid, verb, payload)                          \
  57     (((cad) << HDA_CMD_CAD_SHIFT) |                                     \
  58     ((nid) << HDA_CMD_NID_SHIFT) |                                      \
  59     (HDA_CMD_VERB_12BIT((verb), (payload))))
  60
  61 /* Get Parameter */
  62 #define HDA_CMD_VERB_GET_PARAMETER                      0xf00
  63
  64 #define HDA_CMD_GET_PARAMETER(cad, nid, payload)                        \
  65     (HDA_CMD_12BIT((cad), (nid),                                        \
  66     HDA_CMD_VERB_GET_PARAMETER, (payload)))
  67
  68 /* Connection Select Control */
  69 #define HDA_CMD_VERB_GET_CONN_SELECT_CONTROL            0xf01
  70 #define HDA_CMD_VERB_SET_CONN_SELECT_CONTROL            0x701
  71
  72 #define HDA_CMD_GET_CONN_SELECT_CONTROL(cad, nid)                       \
  73     (HDA_CMD_12BIT((cad), (nid),                                        \
  74     HDA_CMD_VERB_GET_CONN_SELECT_CONTROL, 0x0))
  75 #define HDA_CMD_SET_CONNECTION_SELECT_CONTROL(cad, nid, payload)        \
  76     (HDA_CMD_12BIT((cad), (nid),                                        \
  77     HDA_CMD_VERB_SET_CONN_SELECT_CONTROL, (payload)))
  78
  79 /* Connection List Entry */
  80 #define HDA_CMD_VERB_GET_CONN_LIST_ENTRY                0xf02
  81
  82 #define HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, payload)                  \
  83     (HDA_CMD_12BIT((cad), (nid),                                        \
  84     HDA_CMD_VERB_GET_CONN_LIST_ENTRY, (payload)))
  85
  86 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_SHORT          1
  87 #define HDA_CMD_GET_CONN_LIST_ENTRY_SIZE_LONG           2
  88
  89 /* Processing State */
  90 #define HDA_CMD_VERB_GET_PROCESSING_STATE               0xf03
  91 #define HDA_CMD_VERB_SET_PROCESSING_STATE               0x703
  92
  93 #define HDA_CMD_GET_PROCESSING_STATE(cad, nid)                          \
  94     (HDA_CMD_12BIT((cad), (nid),                                        \
  95     HDA_CMD_VERB_GET_PROCESSING_STATE, 0x0))
  96 #define HDA_CMD_SET_PROCESSING_STATE(cad, nid, payload)                 \
  97     (HDA_CMD_12BIT((cad), (nid),                                        \
  98     HDA_CMD_VERB_SET_PROCESSING_STATE, (payload)))
  99
 100 #define HDA_CMD_GET_PROCESSING_STATE_STATE_OFF          0x00
 101 #define HDA_CMD_GET_PROCESSING_STATE_STATE_ON           0x01
 102 #define HDA_CMD_GET_PROCESSING_STATE_STATE_BENIGN       0x02
 103
 104 /* Coefficient Index */
 105 #define HDA_CMD_VERB_GET_COEFF_INDEX                    0xd
 106 #define HDA_CMD_VERB_SET_COEFF_INDEX                    0x5
 107
 108 #define HDA_CMD_GET_COEFF_INDEX(cad, nid)                               \
 109     (HDA_CMD_4BIT((cad), (nid),                                         \
 110     HDA_CMD_VERB_GET_COEFF_INDEX, 0x0))
 111 #define HDA_CMD_SET_COEFF_INDEX(cad, nid, payload)                      \
 112     (HDA_CMD_4BIT((cad), (nid),                                         \
 113     HDA_CMD_VERB_SET_COEFF_INDEX, (payload)))
 114
 115 /* Processing Coefficient */
 116 #define HDA_CMD_VERB_GET_PROCESSING_COEFF               0xc
 117 #define HDA_CMD_VERB_SET_PROCESSING_COEFF               0x4
 118
 119 #define HDA_CMD_GET_PROCESSING_COEFF(cad, nid)                          \
 120     (HDA_CMD_4BIT((cad), (nid),                                         \
 121     HDA_CMD_VERB_GET_PROCESSING_COEFF, 0x0))
 122 #define HDA_CMD_SET_PROCESSING_COEFF(cad, nid, payload)                 \
 123     (HDA_CMD_4BIT((cad), (nid),                                         \
 124     HDA_CMD_VERB_SET_PROCESSING_COEFF, (payload)))
 125
 126 /* Amplifier Gain/Mute */
 127 #define HDA_CMD_VERB_GET_AMP_GAIN_MUTE                  0xb
 128 #define HDA_CMD_VERB_SET_AMP_GAIN_MUTE                  0x3
 129
 130 #define HDA_CMD_GET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 131     (HDA_CMD_4BIT((cad), (nid),                                         \
 132     HDA_CMD_VERB_GET_AMP_GAIN_MUTE, (payload)))
 133 #define HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, payload)                    \
 134     (HDA_CMD_4BIT((cad), (nid),                                         \
 135     HDA_CMD_VERB_SET_AMP_GAIN_MUTE, (payload)))
 136
 137 #define HDA_CMD_GET_AMP_GAIN_MUTE_INPUT         0x0000
 138 #define HDA_CMD_GET_AMP_GAIN_MUTE_OUTPUT        0x8000
 139 #define HDA_CMD_GET_AMP_GAIN_MUTE_RIGHT         0x0000
 140 #define HDA_CMD_GET_AMP_GAIN_MUTE_LEFT          0x2000
 141
 142 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK     0x00000008
 143 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT    7
 144 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK     0x00000007
 145 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 146
 147 #define HDA_CMD_GET_AMP_GAIN_MUTE_MUTE(rsp)                             \
 148     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_MASK) >>                   \
 149     HDA_CMD_GET_AMP_GAIN_MUTE_MUTE_SHIFT)
 150 #define HDA_CMD_GET_AMP_GAIN_MUTE_GAIN(rsp)                             \
 151     (((rsp) & HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_MASK) >>                   \
 152     HDA_CMD_GET_AMP_GAIN_MUTE_GAIN_SHIFT)
 153
 154 #define HDA_CMD_SET_AMP_GAIN_MUTE_OUTPUT        0x8000
 155 #define HDA_CMD_SET_AMP_GAIN_MUTE_INPUT         0x4000
 156 #define HDA_CMD_SET_AMP_GAIN_MUTE_LEFT          0x2000
 157 #define HDA_CMD_SET_AMP_GAIN_MUTE_RIGHT         0x1000
 158 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK    0x0f00
 159 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT   8
 160 #define HDA_CMD_SET_AMP_GAIN_MUTE_MUTE          0x0080
 161 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK     0x0007
 162 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT    0
 163
 164 #define HDA_CMD_SET_AMP_GAIN_MUTE_INDEX(index)                          \
 165     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_SHIFT) &               \
 166     HDA_CMD_SET_AMP_GAIN_MUTE_INDEX_MASK)
 167 #define HDA_CMD_SET_AMP_GAIN_MUTE_GAIN(index)                           \
 168     (((index) << HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_SHIFT) &                \
 169     HDA_CMD_SET_AMP_GAIN_MUTE_GAIN_MASK)
 170
 171 /* Converter format */
 172 #define HDA_CMD_VERB_GET_CONV_FMT                       0xa
 173 #define HDA_CMD_VERB_SET_CONV_FMT                       0x2
 174
 175 #define HDA_CMD_GET_CONV_FMT(cad, nid)                                  \
 176     (HDA_CMD_4BIT((cad), (nid),                                         \
 177     HDA_CMD_VERB_GET_CONV_FMT, 0x0))
 178 #define HDA_CMD_SET_CONV_FMT(cad, nid, payload)                         \
 179     (HDA_CMD_4BIT((cad), (nid),                                         \
 180     HDA_CMD_VERB_SET_CONV_FMT, (payload)))
 181
 182 /* Digital Converter Control */
 183 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1              0xf0d
 184 #define HDA_CMD_VERB_GET_DIGITAL_CONV_FMT2              0xf0e
 185 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1              0x70d
 186 #define HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2              0x70e
 187
 188 #define HDA_CMD_GET_DIGITAL_CONV_FMT(cad, nid)                          \
 189     (HDA_CMD_12BIT((cad), (nid),                                        \
 190     HDA_CMD_VERB_GET_DIGITAL_CONV_FMT1, 0x0))
 191 #define HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, nid, payload)                \
 192     (HDA_CMD_12BIT((cad), (nid),                                        \
 193     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT1, (payload)))
 194 #define HDA_CMD_SET_DIGITAL_CONV_FMT2(cad, nid, payload)                \
 195     (HDA_CMD_12BIT((cad), (nid),                                        \
 196     HDA_CMD_VERB_SET_DIGITAL_CONV_FMT2, (payload)))
 197
 198 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK            0x7f00
 199 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT           8
 200 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK             0x0080
 201 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT            7
 202 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK           0x0040
 203 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT          6
 204 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK        0x0020
 205 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT       5
 206 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK          0x0010
 207 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT         4
 208 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK           0x0008
 209 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT          3
 210 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK          0x0004
 211 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT         2
 212 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK             0x0002
 213 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT            1
 214 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK         0x0001
 215 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT        0
 216
 217 #define HDA_CMD_GET_DIGITAL_CONV_FMT_CC(rsp)                            \
 218     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_CC_MASK) >>                  \
 219     HDA_CMD_GET_DIGITAL_CONV_FMT_CC_SHIFT)
 220 #define HDA_CMD_GET_DIGITAL_CONV_FMT_L(rsp)                             \
 221     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_L_MASK) >>                   \
 222     HDA_CMD_GET_DIGITAL_CONV_FMT_L_SHIFT)
 223 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRO(rsp)                           \
 224     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_MASK) >>                 \
 225     HDA_CMD_GET_DIGITAL_CONV_FMT_PRO_SHIFT)
 226 #define HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO(rsp)                        \
 227     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_MASK) >>              \
 228     HDA_CMD_GET_DIGITAL_CONV_FMT_NAUDIO_SHIFT)
 229 #define HDA_CMD_GET_DIGITAL_CONV_FMT_COPY(rsp)                          \
 230     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_MASK) >>                \
 231     HDA_CMD_GET_DIGITAL_CONV_FMT_COPY_SHIFT)
 232 #define HDA_CMD_GET_DIGITAL_CONV_FMT_PRE(rsp)                           \
 233     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_MASK) >>                 \
 234     HDA_CMD_GET_DIGITAL_CONV_FMT_PRE_SHIFT)
 235 #define HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG(rsp)                          \
 236     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_MASK) >>                \
 237     HDA_CMD_GET_DIGITAL_CONV_FMT_VCFG_SHIFT)
 238 #define HDA_CMD_GET_DIGITAL_CONV_FMT_V(rsp)                             \
 239     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_V_MASK) >>                   \
 240     HDA_CMD_GET_DIGITAL_CONV_FMT_V_SHIFT)
 241 #define HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN(rsp)                         \
 242     (((rsp) & HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_MASK) >>               \
 243     HDA_CMD_GET_DIGITAL_CONV_FMT_DIGEN_SHIFT)
 244
 245 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_L                 0x80
 246 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRO               0x40
 247 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO            0x20
 248 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_COPY              0x10
 249 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_PRE               0x08
 250 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_VCFG              0x04
 251 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_V                 0x02
 252 #define HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN             0x01
 253
 254 /* Power State */
 255 #define HDA_CMD_VERB_GET_POWER_STATE                    0xf05
 256 #define HDA_CMD_VERB_SET_POWER_STATE                    0x705
 257
 258 #define HDA_CMD_GET_POWER_STATE(cad, nid)                               \
 259     (HDA_CMD_12BIT((cad), (nid),                                        \
 260     HDA_CMD_VERB_GET_POWER_STATE, 0x0))
 261 #define HDA_CMD_SET_POWER_STATE(cad, nid, payload)                      \
 262     (HDA_CMD_12BIT((cad), (nid),                                        \
 263     HDA_CMD_VERB_SET_POWER_STATE, (payload)))
 264
 265 #define HDA_CMD_POWER_STATE_D0                          0x00
 266 #define HDA_CMD_POWER_STATE_D1                          0x01
 267 #define HDA_CMD_POWER_STATE_D2                          0x02
 268 #define HDA_CMD_POWER_STATE_D3                          0x03
 269
 270 #define HDA_CMD_POWER_STATE_ACT_MASK                    0x000000f0
 271 #define HDA_CMD_POWER_STATE_ACT_SHIFT                   4
 272 #define HDA_CMD_POWER_STATE_SET_MASK                    0x0000000f
 273 #define HDA_CMD_POWER_STATE_SET_SHIFT                   0
 274
 275 #define HDA_CMD_GET_POWER_STATE_ACT(rsp)                                \
 276     (((rsp) & HDA_CMD_POWER_STATE_ACT_MASK) >>                          \
 277     HDA_CMD_POWER_STATE_ACT_SHIFT)
 278 #define HDA_CMD_GET_POWER_STATE_SET(rsp)                                \
 279     (((rsp) & HDA_CMD_POWER_STATE_SET_MASK) >>                          \
 280     HDA_CMD_POWER_STATE_SET_SHIFT)
 281
 282 #define HDA_CMD_SET_POWER_STATE_ACT(ps)                                 \
 283     (((ps) << HDA_CMD_POWER_STATE_ACT_SHIFT) &                          \
 284     HDA_CMD_POWER_STATE_ACT_MASK)
 285 #define HDA_CMD_SET_POWER_STATE_SET(ps)                                 \
 286     (((ps) << HDA_CMD_POWER_STATE_SET_SHIFT) &                          \
 287     HDA_CMD_POWER_STATE_ACT_MASK)
 288
 289 /* Converter Stream, Channel */
 290 #define HDA_CMD_VERB_GET_CONV_STREAM_CHAN               0xf06
 291 #define HDA_CMD_VERB_SET_CONV_STREAM_CHAN               0x706
 292
 293 #define HDA_CMD_GET_CONV_STREAM_CHAN(cad, nid)                          \
 294     (HDA_CMD_12BIT((cad), (nid),                                        \
 295     HDA_CMD_VERB_GET_CONV_STREAM_CHAN, 0x0))
 296 #define HDA_CMD_SET_CONV_STREAM_CHAN(cad, nid, payload)                 \
 297     (HDA_CMD_12BIT((cad), (nid),                                        \
 298     HDA_CMD_VERB_SET_CONV_STREAM_CHAN, (payload)))
 299
 300 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK            0x000000f0
 301 #define HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT           4
 302 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK              0x0000000f
 303 #define HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT             0
 304
 305 #define HDA_CMD_GET_CONV_STREAM_CHAN_STREAM(rsp)                        \
 306     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK) >>                  \
 307     HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT)
 308 #define HDA_CMD_GET_CONV_STREAM_CHAN_CHAN(rsp)                          \
 309     (((rsp) & HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK) >>                    \
 310     HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT)
 311
 312 #define HDA_CMD_SET_CONV_STREAM_CHAN_STREAM(param)                      \
 313     (((param) << HDA_CMD_CONV_STREAM_CHAN_STREAM_SHIFT) &               \
 314     HDA_CMD_CONV_STREAM_CHAN_STREAM_MASK)
 315 #define HDA_CMD_SET_CONV_STREAM_CHAN_CHAN(param)                        \
 316     (((param) << HDA_CMD_CONV_STREAM_CHAN_CHAN_SHIFT) &                 \
 317     HDA_CMD_CONV_STREAM_CHAN_CHAN_MASK)
 318
 319 /* Input Converter SDI Select */
 320 #define HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT     0xf04
 321 #define HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT     0x704
 322
 323 #define HDA_CMD_GET_INPUT_CONVERTER_SDI_SELECT(cad, nid)                \
 324     (HDA_CMD_12BIT((cad), (nid),                                        \
 325     HDA_CMD_VERB_GET_INPUT_CONVERTER_SDI_SELECT, 0x0))
 326 #define HDA_CMD_SET_INPUT_CONVERTER_SDI_SELECT(cad, nid, payload)       \
 327     (HDA_CMD_12BIT((cad), (nid),                                        \
 328     HDA_CMD_VERB_SET_INPUT_CONVERTER_SDI_SELECT, (payload)))
 329
 330 /* Pin Widget Control */
 331 #define HDA_CMD_VERB_GET_PIN_WIDGET_CTRL                0xf07
 332 #define HDA_CMD_VERB_SET_PIN_WIDGET_CTRL                0x707
 333
 334 #define HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid)                           \
 335     (HDA_CMD_12BIT((cad), (nid),                                        \
 336     HDA_CMD_VERB_GET_PIN_WIDGET_CTRL, 0x0))
 337 #define HDA_CMD_SET_PIN_WIDGET_CTRL(cad, nid, payload)                  \
 338     (HDA_CMD_12BIT((cad), (nid),                                        \
 339     HDA_CMD_VERB_SET_PIN_WIDGET_CTRL, (payload)))
 340
 341 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK    0x00000080
 342 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT   7
 343 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK     0x00000040
 344 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT    6
 345 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK      0x00000020
 346 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT     5
 347 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x00000007
 348 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 349
 350 #define HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE(rsp)                    \
 351     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_MASK) >>          \
 352     HDA_CMD_GET_PIN_WIDGET_CTRL_HPHN_ENABLE_SHIFT)
 353 #define HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE(rsp)                     \
 354     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_OUT_ENABLE_MASK) >>           \
 355     HDA_GET_CMD_PIN_WIDGET_CTRL_OUT_ENABLE_SHIFT)
 356 #define HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE(rsp)                      \
 357     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_MASK) >>            \
 358     HDA_CMD_GET_PIN_WIDGET_CTRL_IN_ENABLE_SHIFT)
 359 #define HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE(rsp)                    \
 360     (((rsp) & HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK) >>          \
 361     HDA_CMD_GET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT)
 362
 363 #define HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE         0x80
 364 #define HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE          0x40
 365 #define HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE           0x20
 366 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK    0x07
 367 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT   0
 368
 369 #define HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(param)                  \
 370     (((param) << HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_SHIFT) &       \
 371     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK)
 372
 373 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_HIZ         0
 374 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50          1
 375 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_GROUND      2
 376 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80          4
 377 #define HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100         5
 378
 379 /* Unsolicited Response */
 380 #define HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE           0xf08
 381 #define HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE           0x708
 382
 383 #define HDA_CMD_GET_UNSOLICITED_RESPONSE(cad, nid)                      \
 384     (HDA_CMD_12BIT((cad), (nid),                                        \
 385     HDA_CMD_VERB_GET_UNSOLICITED_RESPONSE, 0x0))
 386 #define HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, nid, payload)             \
 387     (HDA_CMD_12BIT((cad), (nid),                                        \
 388     HDA_CMD_VERB_SET_UNSOLICITED_RESPONSE, (payload)))
 389
 390 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK    0x00000080
 391 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT   7
 392 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK       0x0000001f
 393 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 394
 395 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE(rsp)                    \
 396     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_MASK) >>          \
 397     HDA_CMD_GET_UNSOLICITED_RESPONSE_ENABLE_SHIFT)
 398 #define HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG(rsp)                       \
 399     (((rsp) & HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_MASK) >>             \
 400     HDA_CMD_GET_UNSOLICITED_RESPONSE_TAG_SHIFT)
 401
 402 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE         0x80
 403 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK       0x3f
 404 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT      0
 405
 406 #define HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG(param)                     \
 407     (((param) << HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_SHIFT) &          \
 408     HDA_CMD_SET_UNSOLICITED_RESPONSE_TAG_MASK)
 409
 410 /* Pin Sense */
 411 #define HDA_CMD_VERB_GET_PIN_SENSE                      0xf09
 412 #define HDA_CMD_VERB_SET_PIN_SENSE                      0x709
 413
 414 #define HDA_CMD_GET_PIN_SENSE(cad, nid)                                 \
 415     (HDA_CMD_12BIT((cad), (nid),                                        \
 416     HDA_CMD_VERB_GET_PIN_SENSE, 0x0))
 417 #define HDA_CMD_SET_PIN_SENSE(cad, nid, payload)                        \
 418     (HDA_CMD_12BIT((cad), (nid),                                        \
 419     HDA_CMD_VERB_SET_PIN_SENSE, (payload)))
 420
 421 #define HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT           0x80000000
 422 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK            0x7fffffff
 423 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT           0
 424
 425 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE(rsp)                            \
 426     (((rsp) & HDA_CMD_GET_PIN_SENSE_IMP_SENSE_MASK) >>                  \
 427     HDA_CMD_GET_PIN_SENSE_IMP_SENSE_SHIFT)
 428
 429 #define HDA_CMD_GET_PIN_SENSE_IMP_SENSE_INVALID         0x7fffffff
 430
 431 #define HDA_CMD_SET_PIN_SENSE_LEFT_CHANNEL              0x00
 432 #define HDA_CMD_SET_PIN_SENSE_RIGHT_CHANNEL             0x01
 433
 434 /* EAPD/BTL Enable */
 435 #define HDA_CMD_VERB_GET_EAPD_BTL_ENABLE                0xf0c
 436 #define HDA_CMD_VERB_SET_EAPD_BTL_ENABLE                0x70c
 437
 438 #define HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid)                           \
 439     (HDA_CMD_12BIT((cad), (nid),                                        \
 440     HDA_CMD_VERB_GET_EAPD_BTL_ENABLE, 0x0))
 441 #define HDA_CMD_SET_EAPD_BTL_ENABLE(cad, nid, payload)                  \
 442     (HDA_CMD_12BIT((cad), (nid),                                        \
 443     HDA_CMD_VERB_SET_EAPD_BTL_ENABLE, (payload)))
 444
 445 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK        0x00000004
 446 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT       2
 447 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK           0x00000002
 448 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT          1
 449 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK            0x00000001
 450 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT           0
 451
 452 #define HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP(rsp)                        \
 453     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_MASK) >>              \
 454     HDA_CMD_GET_EAPD_BTL_ENABLE_LR_SWAP_SHIFT)
 455 #define HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD(rsp)                           \
 456     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_MASK) >>                 \
 457     HDA_CMD_GET_EAPD_BTL_ENABLE_EAPD_SHIFT)
 458 #define HDA_CMD_GET_EAPD_BTL_ENABLE_BTL(rsp)                            \
 459     (((rsp) & HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_MASK) >>                  \
 460     HDA_CMD_GET_EAPD_BTL_ENABLE_BTL_SHIFT)
 461
 462 #define HDA_CMD_SET_EAPD_BTL_ENABLE_LR_SWAP             0x04
 463 #define HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD                0x02
 464 #define HDA_CMD_SET_EAPD_BTL_ENABLE_BTL                 0x01
 465
 466 /* GPI Data */
 467 #define HDA_CMD_VERB_GET_GPI_DATA                       0xf10
 468 #define HDA_CMD_VERB_SET_GPI_DATA                       0x710
 469
 470 #define HDA_CMD_GET_GPI_DATA(cad, nid)                                  \
 471     (HDA_CMD_12BIT((cad), (nid),                                        \
 472     HDA_CMD_VERB_GET_GPI_DATA, 0x0))
 473 #define HDA_CMD_SET_GPI_DATA(cad, nid)                                  \
 474     (HDA_CMD_12BIT((cad), (nid),                                        \
 475     HDA_CMD_VERB_SET_GPI_DATA, (payload)))
 476
 477 /* GPI Wake Enable Mask */
 478 #define HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK           0xf11
 479 #define HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK           0x711
 480
 481 #define HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, nid)                      \
 482     (HDA_CMD_12BIT((cad), (nid),                                        \
 483     HDA_CMD_VERB_GET_GPI_WAKE_ENABLE_MASK, 0x0))
 484 #define HDA_CMD_SET_GPI_WAKE_ENABLE_MASK(cad, nid, payload)             \
 485     (HDA_CMD_12BIT((cad), (nid),                                        \
 486     HDA_CMD_VERB_SET_GPI_WAKE_ENABLE_MASK, (payload)))
 487
 488 /* GPI Unsolicited Enable Mask */
 489 #define HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK    0xf12
 490 #define HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK    0x712
 491
 492 #define HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid)               \
 493     (HDA_CMD_12BIT((cad), (nid),                                        \
 494     HDA_CMD_VERB_GET_GPI_UNSOLICITED_ENABLE_MASK, 0x0))
 495 #define HDA_CMD_SET_GPI_UNSOLICITED_ENABLE_MASK(cad, nid, payload)      \
 496     (HDA_CMD_12BIT((cad), (nid),                                        \
 497     HDA_CMD_VERB_SET_GPI_UNSOLICITED_ENABLE_MASK, (payload)))
 498
 499 /* GPI Sticky Mask */
 500 #define HDA_CMD_VERB_GET_GPI_STICKY_MASK                0xf13
 501 #define HDA_CMD_VERB_SET_GPI_STICKY_MASK                0x713
 502
 503 #define HDA_CMD_GET_GPI_STICKY_MASK(cad, nid)                           \
 504     (HDA_CMD_12BIT((cad), (nid),                                        \
 505     HDA_CMD_VERB_GET_GPI_STICKY_MASK, 0x0))
 506 #define HDA_CMD_SET_GPI_STICKY_MASK(cad, nid, payload)                  \
 507     (HDA_CMD_12BIT((cad), (nid),                                        \
 508     HDA_CMD_VERB_SET_GPI_STICKY_MASK, (payload)))
 509
 510 /* GPO Data */
 511 #define HDA_CMD_VERB_GET_GPO_DATA                       0xf14
 512 #define HDA_CMD_VERB_SET_GPO_DATA                       0x714
 513
 514 #define HDA_CMD_GET_GPO_DATA(cad, nid)                                  \
 515     (HDA_CMD_12BIT((cad), (nid),                                        \
 516     HDA_CMD_VERB_GET_GPO_DATA, 0x0))
 517 #define HDA_CMD_SET_GPO_DATA(cad, nid, payload)                         \
 518     (HDA_CMD_12BIT((cad), (nid),                                        \
 519     HDA_CMD_VERB_SET_GPO_DATA, (payload)))
 520
 521 /* GPIO Data */
 522 #define HDA_CMD_VERB_GET_GPIO_DATA                      0xf15
 523 #define HDA_CMD_VERB_SET_GPIO_DATA                      0x715
 524
 525 #define HDA_CMD_GET_GPIO_DATA(cad, nid)                                 \
 526     (HDA_CMD_12BIT((cad), (nid),                                        \
 527     HDA_CMD_VERB_GET_GPIO_DATA, 0x0))
 528 #define HDA_CMD_SET_GPIO_DATA(cad, nid, payload)                        \
 529     (HDA_CMD_12BIT((cad), (nid),                                        \
 530     HDA_CMD_VERB_SET_GPIO_DATA, (payload)))
 531
 532 /* GPIO Enable Mask */
 533 #define HDA_CMD_VERB_GET_GPIO_ENABLE_MASK               0xf16
 534 #define HDA_CMD_VERB_SET_GPIO_ENABLE_MASK               0x716
 535
 536 #define HDA_CMD_GET_GPIO_ENABLE_MASK(cad, nid)                          \
 537     (HDA_CMD_12BIT((cad), (nid),                                        \
 538     HDA_CMD_VERB_GET_GPIO_ENABLE_MASK, 0x0))
 539 #define HDA_CMD_SET_GPIO_ENABLE_MASK(cad, nid, payload)                 \
 540     (HDA_CMD_12BIT((cad), (nid),                                        \
 541     HDA_CMD_VERB_SET_GPIO_ENABLE_MASK, (payload)))
 542
 543 /* GPIO Direction */
 544 #define HDA_CMD_VERB_GET_GPIO_DIRECTION                 0xf17
 545 #define HDA_CMD_VERB_SET_GPIO_DIRECTION                 0x717
 546
 547 #define HDA_CMD_GET_GPIO_DIRECTION(cad, nid)                            \
 548     (HDA_CMD_12BIT((cad), (nid),                                        \
 549     HDA_CMD_VERB_GET_GPIO_DIRECTION, 0x0))
 550 #define HDA_CMD_SET_GPIO_DIRECTION(cad, nid, payload)                   \
 551     (HDA_CMD_12BIT((cad), (nid),                                        \
 552     HDA_CMD_VERB_SET_GPIO_DIRECTION, (payload)))
 553
 554 /* GPIO Wake Enable Mask */
 555 #define HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK          0xf18
 556 #define HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK          0x718
 557
 558 #define HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, nid)                     \
 559     (HDA_CMD_12BIT((cad), (nid),                                        \
 560     HDA_CMD_VERB_GET_GPIO_WAKE_ENABLE_MASK, 0x0))
 561 #define HDA_CMD_SET_GPIO_WAKE_ENABLE_MASK(cad, nid, payload)            \
 562     (HDA_CMD_12BIT((cad), (nid),                                        \
 563     HDA_CMD_VERB_SET_GPIO_WAKE_ENABLE_MASK, (payload)))
 564
 565 /* GPIO Unsolicited Enable Mask */
 566 #define HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK   0xf19
 567 #define HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK   0x719
 568
 569 #define HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid)              \
 570     (HDA_CMD_12BIT((cad), (nid),                                        \
 571     HDA_CMD_VERB_GET_GPIO_UNSOLICITED_ENABLE_MASK, 0x0))
 572 #define HDA_CMD_SET_GPIO_UNSOLICITED_ENABLE_MASK(cad, nid, payload)     \
 573     (HDA_CMD_12BIT((cad), (nid),                                        \
 574     HDA_CMD_VERB_SET_GPIO_UNSOLICITED_ENABLE_MASK, (payload)))
 575
 576 /* GPIO_STICKY_MASK */
 577 #define HDA_CMD_VERB_GET_GPIO_STICKY_MASK               0xf1a
 578 #define HDA_CMD_VERB_SET_GPIO_STICKY_MASK               0x71a
 579
 580 #define HDA_CMD_GET_GPIO_STICKY_MASK(cad, nid)                          \
 581     (HDA_CMD_12BIT((cad), (nid),                                        \
 582     HDA_CMD_VERB_GET_GPIO_STICKY_MASK, 0x0))
 583 #define HDA_CMD_SET_GPIO_STICKY_MASK(cad, nid, payload)                 \
 584     (HDA_CMD_12BIT((cad), (nid),                                        \
 585     HDA_CMD_VERB_SET_GPIO_STICKY_MASK, (payload)))
 586
 587 /* Beep Generation */
 588 #define HDA_CMD_VERB_GET_BEEP_GENERATION                0xf0a
 589 #define HDA_CMD_VERB_SET_BEEP_GENERATION                0x70a
 590
 591 #define HDA_CMD_GET_BEEP_GENERATION(cad, nid)                           \
 592     (HDA_CMD_12BIT((cad), (nid),                                        \
 593     HDA_CMD_VERB_GET_BEEP_GENERATION, 0x0))
 594 #define HDA_CMD_SET_BEEP_GENERATION(cad, nid, payload)                  \
 595     (HDA_CMD_12BIT((cad), (nid),                                        \
 596     HDA_CMD_VERB_SET_BEEP_GENERATION, (payload)))
 597
 598 /* Volume Knob */
 599 #define HDA_CMD_VERB_GET_VOLUME_KNOB                    0xf0f
 600 #define HDA_CMD_VERB_SET_VOLUME_KNOB                    0x70f
 601
 602 #define HDA_CMD_GET_VOLUME_KNOB(cad, nid)                               \
 603     (HDA_CMD_12BIT((cad), (nid),                                        \
 604     HDA_CMD_VERB_GET_VOLUME_KNOB, 0x0))
 605 #define HDA_CMD_SET_VOLUME_KNOB(cad, nid, payload)                      \
 606     (HDA_CMD_12BIT((cad), (nid),                                        \
 607     HDA_CMD_VERB_SET_VOLUME_KNOB, (payload)))
 608
 609 /* Subsystem ID */
 610 #define HDA_CMD_VERB_GET_SUBSYSTEM_ID                   0xf20
 611 #define HDA_CMD_VERB_SET_SUSBYSTEM_ID1                  0x720
 612 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID2                  0x721
 613 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID3                  0x722
 614 #define HDA_CMD_VERB_SET_SUBSYSTEM_ID4                  0x723
 615
 616 #define HDA_CMD_GET_SUBSYSTEM_ID(cad, nid)                              \
 617     (HDA_CMD_12BIT((cad), (nid),                                        \
 618     HDA_CMD_VERB_GET_SUBSYSTEM_ID, 0x0))
 619 #define HDA_CMD_SET_SUBSYSTEM_ID1(cad, nid, payload)                    \
 620     (HDA_CMD_12BIT((cad), (nid),                                        \
 621     HDA_CMD_VERB_SET_SUSBYSTEM_ID1, (payload)))
 622 #define HDA_CMD_SET_SUBSYSTEM_ID2(cad, nid, payload)                    \
 623     (HDA_CMD_12BIT((cad), (nid),                                        \
 624     HDA_CMD_VERB_SET_SUSBYSTEM_ID2, (payload)))
 625 #define HDA_CMD_SET_SUBSYSTEM_ID3(cad, nid, payload)                    \
 626     (HDA_CMD_12BIT((cad), (nid),                                        \
 627     HDA_CMD_VERB_SET_SUSBYSTEM_ID3, (payload)))
 628 #define HDA_CMD_SET_SUBSYSTEM_ID4(cad, nid, payload)                    \
 629     (HDA_CMD_12BIT((cad), (nid),                                        \
 630     HDA_CMD_VERB_SET_SUSBYSTEM_ID4, (payload)))
 631
 632 /* Configuration Default */
 633 #define HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT          0xf1c
 634 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1         0x71c
 635 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2         0x71d
 636 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3         0x71e
 637 #define HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4         0x71f
 638
 639 #define HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid)                     \
 640     (HDA_CMD_12BIT((cad), (nid),                                        \
 641     HDA_CMD_VERB_GET_CONFIGURATION_DEFAULT, 0x0))
 642 #define HDA_CMD_SET_CONFIGURATION_DEFAULT1(cad, nid, payload)           \
 643     (HDA_CMD_12BIT((cad), (nid),                                        \
 644     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT1, (payload)))
 645 #define HDA_CMD_SET_CONFIGURATION_DEFAULT2(cad, nid, payload)           \
 646     (HDA_CMD_12BIT((cad), (nid),                                        \
 647     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT2, (payload)))
 648 #define HDA_CMD_SET_CONFIGURATION_DEFAULT3(cad, nid, payload)           \
 649     (HDA_CMD_12BIT((cad), (nid),                                        \
 650     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT3, (payload)))
 651 #define HDA_CMD_SET_CONFIGURATION_DEFAULT4(cad, nid, payload)           \
 652     (HDA_CMD_12BIT((cad), (nid),                                        \
 653     HDA_CMD_VERB_SET_CONFIGURATION_DEFAULT4, (payload)))
 654
 655 /* Stripe Control */
 656 #define HDA_CMD_VERB_GET_STRIPE_CONTROL                 0xf24
 657 #define HDA_CMD_VERB_SET_STRIPE_CONTROL                 0x724
 658
 659 #define HDA_CMD_GET_STRIPE_CONTROL(cad, nid)                            \
 660     (HDA_CMD_12BIT((cad), (nid),                                        \
 661     HDA_CMD_VERB_GET_STRIPE_CONTROL, 0x0))
 662 #define HDA_CMD_SET_STRIPE_CONTROL(cad, nid, payload)                   \
 663     (HDA_CMD_12BIT((cad), (nid),                                        \
 664     HDA_CMD_VERB_SET_STRIPE_CONTROL, (payload)))
 665
 666 /* Channel Count Control */
 667 #define HDA_CMD_VERB_GET_CONV_CHAN_COUNT                        0xf2d
 668 #define HDA_CMD_VERB_SET_CONV_CHAN_COUNT                        0x72d
 669
 670 #define HDA_CMD_GET_CONV_CHAN_COUNT(cad, nid)                           \
 671     (HDA_CMD_12BIT((cad), (nid),                                        \
 672     HDA_CMD_VERB_GET_CONV_CHAN_COUNT, 0x0))
 673 #define HDA_CMD_SET_CONV_CHAN_COUNT(cad, nid, payload)                  \
 674     (HDA_CMD_12BIT((cad), (nid),                                        \
 675     HDA_CMD_VERB_SET_CONV_CHAN_COUNT, (payload)))
 676
 677 #define HDA_CMD_VERB_GET_HDMI_DIP_SIZE                  0xf2e
 678 #define HDA_CMD_VERB_GET_HDMI_ELDD                      0xf2f
 679
 680 #define HDA_CMD_VERB_GET_HDMI_DIP_INDEX                 0xf30
 681 #define HDA_CMD_VERB_SET_HDMI_DIP_INDEX                 0x730
 682
 683 #define HDA_CMD_VERB_GET_HDMI_DIP_DATA                  0xf31
 684 #define HDA_CMD_VERB_SET_HDMI_DIP_DATA                  0x731
 685
 686 #define HDA_CMD_VERB_GET_HDMI_DIP_XMIT                  0xf32
 687 #define HDA_CMD_VERB_SET_HDMI_DIP_XMIT                  0x732
 688
 689 #define HDA_CMD_VERB_GET_HDMI_CP_CTRL                   0xf33
 690 #define HDA_CMD_VERB_SET_HDMI_CP_CTRL                   0x733
 691
 692 #define HDA_CMD_VERB_GET_HDMI_CHAN_SLOT                 0xf34
 693 #define HDA_CMD_VERB_SET_HDMI_CHAN_SLOT                 0x734
 694
 695 #define HDA_CMD_GET_HDMI_CHAN_SLOT(cad, nid)                            \
 696     (HDA_CMD_12BIT((cad), (nid),                                        \
 697     HDA_CMD_VERB_GET_HDMI_CHAN_SLOT, 0x0))
 698 #define HDA_CMD_SET_HDMI_CHAN_SLOT(cad, nid, payload)                   \
 699     (HDA_CMD_12BIT((cad), (nid),                                        \
 700     HDA_CMD_VERB_SET_HDMI_CHAN_SLOT, (payload)))
 701
 702 /* Function Reset */
 703 #define HDA_CMD_VERB_FUNCTION_RESET                     0x7ff
 704
 705 #define HDA_CMD_FUNCTION_RESET(cad, nid)                                \
 706     (HDA_CMD_12BIT((cad), (nid),                                        \
 707     HDA_CMD_VERB_FUNCTION_RESET, 0x0))
 708
 709
 710 /****************************************************************************
 711  * HDA Device Parameters
 712  ****************************************************************************/
 713
 714 /* Vendor ID */
 715 #define HDA_PARAM_VENDOR_ID                             0x00
 716
 717 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK              0xffff0000
 718 #define HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT             16
 719 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK              0x0000ffff
 720 #define HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT             0
 721
 722 #define HDA_PARAM_VENDOR_ID_VENDOR_ID(param)                            \
 723     (((param) & HDA_PARAM_VENDOR_ID_VENDOR_ID_MASK) >>                  \
 724     HDA_PARAM_VENDOR_ID_VENDOR_ID_SHIFT)
 725 #define HDA_PARAM_VENDOR_ID_DEVICE_ID(param)                            \
 726     (((param) & HDA_PARAM_VENDOR_ID_DEVICE_ID_MASK) >>                  \
 727     HDA_PARAM_VENDOR_ID_DEVICE_ID_SHIFT)
 728
 729 /* Revision ID */
 730 #define HDA_PARAM_REVISION_ID                           0x02
 731
 732 #define HDA_PARAM_REVISION_ID_MAJREV_MASK               0x00f00000
 733 #define HDA_PARAM_REVISION_ID_MAJREV_SHIFT              20
 734 #define HDA_PARAM_REVISION_ID_MINREV_MASK               0x000f0000
 735 #define HDA_PARAM_REVISION_ID_MINREV_SHIFT              16
 736 #define HDA_PARAM_REVISION_ID_REVISION_ID_MASK          0x0000ff00
 737 #define HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT         8
 738 #define HDA_PARAM_REVISION_ID_STEPPING_ID_MASK          0x000000ff
 739 #define HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT         0
 740
 741 #define HDA_PARAM_REVISION_ID_MAJREV(param)                             \
 742     (((param) & HDA_PARAM_REVISION_ID_MAJREV_MASK) >>                   \
 743     HDA_PARAM_REVISION_ID_MAJREV_SHIFT)
 744 #define HDA_PARAM_REVISION_ID_MINREV(param)                             \
 745     (((param) & HDA_PARAM_REVISION_ID_MINREV_MASK) >>                   \
 746     HDA_PARAM_REVISION_ID_MINREV_SHIFT)
 747 #define HDA_PARAM_REVISION_ID_REVISION_ID(param)                        \
 748     (((param) & HDA_PARAM_REVISION_ID_REVISION_ID_MASK) >>              \
 749     HDA_PARAM_REVISION_ID_REVISION_ID_SHIFT)
 750 #define HDA_PARAM_REVISION_ID_STEPPING_ID(param)                        \
 751     (((param) & HDA_PARAM_REVISION_ID_STEPPING_ID_MASK) >>              \
 752     HDA_PARAM_REVISION_ID_STEPPING_ID_SHIFT)
 753
 754 /* Subordinate Node Cound */
 755 #define HDA_PARAM_SUB_NODE_COUNT                        0x04
 756
 757 #define HDA_PARAM_SUB_NODE_COUNT_START_MASK             0x00ff0000
 758 #define HDA_PARAM_SUB_NODE_COUNT_START_SHIFT            16
 759 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK             0x000000ff
 760 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT            0
 761
 762 #define HDA_PARAM_SUB_NODE_COUNT_START(param)                           \
 763     (((param) & HDA_PARAM_SUB_NODE_COUNT_START_MASK) >>                 \
 764     HDA_PARAM_SUB_NODE_COUNT_START_SHIFT)
 765 #define HDA_PARAM_SUB_NODE_COUNT_TOTAL(param)                           \
 766     (((param) & HDA_PARAM_SUB_NODE_COUNT_TOTAL_MASK) >>                 \
 767     HDA_PARAM_SUB_NODE_COUNT_TOTAL_SHIFT)
 768
 769 /* Function Group Type */
 770 #define HDA_PARAM_FCT_GRP_TYPE                          0x05
 771
 772 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK               0x00000100
 773 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL_SHIFT              8
 774 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK           0x000000ff
 775 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT  0
 776
 777 #define HDA_PARAM_FCT_GRP_TYPE_UNSOL(param)                             \
 778     (((param) & HDA_PARAM_FCT_GRP_TYPE_UNSOL_MASK) >>                   \
 779     HDA_PARAM_FCT_GROUP_TYPE_UNSOL_SHIFT)
 780 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(param)                         \
 781     (((param) & HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MASK) >>               \
 782     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_SHIFT)
 783
 784 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO          0x01
 785 #define HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM          0x02
 786
 787 /* Audio Function Group Capabilities */
 788 #define HDA_PARAM_AUDIO_FCT_GRP_CAP                     0x08
 789
 790 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK       0x00010000
 791 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT      16
 792 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK    0x00000f00
 793 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT   8
 794 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK   0x0000000f
 795 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT  0
 796
 797 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN(param)                     \
 798     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_MASK) >>           \
 799     HDA_PARAM_AUDIO_FCT_GRP_CAP_BEEP_GEN_SHIFT)
 800 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY(param)                  \
 801     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_MASK) >>        \
 802     HDA_PARAM_AUDIO_FCT_GRP_CAP_INPUT_DELAY_SHIFT)
 803 #define HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY(param)                 \
 804     (((param) & HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_MASK) >>       \
 805     HDA_PARAM_AUDIO_FCT_GRP_CAP_OUTPUT_DELAY_SHIFT)
 806
 807 /* Audio Widget Capabilities */
 808 #define HDA_PARAM_AUDIO_WIDGET_CAP                      0x09
 809
 810 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK            0x00f00000
 811 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT           20
 812 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK           0x000f0000
 813 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT          16
 814 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK          0x0000e000
 815 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT         13
 816 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK              0x00001000
 817 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT             12
 818 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK         0x00000800
 819 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT        11
 820 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK      0x00000400
 821 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT     10
 822 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK         0x00000200
 823 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT        9
 824 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK       0x00000100
 825 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT      8
 826 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK       0x00000080
 827 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT      7
 828 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK     0x00000040
 829 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT    6
 830 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK          0x00000020
 831 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT         5
 832 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK      0x00000010
 833 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT     4
 834 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK         0x00000008
 835 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT        3
 836 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK         0x00000004
 837 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT        2
 838 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK          0x00000002
 839 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT         1
 840 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK          0x00000001
 841 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT         0
 842
 843 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(param)                          \
 844     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK) >>                \
 845     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT)
 846 #define HDA_PARAM_AUDIO_WIDGET_CAP_DELAY(param)                         \
 847     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_MASK) >>               \
 848     HDA_PARAM_AUDIO_WIDGET_CAP_DELAY_SHIFT)
 849 #define HDA_PARAM_AUDIO_WIDGET_CAP_CC(param)                            \
 850     ((((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_MASK) >>             \
 851     (HDA_PARAM_AUDIO_WIDGET_CAP_CC_EXT_SHIFT - 1)) |                    \
 852     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 853     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT))
 854 #define HDA_PARAM_AUDIO_WIDGET_CAP_CP(param)                            \
 855     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CP_MASK) >>                  \
 856     HDA_PARAM_AUDIO_WIDGET_CAP_CP_SHIFT)
 857 #define HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(param)                       \
 858     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_MASK) >>             \
 859     HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP_SHIFT)
 860 #define HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(param)                    \
 861     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_MASK) >>          \
 862     HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL_SHIFT)
 863 #define HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(param)                       \
 864     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_MASK) >>             \
 865     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL_SHIFT)
 866 #define HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST(param)                     \
 867     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_MASK) >>           \
 868     HDA_PARAM_AUDIO_WIDGET_CAP_CONN_LIST_SHIFT)
 869 #define HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(param)                     \
 870     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_MASK) >>           \
 871     HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP_SHIFT)
 872 #define HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(param)                   \
 873     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_MASK) >>         \
 874     HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET_SHIFT)
 875 #define HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(param)                        \
 876     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_MASK) >>              \
 877     HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE_SHIFT)
 878 #define HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(param)                    \
 879     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_MASK) >>          \
 880     HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR_SHIFT)
 881 #define HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(param)                       \
 882     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_MASK) >>             \
 883     HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR_SHIFT)
 884 #define HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(param)                       \
 885     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_MASK) >>             \
 886     HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP_SHIFT)
 887 #define HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(param)                        \
 888     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_MASK) >>              \
 889     HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP_SHIFT)
 890 #define HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(param)                        \
 891     (((param) & HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_MASK) >>              \
 892     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO_SHIFT)
 893
 894 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT    0x0
 895 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT     0x1
 896 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER     0x2
 897 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR  0x3
 898 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX     0x4
 899 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET    0x5
 900 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET   0x6
 901 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET     0x7
 902 #define HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET   0xf
 903
 904 /* Supported PCM Size, Rates */
 905
 906 #define HDA_PARAM_SUPP_PCM_SIZE_RATE                    0x0a
 907
 908 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK         0x00100000
 909 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT        20
 910 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK         0x00080000
 911 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT        19
 912 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK         0x00040000
 913 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT        18
 914 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK         0x00020000
 915 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT        17
 916 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK          0x00010000
 917 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT         16
 918 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK          0x00000001
 919 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT         0
 920 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK         0x00000002
 921 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT        1
 922 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK         0x00000004
 923 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT        2
 924 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK         0x00000008
 925 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT        3
 926 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK         0x00000010
 927 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT        4
 928 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK         0x00000020
 929 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT        5
 930 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK         0x00000040
 931 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT        6
 932 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK         0x00000080
 933 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT        7
 934 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK         0x00000100
 935 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT        8
 936 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK        0x00000200
 937 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT       9
 938 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK        0x00000400
 939 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT       10
 940 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK        0x00000800
 941 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT       11
 942
 943 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(param)                       \
 944     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_MASK) >>             \
 945     HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT_SHIFT)
 946 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(param)                       \
 947     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_MASK) >>             \
 948     HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT_SHIFT)
 949 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(param)                       \
 950     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_MASK) >>             \
 951     HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT_SHIFT)
 952 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(param)                       \
 953     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_MASK) >>             \
 954     HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT_SHIFT)
 955 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(param)                        \
 956     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_MASK) >>              \
 957     HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT_SHIFT)
 958 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(param)                        \
 959     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_MASK) >>              \
 960     HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ_SHIFT)
 961 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(param)                       \
 962     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_MASK) >>             \
 963     HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ_SHIFT)
 964 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(param)                       \
 965     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_MASK) >>             \
 966     HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ_SHIFT)
 967 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(param)                       \
 968     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_MASK) >>             \
 969     HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ_SHIFT)
 970 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(param)                       \
 971     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_MASK) >>             \
 972     HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ_SHIFT)
 973 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(param)                       \
 974     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_MASK) >>             \
 975     HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ_SHIFT)
 976 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(param)                       \
 977     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_MASK) >>             \
 978     HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ_SHIFT)
 979 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(param)                       \
 980     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_MASK) >>             \
 981     HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ_SHIFT)
 982 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(param)                       \
 983     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_MASK) >>             \
 984     HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ_SHIFT)
 985 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(param)                      \
 986     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_MASK) >>            \
 987     HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ_SHIFT)
 988 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(param)                      \
 989     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_MASK) >>            \
 990     HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ_SHIFT)
 991 #define HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(param)                      \
 992     (((param) & HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_MASK) >>            \
 993     HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ_SHIFT)
 994
 995 /* Supported Stream Formats */
 996 #define HDA_PARAM_SUPP_STREAM_FORMATS                   0x0b
 997
 998 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK          0x00000004
 999 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT         2
1000 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK      0x00000002
1001 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT     1
1002 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK          0x00000001
1003 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT         0
1004
1005 #define HDA_PARAM_SUPP_STREAM_FORMATS_AC3(param)                        \
1006     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK) >>              \
1007     HDA_PARAM_SUPP_STREAM_FORMATS_AC3_SHIFT)
1008 #define HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(param)                    \
1009     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_MASK) >>          \
1010     HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32_SHIFT)
1011 #define HDA_PARAM_SUPP_STREAM_FORMATS_PCM(param)                        \
1012     (((param) & HDA_PARAM_SUPP_STREAM_FORMATS_PCM_MASK) >>              \
1013     HDA_PARAM_SUPP_STREAM_FORMATS_PCM_SHIFT)
1014
1015 /* Pin Capabilities */
1016 #define HDA_PARAM_PIN_CAP                               0x0c
1017
1018 #define HDA_PARAM_PIN_CAP_HBR_MASK                      0x08000000
1019 #define HDA_PARAM_PIN_CAP_HBR_SHIFT                     27
1020 #define HDA_PARAM_PIN_CAP_DP_MASK                       0x01000000
1021 #define HDA_PARAM_PIN_CAP_DP_SHIFT                      24
1022 #define HDA_PARAM_PIN_CAP_EAPD_CAP_MASK                 0x00010000
1023 #define HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT                16
1024 #define HDA_PARAM_PIN_CAP_VREF_CTRL_MASK                0x0000ff00
1025 #define HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT               8
1026 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK            0x00002000
1027 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT           13
1028 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK             0x00001000
1029 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT            12
1030 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK         0x00000400
1031 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT        10
1032 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK             0x00000200
1033 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT            9
1034 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK            0x00000100
1035 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT           8
1036 #define HDA_PARAM_PIN_CAP_HDMI_MASK                     0x00000080
1037 #define HDA_PARAM_PIN_CAP_HDMI_SHIFT                    7
1038 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK         0x00000040
1039 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT        6
1040 #define HDA_PARAM_PIN_CAP_INPUT_CAP_MASK                0x00000020
1041 #define HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT               5
1042 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK               0x00000010
1043 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT              4
1044 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK            0x00000008
1045 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT           3
1046 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK      0x00000004
1047 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT     2
1048 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK             0x00000002
1049 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT            1
1050 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK            0x00000001
1051 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT           0
1052
1053 #define HDA_PARAM_PIN_CAP_HBR(param)                                    \
1054     (((param) & HDA_PARAM_PIN_CAP_HBR_MASK) >>                          \
1055     HDA_PARAM_PIN_CAP_HBR_SHIFT)
1056 #define HDA_PARAM_PIN_CAP_DP(param)                                     \
1057     (((param) & HDA_PARAM_PIN_CAP_DP_MASK) >>                           \
1058     HDA_PARAM_PIN_CAP_DP_SHIFT)
1059 #define HDA_PARAM_PIN_CAP_EAPD_CAP(param)                               \
1060     (((param) & HDA_PARAM_PIN_CAP_EAPD_CAP_MASK) >>                     \
1061     HDA_PARAM_PIN_CAP_EAPD_CAP_SHIFT)
1062 #define HDA_PARAM_PIN_CAP_VREF_CTRL(param)                              \
1063     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_MASK) >>                    \
1064     HDA_PARAM_PIN_CAP_VREF_CTRL_SHIFT)
1065 #define HDA_PARAM_PIN_CAP_VREF_CTRL_100(param)                          \
1066     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK) >>                \
1067     HDA_PARAM_PIN_CAP_VREF_CTRL_100_SHIFT)
1068 #define HDA_PARAM_PIN_CAP_VREF_CTRL_80(param)                           \
1069     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK) >>                 \
1070     HDA_PARAM_PIN_CAP_VREF_CTRL_80_SHIFT)
1071 #define HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(param)                       \
1072     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_MASK) >>             \
1073     HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND_SHIFT)
1074 #define HDA_PARAM_PIN_CAP_VREF_CTRL_50(param)                           \
1075     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK) >>                 \
1076     HDA_PARAM_PIN_CAP_VREF_CTRL_50_SHIFT)
1077 #define HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(param)                          \
1078     (((param) & HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_MASK) >>                \
1079     HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ_SHIFT)
1080 #define HDA_PARAM_PIN_CAP_HDMI(param)                                   \
1081     (((param) & HDA_PARAM_PIN_CAP_HDMI_MASK) >>                         \
1082     HDA_PARAM_PIN_CAP_HDMI_SHIFT)
1083 #define HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(param)                       \
1084     (((param) & HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_MASK) >>             \
1085     HDA_PARAM_PIN_CAP_BALANCED_IO_PINS_SHIFT)
1086 #define HDA_PARAM_PIN_CAP_INPUT_CAP(param)                              \
1087     (((param) & HDA_PARAM_PIN_CAP_INPUT_CAP_MASK) >>                    \
1088     HDA_PARAM_PIN_CAP_INPUT_CAP_SHIFT)
1089 #define HDA_PARAM_PIN_CAP_OUTPUT_CAP(param)                             \
1090     (((param) & HDA_PARAM_PIN_CAP_OUTPUT_CAP_MASK) >>                   \
1091     HDA_PARAM_PIN_CAP_OUTPUT_CAP_SHIFT)
1092 #define HDA_PARAM_PIN_CAP_HEADPHONE_CAP(param)                          \
1093     (((param) & HDA_PARAM_PIN_CAP_HEADPHONE_CAP_MASK) >>                \
1094     HDA_PARAM_PIN_CAP_HEADPHONE_CAP_SHIFT)
1095 #define HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(param)                    \
1096     (((param) & HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_MASK) >>          \
1097     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP_SHIFT)
1098 #define HDA_PARAM_PIN_CAP_TRIGGER_REQD(param)                           \
1099     (((param) & HDA_PARAM_PIN_CAP_TRIGGER_REQD_MASK) >>                 \
1100     HDA_PARAM_PIN_CAP_TRIGGER_REQD_SHIFT)
1101 #define HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(param)                          \
1102     (((param) & HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_MASK) >>                \
1103     HDA_PARAM_PIN_CAP_IMP_SENSE_CAP_SHIFT)
1104
1105 /* Input Amplifier Capabilities */
1106 #define HDA_PARAM_INPUT_AMP_CAP                         0x0d
1107
1108 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK           0x80000000
1109 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT          31
1110 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK           0x007f0000
1111 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT          16
1112 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK           0x00007f00
1113 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT          8
1114 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK             0x0000007f
1115 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT            0
1116
1117 #define HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP(param)                         \
1118     (((param) & HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_MASK) >>               \
1119     HDA_PARAM_INPUT_AMP_CAP_MUTE_CAP_SHIFT)
1120 #define HDA_PARAM_INPUT_AMP_CAP_STEPSIZE(param)                         \
1121     (((param) & HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_MASK) >>               \
1122     HDA_PARAM_INPUT_AMP_CAP_STEPSIZE_SHIFT)
1123 #define HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS(param)                         \
1124     (((param) & HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_MASK) >>               \
1125     HDA_PARAM_INPUT_AMP_CAP_NUMSTEPS_SHIFT)
1126 #define HDA_PARAM_INPUT_AMP_CAP_OFFSET(param)                           \
1127     (((param) & HDA_PARAM_INPUT_AMP_CAP_OFFSET_MASK) >>                 \
1128     HDA_PARAM_INPUT_AMP_CAP_OFFSET_SHIFT)
1129
1130 /* Output Amplifier Capabilities */
1131 #define HDA_PARAM_OUTPUT_AMP_CAP                        0x12
1132
1133 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK          0x80000000
1134 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT         31
1135 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK          0x007f0000
1136 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT         16
1137 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK          0x00007f00
1138 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT         8
1139 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK            0x0000007f
1140 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT           0
1141
1142 #define HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(param)                        \
1143     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_MASK) >>              \
1144     HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP_SHIFT)
1145 #define HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(param)                        \
1146     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_MASK) >>              \
1147     HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE_SHIFT)
1148 #define HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(param)                        \
1149     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_MASK) >>              \
1150     HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS_SHIFT)
1151 #define HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(param)                          \
1152     (((param) & HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_MASK) >>                \
1153     HDA_PARAM_OUTPUT_AMP_CAP_OFFSET_SHIFT)
1154
1155 /* Connection List Length */
1156 #define HDA_PARAM_CONN_LIST_LENGTH                      0x0e
1157
1158 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK       0x00000080
1159 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT      7
1160 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK     0x0000007f
1161 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT    0
1162
1163 #define HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(param)                     \
1164     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_MASK) >>           \
1165     HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM_SHIFT)
1166 #define HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(param)                   \
1167     (((param) & HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_MASK) >>         \
1168     HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH_SHIFT)
1169
1170 /* Supported Power States */
1171 #define HDA_PARAM_SUPP_POWER_STATES                     0x0f
1172
1173 #define HDA_PARAM_SUPP_POWER_STATES_D3_MASK             0x00000008
1174 #define HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT            3
1175 #define HDA_PARAM_SUPP_POWER_STATES_D2_MASK             0x00000004
1176 #define HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT            2
1177 #define HDA_PARAM_SUPP_POWER_STATES_D1_MASK             0x00000002
1178 #define HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT            1
1179 #define HDA_PARAM_SUPP_POWER_STATES_D0_MASK             0x00000001
1180 #define HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT            0
1181
1182 #define HDA_PARAM_SUPP_POWER_STATES_D3(param)                           \
1183     (((param) & HDA_PARAM_SUPP_POWER_STATES_D3_MASK) >>                 \
1184     HDA_PARAM_SUPP_POWER_STATES_D3_SHIFT)
1185 #define HDA_PARAM_SUPP_POWER_STATES_D2(param)                           \
1186     (((param) & HDA_PARAM_SUPP_POWER_STATES_D2_MASK) >>                 \
1187     HDA_PARAM_SUPP_POWER_STATES_D2_SHIFT)
1188 #define HDA_PARAM_SUPP_POWER_STATES_D1(param)                           \
1189     (((param) & HDA_PARAM_SUPP_POWER_STATES_D1_MASK) >>                 \
1190     HDA_PARAM_SUPP_POWER_STATES_D1_SHIFT)
1191 #define HDA_PARAM_SUPP_POWER_STATES_D0(param)                           \
1192     (((param) & HDA_PARAM_SUPP_POWER_STATES_D0_MASK) >>                 \
1193     HDA_PARAM_SUPP_POWER_STATES_D0_SHIFT)
1194
1195 /* Processing Capabilities */
1196 #define HDA_PARAM_PROCESSING_CAP                        0x10
1197
1198 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK          0x0000ff00
1199 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT         8
1200 #define HDA_PARAM_PROCESSING_CAP_BENIGN_MASK            0x00000001
1201 #define HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT           0
1202
1203 #define HDA_PARAM_PROCESSING_CAP_NUMCOEFF(param)                        \
1204     (((param) & HDA_PARAM_PROCESSING_CAP_NUMCOEFF_MASK) >>              \
1205     HDA_PARAM_PROCESSING_CAP_NUMCOEFF_SHIFT)
1206 #define HDA_PARAM_PROCESSING_CAP_BENIGN(param)                          \
1207     (((param) & HDA_PARAM_PROCESSING_CAP_BENIGN_MASK) >>                \
1208     HDA_PARAM_PROCESSING_CAP_BENIGN_SHIFT)
1209
1210 /* GPIO Count */
1211 #define HDA_PARAM_GPIO_COUNT                            0x11
1212
1213 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK              0x80000000
1214 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT             31
1215 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK             0x40000000
1216 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT            30
1217 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK               0x00ff0000
1218 #define HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT              16
1219 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK               0x0000ff00
1220 #define HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT              8
1221 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK              0x000000ff
1222 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT             0
1223
1224 #define HDA_PARAM_GPIO_COUNT_GPI_WAKE(param)                            \
1225     (((param) & HDA_PARAM_GPIO_COUNT_GPI_WAKE_MASK) >>                  \
1226     HDA_PARAM_GPIO_COUNT_GPI_WAKE_SHIFT)
1227 #define HDA_PARAM_GPIO_COUNT_GPI_UNSOL(param)                           \
1228     (((param) & HDA_PARAM_GPIO_COUNT_GPI_UNSOL_MASK) >>                 \
1229     HDA_PARAM_GPIO_COUNT_GPI_UNSOL_SHIFT)
1230 #define HDA_PARAM_GPIO_COUNT_NUM_GPI(param)                             \
1231     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPI_MASK) >>                   \
1232     HDA_PARAM_GPIO_COUNT_NUM_GPI_SHIFT)
1233 #define HDA_PARAM_GPIO_COUNT_NUM_GPO(param)                             \
1234     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPO_MASK) >>                   \
1235     HDA_PARAM_GPIO_COUNT_NUM_GPO_SHIFT)
1236 #define HDA_PARAM_GPIO_COUNT_NUM_GPIO(param)                            \
1237     (((param) & HDA_PARAM_GPIO_COUNT_NUM_GPIO_MASK) >>                  \
1238     HDA_PARAM_GPIO_COUNT_NUM_GPIO_SHIFT)
1239
1240 /* Volume Knob Capabilities */
1241 #define HDA_PARAM_VOLUME_KNOB_CAP                       0x13
1242
1243 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK            0x00000080
1244 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT           7
1245 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK        0x0000007f
1246 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT       0
1247
1248 #define HDA_PARAM_VOLUME_KNOB_CAP_DELTA(param)                          \
1249     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_DELTA_MASK) >>                \
1250     HDA_PARAM_VOLUME_KNOB_CAP_DELTA_SHIFT)
1251 #define HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS(param)                      \
1252     (((param) & HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_MASK) >>            \
1253     HDA_PARAM_VOLUME_KNOB_CAP_NUM_STEPS_SHIFT)
1254
1255
1256 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK            0x0000000f
1257 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT           0
1258 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK         0x000000f0
1259 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT        4
1260 #define HDA_CONFIG_DEFAULTCONF_MISC_MASK                0x00000f00
1261 #define HDA_CONFIG_DEFAULTCONF_MISC_SHIFT               8
1262 #define HDA_CONFIG_DEFAULTCONF_COLOR_MASK               0x0000f000
1263 #define HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT              12
1264 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK     0x000f0000
1265 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT    16
1266 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MASK              0x00f00000
1267 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT             20
1268 #define HDA_CONFIG_DEFAULTCONF_LOCATION_MASK            0x3f000000
1269 #define HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT           24
1270 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK        0xc0000000
1271 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT       30
1272
1273 #define HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf)                           \
1274     (((conf) & HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK) >>                 \
1275     HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT)
1276 #define HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf)                        \
1277     (((conf) & HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) >>              \
1278     HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT)
1279 #define HDA_CONFIG_DEFAULTCONF_MISC(conf)                               \
1280     (((conf) & HDA_CONFIG_DEFAULTCONF_MISC_MASK) >>                     \
1281     HDA_CONFIG_DEFAULTCONF_MISC_SHIFT)
1282 #define HDA_CONFIG_DEFAULTCONF_COLOR(conf)                              \
1283     (((conf) & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >>                    \
1284     HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT)
1285 #define HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf)                    \
1286     (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK) >>          \
1287     HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT)
1288 #define HDA_CONFIG_DEFAULTCONF_DEVICE(conf)                             \
1289     (((conf) & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >>                   \
1290     HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT)
1291 #define HDA_CONFIG_DEFAULTCONF_LOCATION(conf)                           \
1292     (((conf) & HDA_CONFIG_DEFAULTCONF_LOCATION_MASK) >>                 \
1293     HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT)
1294 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)                       \
1295     (((conf) & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >>             \
1296     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT)
1297
1298 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK                (0<<30)
1299 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE                (1<<30)
1300 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED               (2<<30)
1301 #define HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH                (3<<30)
1302
1303 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT                  (0<<20)
1304 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER                   (1<<20)
1305 #define HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT                    (2<<20)
1306 #define HDA_CONFIG_DEFAULTCONF_DEVICE_CD                        (3<<20)
1307 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT                 (4<<20)
1308 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT         (5<<20)
1309 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE                (6<<20)
1310 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET             (7<<20)
1311 #define HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN                   (8<<20)
1312 #define HDA_CONFIG_DEFAULTCONF_DEVICE_AUX                       (9<<20)
1313 #define HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN                    (10<<20)
1314 #define HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY                 (11<<20)
1315 #define HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN                  (12<<20)
1316 #define HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN          (13<<20)
1317 #define HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER                     (15<<20)
1318
1319 #endif