2 * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3 * PCI-SCSI controllers.
5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
7 * This driver also supports the following Symbios/LSI PCI-SCSI chips:
8 * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9 * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode.
12 * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 * Copyright (C) 1998-1999 Gerard Roudier
15 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16 * a port of the FreeBSD ncr driver to Linux-1.2.13.
18 * The original ncr driver has been written for 386bsd and FreeBSD by
19 * Wolfgang Stanglmeier <wolf@cologne.de>
20 * Stefan Esser <se@mi.Uni-Koeln.de>
21 * Copyright (C) 1994 Wolfgang Stanglmeier
23 * The initialisation code, and part of the code that addresses
24 * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25 * written by Justin T. Gibbs.
27 * Other major contributions:
29 * NVRAM detection and reading.
30 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
32 *-----------------------------------------------------------------------------
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 #include <sys/cdefs.h>
59 __FBSDID("$FreeBSD$");
61 #define SYM_DRIVER_NAME "sym-1.6.5-20000902"
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
65 #include <sys/param.h>
68 * Driver configuration options.
71 #include <dev/sym/sym_conf.h>
73 #include <sys/systm.h>
74 #include <sys/malloc.h>
75 #include <sys/endian.h>
76 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/module.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcivar.h>
87 #include <machine/bus.h>
88 #include <machine/resource.h>
91 #include <dev/ofw/openfirm.h>
92 #include <machine/ofw_machdep.h>
98 #include <cam/cam_ccb.h>
99 #include <cam/cam_sim.h>
100 #include <cam/cam_xpt_sim.h>
101 #include <cam/cam_debug.h>
103 #include <cam/scsi/scsi_all.h>
104 #include <cam/scsi/scsi_message.h>
106 /* Short and quite clear integer types */
111 typedef u_int16_t u16;
112 typedef u_int32_t u32;
115 * Driver definitions.
117 #include <dev/sym/sym_defs.h>
118 #include <dev/sym/sym_fw.h>
121 * IA32 architecture does not reorder STORES and prevents
122 * LOADS from passing STORES. It is called `program order'
123 * by Intel and allows device drivers to deal with memory
124 * ordering by only ensuring that the code is not reordered
125 * by the compiler when ordering is required.
126 * Other architectures implement a weaker ordering that
127 * requires memory barriers (and also IO barriers when they
128 * make sense) to be used.
130 #if defined __i386__ || defined __amd64__
131 #define MEMORY_BARRIER() do { ; } while(0)
132 #elif defined __powerpc__
133 #define MEMORY_BARRIER() __asm__ volatile("eieio; sync" : : : "memory")
134 #elif defined __ia64__
135 #define MEMORY_BARRIER() __asm__ volatile("mf.a; mf" : : : "memory")
136 #elif defined __sparc64__
137 #define MEMORY_BARRIER() __asm__ volatile("membar #Sync" : : : "memory")
139 #error "Not supported platform"
143 * A la VMS/CAM-3 queue management.
145 typedef struct sym_quehead {
146 struct sym_quehead *flink; /* Forward pointer */
147 struct sym_quehead *blink; /* Backward pointer */
150 #define sym_que_init(ptr) do { \
151 (ptr)->flink = (ptr); (ptr)->blink = (ptr); \
154 static __inline void __sym_que_add(struct sym_quehead * new,
155 struct sym_quehead * blink,
156 struct sym_quehead * flink)
164 static __inline void __sym_que_del(struct sym_quehead * blink,
165 struct sym_quehead * flink)
167 flink->blink = blink;
168 blink->flink = flink;
171 static __inline int sym_que_empty(struct sym_quehead *head)
173 return head->flink == head;
176 static __inline void sym_que_splice(struct sym_quehead *list,
177 struct sym_quehead *head)
179 struct sym_quehead *first = list->flink;
182 struct sym_quehead *last = list->blink;
183 struct sym_quehead *at = head->flink;
193 #define sym_que_entry(ptr, type, member) \
194 ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
196 #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
198 #define sym_remque(el) __sym_que_del((el)->blink, (el)->flink)
200 #define sym_insque_head(new, head) __sym_que_add(new, head, (head)->flink)
202 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
204 struct sym_quehead *elem = head->flink;
207 __sym_que_del(head, elem->flink);
213 #define sym_insque_tail(new, head) __sym_que_add(new, (head)->blink, head)
216 * This one may be useful.
218 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
219 for (qp = (head)->flink; qp != (head); qp = qp->flink)
221 * FreeBSD does not offer our kind of queue in the CAM CCB.
222 * So, we have to cast.
224 #define sym_qptr(p) ((struct sym_quehead *) (p))
227 * Simple bitmap operations.
229 #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f)))
230 #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
231 #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f)))
234 * Number of tasks per device we want to handle.
236 #if SYM_CONF_MAX_TAG_ORDER > 8
237 #error "more than 256 tags per logical unit not allowed."
239 #define SYM_CONF_MAX_TASK (1<<SYM_CONF_MAX_TAG_ORDER)
242 * Donnot use more tasks that we can handle.
244 #ifndef SYM_CONF_MAX_TAG
245 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
247 #if SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
248 #undef SYM_CONF_MAX_TAG
249 #define SYM_CONF_MAX_TAG SYM_CONF_MAX_TASK
253 * This one means 'NO TAG for this job'
258 * Number of SCSI targets.
260 #if SYM_CONF_MAX_TARGET > 16
261 #error "more than 16 targets not allowed."
265 * Number of logical units per target.
267 #if SYM_CONF_MAX_LUN > 64
268 #error "more than 64 logical units per target not allowed."
272 * Asynchronous pre-scaler (ns). Shall be 40 for
273 * the SCSI timings to be compliant.
275 #define SYM_CONF_MIN_ASYNC (40)
278 * Number of entries in the START and DONE queues.
280 * We limit to 1 PAGE in order to succeed allocation of
281 * these queues. Each entry is 8 bytes long (2 DWORDS).
283 #ifdef SYM_CONF_MAX_START
284 #define SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
286 #define SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
287 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
290 #if SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
291 #undef SYM_CONF_MAX_QUEUE
292 #define SYM_CONF_MAX_QUEUE PAGE_SIZE/8
293 #undef SYM_CONF_MAX_START
294 #define SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
298 * For this one, we want a short name :-)
300 #define MAX_QUEUE SYM_CONF_MAX_QUEUE
303 * Active debugging tags and verbosity.
305 #define DEBUG_ALLOC (0x0001)
306 #define DEBUG_PHASE (0x0002)
307 #define DEBUG_POLL (0x0004)
308 #define DEBUG_QUEUE (0x0008)
309 #define DEBUG_RESULT (0x0010)
310 #define DEBUG_SCATTER (0x0020)
311 #define DEBUG_SCRIPT (0x0040)
312 #define DEBUG_TINY (0x0080)
313 #define DEBUG_TIMING (0x0100)
314 #define DEBUG_NEGO (0x0200)
315 #define DEBUG_TAGS (0x0400)
316 #define DEBUG_POINTER (0x0800)
319 static int sym_debug = 0;
320 #define DEBUG_FLAGS sym_debug
322 /* #define DEBUG_FLAGS (0x0631) */
323 #define DEBUG_FLAGS (0x0000)
326 #define sym_verbose (np->verbose)
329 * Insert a delay in micro-seconds and milli-seconds.
331 static void UDELAY(int us) { DELAY(us); }
332 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
335 * Simple power of two buddy-like allocator.
337 * This simple code is not intended to be fast, but to
338 * provide power of 2 aligned memory allocations.
339 * Since the SCRIPTS processor only supplies 8 bit arithmetic,
340 * this allocator allows simple and fast address calculations
341 * from the SCRIPTS code. In addition, cache line alignment
342 * is guaranteed for power of 2 cache line size.
344 * This allocator has been developed for the Linux sym53c8xx
345 * driver, since this O/S does not provide naturally aligned
347 * It has the advantage of allowing the driver to use private
348 * pages of memory that will be useful if we ever need to deal
349 * with IO MMUs for PCI.
351 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */
352 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */
354 #define MEMO_FREE_UNUSED /* Free unused pages immediately */
357 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER)
358 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT)
359 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1)
361 #define get_pages() malloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_NOWAIT)
362 #define free_pages(p) free((p), M_DEVBUF)
364 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */
366 typedef struct m_link { /* Link between free memory chunks */
370 typedef struct m_vtob { /* Virtual to Bus address translation */
372 bus_dmamap_t dmamap; /* Map for this chunk */
373 m_addr_t vaddr; /* Virtual address */
374 m_addr_t baddr; /* Bus physical address */
376 /* Hash this stuff a bit to speed up translations */
377 #define VTOB_HASH_SHIFT 5
378 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT)
379 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1)
380 #define VTOB_HASH_CODE(m) \
381 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
383 typedef struct m_pool { /* Memory pool of a given kind */
384 bus_dma_tag_t dev_dmat; /* Identifies the pool */
385 bus_dma_tag_t dmat; /* Tag for our fixed allocations */
386 m_addr_t (*getp)(struct m_pool *);
387 #ifdef MEMO_FREE_UNUSED
388 void (*freep)(struct m_pool *, m_addr_t);
390 #define M_GETP() mp->getp(mp)
391 #define M_FREEP(p) mp->freep(mp, p)
393 m_vtob_s *(vtob[VTOB_HASH_SIZE]);
395 struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
398 static void *___sym_malloc(m_pool_s *mp, int size)
401 int s = (1 << MEMO_SHIFT);
406 if (size > MEMO_CLUSTER_SIZE)
416 if (s == MEMO_CLUSTER_SIZE) {
417 h[j].next = (m_link_s *) M_GETP();
419 h[j].next->next = NULL;
425 a = (m_addr_t) h[j].next;
427 h[j].next = h[j].next->next;
431 h[j].next = (m_link_s *) (a+s);
432 h[j].next->next = NULL;
436 printf("___sym_malloc(%d) = %p\n", size, (void *) a);
441 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
444 int s = (1 << MEMO_SHIFT);
450 printf("___sym_mfree(%p, %d)\n", ptr, size);
453 if (size > MEMO_CLUSTER_SIZE)
464 #ifdef MEMO_FREE_UNUSED
465 if (s == MEMO_CLUSTER_SIZE) {
472 while (q->next && q->next != (m_link_s *) b) {
476 ((m_link_s *) a)->next = h[i].next;
477 h[i].next = (m_link_s *) a;
480 q->next = q->next->next;
487 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
491 p = ___sym_malloc(mp, size);
493 if (DEBUG_FLAGS & DEBUG_ALLOC)
494 printf ("new %-10s[%4d] @%p.\n", name, size, p);
498 else if (uflags & MEMO_WARN)
499 printf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
504 #define __sym_calloc(mp, s, n) __sym_calloc2(mp, s, n, MEMO_WARN)
506 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
508 if (DEBUG_FLAGS & DEBUG_ALLOC)
509 printf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
511 ___sym_mfree(mp, ptr, size);
516 * Default memory pool we donnot need to involve in DMA.
519 * With the `bus dma abstraction', we use a separate pool for
520 * memory we donnot need to involve in DMA.
522 static m_addr_t ___mp0_getp(m_pool_s *mp)
524 m_addr_t m = (m_addr_t) get_pages();
530 #ifdef MEMO_FREE_UNUSED
531 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
538 #ifdef MEMO_FREE_UNUSED
539 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
541 static m_pool_s mp0 = {0, 0, ___mp0_getp};
545 * Actual memory allocation routine for non-DMAed memory.
547 static void *sym_calloc(int size, char *name)
551 m = __sym_calloc(&mp0, size, name);
557 * Actual memory allocation routine for non-DMAed memory.
559 static void sym_mfree(void *ptr, int size, char *name)
562 __sym_mfree(&mp0, ptr, size, name);
570 * With `bus dma abstraction', we use a separate pool per parent
571 * BUS handle. A reverse table (hashed) is maintained for virtual
572 * to BUS address translation.
574 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg __unused,
579 KASSERT(nseg == 1, ("%s: too many DMA segments (%d)", __func__, nseg));
581 baddr = (bus_addr_t *)arg;
585 *baddr = segs->ds_addr;
588 static m_addr_t ___dma_getp(m_pool_s *mp)
592 bus_addr_t baddr = 0;
594 vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
598 if (bus_dmamem_alloc(mp->dmat, &vaddr,
599 BUS_DMA_COHERENT | BUS_DMA_WAITOK, &vbp->dmamap))
601 bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
602 MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, BUS_DMA_NOWAIT);
604 int hc = VTOB_HASH_CODE(vaddr);
605 vbp->vaddr = (m_addr_t) vaddr;
606 vbp->baddr = (m_addr_t) baddr;
607 vbp->next = mp->vtob[hc];
610 return (m_addr_t) vaddr;
614 bus_dmamap_unload(mp->dmat, vbp->dmamap);
616 bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
619 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
620 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
625 #ifdef MEMO_FREE_UNUSED
626 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
628 m_vtob_s **vbpp, *vbp;
629 int hc = VTOB_HASH_CODE(m);
631 vbpp = &mp->vtob[hc];
632 while (*vbpp && (*vbpp)->vaddr != m)
633 vbpp = &(*vbpp)->next;
636 *vbpp = (*vbpp)->next;
637 bus_dmamap_unload(mp->dmat, vbp->dmamap);
638 bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
639 bus_dmamap_destroy(mp->dmat, vbp->dmamap);
640 __sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
646 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
649 for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
653 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
657 mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
659 mp->dev_dmat = dev_dmat;
660 if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
661 BUS_SPACE_MAXADDR_32BIT,
663 NULL, NULL, MEMO_CLUSTER_SIZE, 1,
664 MEMO_CLUSTER_SIZE, 0,
665 NULL, NULL, &mp->dmat)) {
666 mp->getp = ___dma_getp;
667 #ifdef MEMO_FREE_UNUSED
668 mp->freep = ___dma_freep;
676 __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
680 #ifdef MEMO_FREE_UNUSED
681 static void ___del_dma_pool(m_pool_s *p)
683 struct m_pool **pp = &mp0.next;
685 while (*pp && *pp != p)
689 bus_dma_tag_destroy(p->dmat);
690 __sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
695 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
701 mp = ___get_dma_pool(dev_dmat);
703 mp = ___cre_dma_pool(dev_dmat);
705 m = __sym_calloc(mp, size, name);
706 #ifdef MEMO_FREE_UNUSED
716 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
721 mp = ___get_dma_pool(dev_dmat);
723 __sym_mfree(mp, m, size, name);
724 #ifdef MEMO_FREE_UNUSED
731 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
734 int hc = VTOB_HASH_CODE(m);
736 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
739 mp = ___get_dma_pool(dev_dmat);
742 while (vp && (m_addr_t) vp->vaddr != a)
747 panic("sym: VTOBUS FAILED!\n");
748 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
752 * Verbs for DMAable memory handling.
753 * The _uvptv_ macro avoids a nasty warning about pointer to volatile
756 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
757 #define _sym_calloc_dma(np, s, n) __sym_calloc_dma(np->bus_dmat, s, n)
758 #define _sym_mfree_dma(np, p, s, n) \
759 __sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
760 #define sym_calloc_dma(s, n) _sym_calloc_dma(np, s, n)
761 #define sym_mfree_dma(p, s, n) _sym_mfree_dma(np, p, s, n)
762 #define _vtobus(np, p) __vtobus(np->bus_dmat, _uvptv_(p))
763 #define vtobus(p) _vtobus(np, p)
766 * Print a buffer in hexadecimal format.
768 static void sym_printb_hex (u_char *p, int n)
771 printf (" %x", *p++);
775 * Same with a label at beginning and .\n at end.
777 static void sym_printl_hex (char *label, u_char *p, int n)
779 printf ("%s", label);
780 sym_printb_hex (p, n);
785 * Return a string for SCSI BUS mode.
787 static const char *sym_scsi_bus_mode(int mode)
790 case SMODE_HVD: return "HVD";
791 case SMODE_SE: return "SE";
792 case SMODE_LVD: return "LVD";
798 * Some poor and bogus sync table that refers to Tekram NVRAM layout.
800 #ifdef SYM_CONF_NVRAM_SUPPORT
801 static const u_char Tekram_sync[16] =
802 {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
806 * Union of supported NVRAM formats.
810 #define SYM_SYMBIOS_NVRAM (1)
811 #define SYM_TEKRAM_NVRAM (2)
812 #ifdef SYM_CONF_NVRAM_SUPPORT
814 Symbios_nvram Symbios;
821 * This one is hopefully useless, but actually useful. :-)
824 #define assert(expression) { \
825 if (!(expression)) { \
827 "assertion \"%s\" failed: file \"%s\", line %d\n", \
829 __FILE__, __LINE__); \
835 * Some provision for a possible big endian mode supported by
836 * Symbios chips (never seen, by the way).
837 * For now, this stuff does not deserve any comments. :)
839 #define sym_offb(o) (o)
840 #define sym_offw(o) (o)
843 * Some provision for support for BIG ENDIAN CPU.
845 #define cpu_to_scr(dw) htole32(dw)
846 #define scr_to_cpu(dw) le32toh(dw)
849 * Access to the chip IO registers and on-chip RAM.
850 * We use the `bus space' interface under FreeBSD-4 and
851 * later kernel versions.
853 #if defined(SYM_CONF_IOMAPPED)
855 #define INB_OFF(o) bus_read_1(np->io_res, (o))
856 #define INW_OFF(o) bus_read_2(np->io_res, (o))
857 #define INL_OFF(o) bus_read_4(np->io_res, (o))
859 #define OUTB_OFF(o, v) bus_write_1(np->io_res, (o), (v))
860 #define OUTW_OFF(o, v) bus_write_2(np->io_res, (o), (v))
861 #define OUTL_OFF(o, v) bus_write_4(np->io_res, (o), (v))
863 #else /* Memory mapped IO */
865 #define INB_OFF(o) bus_read_1(np->mmio_res, (o))
866 #define INW_OFF(o) bus_read_2(np->mmio_res, (o))
867 #define INL_OFF(o) bus_read_4(np->mmio_res, (o))
869 #define OUTB_OFF(o, v) bus_write_1(np->mmio_res, (o), (v))
870 #define OUTW_OFF(o, v) bus_write_2(np->mmio_res, (o), (v))
871 #define OUTL_OFF(o, v) bus_write_4(np->mmio_res, (o), (v))
873 #endif /* SYM_CONF_IOMAPPED */
875 #define OUTRAM_OFF(o, a, l) \
876 bus_write_region_1(np->ram_res, (o), (a), (l))
879 * Common definitions for both bus space and legacy IO methods.
881 #define INB(r) INB_OFF(offsetof(struct sym_reg,r))
882 #define INW(r) INW_OFF(offsetof(struct sym_reg,r))
883 #define INL(r) INL_OFF(offsetof(struct sym_reg,r))
885 #define OUTB(r, v) OUTB_OFF(offsetof(struct sym_reg,r), (v))
886 #define OUTW(r, v) OUTW_OFF(offsetof(struct sym_reg,r), (v))
887 #define OUTL(r, v) OUTL_OFF(offsetof(struct sym_reg,r), (v))
889 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
890 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
891 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
892 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
893 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
894 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
897 * We normally want the chip to have a consistent view
898 * of driver internal data structures when we restart it.
901 #define OUTL_DSP(v) \
904 OUTL (nc_dsp, (v)); \
907 #define OUTONB_STD() \
910 OUTONB (nc_dcntl, (STD|NOCOM)); \
914 * Command control block states.
918 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
919 #define HS_DISCONNECT (3) /* Disconnected by target */
920 #define HS_WAIT (4) /* waiting for resource */
922 #define HS_DONEMASK (0x80)
923 #define HS_COMPLETE (4|HS_DONEMASK)
924 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */
925 #define HS_UNEXPECTED (6|HS_DONEMASK) /* Unexpected disconnect */
926 #define HS_COMP_ERR (7|HS_DONEMASK) /* Completed with error */
929 * Software Interrupt Codes
931 #define SIR_BAD_SCSI_STATUS (1)
932 #define SIR_SEL_ATN_NO_MSG_OUT (2)
933 #define SIR_MSG_RECEIVED (3)
934 #define SIR_MSG_WEIRD (4)
935 #define SIR_NEGO_FAILED (5)
936 #define SIR_NEGO_PROTO (6)
937 #define SIR_SCRIPT_STOPPED (7)
938 #define SIR_REJECT_TO_SEND (8)
939 #define SIR_SWIDE_OVERRUN (9)
940 #define SIR_SODL_UNDERRUN (10)
941 #define SIR_RESEL_NO_MSG_IN (11)
942 #define SIR_RESEL_NO_IDENTIFY (12)
943 #define SIR_RESEL_BAD_LUN (13)
944 #define SIR_TARGET_SELECTED (14)
945 #define SIR_RESEL_BAD_I_T_L (15)
946 #define SIR_RESEL_BAD_I_T_L_Q (16)
947 #define SIR_ABORT_SENT (17)
948 #define SIR_RESEL_ABORTED (18)
949 #define SIR_MSG_OUT_DONE (19)
950 #define SIR_COMPLETE_ERROR (20)
951 #define SIR_DATA_OVERRUN (21)
952 #define SIR_BAD_PHASE (22)
956 * Extended error bit codes.
957 * xerr_status field of struct sym_ccb.
959 #define XE_EXTRA_DATA (1) /* unexpected data phase */
960 #define XE_BAD_PHASE (1<<1) /* illegal phase (4/5) */
961 #define XE_PARITY_ERR (1<<2) /* unrecovered SCSI parity error */
962 #define XE_SODL_UNRUN (1<<3) /* ODD transfer in DATA OUT phase */
963 #define XE_SWIDE_OVRUN (1<<4) /* ODD transfer in DATA IN phase */
966 * Negotiation status.
967 * nego_status field of struct sym_ccb.
974 * A CCB hashed table is used to retrieve CCB address
977 #define CCB_HASH_SHIFT 8
978 #define CCB_HASH_SIZE (1UL << CCB_HASH_SHIFT)
979 #define CCB_HASH_MASK (CCB_HASH_SIZE-1)
980 #define CCB_HASH_CODE(dsa) (((dsa) >> 9) & CCB_HASH_MASK)
985 #define SYM_DISC_ENABLED (1)
986 #define SYM_TAGS_ENABLED (1<<1)
987 #define SYM_SCAN_BOOT_DISABLED (1<<2)
988 #define SYM_SCAN_LUNS_DISABLED (1<<3)
991 * Host adapter miscellaneous flags.
993 #define SYM_AVOID_BUS_RESET (1)
994 #define SYM_SCAN_TARGETS_HILO (1<<1)
998 * Some devices, for example the CHEETAH 2 LVD, disconnects without
999 * saving the DATA POINTER then reselects and terminates the IO.
1000 * On reselection, the automatic RESTORE DATA POINTER makes the
1001 * CURRENT DATA POINTER not point at the end of the IO.
1002 * This behaviour just breaks our calculation of the residual.
1003 * For now, we just force an AUTO SAVE on disconnection and will
1004 * fix that in a further driver version.
1006 #define SYM_QUIRK_AUTOSAVE 1
1011 #define SYM_LOCK() mtx_lock(&np->mtx)
1012 #define SYM_LOCK_ASSERT(_what) mtx_assert(&np->mtx, (_what))
1013 #define SYM_LOCK_DESTROY() mtx_destroy(&np->mtx)
1014 #define SYM_LOCK_INIT() mtx_init(&np->mtx, "sym_lock", NULL, MTX_DEF)
1015 #define SYM_LOCK_INITIALIZED() mtx_initialized(&np->mtx)
1016 #define SYM_UNLOCK() mtx_unlock(&np->mtx)
1018 #define SYM_SNOOP_TIMEOUT (10000000)
1019 #define SYM_PCI_IO PCIR_BAR(0)
1020 #define SYM_PCI_MMIO PCIR_BAR(1)
1021 #define SYM_PCI_RAM PCIR_BAR(2)
1022 #define SYM_PCI_RAM64 PCIR_BAR(3)
1025 * Back-pointer from the CAM CCB to our data structures.
1027 #define sym_hcb_ptr spriv_ptr0
1028 /* #define sym_ccb_ptr spriv_ptr1 */
1031 * We mostly have to deal with pointers.
1032 * Thus these typedef's.
1034 typedef struct sym_tcb *tcb_p;
1035 typedef struct sym_lcb *lcb_p;
1036 typedef struct sym_ccb *ccb_p;
1037 typedef struct sym_hcb *hcb_p;
1040 * Gather negotiable parameters value
1048 u8 options; /* PPR options */
1052 struct sym_trans current;
1053 struct sym_trans goal;
1054 struct sym_trans user;
1057 #define BUS_8_BIT MSG_EXT_WDTR_BUS_8_BIT
1058 #define BUS_16_BIT MSG_EXT_WDTR_BUS_16_BIT
1061 * Global TCB HEADER.
1063 * Due to lack of indirect addressing on earlier NCR chips,
1064 * this substructure is copied from the TCB to a global
1065 * address after selection.
1066 * For SYMBIOS chips that support LOAD/STORE this copy is
1067 * not needed and thus not performed.
1071 * Scripts bus addresses of LUN table accessed from scripts.
1072 * LUN #0 is a special case, since multi-lun devices are rare,
1073 * and we we want to speed-up the general case and not waste
1076 u32 luntbl_sa; /* bus address of this table */
1077 u32 lun0_sa; /* bus address of LCB #0 */
1079 * Actual SYNC/WIDE IO registers value for this target.
1080 * 'sval', 'wval' and 'uval' are read from SCRIPTS and
1081 * so have alignment constraints.
1083 /*0*/ u_char uval; /* -> SCNTL4 register */
1084 /*1*/ u_char sval; /* -> SXFER io register */
1085 /*2*/ u_char filler1;
1086 /*3*/ u_char wval; /* -> SCNTL3 io register */
1090 * Target Control Block
1095 * Assumed at offset 0.
1097 /*0*/ struct sym_tcbh head;
1100 * LUN table used by the SCRIPTS processor.
1101 * An array of bus addresses is used on reselection.
1103 u32 *luntbl; /* LCBs bus address table */
1106 * LUN table used by the C code.
1108 lcb_p lun0p; /* LCB of LUN #0 (usual case) */
1109 #if SYM_CONF_MAX_LUN > 1
1110 lcb_p *lunmp; /* Other LCBs [1..MAX_LUN] */
1114 * Bitmap that tells about LUNs that succeeded at least
1115 * 1 IO and therefore assumed to be a real device.
1116 * Avoid useless allocation of the LCB structure.
1118 u32 lun_map[(SYM_CONF_MAX_LUN+31)/32];
1121 * Bitmap that tells about LUNs that haven't yet an LCB
1122 * allocated (not discovered or LCB allocation failed).
1124 u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1127 * Transfer capabilities (SIP)
1129 struct sym_tinfo tinfo;
1132 * Keep track of the CCB used for the negotiation in order
1133 * to ensure that only 1 negotiation is queued at a time.
1135 ccb_p nego_cp; /* CCB used for the nego */
1138 * Set when we want to reset the device.
1143 * Other user settable limits and options.
1144 * These limits are read from the NVRAM if present.
1151 * Assert some alignments required by the chip.
1153 CTASSERT(((offsetof(struct sym_reg, nc_sxfer) ^
1154 offsetof(struct sym_tcb, head.sval)) &3) == 0);
1155 CTASSERT(((offsetof(struct sym_reg, nc_scntl3) ^
1156 offsetof(struct sym_tcb, head.wval)) &3) == 0);
1159 * Global LCB HEADER.
1161 * Due to lack of indirect addressing on earlier NCR chips,
1162 * this substructure is copied from the LCB to a global
1163 * address after selection.
1164 * For SYMBIOS chips that support LOAD/STORE this copy is
1165 * not needed and thus not performed.
1169 * SCRIPTS address jumped by SCRIPTS on reselection.
1170 * For not probed logical units, this address points to
1171 * SCRIPTS that deal with bad LU handling (must be at
1172 * offset zero of the LCB for that reason).
1177 * Task (bus address of a CCB) read from SCRIPTS that points
1178 * to the unique ITL nexus allowed to be disconnected.
1183 * Task table bus address (read from SCRIPTS).
1189 * Logical Unit Control Block
1194 * Assumed at offset 0.
1196 /*0*/ struct sym_lcbh head;
1199 * Task table read from SCRIPTS that contains pointers to
1200 * ITLQ nexuses. The bus address read from SCRIPTS is
1201 * inside the header.
1203 u32 *itlq_tbl; /* Kernel virtual address */
1206 * Busy CCBs management.
1208 u_short busy_itlq; /* Number of busy tagged CCBs */
1209 u_short busy_itl; /* Number of busy untagged CCBs */
1212 * Circular tag allocation buffer.
1214 u_short ia_tag; /* Tag allocation index */
1215 u_short if_tag; /* Tag release index */
1216 u_char *cb_tags; /* Circular tags buffer */
1219 * Set when we want to clear all tasks.
1227 u_char current_flags;
1231 * Action from SCRIPTS on a task.
1232 * Is part of the CCB, but is also used separately to plug
1233 * error handling action to perform from SCRIPTS.
1236 u32 start; /* Jumped by SCRIPTS after selection */
1237 u32 restart; /* Jumped by SCRIPTS on relection */
1241 * Phase mismatch context.
1243 * It is part of the CCB and is used as parameters for the
1244 * DATA pointer. We need two contexts to handle correctly the
1245 * SAVED DATA POINTER.
1248 struct sym_tblmove sg; /* Updated interrupted SG block */
1249 u32 ret; /* SCRIPT return address */
1253 * LUN control block lookup.
1254 * We use a direct pointer for LUN #0, and a table of
1255 * pointers which is only allocated for devices that support
1258 #if SYM_CONF_MAX_LUN <= 1
1259 #define sym_lp(tp, lun) (!lun) ? (tp)->lun0p : 0
1261 #define sym_lp(tp, lun) \
1262 (!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1266 * Status are used by the host and the script processor.
1268 * The last four bytes (status[4]) are copied to the
1269 * scratchb register (declared as scr0..scr3) just after the
1270 * select/reselect, and copied back just after disconnecting.
1271 * Inside the script the XX_REG are used.
1275 * Last four bytes (script)
1279 #define HS_PRT nc_scr1
1281 #define SS_PRT nc_scr2
1283 #define HF_PRT nc_scr3
1286 * Last four bytes (host)
1288 #define actualquirks phys.head.status[0]
1289 #define host_status phys.head.status[1]
1290 #define ssss_status phys.head.status[2]
1291 #define host_flags phys.head.status[3]
1296 #define HF_IN_PM0 1u
1297 #define HF_IN_PM1 (1u<<1)
1298 #define HF_ACT_PM (1u<<2)
1299 #define HF_DP_SAVED (1u<<3)
1300 #define HF_SENSE (1u<<4)
1301 #define HF_EXT_ERR (1u<<5)
1302 #define HF_DATA_IN (1u<<6)
1303 #ifdef SYM_CONF_IARB_SUPPORT
1304 #define HF_HINT_IARB (1u<<7)
1308 * Global CCB HEADER.
1310 * Due to lack of indirect addressing on earlier NCR chips,
1311 * this substructure is copied from the ccb to a global
1312 * address after selection (or reselection) and copied back
1313 * before disconnect.
1314 * For SYMBIOS chips that support LOAD/STORE this copy is
1315 * not needed and thus not performed.
1319 * Start and restart SCRIPTS addresses (must be at 0).
1321 /*0*/ struct sym_actscr go;
1324 * SCRIPTS jump address that deal with data pointers.
1325 * 'savep' points to the position in the script responsible
1326 * for the actual transfer of data.
1327 * It's written on reception of a SAVE_DATA_POINTER message.
1329 u32 savep; /* Jump address to saved data pointer */
1330 u32 lastp; /* SCRIPTS address at end of data */
1331 u32 goalp; /* Not accessed for now from SCRIPTS */
1340 * Data Structure Block
1342 * During execution of a ccb by the script processor, the
1343 * DSA (data structure address) register points to this
1344 * substructure of the ccb.
1349 * Also assumed at offset 0 of the sym_ccb structure.
1351 /*0*/ struct sym_ccbh head;
1354 * Phase mismatch contexts.
1355 * We need two to handle correctly the SAVED DATA POINTER.
1356 * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1357 * for address calculation from SCRIPTS.
1363 * Table data for Script
1365 struct sym_tblsel select;
1366 struct sym_tblmove smsg;
1367 struct sym_tblmove smsg_ext;
1368 struct sym_tblmove cmd;
1369 struct sym_tblmove sense;
1370 struct sym_tblmove wresid;
1371 struct sym_tblmove data [SYM_CONF_MAX_SG];
1375 * Our Command Control Block
1379 * This is the data structure which is pointed by the DSA
1380 * register when it is executed by the script processor.
1381 * It must be the first entry.
1383 struct sym_dsb phys;
1386 * Pointer to CAM ccb and related stuff.
1388 struct callout ch; /* callout handle */
1389 union ccb *cam_ccb; /* CAM scsiio ccb */
1390 u8 cdb_buf[16]; /* Copy of CDB */
1391 u8 *sns_bbuf; /* Bounce buffer for sense data */
1392 #define SYM_SNS_BBUF_LEN sizeof(struct scsi_sense_data)
1393 int data_len; /* Total data length */
1394 int segments; /* Number of SG segments */
1397 * Miscellaneous status'.
1399 u_char nego_status; /* Negotiation status */
1400 u_char xerr_status; /* Extended error flags */
1401 u32 extra_bytes; /* Extraneous bytes transferred */
1405 * We prepare a message to be sent after selection.
1406 * We may use a second one if the command is rescheduled
1407 * due to CHECK_CONDITION or COMMAND TERMINATED.
1408 * Contents are IDENTIFY and SIMPLE_TAG.
1409 * While negotiating sync or wide transfer,
1410 * a SDTR or WDTR message is appended.
1412 u_char scsi_smsg [12];
1413 u_char scsi_smsg2[12];
1416 * Auto request sense related fields.
1418 u_char sensecmd[6]; /* Request Sense command */
1419 u_char sv_scsi_status; /* Saved SCSI status */
1420 u_char sv_xerr_status; /* Saved extended status */
1421 int sv_resid; /* Saved residual */
1424 * Map for the DMA of user data.
1426 void *arg; /* Argument for some callback */
1427 bus_dmamap_t dmamap; /* DMA map for user data */
1429 #define SYM_DMA_NONE 0
1430 #define SYM_DMA_READ 1
1431 #define SYM_DMA_WRITE 2
1435 u32 ccb_ba; /* BUS address of this CCB */
1436 u_short tag; /* Tag for this transfer */
1437 /* NO_TAG means no tag */
1440 ccb_p link_ccbh; /* Host adapter CCB hash chain */
1442 link_ccbq; /* Link to free/busy CCB queue */
1443 u32 startp; /* Initial data pointer */
1444 int ext_sg; /* Extreme data pointer, used */
1445 int ext_ofs; /* to calculate the residual. */
1446 u_char to_abort; /* Want this IO to be aborted */
1449 #define CCB_BA(cp,lbl) (cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1452 * Host Control Block
1459 * Due to poorness of addressing capabilities, earlier
1460 * chips (810, 815, 825) copy part of the data structures
1461 * (CCB, TCB and LCB) in fixed areas.
1463 #ifdef SYM_CONF_GENERIC_SUPPORT
1464 struct sym_ccbh ccb_head;
1465 struct sym_tcbh tcb_head;
1466 struct sym_lcbh lcb_head;
1469 * Idle task and invalid task actions and
1470 * their bus addresses.
1472 struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1473 vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1476 * Dummy lun table to protect us against target
1477 * returning bad lun number on reselection.
1479 u32 *badluntbl; /* Table physical address */
1480 u32 badlun_sa; /* SCRIPT handler BUS address */
1483 * Bus address of this host control block.
1488 * Bit 32-63 of the on-chip RAM bus address in LE format.
1489 * The START_RAM64 script loads the MMRS and MMWS from this
1495 * Chip and controller indentification.
1500 * Initial value of some IO register bits.
1501 * These values are assumed to have been set by BIOS, and may
1502 * be used to probe adapter implementation differences.
1504 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1505 sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1509 * Actual initial value of IO register bits used by the
1510 * driver. They are loaded at initialisation according to
1511 * features that are to be enabled/disabled.
1513 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1514 rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1520 struct sym_tcb *target;
1522 struct sym_tcb target[SYM_CONF_MAX_TARGET];
1526 * Target control block bus address array used by the SCRIPT
1533 * CAM SIM information for this instance.
1535 struct cam_sim *sim;
1536 struct cam_path *path;
1539 * Allocated hardware resources.
1541 struct resource *irq_res;
1542 struct resource *io_res;
1543 struct resource *mmio_res;
1544 struct resource *ram_res;
1551 * My understanding of PCI is that all agents must share the
1552 * same addressing range and model.
1553 * But some hardware architecture guys provide complex and
1554 * brain-deaded stuff that makes shit.
1555 * This driver only support PCI compliant implementations and
1556 * deals with part of the BUS stuff complexity only to fit O/S
1563 bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */
1564 bus_dma_tag_t data_dmat; /* DMA tag for user data */
1566 * BUS addresses of the chip
1568 vm_offset_t mmio_ba; /* MMIO BUS address */
1569 int mmio_ws; /* MMIO Window size */
1571 vm_offset_t ram_ba; /* RAM BUS address */
1572 int ram_ws; /* RAM window size */
1575 * SCRIPTS virtual and physical bus addresses.
1576 * 'script' is loaded in the on-chip RAM if present.
1577 * 'scripth' stays in main memory for all chips except the
1578 * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1580 u_char *scripta0; /* Copies of script and scripth */
1581 u_char *scriptb0; /* Copies of script and scripth */
1582 vm_offset_t scripta_ba; /* Actual script and scripth */
1583 vm_offset_t scriptb_ba; /* bus addresses. */
1584 vm_offset_t scriptb0_ba;
1585 u_short scripta_sz; /* Actual size of script A */
1586 u_short scriptb_sz; /* Actual size of script B */
1589 * Bus addresses, setup and patch methods for
1590 * the selected firmware.
1592 struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */
1593 struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */
1594 void (*fw_setup)(hcb_p np, const struct sym_fw *fw);
1595 void (*fw_patch)(hcb_p np);
1596 const char *fw_name;
1599 * General controller parameters and configuration.
1601 u_short device_id; /* PCI device id */
1602 u_char revision_id; /* PCI device revision id */
1603 u_int features; /* Chip features map */
1604 u_char myaddr; /* SCSI id of the adapter */
1605 u_char maxburst; /* log base 2 of dwords burst */
1606 u_char maxwide; /* Maximum transfer width */
1607 u_char minsync; /* Min sync period factor (ST) */
1608 u_char maxsync; /* Max sync period factor (ST) */
1609 u_char maxoffs; /* Max scsi offset (ST) */
1610 u_char minsync_dt; /* Min sync period factor (DT) */
1611 u_char maxsync_dt; /* Max sync period factor (DT) */
1612 u_char maxoffs_dt; /* Max scsi offset (DT) */
1613 u_char multiplier; /* Clock multiplier (1,2,4) */
1614 u_char clock_divn; /* Number of clock divisors */
1615 u32 clock_khz; /* SCSI clock frequency in KHz */
1616 u32 pciclk_khz; /* Estimated PCI clock in KHz */
1618 * Start queue management.
1619 * It is filled up by the host processor and accessed by the
1620 * SCRIPTS processor in order to start SCSI commands.
1622 volatile /* Prevent code optimizations */
1623 u32 *squeue; /* Start queue virtual address */
1624 u32 squeue_ba; /* Start queue BUS address */
1625 u_short squeueput; /* Next free slot of the queue */
1626 u_short actccbs; /* Number of allocated CCBs */
1629 * Command completion queue.
1630 * It is the same size as the start queue to avoid overflow.
1632 u_short dqueueget; /* Next position to scan */
1633 volatile /* Prevent code optimizations */
1634 u32 *dqueue; /* Completion (done) queue */
1635 u32 dqueue_ba; /* Done queue BUS address */
1638 * Miscellaneous buffers accessed by the scripts-processor.
1639 * They shall be DWORD aligned, because they may be read or
1640 * written with a script command.
1642 u_char msgout[8]; /* Buffer for MESSAGE OUT */
1643 u_char msgin [8]; /* Buffer for MESSAGE IN */
1644 u32 lastmsg; /* Last SCSI message sent */
1645 u_char scratch; /* Scratch for SCSI receive */
1648 * Miscellaneous configuration and status parameters.
1650 u_char usrflags; /* Miscellaneous user flags */
1651 u_char scsi_mode; /* Current SCSI BUS mode */
1652 u_char verbose; /* Verbosity for this controller*/
1653 u32 cache; /* Used for cache test at init. */
1656 * CCB lists and queue.
1658 ccb_p ccbh[CCB_HASH_SIZE]; /* CCB hashed by DSA value */
1659 SYM_QUEHEAD free_ccbq; /* Queue of available CCBs */
1660 SYM_QUEHEAD busy_ccbq; /* Queue of busy CCBs */
1663 * During error handling and/or recovery,
1664 * active CCBs that are to be completed with
1665 * error or requeued are moved from the busy_ccbq
1666 * to the comp_ccbq prior to completion.
1668 SYM_QUEHEAD comp_ccbq;
1671 * CAM CCB pending queue.
1673 SYM_QUEHEAD cam_ccbq;
1676 * IMMEDIATE ARBITRATION (IARB) control.
1678 * We keep track in 'last_cp' of the last CCB that has been
1679 * queued to the SCRIPTS processor and clear 'last_cp' when
1680 * this CCB completes. If last_cp is not zero at the moment
1681 * we queue a new CCB, we set a flag in 'last_cp' that is
1682 * used by the SCRIPTS as a hint for setting IARB.
1683 * We donnot set more than 'iarb_max' consecutive hints for
1684 * IARB in order to leave devices a chance to reselect.
1685 * By the way, any non zero value of 'iarb_max' is unfair. :)
1687 #ifdef SYM_CONF_IARB_SUPPORT
1688 u_short iarb_max; /* Max. # consecutive IARB hints*/
1689 u_short iarb_count; /* Actual # of these hints */
1694 * Command abort handling.
1695 * We need to synchronize tightly with the SCRIPTS
1696 * processor in order to handle things correctly.
1698 u_char abrt_msg[4]; /* Message to send buffer */
1699 struct sym_tblmove abrt_tbl; /* Table for the MOV of it */
1700 struct sym_tblsel abrt_sel; /* Sync params for selection */
1701 u_char istat_sem; /* Tells the chip to stop (SEM) */
1704 #define HCB_BA(np, lbl) (np->hcb_ba + offsetof(struct sym_hcb, lbl))
1707 * Return the name of the controller.
1709 static __inline const char *sym_name(hcb_p np)
1711 return device_get_nameunit(np->device);
1714 /*--------------------------------------------------------------------------*/
1715 /*------------------------------ FIRMWARES ---------------------------------*/
1716 /*--------------------------------------------------------------------------*/
1719 * This stuff will be moved to a separate source file when
1720 * the driver will be broken into several source modules.
1724 * Macros used for all firmwares.
1726 #define SYM_GEN_A(s, label) ((short) offsetof(s, label)),
1727 #define SYM_GEN_B(s, label) ((short) offsetof(s, label)),
1728 #define PADDR_A(label) SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1729 #define PADDR_B(label) SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1731 #ifdef SYM_CONF_GENERIC_SUPPORT
1733 * Allocate firmware #1 script area.
1735 #define SYM_FWA_SCR sym_fw1a_scr
1736 #define SYM_FWB_SCR sym_fw1b_scr
1737 #include <dev/sym/sym_fw1.h>
1738 static const struct sym_fwa_ofs sym_fw1a_ofs = {
1739 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1741 static const struct sym_fwb_ofs sym_fw1b_ofs = {
1742 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1746 #endif /* SYM_CONF_GENERIC_SUPPORT */
1749 * Allocate firmware #2 script area.
1751 #define SYM_FWA_SCR sym_fw2a_scr
1752 #define SYM_FWB_SCR sym_fw2b_scr
1753 #include <dev/sym/sym_fw2.h>
1754 static const struct sym_fwa_ofs sym_fw2a_ofs = {
1755 SYM_GEN_FW_A(struct SYM_FWA_SCR)
1757 static const struct sym_fwb_ofs sym_fw2b_ofs = {
1758 SYM_GEN_FW_B(struct SYM_FWB_SCR)
1759 SYM_GEN_B(struct SYM_FWB_SCR, start64)
1760 SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1770 #ifdef SYM_CONF_GENERIC_SUPPORT
1772 * Patch routine for firmware #1.
1775 sym_fw1_patch(hcb_p np)
1777 struct sym_fw1a_scr *scripta0;
1778 struct sym_fw1b_scr *scriptb0;
1780 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1781 scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1784 * Remove LED support if not needed.
1786 if (!(np->features & FE_LED0)) {
1787 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1788 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1789 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1792 #ifdef SYM_CONF_IARB_SUPPORT
1794 * If user does not want to use IMMEDIATE ARBITRATION
1795 * when we are reselected while attempting to arbitrate,
1796 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1798 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1799 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1802 * Patch some data in SCRIPTS.
1803 * - start and done queue initial bus address.
1804 * - target bus address table bus address.
1806 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1807 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1808 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1810 #endif /* SYM_CONF_GENERIC_SUPPORT */
1813 * Patch routine for firmware #2.
1816 sym_fw2_patch(hcb_p np)
1818 struct sym_fw2a_scr *scripta0;
1819 struct sym_fw2b_scr *scriptb0;
1821 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1822 scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
1825 * Remove LED support if not needed.
1827 if (!(np->features & FE_LED0)) {
1828 scripta0->idle[0] = cpu_to_scr(SCR_NO_OP);
1829 scripta0->reselected[0] = cpu_to_scr(SCR_NO_OP);
1830 scripta0->start[0] = cpu_to_scr(SCR_NO_OP);
1833 #ifdef SYM_CONF_IARB_SUPPORT
1835 * If user does not want to use IMMEDIATE ARBITRATION
1836 * when we are reselected while attempting to arbitrate,
1837 * patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1839 if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1840 scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1843 * Patch some variable in SCRIPTS.
1844 * - start and done queue initial bus address.
1845 * - target bus address table bus address.
1847 scriptb0->startpos[0] = cpu_to_scr(np->squeue_ba);
1848 scriptb0->done_pos[0] = cpu_to_scr(np->dqueue_ba);
1849 scriptb0->targtbl[0] = cpu_to_scr(np->targtbl_ba);
1852 * Remove the load of SCNTL4 on reselection if not a C10.
1854 if (!(np->features & FE_C10)) {
1855 scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
1856 scripta0->resel_scntl4[1] = cpu_to_scr(0);
1860 * Remove a couple of work-arounds specific to C1010 if
1861 * they are not desirable. See `sym_fw2.h' for more details.
1863 if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
1864 np->revision_id < 0x1 &&
1865 np->pciclk_khz < 60000)) {
1866 scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
1867 scripta0->datao_phase[1] = cpu_to_scr(0);
1869 if (!(np->device_id == PCI_ID_LSI53C1010 &&
1870 /* np->revision_id < 0xff */ 1)) {
1871 scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
1872 scripta0->sel_done[1] = cpu_to_scr(0);
1876 * Patch some other variables in SCRIPTS.
1877 * These ones are loaded by the SCRIPTS processor.
1879 scriptb0->pm0_data_addr[0] =
1880 cpu_to_scr(np->scripta_ba +
1881 offsetof(struct sym_fw2a_scr, pm0_data));
1882 scriptb0->pm1_data_addr[0] =
1883 cpu_to_scr(np->scripta_ba +
1884 offsetof(struct sym_fw2a_scr, pm1_data));
1888 * Fill the data area in scripts.
1889 * To be done for all firmwares.
1892 sym_fw_fill_data (u32 *in, u32 *out)
1896 for (i = 0; i < SYM_CONF_MAX_SG; i++) {
1897 *in++ = SCR_CHMOV_TBL ^ SCR_DATA_IN;
1898 *in++ = offsetof (struct sym_dsb, data[i]);
1899 *out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
1900 *out++ = offsetof (struct sym_dsb, data[i]);
1905 * Setup useful script bus addresses.
1906 * To be done for all firmwares.
1909 sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw)
1916 * Build the bus address table for script A
1917 * from the script A offset table.
1919 po = (const u_short *) fw->a_ofs;
1920 pa = (u32 *) &np->fwa_bas;
1921 for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
1922 pa[i] = np->scripta_ba + po[i];
1925 * Same for script B.
1927 po = (const u_short *) fw->b_ofs;
1928 pa = (u32 *) &np->fwb_bas;
1929 for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
1930 pa[i] = np->scriptb_ba + po[i];
1933 #ifdef SYM_CONF_GENERIC_SUPPORT
1935 * Setup routine for firmware #1.
1938 sym_fw1_setup(hcb_p np, const struct sym_fw *fw)
1940 struct sym_fw1a_scr *scripta0;
1942 scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1945 * Fill variable parts in scripts.
1947 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1950 * Setup bus addresses used from the C code..
1952 sym_fw_setup_bus_addresses(np, fw);
1954 #endif /* SYM_CONF_GENERIC_SUPPORT */
1957 * Setup routine for firmware #2.
1960 sym_fw2_setup(hcb_p np, const struct sym_fw *fw)
1962 struct sym_fw2a_scr *scripta0;
1964 scripta0 = (struct sym_fw2a_scr *) np->scripta0;
1967 * Fill variable parts in scripts.
1969 sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
1972 * Setup bus addresses used from the C code..
1974 sym_fw_setup_bus_addresses(np, fw);
1978 * Allocate firmware descriptors.
1980 #ifdef SYM_CONF_GENERIC_SUPPORT
1981 static const struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
1982 #endif /* SYM_CONF_GENERIC_SUPPORT */
1983 static const struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
1986 * Find the most appropriate firmware for a chip.
1988 static const struct sym_fw *
1989 sym_find_firmware(const struct sym_pci_chip *chip)
1991 if (chip->features & FE_LDSTR)
1993 #ifdef SYM_CONF_GENERIC_SUPPORT
1994 else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2002 * Bind a script to physical addresses.
2004 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2006 u32 opcode, new, old, tmp1, tmp2;
2011 end = start + len/4;
2018 * If we forget to change the length
2019 * in scripts, a field will be
2020 * padded with 0. This is an illegal
2024 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
2025 sym_name(np), (int) (cur-start));
2032 * We use the bogus value 0xf00ff00f ;-)
2033 * to reserve data area in SCRIPTS.
2035 if (opcode == SCR_DATA_ZERO) {
2040 if (DEBUG_FLAGS & DEBUG_SCRIPT)
2041 printf ("%d: <%x>\n", (int) (cur-start),
2045 * We don't have to decode ALL commands
2047 switch (opcode >> 28) {
2050 * LOAD / STORE DSA relative, don't relocate.
2056 * LOAD / STORE absolute.
2062 * COPY has TWO arguments.
2067 if ((tmp1 ^ tmp2) & 3) {
2068 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
2069 sym_name(np), (int) (cur-start));
2073 * If PREFETCH feature not enabled, remove
2074 * the NO FLUSH bit if present.
2076 if ((opcode & SCR_NO_FLUSH) &&
2077 !(np->features & FE_PFEN)) {
2078 opcode = (opcode & ~SCR_NO_FLUSH);
2083 * MOVE/CHMOV (absolute address)
2085 if (!(np->features & FE_WIDE))
2086 opcode = (opcode | OPC_MOVE);
2091 * MOVE/CHMOV (table indirect)
2093 if (!(np->features & FE_WIDE))
2094 opcode = (opcode | OPC_MOVE);
2100 * dont't relocate if relative :-)
2102 if (opcode & 0x00800000)
2104 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2121 * Scriptify:) the opcode.
2123 *cur++ = cpu_to_scr(opcode);
2126 * If no relocation, assume 1 argument
2127 * and just scriptize:) it.
2130 *cur = cpu_to_scr(*cur);
2136 * Otherwise performs all needed relocations.
2141 switch (old & RELOC_MASK) {
2142 case RELOC_REGISTER:
2143 new = (old & ~RELOC_MASK) + np->mmio_ba;
2146 new = (old & ~RELOC_MASK) + np->scripta_ba;
2149 new = (old & ~RELOC_MASK) + np->scriptb_ba;
2152 new = (old & ~RELOC_MASK) + np->hcb_ba;
2156 * Don't relocate a 0 address.
2157 * They are mostly used for patched or
2158 * script self-modified areas.
2167 panic("sym_fw_bind_script: "
2168 "weird relocation %x\n", old);
2172 *cur++ = cpu_to_scr(new);
2177 /*---------------------------------------------------------------------------*/
2178 /*--------------------------- END OF FIRMWARES -----------------------------*/
2179 /*---------------------------------------------------------------------------*/
2182 * Function prototypes.
2184 static void sym_save_initial_setting (hcb_p np);
2185 static int sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2186 static int sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2187 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2188 static void sym_chip_reset (hcb_p np);
2189 static void sym_soft_reset (hcb_p np);
2190 static void sym_start_reset (hcb_p np);
2191 static int sym_reset_scsi_bus (hcb_p np, int enab_int);
2192 static int sym_wakeup_done (hcb_p np);
2193 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2194 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2195 static void sym_init (hcb_p np, int reason);
2196 static int sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2198 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2199 u_char div, u_char fak);
2200 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2201 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2202 u_char per, u_char wide, u_char div, u_char fak);
2203 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2204 u_char per, u_char wide, u_char div, u_char fak);
2205 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2206 static void sym_intr (void *arg);
2207 static void sym_poll (struct cam_sim *sim);
2208 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2209 static void sym_int_sto (hcb_p np);
2210 static void sym_int_udc (hcb_p np);
2211 static void sym_int_sbmc (hcb_p np);
2212 static void sym_int_par (hcb_p np, u_short sist);
2213 static void sym_int_ma (hcb_p np);
2214 static int sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2216 static void sym_sir_bad_scsi_status (hcb_p np, ccb_p cp);
2217 static int sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2218 static void sym_sir_task_recovery (hcb_p np, int num);
2219 static int sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2220 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs);
2221 static int sym_compute_residual (hcb_p np, ccb_p cp);
2222 static int sym_show_msg (u_char * msg);
2223 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2224 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2225 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2226 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2227 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2228 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2229 static void sym_int_sir (hcb_p np);
2230 static void sym_free_ccb (hcb_p np, ccb_p cp);
2231 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2232 static ccb_p sym_alloc_ccb (hcb_p np);
2233 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2234 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2235 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2236 static int sym_snooptest (hcb_p np);
2237 static void sym_selectclock(hcb_p np, u_char scntl3);
2238 static void sym_getclock (hcb_p np, int mult);
2239 static int sym_getpciclock (hcb_p np);
2240 static void sym_complete_ok (hcb_p np, ccb_p cp);
2241 static void sym_complete_error (hcb_p np, ccb_p cp);
2242 static void sym_callout (void *arg);
2243 static int sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2244 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2245 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2246 static int sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2247 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2249 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2250 bus_dma_segment_t *psegs, int nsegs);
2251 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2252 bus_dma_segment_t *psegs, int nsegs);
2253 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2254 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
2255 struct ccb_trans_settings *cts);
2256 static void sym_update_dflags(hcb_p np, u_char *flags,
2257 struct ccb_trans_settings *cts);
2259 static const struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2260 static int sym_pci_probe (device_t dev);
2261 static int sym_pci_attach (device_t dev);
2263 static void sym_pci_free (hcb_p np);
2264 static int sym_cam_attach (hcb_p np);
2265 static void sym_cam_free (hcb_p np);
2267 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2268 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2269 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2272 * Print something which allows to retrieve the controller type,
2273 * unit, target, lun concerned by a kernel message.
2275 static void PRINT_TARGET (hcb_p np, int target)
2277 printf ("%s:%d:", sym_name(np), target);
2280 static void PRINT_LUN(hcb_p np, int target, int lun)
2282 printf ("%s:%d:%d:", sym_name(np), target, lun);
2285 static void PRINT_ADDR (ccb_p cp)
2287 if (cp && cp->cam_ccb)
2288 xpt_print_path(cp->cam_ccb->ccb_h.path);
2292 * Take into account this ccb in the freeze count.
2294 static void sym_freeze_cam_ccb(union ccb *ccb)
2296 if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2297 if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2298 ccb->ccb_h.status |= CAM_DEV_QFRZN;
2299 xpt_freeze_devq(ccb->ccb_h.path, 1);
2305 * Set the status field of a CAM CCB.
2307 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2309 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2310 ccb->ccb_h.status |= status;
2314 * Get the status field of a CAM CCB.
2316 static __inline int sym_get_cam_status(union ccb *ccb)
2318 return ccb->ccb_h.status & CAM_STATUS_MASK;
2322 * Enqueue a CAM CCB.
2324 static void sym_enqueue_cam_ccb(ccb_p cp)
2330 np = (hcb_p) cp->arg;
2332 assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2333 ccb->ccb_h.status = CAM_REQ_INPROG;
2335 callout_reset(&cp->ch, ccb->ccb_h.timeout * hz / 1000, sym_callout,
2337 ccb->ccb_h.status |= CAM_SIM_QUEUED;
2338 ccb->ccb_h.sym_hcb_ptr = np;
2340 sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2344 * Complete a pending CAM CCB.
2347 static void sym_xpt_done(hcb_p np, union ccb *ccb, ccb_p cp)
2350 SYM_LOCK_ASSERT(MA_OWNED);
2352 if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2353 callout_stop(&cp->ch);
2354 sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2355 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2356 ccb->ccb_h.sym_hcb_ptr = NULL;
2361 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2364 SYM_LOCK_ASSERT(MA_OWNED);
2366 sym_set_cam_status(ccb, cam_status);
2371 * SYMBIOS chip clock divisor table.
2373 * Divisors are multiplied by 10,000,000 in order to make
2374 * calculations more simple.
2377 static const u32 div_10M[] =
2378 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2381 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2382 * 128 transfers. All chips support at least 16 transfers
2383 * bursts. The 825A, 875 and 895 chips support bursts of up
2384 * to 128 transfers and the 895A and 896 support bursts of up
2385 * to 64 transfers. All other chips support up to 16
2388 * For PCI 32 bit data transfers each transfer is a DWORD.
2389 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2391 * We use log base 2 (burst length) as internal code, with
2392 * value 0 meaning "burst disabled".
2396 * Burst length from burst code.
2398 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2401 * Burst code from io register bits.
2403 #define burst_code(dmode, ctest4, ctest5) \
2404 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2407 * Set initial io register bits from burst code.
2409 static __inline void sym_init_burst(hcb_p np, u_char bc)
2411 np->rv_ctest4 &= ~0x80;
2412 np->rv_dmode &= ~(0x3 << 6);
2413 np->rv_ctest5 &= ~0x4;
2416 np->rv_ctest4 |= 0x80;
2420 np->rv_dmode |= ((bc & 0x3) << 6);
2421 np->rv_ctest5 |= (bc & 0x4);
2426 * Print out the list of targets that have some flag disabled by user.
2428 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2433 for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2434 if (i == np->myaddr)
2436 if (np->target[i].usrflags & mask) {
2438 printf("%s: %s disabled for targets",
2448 * Save initial settings of some IO registers.
2449 * Assumed to have been set by BIOS.
2450 * We cannot reset the chip prior to reading the
2451 * IO registers, since informations will be lost.
2452 * Since the SCRIPTS processor may be running, this
2453 * is not safe on paper, but it seems to work quite
2456 static void sym_save_initial_setting (hcb_p np)
2458 np->sv_scntl0 = INB(nc_scntl0) & 0x0a;
2459 np->sv_scntl3 = INB(nc_scntl3) & 0x07;
2460 np->sv_dmode = INB(nc_dmode) & 0xce;
2461 np->sv_dcntl = INB(nc_dcntl) & 0xa8;
2462 np->sv_ctest3 = INB(nc_ctest3) & 0x01;
2463 np->sv_ctest4 = INB(nc_ctest4) & 0x80;
2464 np->sv_gpcntl = INB(nc_gpcntl);
2465 np->sv_stest1 = INB(nc_stest1);
2466 np->sv_stest2 = INB(nc_stest2) & 0x20;
2467 np->sv_stest4 = INB(nc_stest4);
2468 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
2469 np->sv_scntl4 = INB(nc_scntl4);
2470 np->sv_ctest5 = INB(nc_ctest5) & 0x04;
2473 np->sv_ctest5 = INB(nc_ctest5) & 0x24;
2477 * Prepare io register values used by sym_init() according
2478 * to selected and supported features.
2480 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2489 np->maxwide = (np->features & FE_WIDE)? 1 : 0;
2492 * Get the frequency of the chip's clock.
2494 if (np->features & FE_QUAD)
2496 else if (np->features & FE_DBLR)
2501 np->clock_khz = (np->features & FE_CLK80)? 80000 : 40000;
2502 np->clock_khz *= np->multiplier;
2504 if (np->clock_khz != 40000)
2505 sym_getclock(np, np->multiplier);
2508 * Divisor to be used for async (timer pre-scaler).
2510 i = np->clock_divn - 1;
2512 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2517 np->rv_scntl3 = i+1;
2520 * The C1010 uses hardwired divisors for async.
2521 * So, we just throw away, the async. divisor.:-)
2523 if (np->features & FE_C10)
2527 * Minimum synchronous period factor supported by the chip.
2528 * Btw, 'period' is in tenths of nanoseconds.
2530 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2531 if (period <= 250) np->minsync = 10;
2532 else if (period <= 303) np->minsync = 11;
2533 else if (period <= 500) np->minsync = 12;
2534 else np->minsync = (period + 40 - 1) / 40;
2537 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2539 if (np->minsync < 25 &&
2540 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2542 else if (np->minsync < 12 &&
2543 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2547 * Maximum synchronous period factor supported by the chip.
2549 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2550 np->maxsync = period > 2540 ? 254 : period / 10;
2553 * If chip is a C1010, guess the sync limits in DT mode.
2555 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2556 if (np->clock_khz == 160000) {
2558 np->maxsync_dt = 50;
2559 np->maxoffs_dt = 62;
2564 * 64 bit addressing (895A/896/1010) ?
2566 if (np->features & FE_DAC)
2568 np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
2570 np->rv_ccntl1 |= (DDAC);
2574 * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2576 if (np->features & FE_NOPM)
2577 np->rv_ccntl0 |= (ENPMJ);
2581 * In dual channel mode, contention occurs if internal cycles
2582 * are used. Disable internal cycles.
2584 if (np->device_id == PCI_ID_LSI53C1010 &&
2585 np->revision_id < 0x2)
2586 np->rv_ccntl0 |= DILS;
2589 * Select burst length (dwords)
2591 burst_max = SYM_SETUP_BURST_ORDER;
2592 if (burst_max == 255)
2593 burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2597 if (burst_max > np->maxburst)
2598 burst_max = np->maxburst;
2601 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2602 * This chip and the 860 Rev 1 may wrongly use PCI cache line
2603 * based transactions on LOAD/STORE instructions. So we have
2604 * to prevent these chips from using such PCI transactions in
2605 * this driver. The generic ncr driver that does not use
2606 * LOAD/STORE instructions does not need this work-around.
2608 if ((np->device_id == PCI_ID_SYM53C810 &&
2609 np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2610 (np->device_id == PCI_ID_SYM53C860 &&
2611 np->revision_id <= 0x1))
2612 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2615 * Select all supported special features.
2616 * If we are using on-board RAM for scripts, prefetch (PFEN)
2617 * does not help, but burst op fetch (BOF) does.
2618 * Disabling PFEN makes sure BOF will be used.
2620 if (np->features & FE_ERL)
2621 np->rv_dmode |= ERL; /* Enable Read Line */
2622 if (np->features & FE_BOF)
2623 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
2624 if (np->features & FE_ERMP)
2625 np->rv_dmode |= ERMP; /* Enable Read Multiple */
2627 if ((np->features & FE_PFEN) && !np->ram_ba)
2629 if (np->features & FE_PFEN)
2631 np->rv_dcntl |= PFEN; /* Prefetch Enable */
2632 if (np->features & FE_CLSE)
2633 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
2634 if (np->features & FE_WRIE)
2635 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
2636 if (np->features & FE_DFS)
2637 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
2642 if (SYM_SETUP_PCI_PARITY)
2643 np->rv_ctest4 |= MPEE; /* Master parity checking */
2644 if (SYM_SETUP_SCSI_PARITY)
2645 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
2648 * Get parity checking, host ID and verbose mode from NVRAM
2651 sym_nvram_setup_host (np, nvram);
2653 np->myaddr = OF_getscsinitid(np->device);
2657 * Get SCSI addr of host adapter (set by bios?).
2659 if (np->myaddr == 255) {
2660 np->myaddr = INB(nc_scid) & 0x07;
2662 np->myaddr = SYM_SETUP_HOST_ID;
2666 * Prepare initial io register bits for burst length
2668 sym_init_burst(np, burst_max);
2671 * Set SCSI BUS mode.
2672 * - LVD capable chips (895/895A/896/1010) report the
2673 * current BUS mode through the STEST4 IO register.
2674 * - For previous generation chips (825/825A/875),
2675 * user has to tell us how to check against HVD,
2676 * since a 100% safe algorithm is not possible.
2678 np->scsi_mode = SMODE_SE;
2679 if (np->features & (FE_ULTRA2|FE_ULTRA3))
2680 np->scsi_mode = (np->sv_stest4 & SMODE);
2681 else if (np->features & FE_DIFF) {
2682 if (SYM_SETUP_SCSI_DIFF == 1) {
2683 if (np->sv_scntl3) {
2684 if (np->sv_stest2 & 0x20)
2685 np->scsi_mode = SMODE_HVD;
2687 else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2688 if (!(INB(nc_gpreg) & 0x08))
2689 np->scsi_mode = SMODE_HVD;
2692 else if (SYM_SETUP_SCSI_DIFF == 2)
2693 np->scsi_mode = SMODE_HVD;
2695 if (np->scsi_mode == SMODE_HVD)
2696 np->rv_stest2 |= 0x20;
2699 * Set LED support from SCRIPTS.
2700 * Ignore this feature for boards known to use a
2701 * specific GPIO wiring and for the 895A, 896
2702 * and 1010 that drive the LED directly.
2704 if ((SYM_SETUP_SCSI_LED ||
2705 (nvram->type == SYM_SYMBIOS_NVRAM ||
2706 (nvram->type == SYM_TEKRAM_NVRAM &&
2707 np->device_id == PCI_ID_SYM53C895))) &&
2708 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2709 np->features |= FE_LED0;
2714 switch(SYM_SETUP_IRQ_MODE & 3) {
2716 np->rv_dcntl |= IRQM;
2719 np->rv_dcntl |= (np->sv_dcntl & IRQM);
2726 * Configure targets according to driver setup.
2727 * If NVRAM present get targets setup from NVRAM.
2729 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2730 tcb_p tp = &np->target[i];
2732 tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2733 tp->tinfo.user.spi_version = tp->tinfo.current.spi_version = 2;
2734 tp->tinfo.user.period = np->minsync;
2735 if (np->features & FE_ULTRA3)
2736 tp->tinfo.user.period = np->minsync_dt;
2737 tp->tinfo.user.offset = np->maxoffs;
2738 tp->tinfo.user.width = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2739 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2740 tp->usrtags = SYM_SETUP_MAX_TAG;
2742 sym_nvram_setup_target (np, i, nvram);
2745 * For now, guess PPR/DT support from the period
2748 if (np->features & FE_ULTRA3) {
2749 if (tp->tinfo.user.period <= 9 &&
2750 tp->tinfo.user.width == BUS_16_BIT) {
2751 tp->tinfo.user.options |= PPR_OPT_DT;
2752 tp->tinfo.user.offset = np->maxoffs_dt;
2753 tp->tinfo.user.spi_version = 3;
2758 tp->usrflags &= ~SYM_TAGS_ENABLED;
2762 * Let user know about the settings.
2765 printf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2766 i == SYM_SYMBIOS_NVRAM ? "Symbios" :
2767 (i == SYM_TEKRAM_NVRAM ? "Tekram" : "No"),
2769 (np->features & FE_ULTRA3) ? 80 :
2770 (np->features & FE_ULTRA2) ? 40 :
2771 (np->features & FE_ULTRA) ? 20 : 10,
2772 sym_scsi_bus_mode(np->scsi_mode),
2773 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
2775 * Tell him more on demand.
2778 printf("%s: %s IRQ line driver%s\n",
2780 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2781 np->ram_ba ? ", using on-chip SRAM" : "");
2782 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2783 if (np->features & FE_NOPM)
2784 printf("%s: handling phase mismatch from SCRIPTS.\n",
2790 if (sym_verbose > 1) {
2791 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2792 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2793 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2794 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2796 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2797 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2798 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2799 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2802 * Let user be aware of targets that have some disable flags set.
2804 sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2806 sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2813 * Prepare the next negotiation message if needed.
2815 * Fill in the part of message buffer that contains the
2816 * negotiation and the nego_status field of the CCB.
2817 * Returns the size of the message in bytes.
2819 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
2821 tcb_p tp = &np->target[cp->target];
2825 * Early C1010 chips need a work-around for DT
2826 * data transfer to work.
2828 if (!(np->features & FE_U3EN))
2829 tp->tinfo.goal.options = 0;
2831 * negotiate using PPR ?
2833 if (tp->tinfo.goal.options & PPR_OPT_MASK)
2836 * negotiate wide transfers ?
2838 else if (tp->tinfo.current.width != tp->tinfo.goal.width)
2841 * negotiate synchronous transfers?
2843 else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
2844 tp->tinfo.current.offset != tp->tinfo.goal.offset)
2849 msgptr[msglen++] = M_EXTENDED;
2850 msgptr[msglen++] = 3;
2851 msgptr[msglen++] = M_X_SYNC_REQ;
2852 msgptr[msglen++] = tp->tinfo.goal.period;
2853 msgptr[msglen++] = tp->tinfo.goal.offset;
2856 msgptr[msglen++] = M_EXTENDED;
2857 msgptr[msglen++] = 2;
2858 msgptr[msglen++] = M_X_WIDE_REQ;
2859 msgptr[msglen++] = tp->tinfo.goal.width;
2862 msgptr[msglen++] = M_EXTENDED;
2863 msgptr[msglen++] = 6;
2864 msgptr[msglen++] = M_X_PPR_REQ;
2865 msgptr[msglen++] = tp->tinfo.goal.period;
2866 msgptr[msglen++] = 0;
2867 msgptr[msglen++] = tp->tinfo.goal.offset;
2868 msgptr[msglen++] = tp->tinfo.goal.width;
2869 msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
2873 cp->nego_status = nego;
2876 tp->nego_cp = cp; /* Keep track a nego will be performed */
2877 if (DEBUG_FLAGS & DEBUG_NEGO) {
2878 sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
2879 nego == NS_WIDE ? "wide msgout" :
2880 "ppr msgout", msgptr);
2888 * Insert a job into the start queue.
2890 static void sym_put_start_queue(hcb_p np, ccb_p cp)
2894 #ifdef SYM_CONF_IARB_SUPPORT
2896 * If the previously queued CCB is not yet done,
2897 * set the IARB hint. The SCRIPTS will go with IARB
2898 * for this job when starting the previous one.
2899 * We leave devices a chance to win arbitration by
2900 * not using more than 'iarb_max' consecutive
2901 * immediate arbitrations.
2903 if (np->last_cp && np->iarb_count < np->iarb_max) {
2904 np->last_cp->host_flags |= HF_HINT_IARB;
2913 * Insert first the idle task and then our job.
2914 * The MB should ensure proper ordering.
2916 qidx = np->squeueput + 2;
2917 if (qidx >= MAX_QUEUE*2) qidx = 0;
2919 np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
2921 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
2923 np->squeueput = qidx;
2925 if (DEBUG_FLAGS & DEBUG_QUEUE)
2926 printf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
2929 * Script processor may be waiting for reselect.
2933 OUTB (nc_istat, SIGP|np->istat_sem);
2937 * Soft reset the chip.
2939 * Raising SRST when the chip is running may cause
2940 * problems on dual function chips (see below).
2941 * On the other hand, LVD devices need some delay
2942 * to settle and report actual BUS mode in STEST4.
2944 static void sym_chip_reset (hcb_p np)
2946 OUTB (nc_istat, SRST);
2949 UDELAY(2000); /* For BUS MODE to settle */
2953 * Soft reset the chip.
2955 * Some 896 and 876 chip revisions may hang-up if we set
2956 * the SRST (soft reset) bit at the wrong time when SCRIPTS
2958 * So, we need to abort the current operation prior to
2959 * soft resetting the chip.
2961 static void sym_soft_reset (hcb_p np)
2966 OUTB (nc_istat, CABRT);
2967 for (i = 1000000 ; i ; --i) {
2968 istat = INB (nc_istat);
2980 printf("%s: unable to abort current chip operation.\n",
2982 sym_chip_reset (np);
2986 * Start reset process.
2988 * The interrupt handler will reinitialize the chip.
2990 static void sym_start_reset(hcb_p np)
2992 (void) sym_reset_scsi_bus(np, 1);
2995 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3000 sym_soft_reset(np); /* Soft reset the chip */
3002 OUTW (nc_sien, RST);
3004 * Enable Tolerant, reset IRQD if present and
3005 * properly set IRQ mode, prior to resetting the bus.
3007 OUTB (nc_stest3, TE);
3008 OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3009 OUTB (nc_scntl1, CRST);
3012 if (!SYM_SETUP_SCSI_BUS_CHECK)
3015 * Check for no terminators or SCSI bus shorts to ground.
3016 * Read SCSI data bus, data parity bits and control signals.
3017 * We are expecting RESET to be TRUE and other signals to be
3020 term = INB(nc_sstat0);
3021 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
3022 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */
3023 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */
3024 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */
3025 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */
3027 if (!(np->features & FE_WIDE))
3030 if (term != (2<<7)) {
3031 printf("%s: suspicious SCSI data while resetting the BUS.\n",
3033 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3034 "0x%lx, expecting 0x%lx\n",
3036 (np->features & FE_WIDE) ? "dp1,d15-8," : "",
3037 (u_long)term, (u_long)(2<<7));
3038 if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3042 OUTB (nc_scntl1, 0);
3048 * The chip may have completed jobs. Look at the DONE QUEUE.
3050 * On architectures that may reorder LOAD/STORE operations,
3051 * a memory barrier may be needed after the reading of the
3052 * so-called `flag' and prior to dealing with the data.
3054 static int sym_wakeup_done (hcb_p np)
3060 SYM_LOCK_ASSERT(MA_OWNED);
3065 dsa = scr_to_cpu(np->dqueue[i]);
3069 if ((i = i+2) >= MAX_QUEUE*2)
3072 cp = sym_ccb_from_dsa(np, dsa);
3075 sym_complete_ok (np, cp);
3079 printf ("%s: bad DSA (%x) in done queue.\n",
3080 sym_name(np), (u_int) dsa);
3088 * Complete all active CCBs with error.
3089 * Used on CHIP/SCSI RESET.
3091 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3094 * Move all active CCBs to the COMP queue
3095 * and flush this queue.
3097 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3098 sym_que_init(&np->busy_ccbq);
3099 sym_flush_comp_queue(np, cam_status);
3106 * 0: initialisation.
3107 * 1: SCSI BUS RESET delivered or received.
3108 * 2: SCSI BUS MODE changed.
3110 static void sym_init (hcb_p np, int reason)
3115 SYM_LOCK_ASSERT(MA_OWNED);
3118 * Reset chip if asked, otherwise just clear fifos.
3123 OUTB (nc_stest3, TE|CSF);
3124 OUTONB (nc_ctest3, CLF);
3130 phys = np->squeue_ba;
3131 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3132 np->squeue[i] = cpu_to_scr(np->idletask_ba);
3133 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3135 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3138 * Start at first entry.
3145 phys = np->dqueue_ba;
3146 for (i = 0; i < MAX_QUEUE*2; i += 2) {
3148 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3150 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3153 * Start at first entry.
3158 * Install patches in scripts.
3159 * This also let point to first position the start
3160 * and done queue pointers used from SCRIPTS.
3165 * Wakeup all pending jobs.
3167 sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3172 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort */
3173 UDELAY (2000); /* The 895 needs time for the bus mode to settle */
3175 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3176 /* full arb., ena parity, par->ATN */
3177 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
3179 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
3181 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
3182 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */
3183 OUTB (nc_istat , SIGP ); /* Signal Process */
3184 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */
3185 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
3187 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
3188 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */
3189 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */
3191 /* Extended Sreq/Sack filtering not supported on the C10 */
3192 if (np->features & FE_C10)
3193 OUTB (nc_stest2, np->rv_stest2);
3195 OUTB (nc_stest2, EXT|np->rv_stest2);
3197 OUTB (nc_stest3, TE); /* TolerANT enable */
3198 OUTB (nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
3201 * For now, disable AIP generation on C1010-66.
3203 if (np->device_id == PCI_ID_LSI53C1010_2)
3204 OUTB (nc_aipcntl1, DISAIP);
3208 * Errant SGE's when in narrow. Write bits 4 & 5 of
3209 * STEST1 register to disable SGE. We probably should do
3210 * that from SCRIPTS for each selection/reselection, but
3211 * I just don't want. :)
3213 if (np->device_id == PCI_ID_LSI53C1010 &&
3214 /* np->revision_id < 0xff */ 1)
3215 OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3218 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3219 * Disable overlapped arbitration for some dual function devices,
3220 * regardless revision id (kind of post-chip-design feature. ;-))
3222 if (np->device_id == PCI_ID_SYM53C875)
3223 OUTB (nc_ctest0, (1<<5));
3224 else if (np->device_id == PCI_ID_SYM53C896)
3225 np->rv_ccntl0 |= DPR;
3228 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3229 * and/or hardware phase mismatch, since only such chips
3230 * seem to support those IO registers.
3232 if (np->features & (FE_DAC|FE_NOPM)) {
3233 OUTB (nc_ccntl0, np->rv_ccntl0);
3234 OUTB (nc_ccntl1, np->rv_ccntl1);
3238 * If phase mismatch handled by scripts (895A/896/1010),
3239 * set PM jump addresses.
3241 if (np->features & FE_NOPM) {
3242 OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3243 OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3247 * Enable GPIO0 pin for writing if LED support from SCRIPTS.
3248 * Also set GPIO5 and clear GPIO6 if hardware LED control.
3250 if (np->features & FE_LED0)
3251 OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3252 else if (np->features & FE_LEDC)
3253 OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3258 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3259 OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3262 * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3263 * Try to eat the spurious SBMC interrupt that may occur when
3264 * we reset the chip but not the SCSI BUS (at initialization).
3266 if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3267 OUTONW (nc_sien, SBMC);
3272 np->scsi_mode = INB (nc_stest4) & SMODE;
3276 * Fill in target structure.
3277 * Reinitialize usrsync.
3278 * Reinitialize usrwide.
3279 * Prepare sync negotiation according to actual SCSI bus mode.
3281 for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3282 tcb_p tp = &np->target[i];
3286 tp->head.wval = np->rv_scntl3;
3289 tp->tinfo.current.period = 0;
3290 tp->tinfo.current.offset = 0;
3291 tp->tinfo.current.width = BUS_8_BIT;
3292 tp->tinfo.current.options = 0;
3296 * Download SCSI SCRIPTS to on-chip RAM if present,
3297 * and start script processor.
3300 if (sym_verbose > 1)
3301 printf ("%s: Downloading SCSI SCRIPTS.\n",
3303 if (np->ram_ws == 8192) {
3304 OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3305 OUTL (nc_mmws, np->scr_ram_seg);
3306 OUTL (nc_mmrs, np->scr_ram_seg);
3307 OUTL (nc_sfs, np->scr_ram_seg);
3308 phys = SCRIPTB_BA (np, start64);
3311 phys = SCRIPTA_BA (np, init);
3312 OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3315 phys = SCRIPTA_BA (np, init);
3319 OUTL (nc_dsa, np->hcb_ba);
3323 * Notify the XPT about the RESET condition.
3326 xpt_async(AC_BUS_RESET, np->path, NULL);
3330 * Get clock factor and sync divisor for a given
3331 * synchronous factor period.
3334 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3336 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
3337 int div = np->clock_divn; /* Number of divisors supported */
3338 u32 fak; /* Sync factor in sxfer */
3339 u32 per; /* Period in tenths of ns */
3340 u32 kpc; /* (per * clk) */
3344 * Compute the synchronous period in tenths of nano-seconds
3346 if (dt && sfac <= 9) per = 125;
3347 else if (sfac <= 10) per = 250;
3348 else if (sfac == 11) per = 303;
3349 else if (sfac == 12) per = 500;
3350 else per = 40 * sfac;
3358 * For earliest C10 revision 0, we cannot use extra
3359 * clocks for the setting of the SCSI clocking.
3360 * Note that this limits the lowest sync data transfer
3361 * to 5 Mega-transfers per second and may result in
3362 * using higher clock divisors.
3365 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3367 * Look for the lowest clock divisor that allows an
3368 * output speed not faster than the period.
3372 if (kpc > (div_10M[div] << 2)) {
3377 fak = 0; /* No extra clocks */
3378 if (div == np->clock_divn) { /* Are we too fast ? */
3388 * Look for the greatest clock divisor that allows an
3389 * input speed faster than the period.
3392 if (kpc >= (div_10M[div] << 2)) break;
3395 * Calculate the lowest clock factor that allows an output
3396 * speed not faster than the period, and the max output speed.
3397 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3398 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3401 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3402 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3405 fak = (kpc - 1) / div_10M[div] + 1 - 4;
3406 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3410 * Check against our hardware limits, or bugs :).
3412 if (fak > 2) {fak = 2; ret = -1;}
3415 * Compute and return sync parameters.
3424 * Tell the SCSI layer about the new transfer parameters.
3427 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3429 struct ccb_trans_settings cts;
3430 struct cam_path *path;
3432 tcb_p tp = &np->target[target];
3434 sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3436 if (sts != CAM_REQ_CMP)
3439 bzero(&cts, sizeof(cts));
3441 #define cts__scsi (cts.proto_specific.scsi)
3442 #define cts__spi (cts.xport_specific.spi)
3444 cts.type = CTS_TYPE_CURRENT_SETTINGS;
3445 cts.protocol = PROTO_SCSI;
3446 cts.transport = XPORT_SPI;
3447 cts.protocol_version = tp->tinfo.current.scsi_version;
3448 cts.transport_version = tp->tinfo.current.spi_version;
3450 cts__spi.valid = spi_valid;
3451 if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3452 cts__spi.sync_period = tp->tinfo.current.period;
3453 if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3454 cts__spi.sync_offset = tp->tinfo.current.offset;
3455 if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3456 cts__spi.bus_width = tp->tinfo.current.width;
3457 if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3458 cts__spi.ppr_options = tp->tinfo.current.options;
3461 xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3462 xpt_async(AC_TRANSFER_NEG, path, &cts);
3463 xpt_free_path(path);
3466 #define SYM_SPI_VALID_WDTR \
3467 CTS_SPI_VALID_BUS_WIDTH | \
3468 CTS_SPI_VALID_SYNC_RATE | \
3469 CTS_SPI_VALID_SYNC_OFFSET
3470 #define SYM_SPI_VALID_SDTR \
3471 CTS_SPI_VALID_SYNC_RATE | \
3472 CTS_SPI_VALID_SYNC_OFFSET
3473 #define SYM_SPI_VALID_PPR \
3474 CTS_SPI_VALID_PPR_OPTIONS | \
3475 CTS_SPI_VALID_BUS_WIDTH | \
3476 CTS_SPI_VALID_SYNC_RATE | \
3477 CTS_SPI_VALID_SYNC_OFFSET
3480 * We received a WDTR.
3481 * Let everything be aware of the changes.
3483 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3485 tcb_p tp = &np->target[cp->target];
3487 sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3490 * Tell the SCSI layer about the new transfer parameters.
3492 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3493 tp->tinfo.current.offset = 0;
3494 tp->tinfo.current.period = 0;
3495 tp->tinfo.current.options = 0;
3497 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3501 * We received a SDTR.
3502 * Let everything be aware of the changes.
3505 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3507 tcb_p tp = &np->target[cp->target];
3508 u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3510 sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3513 * Tell the SCSI layer about the new transfer parameters.
3515 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3516 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3517 tp->tinfo.goal.options = tp->tinfo.current.options = 0;
3519 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3523 * We received a PPR.
3524 * Let everything be aware of the changes.
3526 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3527 u_char per, u_char wide, u_char div, u_char fak)
3529 tcb_p tp = &np->target[cp->target];
3531 sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3534 * Tell the SCSI layer about the new transfer parameters.
3536 tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3537 tp->tinfo.goal.period = tp->tinfo.current.period = per;
3538 tp->tinfo.goal.offset = tp->tinfo.current.offset = ofs;
3539 tp->tinfo.goal.options = tp->tinfo.current.options = dt;
3541 sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3545 * Switch trans mode for current job and it's target.
3547 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3548 u_char per, u_char wide, u_char div, u_char fak)
3553 u_char target = INB (nc_sdid) & 0x0f;
3554 u_char sval, wval, uval;
3561 assert (target == (cp->target & 0xf));
3562 tp = &np->target[target];
3564 sval = tp->head.sval;
3565 wval = tp->head.wval;
3566 uval = tp->head.uval;
3569 printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3570 sval, wval, uval, np->rv_scntl3);
3575 if (!(np->features & FE_C10))
3576 sval = (sval & ~0x1f) | ofs;
3578 sval = (sval & ~0x3f) | ofs;
3581 * Set the sync divisor and extra clock factor.
3584 wval = (wval & ~0x70) | ((div+1) << 4);
3585 if (!(np->features & FE_C10))
3586 sval = (sval & ~0xe0) | (fak << 5);
3588 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3589 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3590 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3595 * Set the bus width.
3602 * Set misc. ultra enable bits.
3604 if (np->features & FE_C10) {
3605 uval = uval & ~(U3EN|AIPCKEN);
3607 assert(np->features & FE_U3EN);
3612 wval = wval & ~ULTRA;
3613 if (per <= 12) wval |= ULTRA;
3617 * Stop there if sync parameters are unchanged.
3619 if (tp->head.sval == sval &&
3620 tp->head.wval == wval &&
3621 tp->head.uval == uval)
3623 tp->head.sval = sval;
3624 tp->head.wval = wval;
3625 tp->head.uval = uval;
3628 * Disable extended Sreq/Sack filtering if per < 50.
3629 * Not supported on the C1010.
3631 if (per < 50 && !(np->features & FE_C10))
3632 OUTOFFB (nc_stest2, EXT);
3635 * set actual value and sync_status
3637 OUTB (nc_sxfer, tp->head.sval);
3638 OUTB (nc_scntl3, tp->head.wval);
3640 if (np->features & FE_C10) {
3641 OUTB (nc_scntl4, tp->head.uval);
3645 * patch ALL busy ccbs of this target.
3647 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3648 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3649 if (cp->target != target)
3651 cp->phys.select.sel_scntl3 = tp->head.wval;
3652 cp->phys.select.sel_sxfer = tp->head.sval;
3653 if (np->features & FE_C10) {
3654 cp->phys.select.sel_scntl4 = tp->head.uval;
3660 * log message for real hard errors
3662 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3663 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3665 * exception register:
3670 * so: control lines as driven by chip.
3671 * si: control lines as seen by chip.
3672 * sd: scsi data lines as seen by chip.
3675 * sxfer: (see the manual)
3676 * scntl3: (see the manual)
3678 * current script command:
3679 * dsp: script address (relative to start of script).
3680 * dbc: first word of script command.
3682 * First 24 register of the chip:
3685 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3691 u_char *script_base;
3696 if (dsp > np->scripta_ba &&
3697 dsp <= np->scripta_ba + np->scripta_sz) {
3698 script_ofs = dsp - np->scripta_ba;
3699 script_size = np->scripta_sz;
3700 script_base = (u_char *) np->scripta0;
3701 script_name = "scripta";
3703 else if (np->scriptb_ba < dsp &&
3704 dsp <= np->scriptb_ba + np->scriptb_sz) {
3705 script_ofs = dsp - np->scriptb_ba;
3706 script_size = np->scriptb_sz;
3707 script_base = (u_char *) np->scriptb0;
3708 script_name = "scriptb";
3713 script_name = "mem";
3716 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3717 sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3718 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3719 (unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3720 (unsigned)INB (nc_scntl3), script_name, script_ofs,
3721 (unsigned)INL (nc_dbc));
3723 if (((script_ofs & 3) == 0) &&
3724 (unsigned)script_ofs < script_size) {
3725 printf ("%s: script cmd = %08x\n", sym_name(np),
3726 scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3729 printf ("%s: regdump:", sym_name(np));
3731 printf (" %02x", (unsigned)INB_OFF(i));
3735 * PCI BUS error, read the PCI ststus register.
3737 if (dstat & (MDPE|BF)) {
3739 pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3740 if (pci_sts & 0xf900) {
3741 pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3742 printf("%s: PCI STATUS = 0x%04x\n",
3743 sym_name(np), pci_sts & 0xf900);
3749 * chip interrupt handler
3751 * In normal situations, interrupt conditions occur one at
3752 * a time. But when something bad happens on the SCSI BUS,
3753 * the chip may raise several interrupt flags before
3754 * stopping and interrupting the CPU. The additionnal
3755 * interrupt flags are stacked in some extra registers
3756 * after the SIP and/or DIP flag has been raised in the
3757 * ISTAT. After the CPU has read the interrupt condition
3758 * flag from SIST or DSTAT, the chip unstacks the other
3759 * interrupt flags and sets the corresponding bits in
3760 * SIST or DSTAT. Since the chip starts stacking once the
3761 * SIP or DIP flag is set, there is a small window of time
3762 * where the stacking does not occur.
3764 * Typically, multiple interrupt conditions may happen in
3765 * the following situations:
3767 * - SCSI parity error + Phase mismatch (PAR|MA)
3768 * When a parity error is detected in input phase
3769 * and the device switches to msg-in phase inside a
3771 * - SCSI parity error + Unexpected disconnect (PAR|UDC)
3772 * When a stupid device does not want to handle the
3773 * recovery of an SCSI parity error.
3774 * - Some combinations of STO, PAR, UDC, ...
3775 * When using non compliant SCSI stuff, when user is
3776 * doing non compliant hot tampering on the BUS, when
3777 * something really bad happens to a device, etc ...
3779 * The heuristic suggested by SYMBIOS to handle
3780 * multiple interrupts is to try unstacking all
3781 * interrupts conditions and to handle them on some
3782 * priority based on error severity.
3783 * This will work when the unstacking has been
3784 * successful, but we cannot be 100 % sure of that,
3785 * since the CPU may have been faster to unstack than
3786 * the chip is able to stack. Hmmm ... But it seems that
3787 * such a situation is very unlikely to happen.
3789 * If this happen, for example STO caught by the CPU
3790 * then UDC happenning before the CPU have restarted
3791 * the SCRIPTS, the driver may wrongly complete the
3792 * same command on UDC, since the SCRIPTS didn't restart
3793 * and the DSA still points to the same command.
3794 * We avoid this situation by setting the DSA to an
3795 * invalid value when the CCB is completed and before
3796 * restarting the SCRIPTS.
3798 * Another issue is that we need some section of our
3799 * recovery procedures to be somehow uninterruptible but
3800 * the SCRIPTS processor does not provides such a
3801 * feature. For this reason, we handle recovery preferently
3802 * from the C code and check against some SCRIPTS critical
3803 * sections from the C code.
3805 * Hopefully, the interrupt handling of the driver is now
3806 * able to resist to weird BUS error conditions, but donnot
3807 * ask me for any guarantee that it will never fail. :-)
3808 * Use at your own decision and risk.
3810 static void sym_intr1 (hcb_p np)
3812 u_char istat, istatc;
3816 SYM_LOCK_ASSERT(MA_OWNED);
3819 * interrupt on the fly ?
3821 * A `dummy read' is needed to ensure that the
3822 * clear of the INTF flag reaches the device
3823 * before the scanning of the DONE queue.
3825 istat = INB (nc_istat);
3827 OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
3828 istat = INB (nc_istat); /* DUMMY READ */
3829 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
3830 (void)sym_wakeup_done (np);
3833 if (!(istat & (SIP|DIP)))
3836 #if 0 /* We should never get this one */
3838 OUTB (nc_istat, CABRT);
3842 * PAR and MA interrupts may occur at the same time,
3843 * and we need to know of both in order to handle
3844 * this situation properly. We try to unstack SCSI
3845 * interrupts for that reason. BTW, I dislike a LOT
3846 * such a loop inside the interrupt routine.
3847 * Even if DMA interrupt stacking is very unlikely to
3848 * happen, we also try unstacking these ones, since
3849 * this has no performance impact.
3856 sist |= INW (nc_sist);
3858 dstat |= INB (nc_dstat);
3859 istatc = INB (nc_istat);
3861 } while (istatc & (SIP|DIP));
3863 if (DEBUG_FLAGS & DEBUG_TINY)
3864 printf ("<%d|%x:%x|%x:%x>",
3867 (unsigned)INL(nc_dsp),
3868 (unsigned)INL(nc_dbc));
3870 * On paper, a memory barrier may be needed here.
3871 * And since we are paranoid ... :)
3876 * First, interrupts we want to service cleanly.
3878 * Phase mismatch (MA) is the most frequent interrupt
3879 * for chip earlier than the 896 and so we have to service
3880 * it as quickly as possible.
3881 * A SCSI parity error (PAR) may be combined with a phase
3882 * mismatch condition (MA).
3883 * Programmed interrupts (SIR) are used to call the C code
3885 * The single step interrupt (SSI) is not used in this
3888 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
3889 !(dstat & (MDPE|BF|ABRT|IID))) {
3890 if (sist & PAR) sym_int_par (np, sist);
3891 else if (sist & MA) sym_int_ma (np);
3892 else if (dstat & SIR) sym_int_sir (np);
3893 else if (dstat & SSI) OUTONB_STD ();
3894 else goto unknown_int;
3899 * Now, interrupts that donnot happen in normal
3900 * situations and that we may need to recover from.
3902 * On SCSI RESET (RST), we reset everything.
3903 * On SCSI BUS MODE CHANGE (SBMC), we complete all
3904 * active CCBs with RESET status, prepare all devices
3905 * for negotiating again and restart the SCRIPTS.
3906 * On STO and UDC, we complete the CCB with the corres-
3907 * ponding status and restart the SCRIPTS.
3910 xpt_print_path(np->path);
3911 printf("SCSI BUS reset detected.\n");
3916 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
3917 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
3919 if (!(sist & (GEN|HTH|SGE)) &&
3920 !(dstat & (MDPE|BF|ABRT|IID))) {
3921 if (sist & SBMC) sym_int_sbmc (np);
3922 else if (sist & STO) sym_int_sto (np);
3923 else if (sist & UDC) sym_int_udc (np);
3924 else goto unknown_int;
3929 * Now, interrupts we are not able to recover cleanly.
3931 * Log message for hard errors.
3935 sym_log_hard_error(np, sist, dstat);
3937 if ((sist & (GEN|HTH|SGE)) ||
3938 (dstat & (MDPE|BF|ABRT|IID))) {
3939 sym_start_reset(np);
3945 * We just miss the cause of the interrupt. :(
3946 * Print a message. The timeout will do the real work.
3948 printf( "%s: unknown interrupt(s) ignored, "
3949 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
3950 sym_name(np), istat, dstat, sist);
3953 static void sym_intr(void *arg)
3959 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3960 sym_intr1((hcb_p) arg);
3961 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]");
3966 static void sym_poll(struct cam_sim *sim)
3968 sym_intr1(cam_sim_softc(sim));
3972 * generic recovery from scsi interrupt
3974 * The doc says that when the chip gets an SCSI interrupt,
3975 * it tries to stop in an orderly fashion, by completing
3976 * an instruction fetch that had started or by flushing
3977 * the DMA fifo for a write to memory that was executing.
3978 * Such a fashion is not enough to know if the instruction
3979 * that was just before the current DSP value has been
3982 * There are some small SCRIPTS sections that deal with
3983 * the start queue and the done queue that may break any
3984 * assomption from the C code if we are interrupted
3985 * inside, so we reset if this happens. Btw, since these
3986 * SCRIPTS sections are executed while the SCRIPTS hasn't
3987 * started SCSI operations, it is very unlikely to happen.
3989 * All the driver data structures are supposed to be
3990 * allocated from the same 4 GB memory window, so there
3991 * is a 1 to 1 relationship between DSA and driver data
3992 * structures. Since we are careful :) to invalidate the
3993 * DSA when we complete a command or when the SCRIPTS
3994 * pushes a DSA into a queue, we can trust it when it
3997 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
3999 u32 dsp = INL (nc_dsp);
4000 u32 dsa = INL (nc_dsa);
4001 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4004 * If we haven't been interrupted inside the SCRIPTS
4005 * critical pathes, we can safely restart the SCRIPTS
4006 * and trust the DSA value if it matches a CCB.
4008 if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4009 dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4010 (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4011 dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4012 (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4013 dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4014 (!(dsp > SCRIPTA_BA (np, done) &&
4015 dsp < SCRIPTA_BA (np, done_end) + 1))) {
4016 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
4017 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
4019 * If we have a CCB, let the SCRIPTS call us back for
4020 * the handling of the error with SCRATCHA filled with
4021 * STARTPOS. This way, we will be able to freeze the
4022 * device queue and requeue awaiting IOs.
4025 cp->host_status = hsts;
4026 OUTL_DSP (SCRIPTA_BA (np, complete_error));
4029 * Otherwise just restart the SCRIPTS.
4032 OUTL (nc_dsa, 0xffffff);
4033 OUTL_DSP (SCRIPTA_BA (np, start));
4042 sym_start_reset(np);
4046 * chip exception handler for selection timeout
4048 static void sym_int_sto (hcb_p np)
4050 u32 dsp = INL (nc_dsp);
4052 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
4054 if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4055 sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4057 sym_start_reset(np);
4061 * chip exception handler for unexpected disconnect
4063 static void sym_int_udc (hcb_p np)
4065 printf ("%s: unexpected disconnect\n", sym_name(np));
4066 sym_recover_scsi_int(np, HS_UNEXPECTED);
4070 * chip exception handler for SCSI bus mode change
4072 * spi2-r12 11.2.3 says a transceiver mode change must
4073 * generate a reset event and a device that detects a reset
4074 * event shall initiate a hard reset. It says also that a
4075 * device that detects a mode change shall set data transfer
4076 * mode to eight bit asynchronous, etc...
4077 * So, just reinitializing all except chip should be enough.
4079 static void sym_int_sbmc (hcb_p np)
4081 u_char scsi_mode = INB (nc_stest4) & SMODE;
4086 xpt_print_path(np->path);
4087 printf("SCSI BUS mode change from %s to %s.\n",
4088 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4091 * Should suspend command processing for a few seconds and
4092 * reinitialize all except the chip.
4098 * chip exception handler for SCSI parity error.
4100 * When the chip detects a SCSI parity error and is
4101 * currently executing a (CH)MOV instruction, it does
4102 * not interrupt immediately, but tries to finish the
4103 * transfer of the current scatter entry before
4104 * interrupting. The following situations may occur:
4106 * - The complete scatter entry has been transferred
4107 * without the device having changed phase.
4108 * The chip will then interrupt with the DSP pointing
4109 * to the instruction that follows the MOV.
4111 * - A phase mismatch occurs before the MOV finished
4112 * and phase errors are to be handled by the C code.
4113 * The chip will then interrupt with both PAR and MA
4116 * - A phase mismatch occurs before the MOV finished and
4117 * phase errors are to be handled by SCRIPTS.
4118 * The chip will load the DSP with the phase mismatch
4119 * JUMP address and interrupt the host processor.
4121 static void sym_int_par (hcb_p np, u_short sist)
4123 u_char hsts = INB (HS_PRT);
4124 u32 dsp = INL (nc_dsp);
4125 u32 dbc = INL (nc_dbc);
4126 u32 dsa = INL (nc_dsa);
4127 u_char sbcl = INB (nc_sbcl);
4128 u_char cmd = dbc >> 24;
4129 int phase = cmd & 7;
4130 ccb_p cp = sym_ccb_from_dsa(np, dsa);
4132 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4133 sym_name(np), hsts, dbc, sbcl);
4136 * Check that the chip is connected to the SCSI BUS.
4138 if (!(INB (nc_scntl1) & ISCON)) {
4139 sym_recover_scsi_int(np, HS_UNEXPECTED);
4144 * If the nexus is not clearly identified, reset the bus.
4145 * We will try to do better later.
4151 * Check instruction was a MOV, direction was INPUT and
4154 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4158 * Keep track of the parity error.
4160 OUTONB (HF_PRT, HF_EXT_ERR);
4161 cp->xerr_status |= XE_PARITY_ERR;
4164 * Prepare the message to send to the device.
4166 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4169 * If the old phase was DATA IN phase, we have to deal with
4170 * the 3 situations described above.
4171 * For other input phases (MSG IN and STATUS), the device
4172 * must resend the whole thing that failed parity checking
4173 * or signal error. So, jumping to dispatcher should be OK.
4175 if (phase == 1 || phase == 5) {
4176 /* Phase mismatch handled by SCRIPTS */
4177 if (dsp == SCRIPTB_BA (np, pm_handle))
4179 /* Phase mismatch handled by the C code */
4182 /* No phase mismatch occurred */
4184 OUTL (nc_temp, dsp);
4185 OUTL_DSP (SCRIPTA_BA (np, dispatch));
4189 OUTL_DSP (SCRIPTA_BA (np, clrack));
4193 sym_start_reset(np);
4197 * chip exception handler for phase errors.
4199 * We have to construct a new transfer descriptor,
4200 * to transfer the rest of the current block.
4202 static void sym_int_ma (hcb_p np)
4215 u_char hflags, hflags0;
4224 rest = dbc & 0xffffff;
4228 * locate matching cp if any.
4230 cp = sym_ccb_from_dsa(np, dsa);
4233 * Donnot take into account dma fifo and various buffers in
4234 * INPUT phase since the chip flushes everything before
4235 * raising the MA interrupt for interrupted INPUT phases.
4236 * For DATA IN phase, we will check for the SWIDE later.
4238 if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4241 if (np->features & FE_DFBC)
4242 delta = INW (nc_dfbc);
4247 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4249 dfifo = INL(nc_dfifo);
4252 * Calculate remaining bytes in DMA fifo.
4253 * (CTEST5 = dfifo >> 16)
4255 if (dfifo & (DFS << 16))
4256 delta = ((((dfifo >> 8) & 0x300) |
4257 (dfifo & 0xff)) - rest) & 0x3ff;
4259 delta = ((dfifo & 0xff) - rest) & 0x7f;
4263 * The data in the dma fifo has not been transferred to
4264 * the target -> add the amount to the rest
4265 * and clear the data.
4266 * Check the sstat2 register in case of wide transfer.
4269 ss0 = INB (nc_sstat0);
4270 if (ss0 & OLF) rest++;
4271 if (!(np->features & FE_C10))
4272 if (ss0 & ORF) rest++;
4273 if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4274 ss2 = INB (nc_sstat2);
4275 if (ss2 & OLF1) rest++;
4276 if (!(np->features & FE_C10))
4277 if (ss2 & ORF1) rest++;
4283 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
4284 OUTB (nc_stest3, TE|CSF); /* scsi fifo */
4288 * log the information
4290 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4291 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4292 (unsigned) rest, (unsigned) delta);
4295 * try to find the interrupted script command,
4296 * and the address at which to continue.
4300 if (dsp > np->scripta_ba &&
4301 dsp <= np->scripta_ba + np->scripta_sz) {
4302 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4305 else if (dsp > np->scriptb_ba &&
4306 dsp <= np->scriptb_ba + np->scriptb_sz) {
4307 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4312 * log the information
4314 if (DEBUG_FLAGS & DEBUG_PHASE) {
4315 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4316 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4320 printf ("%s: interrupted SCRIPT address not found.\n",
4326 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4332 * get old startaddress and old length.
4334 oadr = scr_to_cpu(vdsp[1]);
4336 if (cmd & 0x10) { /* Table indirect */
4337 tblp = (u32 *) ((char*) &cp->phys + oadr);
4338 olen = scr_to_cpu(tblp[0]);
4339 oadr = scr_to_cpu(tblp[1]);
4342 olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4345 if (DEBUG_FLAGS & DEBUG_PHASE) {
4346 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4347 (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4354 * check cmd against assumed interrupted script command.
4355 * If dt data phase, the MOVE instruction hasn't bit 4 of
4358 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4360 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4361 (unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4367 * if old phase not dataphase, leave here.
4371 printf ("phase change %x-%x %d@%08x resid=%d.\n",
4372 cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4373 (unsigned)oadr, (unsigned)rest);
4374 goto unexpected_phase;
4378 * Choose the correct PM save area.
4380 * Look at the PM_SAVE SCRIPT if you want to understand
4381 * this stuff. The equivalent code is implemented in
4382 * SCRIPTS for the 895A, 896 and 1010 that are able to
4383 * handle PM from the SCRIPTS processor.
4385 hflags0 = INB (HF_PRT);
4388 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4389 if (hflags & HF_IN_PM0)
4390 nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4391 else if (hflags & HF_IN_PM1)
4392 nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4394 if (hflags & HF_DP_SAVED)
4395 hflags ^= HF_ACT_PM;
4398 if (!(hflags & HF_ACT_PM)) {
4400 newcmd = SCRIPTA_BA (np, pm0_data);
4404 newcmd = SCRIPTA_BA (np, pm1_data);
4407 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4408 if (hflags != hflags0)
4409 OUTB (HF_PRT, hflags);
4412 * fillin the phase mismatch context
4414 pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4415 pm->sg.size = cpu_to_scr(rest);
4416 pm->ret = cpu_to_scr(nxtdsp);
4419 * If we have a SWIDE,
4420 * - prepare the address to write the SWIDE from SCRIPTS,
4421 * - compute the SCRIPTS address to restart from,
4422 * - move current data pointer context by one byte.
4424 nxtdsp = SCRIPTA_BA (np, dispatch);
4425 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4426 (INB (nc_scntl2) & WSR)) {
4430 * Set up the table indirect for the MOVE
4431 * of the residual byte and adjust the data
4434 tmp = scr_to_cpu(pm->sg.addr);
4435 cp->phys.wresid.addr = cpu_to_scr(tmp);
4436 pm->sg.addr = cpu_to_scr(tmp + 1);
4437 tmp = scr_to_cpu(pm->sg.size);
4438 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4439 pm->sg.size = cpu_to_scr(tmp - 1);
4442 * If only the residual byte is to be moved,
4443 * no PM context is needed.
4445 if ((tmp&0xffffff) == 1)
4449 * Prepare the address of SCRIPTS that will
4450 * move the residual byte to memory.
4452 nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4455 if (DEBUG_FLAGS & DEBUG_PHASE) {
4457 printf ("PM %x %x %x / %x %x %x.\n",
4458 hflags0, hflags, newcmd,
4459 (unsigned)scr_to_cpu(pm->sg.addr),
4460 (unsigned)scr_to_cpu(pm->sg.size),
4461 (unsigned)scr_to_cpu(pm->ret));
4465 * Restart the SCRIPTS processor.
4467 OUTL (nc_temp, newcmd);
4472 * Unexpected phase changes that occurs when the current phase
4473 * is not a DATA IN or DATA OUT phase are due to error conditions.
4474 * Such event may only happen when the SCRIPTS is using a
4475 * multibyte SCSI MOVE.
4477 * Phase change Some possible cause
4479 * COMMAND --> MSG IN SCSI parity error detected by target.
4480 * COMMAND --> STATUS Bad command or refused by target.
4481 * MSG OUT --> MSG IN Message rejected by target.
4482 * MSG OUT --> COMMAND Bogus target that discards extended
4483 * negotiation messages.
4485 * The code below does not care of the new phase and so
4486 * trusts the target. Why to annoy it ?
4487 * If the interrupted phase is COMMAND phase, we restart at
4489 * If a target does not get all the messages after selection,
4490 * the code assumes blindly that the target discards extended
4491 * messages and clears the negotiation status.
4492 * If the target does not want all our response to negotiation,
4493 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4494 * bloat for such a should_not_happen situation).
4495 * In all other situation, we reset the BUS.
4496 * Are these assumptions reasonnable ? (Wait and see ...)
4503 case 2: /* COMMAND phase */
4504 nxtdsp = SCRIPTA_BA (np, dispatch);
4507 case 3: /* STATUS phase */
4508 nxtdsp = SCRIPTA_BA (np, dispatch);
4511 case 6: /* MSG OUT phase */
4513 * If the device may want to use untagged when we want
4514 * tagged, we prepare an IDENTIFY without disc. granted,
4515 * since we will not be able to handle reselect.
4516 * Otherwise, we just don't care.
4518 if (dsp == SCRIPTA_BA (np, send_ident)) {
4519 if (cp->tag != NO_TAG && olen - rest <= 3) {
4520 cp->host_status = HS_BUSY;
4521 np->msgout[0] = M_IDENTIFY | cp->lun;
4522 nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4525 nxtdsp = SCRIPTB_BA (np, ident_break);
4527 else if (dsp == SCRIPTB_BA (np, send_wdtr) ||
4528 dsp == SCRIPTB_BA (np, send_sdtr) ||
4529 dsp == SCRIPTB_BA (np, send_ppr)) {
4530 nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4534 case 7: /* MSG IN phase */
4535 nxtdsp = SCRIPTA_BA (np, clrack);
4546 sym_start_reset(np);
4550 * Dequeue from the START queue all CCBs that match
4551 * a given target/lun/task condition (-1 means all),
4552 * and move them from the BUSY queue to the COMP queue
4553 * with CAM_REQUEUE_REQ status condition.
4554 * This function is used during error handling/recovery.
4555 * It is called with SCRIPTS not running.
4558 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4564 * Make sure the starting index is within range.
4566 assert((i >= 0) && (i < 2*MAX_QUEUE));
4569 * Walk until end of START queue and dequeue every job
4570 * that matches the target/lun/task condition.
4573 while (i != np->squeueput) {
4574 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4576 #ifdef SYM_CONF_IARB_SUPPORT
4577 /* Forget hints for IARB, they may be no longer relevant */
4578 cp->host_flags &= ~HF_HINT_IARB;
4580 if ((target == -1 || cp->target == target) &&
4581 (lun == -1 || cp->lun == lun) &&
4582 (task == -1 || cp->tag == task)) {
4583 sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4584 sym_remque(&cp->link_ccbq);
4585 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4589 np->squeue[j] = np->squeue[i];
4590 if ((j += 2) >= MAX_QUEUE*2) j = 0;
4592 if ((i += 2) >= MAX_QUEUE*2) i = 0;
4594 if (i != j) /* Copy back the idle task if needed */
4595 np->squeue[j] = np->squeue[i];
4596 np->squeueput = j; /* Update our current start queue pointer */
4602 * Complete all CCBs queued to the COMP queue.
4604 * These CCBs are assumed:
4605 * - Not to be referenced either by devices or
4606 * SCRIPTS-related queues and datas.
4607 * - To have to be completed with an error condition
4610 * The device queue freeze count is incremented
4611 * for each CCB that does not prevent this.
4612 * This function is called when all CCBs involved
4613 * in error handling/recovery have been reaped.
4616 sym_flush_comp_queue(hcb_p np, int cam_status)
4621 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
4623 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4624 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4625 /* Leave quiet CCBs waiting for resources */
4626 if (cp->host_status == HS_WAIT)
4630 sym_set_cam_status(ccb, cam_status);
4631 sym_freeze_cam_ccb(ccb);
4632 sym_xpt_done(np, ccb, cp);
4633 sym_free_ccb(np, cp);
4638 * chip handler for bad SCSI status condition
4640 * In case of bad SCSI status, we unqueue all the tasks
4641 * currently queued to the controller but not yet started
4642 * and then restart the SCRIPTS processor immediately.
4644 * QUEUE FULL and BUSY conditions are handled the same way.
4645 * Basically all the not yet started tasks are requeued in
4646 * device queue and the queue is frozen until a completion.
4648 * For CHECK CONDITION and COMMAND TERMINATED status, we use
4649 * the CCB of the failed command to prepare a REQUEST SENSE
4650 * SCSI command and queue it to the controller queue.
4652 * SCRATCHA is assumed to have been loaded with STARTPOS
4653 * before the SCRIPTS called the C code.
4655 static void sym_sir_bad_scsi_status(hcb_p np, ccb_p cp)
4657 tcb_p tp = &np->target[cp->target];
4659 u_char s_status = cp->ssss_status;
4660 u_char h_flags = cp->host_flags;
4665 SYM_LOCK_ASSERT(MA_OWNED);
4668 * Compute the index of the next job to start from SCRIPTS.
4670 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4673 * The last CCB queued used for IARB hint may be
4674 * no longer relevant. Forget it.
4676 #ifdef SYM_CONF_IARB_SUPPORT
4682 * Now deal with the SCSI status.
4687 if (sym_verbose >= 2) {
4689 printf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4691 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
4692 sym_complete_error (np, cp);
4697 * If we get an SCSI error when requesting sense, give up.
4699 if (h_flags & HF_SENSE) {
4700 sym_complete_error (np, cp);
4705 * Dequeue all queued CCBs for that device not yet started,
4706 * and restart the SCRIPTS processor immediately.
4708 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4709 OUTL_DSP (SCRIPTA_BA (np, start));
4712 * Save some info of the actual IO.
4713 * Compute the data residual.
4715 cp->sv_scsi_status = cp->ssss_status;
4716 cp->sv_xerr_status = cp->xerr_status;
4717 cp->sv_resid = sym_compute_residual(np, cp);
4720 * Prepare all needed data structures for
4721 * requesting sense data.
4727 cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4731 * If we are currently using anything different from
4732 * async. 8 bit data transfers with that target,
4733 * start a negotiation, since the device may want
4734 * to report us a UNIT ATTENTION condition due to
4735 * a cause we currently ignore, and we donnot want
4736 * to be stuck with WIDE and/or SYNC data transfer.
4738 * cp->nego_status is filled by sym_prepare_nego().
4740 cp->nego_status = 0;
4742 if (tp->tinfo.current.options & PPR_OPT_MASK)
4744 else if (tp->tinfo.current.width != BUS_8_BIT)
4746 else if (tp->tinfo.current.offset != 0)
4750 sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4752 * Message table indirect structure.
4754 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4755 cp->phys.smsg.size = cpu_to_scr(msglen);
4760 cp->phys.cmd.addr = cpu_to_scr(CCB_BA (cp, sensecmd));
4761 cp->phys.cmd.size = cpu_to_scr(6);
4764 * patch requested size into sense command
4766 cp->sensecmd[0] = 0x03;
4767 cp->sensecmd[1] = cp->lun << 5;
4768 if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4769 cp->sensecmd[1] = 0;
4770 cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
4771 cp->data_len = SYM_SNS_BBUF_LEN;
4776 bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4777 cp->phys.sense.addr = cpu_to_scr(vtobus(cp->sns_bbuf));
4778 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
4781 * requeue the command.
4783 startp = SCRIPTB_BA (np, sdata_in);
4785 cp->phys.head.savep = cpu_to_scr(startp);
4786 cp->phys.head.goalp = cpu_to_scr(startp + 16);
4787 cp->phys.head.lastp = cpu_to_scr(startp);
4788 cp->startp = cpu_to_scr(startp);
4790 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
4791 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
4792 cp->ssss_status = S_ILLEGAL;
4793 cp->host_flags = (HF_SENSE|HF_DATA_IN);
4794 cp->xerr_status = 0;
4795 cp->extra_bytes = 0;
4797 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
4800 * Requeue the command.
4802 sym_put_start_queue(np, cp);
4805 * Give back to upper layer everything we have dequeued.
4807 sym_flush_comp_queue(np, 0);
4813 * After a device has accepted some management message
4814 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
4815 * a device signals a UNIT ATTENTION condition, some
4816 * tasks are thrown away by the device. We are required
4817 * to reflect that on our tasks list since the device
4818 * will never complete these tasks.
4820 * This function move from the BUSY queue to the COMP
4821 * queue all disconnected CCBs for a given target that
4822 * match the following criteria:
4823 * - lun=-1 means any logical UNIT otherwise a given one.
4824 * - task=-1 means any task, otherwise a given one.
4827 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
4829 SYM_QUEHEAD qtmp, *qp;
4834 * Move the entire BUSY queue to our temporary queue.
4836 sym_que_init(&qtmp);
4837 sym_que_splice(&np->busy_ccbq, &qtmp);
4838 sym_que_init(&np->busy_ccbq);
4841 * Put all CCBs that matches our criteria into
4842 * the COMP queue and put back other ones into
4845 while ((qp = sym_remque_head(&qtmp)) != NULL) {
4847 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4849 if (cp->host_status != HS_DISCONNECT ||
4850 cp->target != target ||
4851 (lun != -1 && cp->lun != lun) ||
4853 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
4854 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4857 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4859 /* Preserve the software timeout condition */
4860 if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
4861 sym_set_cam_status(ccb, cam_status);
4864 printf("XXXX TASK @%p CLEARED\n", cp);
4871 * chip handler for TASKS recovery
4873 * We cannot safely abort a command, while the SCRIPTS
4874 * processor is running, since we just would be in race
4877 * As long as we have tasks to abort, we keep the SEM
4878 * bit set in the ISTAT. When this bit is set, the
4879 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
4880 * each time it enters the scheduler.
4882 * If we have to reset a target, clear tasks of a unit,
4883 * or to perform the abort of a disconnected job, we
4884 * restart the SCRIPTS for selecting the target. Once
4885 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
4886 * If it loses arbitration, the SCRIPTS will interrupt again
4887 * the next time it will enter its scheduler, and so on ...
4889 * On SIR_TARGET_SELECTED, we scan for the more
4890 * appropriate thing to do:
4892 * - If nothing, we just sent a M_ABORT message to the
4893 * target to get rid of the useless SCSI bus ownership.
4894 * According to the specs, no tasks shall be affected.
4895 * - If the target is to be reset, we send it a M_RESET
4897 * - If a logical UNIT is to be cleared , we send the
4898 * IDENTIFY(lun) + M_ABORT.
4899 * - If an untagged task is to be aborted, we send the
4900 * IDENTIFY(lun) + M_ABORT.
4901 * - If a tagged task is to be aborted, we send the
4902 * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
4904 * Once our 'kiss of death' :) message has been accepted
4905 * by the target, the SCRIPTS interrupts again
4906 * (SIR_ABORT_SENT). On this interrupt, we complete
4907 * all the CCBs that should have been aborted by the
4908 * target according to our message.
4910 static void sym_sir_task_recovery(hcb_p np, int num)
4915 int target=-1, lun=-1, task;
4920 * The SCRIPTS processor stopped before starting
4921 * the next command in order to allow us to perform
4922 * some task recovery.
4924 case SIR_SCRIPT_STOPPED:
4926 * Do we have any target to reset or unit to clear ?
4928 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
4929 tp = &np->target[i];
4931 (tp->lun0p && tp->lun0p->to_clear)) {
4937 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
4938 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
4948 * If not, walk the busy queue for any
4949 * disconnected CCB to be aborted.
4952 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4953 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
4954 if (cp->host_status != HS_DISCONNECT)
4957 target = cp->target;
4964 * If some target is to be selected,
4965 * prepare and start the selection.
4968 tp = &np->target[target];
4969 np->abrt_sel.sel_id = target;
4970 np->abrt_sel.sel_scntl3 = tp->head.wval;
4971 np->abrt_sel.sel_sxfer = tp->head.sval;
4972 OUTL(nc_dsa, np->hcb_ba);
4973 OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
4978 * Now look for a CCB to abort that haven't started yet.
4979 * Btw, the SCRIPTS processor is still stopped, so
4980 * we are not in race.
4984 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
4985 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4986 if (cp->host_status != HS_BUSY &&
4987 cp->host_status != HS_NEGOTIATE)
4991 #ifdef SYM_CONF_IARB_SUPPORT
4993 * If we are using IMMEDIATE ARBITRATION, we donnot
4994 * want to cancel the last queued CCB, since the
4995 * SCRIPTS may have anticipated the selection.
4997 if (cp == np->last_cp) {
5002 i = 1; /* Means we have found some */
5007 * We are done, so we donnot need
5008 * to synchronize with the SCRIPTS anylonger.
5009 * Remove the SEM flag from the ISTAT.
5012 OUTB (nc_istat, SIGP);
5016 * Compute index of next position in the start
5017 * queue the SCRIPTS intends to start and dequeue
5018 * all CCBs for that device that haven't been started.
5020 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5021 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5024 * Make sure at least our IO to abort has been dequeued.
5026 assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5029 * Keep track in cam status of the reason of the abort.
5031 if (cp->to_abort == 2)
5032 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5034 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5037 * Complete with error everything that we have dequeued.
5039 sym_flush_comp_queue(np, 0);
5042 * The SCRIPTS processor has selected a target
5043 * we may have some manual recovery to perform for.
5045 case SIR_TARGET_SELECTED:
5046 target = (INB (nc_sdid) & 0xf);
5047 tp = &np->target[target];
5049 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5052 * If the target is to be reset, prepare a
5053 * M_RESET message and clear the to_reset flag
5054 * since we donnot expect this operation to fail.
5057 np->abrt_msg[0] = M_RESET;
5058 np->abrt_tbl.size = 1;
5064 * Otherwise, look for some logical unit to be cleared.
5066 if (tp->lun0p && tp->lun0p->to_clear)
5068 else if (tp->lunmp) {
5069 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5070 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5078 * If a logical unit is to be cleared, prepare
5079 * an IDENTIFY(lun) + ABORT MESSAGE.
5082 lcb_p lp = sym_lp(tp, lun);
5083 lp->to_clear = 0; /* We donnot expect to fail here */
5084 np->abrt_msg[0] = M_IDENTIFY | lun;
5085 np->abrt_msg[1] = M_ABORT;
5086 np->abrt_tbl.size = 2;
5091 * Otherwise, look for some disconnected job to
5092 * abort for this target.
5096 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5097 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5098 if (cp->host_status != HS_DISCONNECT)
5100 if (cp->target != target)
5104 i = 1; /* Means we have some */
5109 * If we have none, probably since the device has
5110 * completed the command before we won abitration,
5111 * send a M_ABORT message without IDENTIFY.
5112 * According to the specs, the device must just
5113 * disconnect the BUS and not abort any task.
5116 np->abrt_msg[0] = M_ABORT;
5117 np->abrt_tbl.size = 1;
5122 * We have some task to abort.
5123 * Set the IDENTIFY(lun)
5125 np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5128 * If we want to abort an untagged command, we
5129 * will send an IDENTIFY + M_ABORT.
5130 * Otherwise (tagged command), we will send
5131 * an IDENTIFY + task attributes + ABORT TAG.
5133 if (cp->tag == NO_TAG) {
5134 np->abrt_msg[1] = M_ABORT;
5135 np->abrt_tbl.size = 2;
5138 np->abrt_msg[1] = cp->scsi_smsg[1];
5139 np->abrt_msg[2] = cp->scsi_smsg[2];
5140 np->abrt_msg[3] = M_ABORT_TAG;
5141 np->abrt_tbl.size = 4;
5144 * Keep track of software timeout condition, since the
5145 * peripheral driver may not count retries on abort
5146 * conditions not due to timeout.
5148 if (cp->to_abort == 2)
5149 sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5150 cp->to_abort = 0; /* We donnot expect to fail here */
5154 * The target has accepted our message and switched
5155 * to BUS FREE phase as we expected.
5157 case SIR_ABORT_SENT:
5158 target = (INB (nc_sdid) & 0xf);
5159 tp = &np->target[target];
5162 ** If we didn't abort anything, leave here.
5164 if (np->abrt_msg[0] == M_ABORT)
5168 * If we sent a M_RESET, then a hardware reset has
5169 * been performed by the target.
5170 * - Reset everything to async 8 bit
5171 * - Tell ourself to negotiate next time :-)
5172 * - Prepare to clear all disconnected CCBs for
5173 * this target from our task list (lun=task=-1)
5177 if (np->abrt_msg[0] == M_RESET) {
5179 tp->head.wval = np->rv_scntl3;
5181 tp->tinfo.current.period = 0;
5182 tp->tinfo.current.offset = 0;
5183 tp->tinfo.current.width = BUS_8_BIT;
5184 tp->tinfo.current.options = 0;
5188 * Otherwise, check for the LUN and TASK(s)
5189 * concerned by the cancelation.
5190 * If it is not ABORT_TAG then it is CLEAR_QUEUE
5191 * or an ABORT message :-)
5194 lun = np->abrt_msg[0] & 0x3f;
5195 if (np->abrt_msg[1] == M_ABORT_TAG)
5196 task = np->abrt_msg[2];
5200 * Complete all the CCBs the device should have
5201 * aborted due to our 'kiss of death' message.
5203 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5204 (void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5205 (void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5206 sym_flush_comp_queue(np, 0);
5209 * If we sent a BDR, make uper layer aware of that.
5211 if (np->abrt_msg[0] == M_RESET)
5212 xpt_async(AC_SENT_BDR, np->path, NULL);
5217 * Print to the log the message we intend to send.
5219 if (num == SIR_TARGET_SELECTED) {
5220 PRINT_TARGET(np, target);
5221 sym_printl_hex("control msgout:", np->abrt_msg,
5223 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5227 * Let the SCRIPTS processor continue.
5233 * Gerard's alchemy:) that deals with with the data
5234 * pointer for both MDP and the residual calculation.
5236 * I didn't want to bloat the code by more than 200
5237 * lignes for the handling of both MDP and the residual.
5238 * This has been achieved by using a data pointer
5239 * representation consisting in an index in the data
5240 * array (dp_sg) and a negative offset (dp_ofs) that
5241 * have the following meaning:
5243 * - dp_sg = SYM_CONF_MAX_SG
5244 * we are at the end of the data script.
5245 * - dp_sg < SYM_CONF_MAX_SG
5246 * dp_sg points to the next entry of the scatter array
5247 * we want to transfer.
5249 * dp_ofs represents the residual of bytes of the
5250 * previous entry scatter entry we will send first.
5252 * no residual to send first.
5254 * The function sym_evaluate_dp() accepts an arbitray
5255 * offset (basically from the MDP message) and returns
5256 * the corresponding values of dp_sg and dp_ofs.
5258 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5261 int dp_ofs, dp_sg, dp_sgmin;
5266 * Compute the resulted data pointer in term of a script
5267 * address within some DATA script and a signed byte offset.
5271 if (dp_scr == SCRIPTA_BA (np, pm0_data))
5273 else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5279 dp_scr = scr_to_cpu(pm->ret);
5280 dp_ofs -= scr_to_cpu(pm->sg.size);
5284 * If we are auto-sensing, then we are done.
5286 if (cp->host_flags & HF_SENSE) {
5292 * Deduce the index of the sg entry.
5293 * Keep track of the index of the first valid entry.
5294 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5297 tmp = scr_to_cpu(cp->phys.head.goalp);
5298 dp_sg = SYM_CONF_MAX_SG;
5300 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5301 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5304 * Move to the sg entry the data pointer belongs to.
5306 * If we are inside the data area, we expect result to be:
5309 * dp_ofs = 0 and dp_sg is the index of the sg entry
5310 * the data pointer belongs to (or the end of the data)
5312 * dp_ofs < 0 and dp_sg is the index of the sg entry
5313 * the data pointer belongs to + 1.
5317 while (dp_sg > dp_sgmin) {
5319 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5320 n = dp_ofs + (tmp & 0xffffff);
5328 else if (dp_ofs > 0) {
5329 while (dp_sg < SYM_CONF_MAX_SG) {
5330 tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5331 dp_ofs -= (tmp & 0xffffff);
5339 * Make sure the data pointer is inside the data area.
5340 * If not, return some error.
5342 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5344 else if (dp_sg > SYM_CONF_MAX_SG ||
5345 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5349 * Save the extreme pointer if needed.
5351 if (dp_sg > cp->ext_sg ||
5352 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5354 cp->ext_ofs = dp_ofs;
5368 * chip handler for MODIFY DATA POINTER MESSAGE
5370 * We also call this function on IGNORE WIDE RESIDUE
5371 * messages that do not match a SWIDE full condition.
5372 * Btw, we assume in that situation that such a message
5373 * is equivalent to a MODIFY DATA POINTER (offset=-1).
5375 static void sym_modify_dp(hcb_p np, ccb_p cp, int ofs)
5378 u32 dp_scr = INL (nc_temp);
5386 * Not supported for auto-sense.
5388 if (cp->host_flags & HF_SENSE)
5392 * Apply our alchemy:) (see comments in sym_evaluate_dp()),
5393 * to the resulted data pointer.
5395 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5400 * And our alchemy:) allows to easily calculate the data
5401 * script address we want to return for the next data phase.
5403 dp_ret = cpu_to_scr(cp->phys.head.goalp);
5404 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5407 * If offset / scatter entry is zero we donnot need
5408 * a context for the new current data pointer.
5416 * Get a context for the new current data pointer.
5418 hflags = INB (HF_PRT);
5420 if (hflags & HF_DP_SAVED)
5421 hflags ^= HF_ACT_PM;
5423 if (!(hflags & HF_ACT_PM)) {
5425 dp_scr = SCRIPTA_BA (np, pm0_data);
5429 dp_scr = SCRIPTA_BA (np, pm1_data);
5432 hflags &= ~(HF_DP_SAVED);
5434 OUTB (HF_PRT, hflags);
5437 * Set up the new current data pointer.
5438 * ofs < 0 there, and for the next data phase, we
5439 * want to transfer part of the data of the sg entry
5440 * corresponding to index dp_sg-1 prior to returning
5441 * to the main data script.
5443 pm->ret = cpu_to_scr(dp_ret);
5444 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5445 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5446 pm->sg.addr = cpu_to_scr(tmp);
5447 pm->sg.size = cpu_to_scr(-dp_ofs);
5450 OUTL (nc_temp, dp_scr);
5451 OUTL_DSP (SCRIPTA_BA (np, clrack));
5455 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5459 * chip calculation of the data residual.
5461 * As I used to say, the requirement of data residual
5462 * in SCSI is broken, useless and cannot be achieved
5463 * without huge complexity.
5464 * But most OSes and even the official CAM require it.
5465 * When stupidity happens to be so widely spread inside
5466 * a community, it gets hard to convince.
5468 * Anyway, I don't care, since I am not going to use
5469 * any software that considers this data residual as
5470 * a relevant information. :)
5472 static int sym_compute_residual(hcb_p np, ccb_p cp)
5474 int dp_sg, dp_sgmin, resid = 0;
5478 * Check for some data lost or just thrown away.
5479 * We are not required to be quite accurate in this
5480 * situation. Btw, if we are odd for output and the
5481 * device claims some more data, it may well happen
5482 * than our residual be zero. :-)
5484 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5485 if (cp->xerr_status & XE_EXTRA_DATA)
5486 resid -= cp->extra_bytes;
5487 if (cp->xerr_status & XE_SODL_UNRUN)
5489 if (cp->xerr_status & XE_SWIDE_OVRUN)
5494 * If all data has been transferred,
5495 * there is no residual.
5497 if (cp->phys.head.lastp == cp->phys.head.goalp)
5501 * If no data transfer occurs, or if the data
5502 * pointer is weird, return full residual.
5504 if (cp->startp == cp->phys.head.lastp ||
5505 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5507 return cp->data_len;
5511 * If we were auto-sensing, then we are done.
5513 if (cp->host_flags & HF_SENSE) {
5518 * We are now full comfortable in the computation
5519 * of the data residual (2's complement).
5521 dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5522 resid = -cp->ext_ofs;
5523 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5524 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5525 resid += (tmp & 0xffffff);
5529 * Hopefully, the result is not too wrong.
5535 * Print out the content of a SCSI message.
5537 static int sym_show_msg (u_char * msg)
5541 if (*msg==M_EXTENDED) {
5543 if (i-1>msg[1]) break;
5544 printf ("-%x",msg[i]);
5547 } else if ((*msg & 0xf0) == 0x20) {
5548 printf ("-%x",msg[1]);
5554 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5558 printf ("%s: ", label);
5560 (void) sym_show_msg (msg);
5565 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5567 * When we try to negotiate, we append the negotiation message
5568 * to the identify and (maybe) simple tag message.
5569 * The host status field is set to HS_NEGOTIATE to mark this
5572 * If the target doesn't answer this message immediately
5573 * (as required by the standard), the SIR_NEGO_FAILED interrupt
5574 * will be raised eventually.
5575 * The handler removes the HS_NEGOTIATE status, and sets the
5576 * negotiated value to the default (async / nowide).
5578 * If we receive a matching answer immediately, we check it
5579 * for validity, and set the values.
5581 * If we receive a Reject message immediately, we assume the
5582 * negotiation has failed, and fall back to standard values.
5584 * If we receive a negotiation message while not in HS_NEGOTIATE
5585 * state, it's a target initiated negotiation. We prepare a
5586 * (hopefully) valid answer, set our parameters, and send back
5587 * this answer to the target.
5589 * If the target doesn't fetch the answer (no message out phase),
5590 * we assume the negotiation has failed, and fall back to default
5591 * settings (SIR_NEGO_PROTO interrupt).
5593 * When we set the values, we adjust them in all ccbs belonging
5594 * to this target, in the controller's register, and in the "phys"
5595 * field of the controller's struct sym_hcb.
5599 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5601 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5603 u_char chg, ofs, per, fak, div;
5607 * Synchronous request message received.
5609 if (DEBUG_FLAGS & DEBUG_NEGO) {
5610 sym_print_msg(cp, "sync msgin", np->msgin);
5614 * request or answer ?
5616 if (INB (HS_PRT) == HS_NEGOTIATE) {
5617 OUTB (HS_PRT, HS_BUSY);
5618 if (cp->nego_status && cp->nego_status != NS_SYNC)
5624 * get requested values.
5631 * check values against our limits.
5634 if (ofs > np->maxoffs)
5635 {chg = 1; ofs = np->maxoffs;}
5637 if (ofs > tp->tinfo.user.offset)
5638 {chg = 1; ofs = tp->tinfo.user.offset;}
5643 if (per < np->minsync)
5644 {chg = 1; per = np->minsync;}
5646 if (per < tp->tinfo.user.period)
5647 {chg = 1; per = tp->tinfo.user.period;}
5652 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5655 if (DEBUG_FLAGS & DEBUG_NEGO) {
5657 printf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5658 ofs, per, div, fak, chg);
5662 * This was an answer message
5665 if (chg) /* Answer wasn't acceptable. */
5667 sym_setsync (np, cp, ofs, per, div, fak);
5668 OUTL_DSP (SCRIPTA_BA (np, clrack));
5673 * It was a request. Set value and
5674 * prepare an answer message
5676 sym_setsync (np, cp, ofs, per, div, fak);
5678 np->msgout[0] = M_EXTENDED;
5680 np->msgout[2] = M_X_SYNC_REQ;
5681 np->msgout[3] = per;
5682 np->msgout[4] = ofs;
5684 cp->nego_status = NS_SYNC;
5686 if (DEBUG_FLAGS & DEBUG_NEGO) {
5687 sym_print_msg(cp, "sync msgout", np->msgout);
5690 np->msgin [0] = M_NOOP;
5692 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5695 sym_setsync (np, cp, 0, 0, 0, 0);
5696 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5700 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5702 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5704 u_char chg, ofs, per, fak, dt, div, wide;
5708 * Synchronous request message received.
5710 if (DEBUG_FLAGS & DEBUG_NEGO) {
5711 sym_print_msg(cp, "ppr msgin", np->msgin);
5715 * get requested values.
5720 wide = np->msgin[6];
5721 dt = np->msgin[7] & PPR_OPT_DT;
5724 * request or answer ?
5726 if (INB (HS_PRT) == HS_NEGOTIATE) {
5727 OUTB (HS_PRT, HS_BUSY);
5728 if (cp->nego_status && cp->nego_status != NS_PPR)
5734 * check values against our limits.
5736 if (wide > np->maxwide)
5737 {chg = 1; wide = np->maxwide;}
5738 if (!wide || !(np->features & FE_ULTRA3))
5741 if (wide > tp->tinfo.user.width)
5742 {chg = 1; wide = tp->tinfo.user.width;}
5745 if (!(np->features & FE_U3EN)) /* Broken U3EN bit not supported */
5748 if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5752 if (ofs > np->maxoffs_dt)
5753 {chg = 1; ofs = np->maxoffs_dt;}
5755 else if (ofs > np->maxoffs)
5756 {chg = 1; ofs = np->maxoffs;}
5758 if (ofs > tp->tinfo.user.offset)
5759 {chg = 1; ofs = tp->tinfo.user.offset;}
5765 if (per < np->minsync_dt)
5766 {chg = 1; per = np->minsync_dt;}
5768 else if (per < np->minsync)
5769 {chg = 1; per = np->minsync;}
5771 if (per < tp->tinfo.user.period)
5772 {chg = 1; per = tp->tinfo.user.period;}
5777 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
5780 if (DEBUG_FLAGS & DEBUG_NEGO) {
5783 "dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
5784 dt, ofs, per, wide, div, fak, chg);
5791 if (chg) /* Answer wasn't acceptable */
5793 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5794 OUTL_DSP (SCRIPTA_BA (np, clrack));
5799 * It was a request. Set value and
5800 * prepare an answer message
5802 sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
5804 np->msgout[0] = M_EXTENDED;
5806 np->msgout[2] = M_X_PPR_REQ;
5807 np->msgout[3] = per;
5809 np->msgout[5] = ofs;
5810 np->msgout[6] = wide;
5813 cp->nego_status = NS_PPR;
5815 if (DEBUG_FLAGS & DEBUG_NEGO) {
5816 sym_print_msg(cp, "ppr msgout", np->msgout);
5819 np->msgin [0] = M_NOOP;
5821 OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
5824 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5825 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5827 * If it was a device response that should result in
5828 * ST, we may want to try a legacy negotiation later.
5831 tp->tinfo.goal.options = 0;
5832 tp->tinfo.goal.width = wide;
5833 tp->tinfo.goal.period = per;
5834 tp->tinfo.goal.offset = ofs;
5839 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
5841 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
5847 * Wide request message received.
5849 if (DEBUG_FLAGS & DEBUG_NEGO) {
5850 sym_print_msg(cp, "wide msgin", np->msgin);
5854 * Is it a request from the device?
5856 if (INB (HS_PRT) == HS_NEGOTIATE) {
5857 OUTB (HS_PRT, HS_BUSY);
5858 if (cp->nego_status && cp->nego_status != NS_WIDE)
5864 * get requested values.
5867 wide = np->msgin[3];
5870 * check values against driver limits.
5872 if (wide > np->maxwide)
5873 {chg = 1; wide = np->maxwide;}
5875 if (wide > tp->tinfo.user.width)
5876 {chg = 1; wide = tp->tinfo.user.width;}
5879 if (DEBUG_FLAGS & DEBUG_NEGO) {
5881 printf ("wdtr: wide=%d chg=%d.\n", wide, chg);
5885 * This was an answer message
5888 if (chg) /* Answer wasn't acceptable. */
5890 sym_setwide (np, cp, wide);
5893 * Negotiate for SYNC immediately after WIDE response.
5894 * This allows to negotiate for both WIDE and SYNC on
5895 * a single SCSI command (Suggested by Justin Gibbs).
5897 if (tp->tinfo.goal.offset) {
5898 np->msgout[0] = M_EXTENDED;
5900 np->msgout[2] = M_X_SYNC_REQ;
5901 np->msgout[3] = tp->tinfo.goal.period;
5902 np->msgout[4] = tp->tinfo.goal.offset;
5904 if (DEBUG_FLAGS & DEBUG_NEGO) {
5905 sym_print_msg(cp, "sync msgout", np->msgout);
5908 cp->nego_status = NS_SYNC;
5909 OUTB (HS_PRT, HS_NEGOTIATE);
5910 OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5914 OUTL_DSP (SCRIPTA_BA (np, clrack));
5919 * It was a request, set value and
5920 * prepare an answer message
5922 sym_setwide (np, cp, wide);
5924 np->msgout[0] = M_EXTENDED;
5926 np->msgout[2] = M_X_WIDE_REQ;
5927 np->msgout[3] = wide;
5929 np->msgin [0] = M_NOOP;
5931 cp->nego_status = NS_WIDE;
5933 if (DEBUG_FLAGS & DEBUG_NEGO) {
5934 sym_print_msg(cp, "wide msgout", np->msgout);
5937 OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
5940 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5944 * Reset SYNC or WIDE to default settings.
5946 * Called when a negotiation does not succeed either
5947 * on rejection or on protocol error.
5949 * If it was a PPR that made problems, we may want to
5950 * try a legacy negotiation later.
5952 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
5955 * any error in negotiation:
5956 * fall back to default mode.
5958 switch (cp->nego_status) {
5961 sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
5963 tp->tinfo.goal.options = 0;
5964 if (tp->tinfo.goal.period < np->minsync)
5965 tp->tinfo.goal.period = np->minsync;
5966 if (tp->tinfo.goal.offset > np->maxoffs)
5967 tp->tinfo.goal.offset = np->maxoffs;
5971 sym_setsync (np, cp, 0, 0, 0, 0);
5974 sym_setwide (np, cp, 0);
5977 np->msgin [0] = M_NOOP;
5978 np->msgout[0] = M_NOOP;
5979 cp->nego_status = 0;
5983 * chip handler for MESSAGE REJECT received in response to
5984 * a WIDE or SYNCHRONOUS negotiation.
5986 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
5988 sym_nego_default(np, tp, cp);
5989 OUTB (HS_PRT, HS_BUSY);
5993 * chip exception handler for programmed interrupts.
5995 static void sym_int_sir (hcb_p np)
5997 u_char num = INB (nc_dsps);
5998 u32 dsa = INL (nc_dsa);
5999 ccb_p cp = sym_ccb_from_dsa(np, dsa);
6000 u_char target = INB (nc_sdid) & 0x0f;
6001 tcb_p tp = &np->target[target];
6004 SYM_LOCK_ASSERT(MA_OWNED);
6006 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
6010 * Command has been completed with error condition
6011 * or has been auto-sensed.
6013 case SIR_COMPLETE_ERROR:
6014 sym_complete_error(np, cp);
6017 * The C code is currently trying to recover from something.
6018 * Typically, user want to abort some command.
6020 case SIR_SCRIPT_STOPPED:
6021 case SIR_TARGET_SELECTED:
6022 case SIR_ABORT_SENT:
6023 sym_sir_task_recovery(np, num);
6026 * The device didn't go to MSG OUT phase after having
6027 * been selected with ATN. We donnot want to handle
6030 case SIR_SEL_ATN_NO_MSG_OUT:
6031 printf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6032 sym_name (np), target);
6035 * The device didn't switch to MSG IN phase after
6036 * having reseleted the initiator.
6038 case SIR_RESEL_NO_MSG_IN:
6039 printf ("%s:%d: No MSG IN phase after reselection.\n",
6040 sym_name (np), target);
6043 * After reselection, the device sent a message that wasn't
6046 case SIR_RESEL_NO_IDENTIFY:
6047 printf ("%s:%d: No IDENTIFY after reselection.\n",
6048 sym_name (np), target);
6051 * The device reselected a LUN we donnot know about.
6053 case SIR_RESEL_BAD_LUN:
6054 np->msgout[0] = M_RESET;
6057 * The device reselected for an untagged nexus and we
6060 case SIR_RESEL_BAD_I_T_L:
6061 np->msgout[0] = M_ABORT;
6064 * The device reselected for a tagged nexus that we donnot
6067 case SIR_RESEL_BAD_I_T_L_Q:
6068 np->msgout[0] = M_ABORT_TAG;
6071 * The SCRIPTS let us know that the device has grabbed
6072 * our message and will abort the job.
6074 case SIR_RESEL_ABORTED:
6075 np->lastmsg = np->msgout[0];
6076 np->msgout[0] = M_NOOP;
6077 printf ("%s:%d: message %x sent on bad reselection.\n",
6078 sym_name (np), target, np->lastmsg);
6081 * The SCRIPTS let us know that a message has been
6082 * successfully sent to the device.
6084 case SIR_MSG_OUT_DONE:
6085 np->lastmsg = np->msgout[0];
6086 np->msgout[0] = M_NOOP;
6087 /* Should we really care of that */
6088 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6090 cp->xerr_status &= ~XE_PARITY_ERR;
6091 if (!cp->xerr_status)
6092 OUTOFFB (HF_PRT, HF_EXT_ERR);
6097 * The device didn't send a GOOD SCSI status.
6098 * We may have some work to do prior to allow
6099 * the SCRIPTS processor to continue.
6101 case SIR_BAD_SCSI_STATUS:
6104 sym_sir_bad_scsi_status(np, cp);
6107 * We are asked by the SCRIPTS to prepare a
6110 case SIR_REJECT_TO_SEND:
6111 sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6112 np->msgout[0] = M_REJECT;
6115 * We have been ODD at the end of a DATA IN
6116 * transfer and the device didn't send a
6117 * IGNORE WIDE RESIDUE message.
6118 * It is a data overrun condition.
6120 case SIR_SWIDE_OVERRUN:
6122 OUTONB (HF_PRT, HF_EXT_ERR);
6123 cp->xerr_status |= XE_SWIDE_OVRUN;
6127 * We have been ODD at the end of a DATA OUT
6129 * It is a data underrun condition.
6131 case SIR_SODL_UNDERRUN:
6133 OUTONB (HF_PRT, HF_EXT_ERR);
6134 cp->xerr_status |= XE_SODL_UNRUN;
6138 * The device wants us to tranfer more data than
6139 * expected or in the wrong direction.
6140 * The number of extra bytes is in scratcha.
6141 * It is a data overrun condition.
6143 case SIR_DATA_OVERRUN:
6145 OUTONB (HF_PRT, HF_EXT_ERR);
6146 cp->xerr_status |= XE_EXTRA_DATA;
6147 cp->extra_bytes += INL (nc_scratcha);
6151 * The device switched to an illegal phase (4/5).
6155 OUTONB (HF_PRT, HF_EXT_ERR);
6156 cp->xerr_status |= XE_BAD_PHASE;
6160 * We received a message.
6162 case SIR_MSG_RECEIVED:
6165 switch (np->msgin [0]) {
6167 * We received an extended message.
6168 * We handle MODIFY DATA POINTER, SDTR, WDTR
6169 * and reject all other extended messages.
6172 switch (np->msgin [2]) {
6174 if (DEBUG_FLAGS & DEBUG_POINTER)
6175 sym_print_msg(cp,"modify DP",np->msgin);
6176 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6177 (np->msgin[5]<<8) + (np->msgin[6]);
6178 sym_modify_dp(np, cp, tmp);
6181 sym_sync_nego(np, tp, cp);
6184 sym_ppr_nego(np, tp, cp);
6187 sym_wide_nego(np, tp, cp);
6194 * We received a 1/2 byte message not handled from SCRIPTS.
6195 * We are only expecting MESSAGE REJECT and IGNORE WIDE
6196 * RESIDUE messages that haven't been anticipated by
6197 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6198 * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6201 if (DEBUG_FLAGS & DEBUG_POINTER)
6202 sym_print_msg(cp,"ign wide residue", np->msgin);
6203 sym_modify_dp(np, cp, -1);
6206 if (INB (HS_PRT) == HS_NEGOTIATE)
6207 sym_nego_rejected(np, tp, cp);
6210 printf ("M_REJECT received (%x:%x).\n",
6211 scr_to_cpu(np->lastmsg), np->msgout[0]);
6220 * We received an unknown message.
6221 * Ignore all MSG IN phases and reject it.
6224 sym_print_msg(cp, "WEIRD message received", np->msgin);
6225 OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6228 * Negotiation failed.
6229 * Target does not send us the reply.
6230 * Remove the HS_NEGOTIATE status.
6232 case SIR_NEGO_FAILED:
6233 OUTB (HS_PRT, HS_BUSY);
6235 * Negotiation failed.
6236 * Target does not want answer message.
6238 case SIR_NEGO_PROTO:
6239 sym_nego_default(np, tp, cp);
6247 OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6250 OUTL_DSP (SCRIPTA_BA (np, clrack));
6257 * Acquire a control block
6259 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6261 tcb_p tp = &np->target[tn];
6262 lcb_p lp = sym_lp(tp, ln);
6263 u_short tag = NO_TAG;
6265 ccb_p cp = (ccb_p) NULL;
6268 * Look for a free CCB
6270 if (sym_que_empty(&np->free_ccbq))
6272 qp = sym_remque_head(&np->free_ccbq);
6275 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6278 * If the LCB is not yet available and the LUN
6279 * has been probed ok, try to allocate the LCB.
6281 if (!lp && sym_is_bit(tp->lun_map, ln)) {
6282 lp = sym_alloc_lcb(np, tn, ln);
6288 * If the LCB is not available here, then the
6289 * logical unit is not yet discovered. For those
6290 * ones only accept 1 SCSI IO per logical unit,
6291 * since we cannot allow disconnections.
6294 if (!sym_is_bit(tp->busy0_map, ln))
6295 sym_set_bit(tp->busy0_map, ln);
6300 * If we have been asked for a tagged command.
6304 * Debugging purpose.
6306 assert(lp->busy_itl == 0);
6308 * Allocate resources for tags if not yet.
6311 sym_alloc_lcb_tags(np, tn, ln);
6316 * Get a tag for this SCSI IO and set up
6317 * the CCB bus address for reselection,
6318 * and count it for this LUN.
6319 * Toggle reselect path to tagged.
6321 if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6322 tag = lp->cb_tags[lp->ia_tag];
6323 if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6325 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6328 cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6334 * This command will not be tagged.
6335 * If we already have either a tagged or untagged
6336 * one, refuse to overlap this untagged one.
6340 * Debugging purpose.
6342 assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6344 * Count this nexus for this LUN.
6345 * Set up the CCB bus address for reselection.
6346 * Toggle reselect path to untagged.
6348 if (++lp->busy_itl == 1) {
6349 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6351 cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6358 * Put the CCB into the busy queue.
6360 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6363 * Remember all informations needed to free this CCB.
6370 if (DEBUG_FLAGS & DEBUG_TAGS) {
6371 PRINT_LUN(np, tn, ln);
6372 printf ("ccb @%p using tag %d.\n", cp, tag);
6378 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6383 * Release one control block
6385 static void sym_free_ccb(hcb_p np, ccb_p cp)
6387 tcb_p tp = &np->target[cp->target];
6388 lcb_p lp = sym_lp(tp, cp->lun);
6390 if (DEBUG_FLAGS & DEBUG_TAGS) {
6391 PRINT_LUN(np, cp->target, cp->lun);
6392 printf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6400 * If tagged, release the tag, set the relect path
6402 if (cp->tag != NO_TAG) {
6404 * Free the tag value.
6406 lp->cb_tags[lp->if_tag] = cp->tag;
6407 if (++lp->if_tag == SYM_CONF_MAX_TASK)
6410 * Make the reselect path invalid,
6411 * and uncount this CCB.
6413 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6415 } else { /* Untagged */
6417 * Make the reselect path invalid,
6418 * and uncount this CCB.
6420 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6424 * If no JOB active, make the LUN reselect path invalid.
6426 if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6428 cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6431 * Otherwise, we only accept 1 IO per LUN.
6432 * Clear the bit that keeps track of this IO.
6435 sym_clr_bit(tp->busy0_map, cp->lun);
6438 * We donnot queue more than 1 ccb per target
6439 * with negotiation at any time. If this ccb was
6440 * used for negotiation, clear this info in the tcb.
6442 if (cp == tp->nego_cp)
6445 #ifdef SYM_CONF_IARB_SUPPORT
6447 * If we just complete the last queued CCB,
6448 * clear this info that is no longer relevant.
6450 if (cp == np->last_cp)
6455 * Unmap user data from DMA map if needed.
6457 if (cp->dmamapped) {
6458 bus_dmamap_unload(np->data_dmat, cp->dmamap);
6463 * Make this CCB available.
6466 cp->host_status = HS_IDLE;
6467 sym_remque(&cp->link_ccbq);
6468 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6472 * Allocate a CCB from memory and initialize its fixed part.
6474 static ccb_p sym_alloc_ccb(hcb_p np)
6479 SYM_LOCK_ASSERT(MA_NOTOWNED);
6482 * Prevent from allocating more CCBs than we can
6483 * queue to the controller.
6485 if (np->actccbs >= SYM_CONF_MAX_START)
6489 * Allocate memory for this CCB.
6491 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6496 * Allocate a bounce buffer for sense data.
6498 cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6503 * Allocate a map for the DMA of user data.
6505 if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6513 * Initialize the callout.
6515 callout_init(&cp->ch, 1);
6518 * Compute the bus address of this ccb.
6520 cp->ccb_ba = vtobus(cp);
6523 * Insert this ccb into the hashed list.
6525 hcode = CCB_HASH_CODE(cp->ccb_ba);
6526 cp->link_ccbh = np->ccbh[hcode];
6527 np->ccbh[hcode] = cp;
6530 * Initialize the start and restart actions.
6532 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, idle));
6533 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6536 * Initilialyze some other fields.
6538 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6541 * Chain into free ccb queue.
6543 sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6548 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
6549 sym_mfree_dma(cp, sizeof(*cp), "CCB");
6554 * Look up a CCB from a DSA value.
6556 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6561 hcode = CCB_HASH_CODE(dsa);
6562 cp = np->ccbh[hcode];
6564 if (cp->ccb_ba == dsa)
6573 * Lun control block allocation and initialization.
6575 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6577 tcb_p tp = &np->target[tn];
6578 lcb_p lp = sym_lp(tp, ln);
6581 * Already done, just return.
6586 * Check against some race.
6588 assert(!sym_is_bit(tp->busy0_map, ln));
6591 * Allocate the LCB bus address array.
6592 * Compute the bus address of this table.
6594 if (ln && !tp->luntbl) {
6597 tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6600 for (i = 0 ; i < 64 ; i++)
6601 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6602 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6606 * Allocate the table of pointers for LUN(s) > 0, if needed.
6608 if (ln && !tp->lunmp) {
6609 tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6617 * Make it available to the chip.
6619 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6624 tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6628 tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6632 * Let the itl task point to error handling.
6634 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6637 * Set the reselect pattern to our default. :)
6639 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6642 * Set user capabilities.
6644 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6651 * Allocate LCB resources for tagged command queuing.
6653 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6655 tcb_p tp = &np->target[tn];
6656 lcb_p lp = sym_lp(tp, ln);
6660 * If LCB not available, try to allocate it.
6662 if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6666 * Allocate the task table and and the tag allocation
6667 * circular buffer. We want both or none.
6669 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6672 lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6674 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6680 * Initialize the task table with invalid entries.
6682 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6683 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6686 * Fill up the tag buffer with tag numbers.
6688 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6692 * Make the task table available to SCRIPTS,
6693 * And accept tagged commands now.
6695 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6699 * Test the pci bus snoop logic :-(
6701 * Has to be called with interrupts disabled.
6703 #ifndef SYM_CONF_IOMAPPED
6704 static int sym_regtest (hcb_p np)
6706 register volatile u32 data;
6708 * chip registers may NOT be cached.
6709 * write 0xffffffff to a read only register area,
6710 * and try to read it back.
6713 OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6714 data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6716 if (data == 0xffffffff) {
6718 if ((data & 0xe2f0fffd) != 0x02000080) {
6720 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6728 static int sym_snooptest (hcb_p np)
6730 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6732 #ifndef SYM_CONF_IOMAPPED
6733 err |= sym_regtest (np);
6734 if (err) return (err);
6738 * Enable Master Parity Checking as we intend
6739 * to enable it for normal operations.
6741 OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6745 pc = SCRIPTB0_BA (np, snooptest);
6749 * Set memory and register.
6751 np->cache = cpu_to_scr(host_wr);
6752 OUTL (nc_temp, sym_wr);
6754 * Start script (exchange values)
6756 OUTL (nc_dsa, np->hcb_ba);
6759 * Wait 'til done (with timeout)
6761 for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
6762 if (INB(nc_istat) & (INTF|SIP|DIP))
6764 if (i>=SYM_SNOOP_TIMEOUT) {
6765 printf ("CACHE TEST FAILED: timeout.\n");
6769 * Check for fatal DMA errors.
6771 dstat = INB (nc_dstat);
6772 #if 1 /* Band aiding for broken hardwares that fail PCI parity */
6773 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
6774 printf ("%s: PCI DATA PARITY ERROR DETECTED - "
6775 "DISABLING MASTER DATA PARITY CHECKING.\n",
6777 np->rv_ctest4 &= ~MPEE;
6781 if (dstat & (MDPE|BF|IID)) {
6782 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
6786 * Save termination position.
6790 * Read memory and register.
6792 host_rd = scr_to_cpu(np->cache);
6793 sym_rd = INL (nc_scratcha);
6794 sym_bk = INL (nc_temp);
6797 * Check termination position.
6799 if (pc != SCRIPTB0_BA (np, snoopend)+8) {
6800 printf ("CACHE TEST FAILED: script execution failed.\n");
6801 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6802 (u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
6803 (u_long) SCRIPTB0_BA (np, snoopend) +8);
6809 if (host_wr != sym_rd) {
6810 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
6811 (int) host_wr, (int) sym_rd);
6814 if (host_rd != sym_wr) {
6815 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
6816 (int) sym_wr, (int) host_rd);
6819 if (sym_bk != sym_wr) {
6820 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
6821 (int) sym_wr, (int) sym_bk);
6829 * Determine the chip's clock frequency.
6831 * This is essential for the negotiation of the synchronous
6834 * Note: we have to return the correct value.
6835 * THERE IS NO SAFE DEFAULT VALUE.
6837 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6838 * 53C860 and 53C875 rev. 1 support fast20 transfers but
6839 * do not have a clock doubler and so are provided with a
6840 * 80 MHz clock. All other fast20 boards incorporate a doubler
6841 * and so should be delivered with a 40 MHz clock.
6842 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
6843 * clock and provide a clock quadrupler (160 Mhz).
6847 * Select SCSI clock frequency
6849 static void sym_selectclock(hcb_p np, u_char scntl3)
6852 * If multiplier not present or not selected, leave here.
6854 if (np->multiplier <= 1) {
6855 OUTB(nc_scntl3, scntl3);
6859 if (sym_verbose >= 2)
6860 printf ("%s: enabling clock multiplier\n", sym_name(np));
6862 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6864 * Wait for the LCKFRQ bit to be set if supported by the chip.
6865 * Otherwise wait 20 micro-seconds.
6867 if (np->features & FE_LCKFRQ) {
6869 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6872 printf("%s: the chip cannot lock the frequency\n",
6876 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6877 OUTB(nc_scntl3, scntl3);
6878 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6879 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6883 * calculate SCSI clock frequency (in KHz)
6885 static unsigned getfreq (hcb_p np, int gen)
6887 unsigned int ms = 0;
6891 * Measure GEN timer delay in order
6892 * to calculate SCSI clock frequency
6894 * This code will never execute too
6895 * many loop iterations (if DELAY is
6896 * reasonably correct). It could get
6897 * too low a delay (too high a freq.)
6898 * if the CPU is slow executing the
6899 * loop for some reason (an NMI, for
6900 * example). For this reason we will
6901 * if multiple measurements are to be
6902 * performed trust the higher delay
6903 * (lower frequency returned).
6905 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6906 (void) INW (nc_sist); /* clear pending scsi interrupt */
6907 OUTB (nc_dien , 0); /* mask all dma interrupts */
6908 (void) INW (nc_sist); /* another one, just to be sure :) */
6909 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6910 OUTB (nc_stime1, 0); /* disable general purpose timer */
6911 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
6912 while (!(INW(nc_sist) & GEN) && ms++ < 100000)
6913 UDELAY (1000); /* count ms */
6914 OUTB (nc_stime1, 0); /* disable general purpose timer */
6916 * set prescaler to divide by whatever 0 means
6917 * 0 ought to choose divide by 2, but appears
6918 * to set divide by 3.5 mode in my 53c810 ...
6920 OUTB (nc_scntl3, 0);
6923 * adjust for prescaler, and convert into KHz
6925 f = ms ? ((1 << gen) * 4340) / ms : 0;
6927 if (sym_verbose >= 2)
6928 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
6929 sym_name(np), gen, ms, f);
6934 static unsigned sym_getfreq (hcb_p np)
6939 (void) getfreq (np, gen); /* throw away first result */
6940 f1 = getfreq (np, gen);
6941 f2 = getfreq (np, gen);
6942 if (f1 > f2) f1 = f2; /* trust lower result */
6947 * Get/probe chip SCSI clock frequency
6949 static void sym_getclock (hcb_p np, int mult)
6951 unsigned char scntl3 = np->sv_scntl3;
6952 unsigned char stest1 = np->sv_stest1;
6956 * For the C10 core, assume 40 MHz.
6958 if (np->features & FE_C10) {
6959 np->multiplier = mult;
6960 np->clock_khz = 40000 * mult;
6967 * True with 875/895/896/895A with clock multiplier selected
6969 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
6970 if (sym_verbose >= 2)
6971 printf ("%s: clock multiplier found\n", sym_name(np));
6972 np->multiplier = mult;
6976 * If multiplier not found or scntl3 not 7,5,3,
6977 * reset chip and get frequency from general purpose timer.
6978 * Otherwise trust scntl3 BIOS setting.
6980 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
6981 OUTB (nc_stest1, 0); /* make sure doubler is OFF */
6982 f1 = sym_getfreq (np);
6985 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
6987 if (f1 < 45000) f1 = 40000;
6988 else if (f1 < 55000) f1 = 50000;
6991 if (f1 < 80000 && mult > 1) {
6992 if (sym_verbose >= 2)
6993 printf ("%s: clock multiplier assumed\n",
6995 np->multiplier = mult;
6998 if ((scntl3 & 7) == 3) f1 = 40000;
6999 else if ((scntl3 & 7) == 5) f1 = 80000;
7002 f1 /= np->multiplier;
7006 * Compute controller synchronous parameters.
7008 f1 *= np->multiplier;
7013 * Get/probe PCI clock frequency
7015 static int sym_getpciclock (hcb_p np)
7020 * For the C1010-33, this doesn't work.
7021 * For the C1010-66, this will be tested when I'll have
7022 * such a beast to play with.
7024 if (!(np->features & FE_C10)) {
7025 OUTB (nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
7026 f = (int) sym_getfreq (np);
7027 OUTB (nc_stest1, 0);
7034 /*============= DRIVER ACTION/COMPLETION ====================*/
7037 * Print something that tells about extended errors.
7039 static void sym_print_xerr(ccb_p cp, int x_status)
7041 if (x_status & XE_PARITY_ERR) {
7043 printf ("unrecovered SCSI parity error.\n");
7045 if (x_status & XE_EXTRA_DATA) {
7047 printf ("extraneous data discarded.\n");
7049 if (x_status & XE_BAD_PHASE) {
7051 printf ("illegal scsi phase (4/5).\n");
7053 if (x_status & XE_SODL_UNRUN) {
7055 printf ("ODD transfer in DATA OUT phase.\n");
7057 if (x_status & XE_SWIDE_OVRUN) {
7059 printf ("ODD transfer in DATA IN phase.\n");
7064 * Choose the more appropriate CAM status if
7065 * the IO encountered an extended error.
7067 static int sym_xerr_cam_status(int cam_status, int x_status)
7070 if (x_status & XE_PARITY_ERR)
7071 cam_status = CAM_UNCOR_PARITY;
7072 else if (x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7073 cam_status = CAM_DATA_RUN_ERR;
7074 else if (x_status & XE_BAD_PHASE)
7075 cam_status = CAM_REQ_CMP_ERR;
7077 cam_status = CAM_REQ_CMP_ERR;
7083 * Complete execution of a SCSI command with extented
7084 * error, SCSI status error, or having been auto-sensed.
7086 * The SCRIPTS processor is not running there, so we
7087 * can safely access IO registers and remove JOBs from
7089 * SCRATCHA is assumed to have been loaded with STARTPOS
7090 * before the SCRIPTS called the C code.
7092 static void sym_complete_error (hcb_p np, ccb_p cp)
7094 struct ccb_scsiio *csio;
7096 int i, sense_returned;
7098 SYM_LOCK_ASSERT(MA_OWNED);
7101 * Paranoid check. :)
7103 if (!cp || !cp->cam_ccb)
7106 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7107 printf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7108 cp->host_status, cp->ssss_status, cp->host_flags,
7109 cp->target, cp->lun);
7114 * Get CAM command pointer.
7116 csio = &cp->cam_ccb->csio;
7119 * Check for extended errors.
7121 if (cp->xerr_status) {
7123 sym_print_xerr(cp, cp->xerr_status);
7124 if (cp->host_status == HS_COMPLETE)
7125 cp->host_status = HS_COMP_ERR;
7129 * Calculate the residual.
7131 csio->sense_resid = 0;
7132 csio->resid = sym_compute_residual(np, cp);
7134 if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7135 csio->resid = 0; /* throw them away. :) */
7139 if (cp->host_flags & HF_SENSE) { /* Auto sense */
7140 csio->scsi_status = cp->sv_scsi_status; /* Restore status */
7141 csio->sense_resid = csio->resid; /* Swap residuals */
7142 csio->resid = cp->sv_resid;
7144 if (sym_verbose && cp->sv_xerr_status)
7145 sym_print_xerr(cp, cp->sv_xerr_status);
7146 if (cp->host_status == HS_COMPLETE &&
7147 cp->ssss_status == S_GOOD &&
7148 cp->xerr_status == 0) {
7149 cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7150 cp->sv_xerr_status);
7151 cam_status |= CAM_AUTOSNS_VALID;
7153 * Bounce back the sense data to user and
7156 bzero(&csio->sense_data, sizeof(csio->sense_data));
7157 sense_returned = SYM_SNS_BBUF_LEN - csio->sense_resid;
7158 if (sense_returned < csio->sense_len)
7159 csio->sense_resid = csio->sense_len -
7162 csio->sense_resid = 0;
7163 bcopy(cp->sns_bbuf, &csio->sense_data,
7164 MIN(csio->sense_len, sense_returned));
7167 * If the device reports a UNIT ATTENTION condition
7168 * due to a RESET condition, we should consider all
7169 * disconnect CCBs for this unit as aborted.
7173 p = (u_char *) csio->sense_data;
7174 if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7175 sym_clear_tasks(np, CAM_REQ_ABORTED,
7176 cp->target,cp->lun, -1);
7181 cam_status = CAM_AUTOSENSE_FAIL;
7183 else if (cp->host_status == HS_COMPLETE) { /* Bad SCSI status */
7184 csio->scsi_status = cp->ssss_status;
7185 cam_status = CAM_SCSI_STATUS_ERROR;
7187 else if (cp->host_status == HS_SEL_TIMEOUT) /* Selection timeout */
7188 cam_status = CAM_SEL_TIMEOUT;
7189 else if (cp->host_status == HS_UNEXPECTED) /* Unexpected BUS FREE*/
7190 cam_status = CAM_UNEXP_BUSFREE;
7191 else { /* Extended error */
7194 printf ("COMMAND FAILED (%x %x %x).\n",
7195 cp->host_status, cp->ssss_status,
7198 csio->scsi_status = cp->ssss_status;
7200 * Set the most appropriate value for CAM status.
7202 cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7207 * Dequeue all queued CCBs for that device
7208 * not yet started by SCRIPTS.
7210 i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7211 (void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7214 * Restart the SCRIPTS processor.
7216 OUTL_DSP (SCRIPTA_BA (np, start));
7219 * Synchronize DMA map if needed.
7221 if (cp->dmamapped) {
7222 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7223 (cp->dmamapped == SYM_DMA_READ ?
7224 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7227 * Add this one to the COMP queue.
7228 * Complete all those commands with either error
7229 * or requeue condition.
7231 sym_set_cam_status((union ccb *) csio, cam_status);
7232 sym_remque(&cp->link_ccbq);
7233 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7234 sym_flush_comp_queue(np, 0);
7238 * Complete execution of a successful SCSI command.
7240 * Only successful commands go to the DONE queue,
7241 * since we need to have the SCRIPTS processor
7242 * stopped on any error condition.
7243 * The SCRIPTS processor is running while we are
7244 * completing successful commands.
7246 static void sym_complete_ok (hcb_p np, ccb_p cp)
7248 struct ccb_scsiio *csio;
7252 SYM_LOCK_ASSERT(MA_OWNED);
7255 * Paranoid check. :)
7257 if (!cp || !cp->cam_ccb)
7259 assert (cp->host_status == HS_COMPLETE);
7262 * Get command, target and lun pointers.
7264 csio = &cp->cam_ccb->csio;
7265 tp = &np->target[cp->target];
7266 lp = sym_lp(tp, cp->lun);
7269 * Assume device discovered on first success.
7272 sym_set_bit(tp->lun_map, cp->lun);
7275 * If all data have been transferred, given than no
7276 * extended error did occur, there is no residual.
7279 if (cp->phys.head.lastp != cp->phys.head.goalp)
7280 csio->resid = sym_compute_residual(np, cp);
7283 * Wrong transfer residuals may be worse than just always
7284 * returning zero. User can disable this feature from
7285 * sym_conf.h. Residual support is enabled by default.
7287 if (!SYM_CONF_RESIDUAL_SUPPORT)
7291 * Synchronize DMA map if needed.
7293 if (cp->dmamapped) {
7294 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7295 (cp->dmamapped == SYM_DMA_READ ?
7296 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7299 * Set status and complete the command.
7301 csio->scsi_status = cp->ssss_status;
7302 sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7303 sym_xpt_done(np, (union ccb *) csio, cp);
7304 sym_free_ccb(np, cp);
7308 * Our callout handler
7310 static void sym_callout(void *arg)
7312 union ccb *ccb = (union ccb *) arg;
7313 hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7316 * Check that the CAM CCB is still queued.
7323 switch(ccb->ccb_h.func_code) {
7325 (void) sym_abort_scsiio(np, ccb, 1);
7337 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7342 SYM_LOCK_ASSERT(MA_OWNED);
7345 * Look up our CCB control block.
7348 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7349 ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7350 if (cp2->cam_ccb == ccb) {
7355 if (!cp || cp->host_status == HS_WAIT)
7359 * If a previous abort didn't succeed in time,
7360 * perform a BUS reset.
7363 sym_reset_scsi_bus(np, 1);
7368 * Mark the CCB for abort and allow time for.
7370 cp->to_abort = timed_out ? 2 : 1;
7371 callout_reset(&cp->ch, 10 * hz, sym_callout, (caddr_t) ccb);
7374 * Tell the SCRIPTS processor to stop and synchronize with us.
7376 np->istat_sem = SEM;
7377 OUTB (nc_istat, SIGP|SEM);
7382 * Reset a SCSI device (all LUNs of a target).
7384 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7387 struct ccb_hdr *ccb_h = &ccb->ccb_h;
7389 SYM_LOCK_ASSERT(MA_OWNED);
7391 if (ccb_h->target_id == np->myaddr ||
7392 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7393 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7394 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7398 tp = &np->target[ccb_h->target_id];
7401 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7403 np->istat_sem = SEM;
7404 OUTB (nc_istat, SIGP|SEM);
7408 * SIM action entry point.
7410 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7417 u_char idmsg, *msgptr;
7419 struct ccb_scsiio *csio;
7420 struct ccb_hdr *ccb_h;
7422 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7425 * Retrieve our controller data structure.
7427 np = (hcb_p) cam_sim_softc(sim);
7429 SYM_LOCK_ASSERT(MA_OWNED);
7432 * The common case is SCSI IO.
7433 * We deal with other ones elsewhere.
7435 if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7436 sym_action2(sim, ccb);
7440 ccb_h = &csio->ccb_h;
7443 * Work around races.
7445 if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7451 * Minimal checkings, so that we will not
7452 * go outside our tables.
7454 if (ccb_h->target_id == np->myaddr ||
7455 ccb_h->target_id >= SYM_CONF_MAX_TARGET ||
7456 ccb_h->target_lun >= SYM_CONF_MAX_LUN) {
7457 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7462 * Retrieve the target and lun descriptors.
7464 tp = &np->target[ccb_h->target_id];
7465 lp = sym_lp(tp, ccb_h->target_lun);
7468 * Complete the 1st INQUIRY command with error
7469 * condition if the device is flagged NOSCAN
7470 * at BOOT in the NVRAM. This may speed up
7471 * the boot and maintain coherency with BIOS
7472 * device numbering. Clearing the flag allows
7473 * user to rescan skipped devices later.
7474 * We also return error for devices not flagged
7475 * for SCAN LUNS in the NVRAM since some mono-lun
7476 * devices behave badly when asked for some non
7477 * zero LUN. Btw, this is an absolute hack.:-)
7479 if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7480 (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7481 csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7482 if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7483 ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7484 ccb_h->target_lun != 0)) {
7485 tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7486 sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7492 * Get a control block for this IO.
7494 tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7495 cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7497 sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7502 * Keep track of the IO in our CCB.
7507 * Build the IDENTIFY message.
7509 idmsg = M_IDENTIFY | cp->lun;
7510 if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7513 msgptr = cp->scsi_smsg;
7515 msgptr[msglen++] = idmsg;
7518 * Build the tag message if present.
7520 if (cp->tag != NO_TAG) {
7521 u_char order = csio->tag_action;
7529 order = M_SIMPLE_TAG;
7531 msgptr[msglen++] = order;
7534 * For less than 128 tags, actual tags are numbered
7535 * 1,3,5,..2*MAXTAGS+1,since we may have to deal
7536 * with devices that have problems with #TAG 0 or too
7537 * great #TAG numbers. For more tags (up to 256),
7538 * we use directly our tag number.
7540 #if SYM_CONF_MAX_TASK > (512/4)
7541 msgptr[msglen++] = cp->tag;
7543 msgptr[msglen++] = (cp->tag << 1) + 1;
7548 * Build a negotiation message if needed.
7549 * (nego_status is filled by sym_prepare_nego())
7551 cp->nego_status = 0;
7552 if (tp->tinfo.current.width != tp->tinfo.goal.width ||
7553 tp->tinfo.current.period != tp->tinfo.goal.period ||
7554 tp->tinfo.current.offset != tp->tinfo.goal.offset ||
7555 tp->tinfo.current.options != tp->tinfo.goal.options) {
7556 if (!tp->nego_cp && lp)
7557 msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7567 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
7568 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7573 cp->phys.select.sel_id = cp->target;
7574 cp->phys.select.sel_scntl3 = tp->head.wval;
7575 cp->phys.select.sel_sxfer = tp->head.sval;
7576 cp->phys.select.sel_scntl4 = tp->head.uval;
7581 cp->phys.smsg.addr = cpu_to_scr(CCB_BA (cp, scsi_smsg));
7582 cp->phys.smsg.size = cpu_to_scr(msglen);
7587 if (sym_setup_cdb(np, csio, cp) < 0) {
7588 sym_xpt_done(np, ccb, cp);
7589 sym_free_ccb(np, cp);
7596 #if 0 /* Provision */
7597 cp->actualquirks = tp->quirks;
7599 cp->actualquirks = SYM_QUIRK_AUTOSAVE;
7600 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7601 cp->ssss_status = S_ILLEGAL;
7602 cp->xerr_status = 0;
7604 cp->extra_bytes = 0;
7607 * extreme data pointer.
7608 * shall be positive, so -1 is lower than lowest.:)
7614 * Build the data descriptor block
7617 sym_setup_data_and_start(np, csio, cp);
7621 * Setup buffers and pointers that address the CDB.
7622 * I bet, physical CDBs will never be used on the planet,
7623 * since they can be bounced without significant overhead.
7625 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7627 struct ccb_hdr *ccb_h;
7631 SYM_LOCK_ASSERT(MA_OWNED);
7633 ccb_h = &csio->ccb_h;
7636 * CDB is 16 bytes max.
7638 if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7639 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7642 cmd_len = csio->cdb_len;
7644 if (ccb_h->flags & CAM_CDB_POINTER) {
7645 /* CDB is a pointer */
7646 if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7647 /* CDB pointer is virtual */
7648 bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7649 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7651 /* CDB pointer is physical */
7653 cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7655 sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7660 /* CDB is in the CAM ccb (buffer) */
7661 bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7662 cmd_ba = CCB_BA (cp, cdb_buf[0]);
7665 cp->phys.cmd.addr = cpu_to_scr(cmd_ba);
7666 cp->phys.cmd.size = cpu_to_scr(cmd_len);
7672 * Set up data pointers used by SCRIPTS.
7674 static void __inline
7675 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7679 SYM_LOCK_ASSERT(MA_OWNED);
7682 * No segments means no data.
7688 * Set the data pointer.
7692 goalp = SCRIPTA_BA (np, data_out2) + 8;
7693 lastp = goalp - 8 - (cp->segments * (2*4));
7696 cp->host_flags |= HF_DATA_IN;
7697 goalp = SCRIPTA_BA (np, data_in2) + 8;
7698 lastp = goalp - 8 - (cp->segments * (2*4));
7702 lastp = goalp = SCRIPTB_BA (np, no_data);
7706 cp->phys.head.lastp = cpu_to_scr(lastp);
7707 cp->phys.head.goalp = cpu_to_scr(goalp);
7708 cp->phys.head.savep = cpu_to_scr(lastp);
7709 cp->startp = cp->phys.head.savep;
7713 * Call back routine for the DMA map service.
7714 * If bounce buffers are used (why ?), we may sleep and then
7715 * be called there in another context.
7718 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7726 np = (hcb_p) cp->arg;
7728 SYM_LOCK_ASSERT(MA_OWNED);
7731 * Deal with weird races.
7733 if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7737 * Deal with weird errors.
7741 sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7746 * Build the data descriptor for the chip.
7750 /* 896 rev 1 requires to be careful about boundaries */
7751 if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7752 retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7754 retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
7756 sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
7762 * Synchronize the DMA map only if we have
7763 * actually mapped the data.
7765 if (cp->dmamapped) {
7766 bus_dmamap_sync(np->data_dmat, cp->dmamap,
7767 (cp->dmamapped == SYM_DMA_READ ?
7768 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
7772 * Set host status to busy state.
7773 * May have been set back to HS_WAIT to avoid a race.
7775 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7778 * Set data pointers.
7780 sym_setup_data_pointers(np, cp, (ccb->ccb_h.flags & CAM_DIR_MASK));
7783 * Enqueue this IO in our pending queue.
7785 sym_enqueue_cam_ccb(cp);
7788 * When `#ifed 1', the code below makes the driver
7789 * panic on the first attempt to write to a SCSI device.
7790 * It is the first test we want to do after a driver
7791 * change that does not seem obviously safe. :)
7794 switch (cp->cdb_buf[0]) {
7795 case 0x0A: case 0x2A: case 0xAA:
7796 panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
7804 * Activate this job.
7806 sym_put_start_queue(np, cp);
7809 sym_xpt_done(np, ccb, cp);
7810 sym_free_ccb(np, cp);
7814 * How complex it gets to deal with the data in CAM.
7815 * The Bus Dma stuff makes things still more complex.
7818 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7820 struct ccb_hdr *ccb_h;
7823 SYM_LOCK_ASSERT(MA_OWNED);
7825 ccb_h = &csio->ccb_h;
7828 * Now deal with the data.
7830 cp->data_len = csio->dxfer_len;
7834 * No direction means no data.
7836 dir = (ccb_h->flags & CAM_DIR_MASK);
7837 if (dir == CAM_DIR_NONE) {
7838 sym_execute_ccb(cp, NULL, 0, 0);
7842 cp->dmamapped = (dir == CAM_DIR_IN) ? SYM_DMA_READ : SYM_DMA_WRITE;
7843 retv = bus_dmamap_load_ccb(np->data_dmat, cp->dmamap,
7844 (union ccb *)csio, sym_execute_ccb, cp, 0);
7845 if (retv == EINPROGRESS) {
7846 cp->host_status = HS_WAIT;
7847 xpt_freeze_simq(np->sim, 1);
7848 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
7853 * Move the scatter list to our data block.
7856 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
7857 bus_dma_segment_t *psegs, int nsegs)
7859 struct sym_tblmove *data;
7860 bus_dma_segment_t *psegs2;
7862 SYM_LOCK_ASSERT(MA_OWNED);
7864 if (nsegs > SYM_CONF_MAX_SG)
7867 data = &cp->phys.data[SYM_CONF_MAX_SG-1];
7868 psegs2 = &psegs[nsegs-1];
7869 cp->segments = nsegs;
7872 data->addr = cpu_to_scr(psegs2->ds_addr);
7873 data->size = cpu_to_scr(psegs2->ds_len);
7874 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7875 printf ("%s scatter: paddr=%lx len=%ld\n",
7876 sym_name(np), (long) psegs2->ds_addr,
7877 (long) psegs2->ds_len);
7879 if (psegs2 != psegs) {
7890 * Scatter a SG list with physical addresses into bus addressable chunks.
7893 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
7899 SYM_LOCK_ASSERT(MA_OWNED);
7901 s = SYM_CONF_MAX_SG - 1;
7903 ps = psegs[t].ds_addr;
7904 pe = ps + psegs[t].ds_len;
7907 pn = (pe - 1) & ~(SYM_CONF_DMA_BOUNDARY - 1);
7911 if (DEBUG_FLAGS & DEBUG_SCATTER) {
7912 printf ("%s scatter: paddr=%lx len=%ld\n",
7913 sym_name(np), pn, k);
7915 cp->phys.data[s].addr = cpu_to_scr(pn);
7916 cp->phys.data[s].size = cpu_to_scr(k);
7921 ps = psegs[t].ds_addr;
7922 pe = ps + psegs[t].ds_len;
7928 cp->segments = SYM_CONF_MAX_SG - 1 - s;
7930 return t >= 0 ? -1 : 0;
7934 * SIM action for non performance critical stuff.
7936 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
7938 union ccb *abort_ccb;
7939 struct ccb_hdr *ccb_h;
7940 struct ccb_pathinq *cpi;
7941 struct ccb_trans_settings *cts;
7942 struct sym_trans *tip;
7949 * Retrieve our controller data structure.
7951 np = (hcb_p) cam_sim_softc(sim);
7953 SYM_LOCK_ASSERT(MA_OWNED);
7955 ccb_h = &ccb->ccb_h;
7957 switch (ccb_h->func_code) {
7958 case XPT_SET_TRAN_SETTINGS:
7960 tp = &np->target[ccb_h->target_id];
7963 * Update SPI transport settings in TARGET control block.
7964 * Update SCSI device settings in LUN control block.
7966 lp = sym_lp(tp, ccb_h->target_lun);
7967 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7968 sym_update_trans(np, &tp->tinfo.goal, cts);
7970 sym_update_dflags(np, &lp->current_flags, cts);
7972 if (cts->type == CTS_TYPE_USER_SETTINGS) {
7973 sym_update_trans(np, &tp->tinfo.user, cts);
7975 sym_update_dflags(np, &lp->user_flags, cts);
7978 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7980 case XPT_GET_TRAN_SETTINGS:
7982 tp = &np->target[ccb_h->target_id];
7983 lp = sym_lp(tp, ccb_h->target_lun);
7985 #define cts__scsi (&cts->proto_specific.scsi)
7986 #define cts__spi (&cts->xport_specific.spi)
7987 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
7988 tip = &tp->tinfo.current;
7989 dflags = lp ? lp->current_flags : 0;
7992 tip = &tp->tinfo.user;
7993 dflags = lp ? lp->user_flags : tp->usrflags;
7996 cts->protocol = PROTO_SCSI;
7997 cts->transport = XPORT_SPI;
7998 cts->protocol_version = tip->scsi_version;
7999 cts->transport_version = tip->spi_version;
8001 cts__spi->sync_period = tip->period;
8002 cts__spi->sync_offset = tip->offset;
8003 cts__spi->bus_width = tip->width;
8004 cts__spi->ppr_options = tip->options;
8006 cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8007 | CTS_SPI_VALID_SYNC_OFFSET
8008 | CTS_SPI_VALID_BUS_WIDTH
8009 | CTS_SPI_VALID_PPR_OPTIONS;
8011 cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8012 if (dflags & SYM_DISC_ENABLED)
8013 cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8014 cts__spi->valid |= CTS_SPI_VALID_DISC;
8016 cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8017 if (dflags & SYM_TAGS_ENABLED)
8018 cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8019 cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8022 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8024 case XPT_CALC_GEOMETRY:
8025 cam_calc_geometry(&ccb->ccg, /*extended*/1);
8026 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8030 cpi->version_num = 1;
8031 cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8032 if ((np->features & FE_WIDE) != 0)
8033 cpi->hba_inquiry |= PI_WIDE_16;
8034 cpi->target_sprt = 0;
8035 cpi->hba_misc = PIM_UNMAPPED;
8036 if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8037 cpi->hba_misc |= PIM_SCANHILO;
8038 if (np->usrflags & SYM_AVOID_BUS_RESET)
8039 cpi->hba_misc |= PIM_NOBUSRESET;
8040 cpi->hba_eng_cnt = 0;
8041 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8042 /* Semantic problem:)LUN number max = max number of LUNs - 1 */
8043 cpi->max_lun = SYM_CONF_MAX_LUN-1;
8044 if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8045 cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8046 cpi->bus_id = cam_sim_bus(sim);
8047 cpi->initiator_id = np->myaddr;
8048 cpi->base_transfer_speed = 3300;
8049 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8050 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8051 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8052 cpi->unit_number = cam_sim_unit(sim);
8054 cpi->protocol = PROTO_SCSI;
8055 cpi->protocol_version = SCSI_REV_2;
8056 cpi->transport = XPORT_SPI;
8057 cpi->transport_version = 2;
8058 cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8059 if (np->features & FE_ULTRA3) {
8060 cpi->transport_version = 3;
8061 cpi->xport_specific.spi.ppr_options =
8062 SID_SPI_CLOCK_DT_ST;
8064 cpi->maxio = SYM_CONF_MAX_SG * PAGE_SIZE;
8065 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8068 abort_ccb = ccb->cab.abort_ccb;
8069 switch(abort_ccb->ccb_h.func_code) {
8071 if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8072 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8076 sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8081 sym_reset_dev(np, ccb);
8084 sym_reset_scsi_bus(np, 0);
8086 xpt_print_path(np->path);
8087 printf("SCSI BUS reset delivered.\n");
8090 sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8092 case XPT_ACCEPT_TARGET_IO:
8093 case XPT_CONT_TARGET_IO:
8095 case XPT_NOTIFY_ACK:
8096 case XPT_IMMED_NOTIFY:
8099 sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8105 * Asynchronous notification handler.
8108 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *args __unused)
8111 struct cam_sim *sim;
8115 sim = (struct cam_sim *) cb_arg;
8116 np = (hcb_p) cam_sim_softc(sim);
8118 SYM_LOCK_ASSERT(MA_OWNED);
8121 case AC_LOST_DEVICE:
8122 tn = xpt_path_target_id(path);
8123 if (tn >= SYM_CONF_MAX_TARGET)
8126 tp = &np->target[tn];
8130 tp->head.wval = np->rv_scntl3;
8133 tp->tinfo.current.period = tp->tinfo.goal.period = 0;
8134 tp->tinfo.current.offset = tp->tinfo.goal.offset = 0;
8135 tp->tinfo.current.width = tp->tinfo.goal.width = BUS_8_BIT;
8136 tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8145 * Update transfer settings of a target.
8147 static void sym_update_trans(hcb_p np, struct sym_trans *tip,
8148 struct ccb_trans_settings *cts)
8151 SYM_LOCK_ASSERT(MA_OWNED);
8156 #define cts__spi (&cts->xport_specific.spi)
8157 if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8158 tip->width = cts__spi->bus_width;
8159 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8160 tip->offset = cts__spi->sync_offset;
8161 if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8162 tip->period = cts__spi->sync_period;
8163 if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8164 tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8165 if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8166 cts->protocol_version != PROTO_VERSION_UNKNOWN)
8167 tip->scsi_version = cts->protocol_version;
8168 if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8169 cts->transport_version != XPORT_VERSION_UNKNOWN)
8170 tip->spi_version = cts->transport_version;
8173 * Scale against driver configuration limits.
8175 if (tip->width > SYM_SETUP_MAX_WIDE) tip->width = SYM_SETUP_MAX_WIDE;
8176 if (tip->period && tip->offset) {
8177 if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8178 if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8185 * Scale against actual controller BUS width.
8187 if (tip->width > np->maxwide)
8188 tip->width = np->maxwide;
8191 * Only accept DT if controller supports and SYNC/WIDE asked.
8193 if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8194 !(tip->width == BUS_16_BIT && tip->offset)) {
8195 tip->options &= ~PPR_OPT_DT;
8199 * Scale period factor and offset against controller limits.
8201 if (tip->offset && tip->period) {
8202 if (tip->options & PPR_OPT_DT) {
8203 if (tip->period < np->minsync_dt)
8204 tip->period = np->minsync_dt;
8205 if (tip->period > np->maxsync_dt)
8206 tip->period = np->maxsync_dt;
8207 if (tip->offset > np->maxoffs_dt)
8208 tip->offset = np->maxoffs_dt;
8211 if (tip->period < np->minsync)
8212 tip->period = np->minsync;
8213 if (tip->period > np->maxsync)
8214 tip->period = np->maxsync;
8215 if (tip->offset > np->maxoffs)
8216 tip->offset = np->maxoffs;
8222 * Update flags for a device (logical unit).
8225 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8228 SYM_LOCK_ASSERT(MA_OWNED);
8230 #define cts__scsi (&cts->proto_specific.scsi)
8231 #define cts__spi (&cts->xport_specific.spi)
8232 if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8233 if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8234 *flags |= SYM_DISC_ENABLED;
8236 *flags &= ~SYM_DISC_ENABLED;
8239 if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8240 if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8241 *flags |= SYM_TAGS_ENABLED;
8243 *flags &= ~SYM_TAGS_ENABLED;
8249 /*============= DRIVER INITIALISATION ==================*/
8251 static device_method_t sym_pci_methods[] = {
8252 DEVMETHOD(device_probe, sym_pci_probe),
8253 DEVMETHOD(device_attach, sym_pci_attach),
8257 static driver_t sym_pci_driver = {
8263 static devclass_t sym_devclass;
8265 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, NULL, NULL);
8266 MODULE_DEPEND(sym, cam, 1, 1, 1);
8267 MODULE_DEPEND(sym, pci, 1, 1, 1);
8269 static const struct sym_pci_chip sym_pci_dev_table[] = {
8270 {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8273 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8274 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8278 {PCI_ID_SYM53C810, 0xff, "810a", 4, 8, 4, 1,
8279 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8282 {PCI_ID_SYM53C815, 0xff, "815", 4, 8, 4, 64,
8285 {PCI_ID_SYM53C825, 0x0f, "825", 6, 8, 4, 64,
8286 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8288 {PCI_ID_SYM53C825, 0xff, "825a", 6, 8, 4, 2,
8289 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8291 {PCI_ID_SYM53C860, 0xff, "860", 4, 8, 5, 1,
8292 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8294 {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8295 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8298 {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8299 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8302 {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8303 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8306 {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8307 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8310 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8311 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8312 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8316 {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8317 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8321 {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8322 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8323 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8325 {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8326 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8327 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8329 {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8330 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8331 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8334 {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8335 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8336 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8339 {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8340 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8341 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8344 {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8345 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8346 FE_RAM|FE_IO256|FE_LEDC}
8350 * Look up the chip table.
8352 * Return a pointer to the chip entry if found,
8355 static const struct sym_pci_chip *
8356 sym_find_pci_chip(device_t dev)
8358 const struct sym_pci_chip *chip;
8363 if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8366 device_id = pci_get_device(dev);
8367 revision = pci_get_revid(dev);
8369 for (i = 0; i < nitems(sym_pci_dev_table); i++) {
8370 chip = &sym_pci_dev_table[i];
8371 if (device_id != chip->device_id)
8373 if (revision > chip->revision_id)
8382 * Tell upper layer if the chip is supported.
8385 sym_pci_probe(device_t dev)
8387 const struct sym_pci_chip *chip;
8389 chip = sym_find_pci_chip(dev);
8390 if (chip && sym_find_firmware(chip)) {
8391 device_set_desc(dev, chip->name);
8392 return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)?
8393 BUS_PROBE_LOW_PRIORITY : BUS_PROBE_DEFAULT;
8399 * Attach a sym53c8xx device.
8402 sym_pci_attach(device_t dev)
8404 const struct sym_pci_chip *chip;
8407 struct sym_hcb *np = NULL;
8408 struct sym_nvram nvram;
8409 const struct sym_fw *fw = NULL;
8411 bus_dma_tag_t bus_dmat;
8413 bus_dmat = bus_get_dma_tag(dev);
8416 * Only probed devices should be attached.
8417 * We just enjoy being paranoid. :)
8419 chip = sym_find_pci_chip(dev);
8420 if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
8424 * Allocate immediately the host control block,
8425 * since we are only expecting to succeed. :)
8426 * We keep track in the HCB of all the resources that
8427 * are to be released on error.
8429 np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
8431 np->bus_dmat = bus_dmat;
8434 device_set_softc(dev, np);
8439 * Copy some useful infos to the HCB.
8441 np->hcb_ba = vtobus(np);
8442 np->verbose = bootverbose;
8444 np->device_id = pci_get_device(dev);
8445 np->revision_id = pci_get_revid(dev);
8446 np->features = chip->features;
8447 np->clock_divn = chip->nr_divisor;
8448 np->maxoffs = chip->offset_max;
8449 np->maxburst = chip->burst_max;
8450 np->scripta_sz = fw->a_size;
8451 np->scriptb_sz = fw->b_size;
8452 np->fw_setup = fw->setup;
8453 np->fw_patch = fw->patch;
8454 np->fw_name = fw->name;
8457 np->target = sym_calloc_dma(SYM_CONF_MAX_TARGET * sizeof(*(np->target)),
8464 * Initialize the CCB free and busy queues.
8466 sym_que_init(&np->free_ccbq);
8467 sym_que_init(&np->busy_ccbq);
8468 sym_que_init(&np->comp_ccbq);
8469 sym_que_init(&np->cam_ccbq);
8472 * Allocate a tag for the DMA of user data.
8474 if (bus_dma_tag_create(np->bus_dmat, 1, SYM_CONF_DMA_BOUNDARY,
8475 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
8476 BUS_SPACE_MAXSIZE_32BIT, SYM_CONF_MAX_SG, SYM_CONF_DMA_BOUNDARY,
8477 0, busdma_lock_mutex, &np->mtx, &np->data_dmat)) {
8478 device_printf(dev, "failed to create DMA tag.\n");
8483 * Read and apply some fix-ups to the PCI COMMAND
8484 * register. We want the chip to be enabled for:
8486 * - PCI parity checking (reporting would also be fine)
8487 * - Write And Invalidate.
8489 command = pci_read_config(dev, PCIR_COMMAND, 2);
8490 command |= PCIM_CMD_BUSMASTEREN | PCIM_CMD_PERRESPEN |
8492 pci_write_config(dev, PCIR_COMMAND, command, 2);
8495 * Let the device know about the cache line size,
8496 * if it doesn't yet.
8498 cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
8501 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
8505 * Alloc/get/map/retrieve everything that deals with MMIO.
8508 np->mmio_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &i,
8510 if (!np->mmio_res) {
8511 device_printf(dev, "failed to allocate MMIO resources\n");
8514 np->mmio_ba = rman_get_start(np->mmio_res);
8520 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i,
8521 RF_ACTIVE | RF_SHAREABLE);
8523 device_printf(dev, "failed to allocate IRQ resource\n");
8527 #ifdef SYM_CONF_IOMAPPED
8529 * User want us to use normal IO with PCI.
8530 * Alloc/get/map/retrieve everything that deals with IO.
8533 np->io_res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &i, RF_ACTIVE);
8535 device_printf(dev, "failed to allocate IO resources\n");
8539 #endif /* SYM_CONF_IOMAPPED */
8542 * If the chip has RAM.
8543 * Alloc/get/map/retrieve the corresponding resources.
8545 if (np->features & (FE_RAM|FE_RAM8K)) {
8546 int regs_id = SYM_PCI_RAM;
8547 if (np->features & FE_64BIT)
8548 regs_id = SYM_PCI_RAM64;
8549 np->ram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
8550 ®s_id, RF_ACTIVE);
8552 device_printf(dev,"failed to allocate RAM resources\n");
8555 np->ram_id = regs_id;
8556 np->ram_ba = rman_get_start(np->ram_res);
8560 * Save setting of some IO registers, so we will
8561 * be able to probe specific implementations.
8563 sym_save_initial_setting (np);
8566 * Reset the chip now, since it has been reported
8567 * that SCSI clock calibration may not work properly
8568 * if the chip is currently active.
8570 sym_chip_reset (np);
8573 * Try to read the user set-up.
8575 (void) sym_read_nvram(np, &nvram);
8578 * Prepare controller and devices settings, according
8579 * to chip features, user set-up and driver set-up.
8581 (void) sym_prepare_setting(np, &nvram);
8584 * Check the PCI clock frequency.
8585 * Must be performed after prepare_setting since it destroys
8586 * STEST1 that is used to probe for the clock doubler.
8588 i = sym_getpciclock(np);
8590 device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
8593 * Allocate the start queue.
8595 np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
8598 np->squeue_ba = vtobus(np->squeue);
8601 * Allocate the done queue.
8603 np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
8606 np->dqueue_ba = vtobus(np->dqueue);
8609 * Allocate the target bus address array.
8611 np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
8614 np->targtbl_ba = vtobus(np->targtbl);
8617 * Allocate SCRIPTS areas.
8619 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
8620 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
8621 if (!np->scripta0 || !np->scriptb0)
8625 * Allocate the CCBs. We need at least ONE.
8627 for (i = 0; sym_alloc_ccb(np) != NULL; i++)
8633 * Calculate BUS addresses where we are going
8634 * to load the SCRIPTS.
8636 np->scripta_ba = vtobus(np->scripta0);
8637 np->scriptb_ba = vtobus(np->scriptb0);
8638 np->scriptb0_ba = np->scriptb_ba;
8641 np->scripta_ba = np->ram_ba;
8642 if (np->features & FE_RAM8K) {
8644 np->scriptb_ba = np->scripta_ba + 4096;
8646 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
8654 * Copy scripts to controller instance.
8656 bcopy(fw->a_base, np->scripta0, np->scripta_sz);
8657 bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
8660 * Setup variable parts in scripts and compute
8661 * scripts bus addresses used from the C code.
8663 np->fw_setup(np, fw);
8666 * Bind SCRIPTS with physical addresses usable by the
8667 * SCRIPTS processor (as seen from the BUS = BUS addresses).
8669 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
8670 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
8672 #ifdef SYM_CONF_IARB_SUPPORT
8674 * If user wants IARB to be set when we win arbitration
8675 * and have other jobs, compute the max number of consecutive
8676 * settings of IARB hints before we leave devices a chance to
8677 * arbitrate for reselection.
8679 #ifdef SYM_SETUP_IARB_MAX
8680 np->iarb_max = SYM_SETUP_IARB_MAX;
8687 * Prepare the idle and invalid task actions.
8689 np->idletask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8690 np->idletask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8691 np->idletask_ba = vtobus(&np->idletask);
8693 np->notask.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8694 np->notask.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8695 np->notask_ba = vtobus(&np->notask);
8697 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8698 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
8699 np->bad_itl_ba = vtobus(&np->bad_itl);
8701 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA (np, idle));
8702 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
8703 np->bad_itlq_ba = vtobus(&np->bad_itlq);
8706 * Allocate and prepare the lun JUMP table that is used
8707 * for a target prior the probing of devices (bad lun table).
8708 * A private table will be allocated for the target on the
8709 * first INQUIRY response received.
8711 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
8715 np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
8716 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
8717 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
8720 * Prepare the bus address array that contains the bus
8721 * address of each target control block.
8722 * For now, assume all logical units are wrong. :)
8724 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
8725 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
8726 np->target[i].head.luntbl_sa =
8727 cpu_to_scr(vtobus(np->badluntbl));
8728 np->target[i].head.lun0_sa =
8729 cpu_to_scr(vtobus(&np->badlun_sa));
8733 * Now check the cache handling of the pci chipset.
8735 if (sym_snooptest (np)) {
8736 device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
8741 * Now deal with CAM.
8742 * Hopefully, we will succeed with that one.:)
8744 if (!sym_cam_attach(np))
8748 * Sigh! we are done.
8754 * We will try to free all the resources we have
8755 * allocated, but if we are a boot device, this
8756 * will not help that much.;)
8765 * Free everything that have been allocated for this device.
8767 static void sym_pci_free(hcb_p np)
8776 * First free CAM resources.
8781 * Now every should be quiet for us to
8782 * free other resources.
8785 bus_release_resource(np->device, SYS_RES_MEMORY,
8786 np->ram_id, np->ram_res);
8788 bus_release_resource(np->device, SYS_RES_MEMORY,
8789 SYM_PCI_MMIO, np->mmio_res);
8791 bus_release_resource(np->device, SYS_RES_IOPORT,
8792 SYM_PCI_IO, np->io_res);
8794 bus_release_resource(np->device, SYS_RES_IRQ,
8798 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
8800 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
8802 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
8804 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
8806 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
8807 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
8808 bus_dmamap_destroy(np->data_dmat, cp->dmamap);
8809 sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
8810 sym_mfree_dma(cp, sizeof(*cp), "CCB");
8814 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
8816 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
8817 tp = &np->target[target];
8818 for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
8819 lp = sym_lp(tp, lun);
8823 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
8826 sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
8828 sym_mfree_dma(lp, sizeof(*lp), "LCB");
8830 #if SYM_CONF_MAX_LUN > 1
8832 sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
8838 sym_mfree_dma(np->target,
8839 SYM_CONF_MAX_TARGET * sizeof(*(np->target)), "TARGET");
8842 sym_mfree_dma(np->targtbl, 256, "TARGTBL");
8844 bus_dma_tag_destroy(np->data_dmat);
8845 if (SYM_LOCK_INITIALIZED() != 0)
8847 device_set_softc(np->device, NULL);
8848 sym_mfree_dma(np, sizeof(*np), "HCB");
8852 * Allocate CAM resources and register a bus to CAM.
8854 static int sym_cam_attach(hcb_p np)
8856 struct cam_devq *devq = NULL;
8857 struct cam_sim *sim = NULL;
8858 struct cam_path *path = NULL;
8862 * Establish our interrupt handler.
8864 err = bus_setup_intr(np->device, np->irq_res,
8865 INTR_ENTROPY | INTR_MPSAFE | INTR_TYPE_CAM,
8866 NULL, sym_intr, np, &np->intr);
8868 device_printf(np->device, "bus_setup_intr() failed: %d\n",
8874 * Create the device queue for our sym SIM.
8876 devq = cam_simq_alloc(SYM_CONF_MAX_START);
8881 * Construct our SIM entry.
8883 sim = cam_sim_alloc(sym_action, sym_poll, "sym", np,
8884 device_get_unit(np->device),
8885 &np->mtx, 1, SYM_SETUP_MAX_TAG, devq);
8891 if (xpt_bus_register(sim, np->device, 0) != CAM_SUCCESS)
8895 if (xpt_create_path(&path, NULL,
8896 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
8897 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
8903 * Establish our async notification handler.
8905 if (xpt_register_async(AC_LOST_DEVICE, sym_async, sim, path) !=
8910 * Start the chip now, without resetting the BUS, since
8911 * it seems that this must stay under control of CAM.
8912 * With LVD/SE capable chips and BUS in SE mode, we may
8913 * get a spurious SMBC interrupt.
8922 cam_sim_free(sim, FALSE);
8924 cam_simq_free(devq);
8934 * Free everything that deals with CAM.
8936 static void sym_cam_free(hcb_p np)
8939 SYM_LOCK_ASSERT(MA_NOTOWNED);
8942 bus_teardown_intr(np->device, np->irq_res, np->intr);
8949 xpt_bus_deregister(cam_sim_path(np->sim));
8950 cam_sim_free(np->sim, /*free_devq*/ TRUE);
8954 xpt_free_path(np->path);
8961 /*============ OPTIONNAL NVRAM SUPPORT =================*/
8964 * Get host setup from NVRAM.
8966 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
8968 #ifdef SYM_CONF_NVRAM_SUPPORT
8970 * Get parity checking, host ID, verbose mode
8971 * and miscellaneous host flags from NVRAM.
8973 switch(nvram->type) {
8974 case SYM_SYMBIOS_NVRAM:
8975 if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
8976 np->rv_scntl0 &= ~0x0a;
8977 np->myaddr = nvram->data.Symbios.host_id & 0x0f;
8978 if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
8980 if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
8981 np->usrflags |= SYM_SCAN_TARGETS_HILO;
8982 if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
8983 np->usrflags |= SYM_AVOID_BUS_RESET;
8985 case SYM_TEKRAM_NVRAM:
8986 np->myaddr = nvram->data.Tekram.host_id & 0x0f;
8995 * Get target setup from NVRAM.
8997 #ifdef SYM_CONF_NVRAM_SUPPORT
8998 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
8999 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9003 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9005 #ifdef SYM_CONF_NVRAM_SUPPORT
9007 case SYM_SYMBIOS_NVRAM:
9008 sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9010 case SYM_TEKRAM_NVRAM:
9011 sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9019 #ifdef SYM_CONF_NVRAM_SUPPORT
9021 * Get target set-up from Symbios format NVRAM.
9024 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9026 tcb_p tp = &np->target[target];
9027 Symbios_target *tn = &nvram->target[target];
9029 tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9030 tp->tinfo.user.width = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9032 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9034 if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9035 tp->usrflags &= ~SYM_DISC_ENABLED;
9036 if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9037 tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9038 if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9039 tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9043 * Get target set-up from Tekram format NVRAM.
9046 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9048 tcb_p tp = &np->target[target];
9049 struct Tekram_target *tn = &nvram->target[target];
9052 if (tn->flags & TEKRAM_SYNC_NEGO) {
9053 i = tn->sync_index & 0xf;
9054 tp->tinfo.user.period = Tekram_sync[i];
9057 tp->tinfo.user.width =
9058 (tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9060 if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9061 tp->usrtags = 2 << nvram->max_tags_index;
9064 if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9065 tp->usrflags |= SYM_DISC_ENABLED;
9067 /* If any device does not support parity, we will not use this option */
9068 if (!(tn->flags & TEKRAM_PARITY_CHECK))
9069 np->rv_scntl0 &= ~0x0a; /* SCSI parity checking disabled */
9072 #ifdef SYM_CONF_DEBUG_NVRAM
9074 * Dump Symbios format NVRAM for debugging purpose.
9076 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9080 /* display Symbios nvram host data */
9081 printf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9082 sym_name(np), nvram->host_id & 0x0f,
9083 (nvram->flags & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9084 (nvram->flags & SYMBIOS_PARITY_ENABLE) ? " PARITY" :"",
9085 (nvram->flags & SYMBIOS_VERBOSE_MSGS) ? " VERBOSE" :"",
9086 (nvram->flags & SYMBIOS_CHS_MAPPING) ? " CHS_ALT" :"",
9087 (nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET" :"",
9088 (nvram->flags1 & SYMBIOS_SCAN_HI_LO) ? " HI_LO" :"");
9090 /* display Symbios nvram drive data */
9091 for (i = 0 ; i < 15 ; i++) {
9092 struct Symbios_target *tn = &nvram->target[i];
9093 printf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9095 (tn->flags & SYMBIOS_DISCONNECT_ENABLE) ? " DISC" : "",
9096 (tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME) ? " SCAN_BOOT" : "",
9097 (tn->flags & SYMBIOS_SCAN_LUNS) ? " SCAN_LUNS" : "",
9098 (tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ" : "",
9100 tn->sync_period / 4,
9106 * Dump TEKRAM format NVRAM for debugging purpose.
9108 static const u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9109 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9111 int i, tags, boot_delay;
9114 /* display Tekram nvram host data */
9115 tags = 2 << nvram->max_tags_index;
9117 if (nvram->boot_delay_index < 6)
9118 boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9119 switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9121 case 0: rem = ""; break;
9122 case 1: rem = " REMOVABLE=boot device"; break;
9123 case 2: rem = " REMOVABLE=all"; break;
9126 printf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9127 sym_name(np), nvram->host_id & 0x0f,
9128 (nvram->flags1 & SYMBIOS_SCAM_ENABLE) ? " SCAM" :"",
9129 (nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES" :"",
9130 (nvram->flags & TEKRAM_DRIVES_SUP_1GB) ? " >1GB" :"",
9131 (nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET" :"",
9132 (nvram->flags & TEKRAM_ACTIVE_NEGATION) ? " ACT_NEG" :"",
9133 (nvram->flags & TEKRAM_IMMEDIATE_SEEK) ? " IMM_SEEK" :"",
9134 (nvram->flags & TEKRAM_SCAN_LUNS) ? " SCAN_LUNS" :"",
9135 (nvram->flags1 & TEKRAM_F2_F6_ENABLED) ? " F2_F6" :"",
9136 rem, boot_delay, tags);
9138 /* display Tekram nvram drive data */
9139 for (i = 0; i <= 15; i++) {
9141 struct Tekram_target *tn = &nvram->target[i];
9142 j = tn->sync_index & 0xf;
9143 sync = Tekram_sync[j];
9144 printf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9146 (tn->flags & TEKRAM_PARITY_CHECK) ? " PARITY" : "",
9147 (tn->flags & TEKRAM_SYNC_NEGO) ? " SYNC" : "",
9148 (tn->flags & TEKRAM_DISCONNECT_ENABLE) ? " DISC" : "",
9149 (tn->flags & TEKRAM_START_CMD) ? " START" : "",
9150 (tn->flags & TEKRAM_TAGGED_COMMANDS) ? " TCQ" : "",
9151 (tn->flags & TEKRAM_WIDE_NEGO) ? " WIDE" : "",
9155 #endif /* SYM_CONF_DEBUG_NVRAM */
9156 #endif /* SYM_CONF_NVRAM_SUPPORT */
9159 * Try reading Symbios or Tekram NVRAM
9161 #ifdef SYM_CONF_NVRAM_SUPPORT
9162 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9163 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram);
9166 static int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9168 #ifdef SYM_CONF_NVRAM_SUPPORT
9170 * Try to read SYMBIOS nvram.
9171 * Try to read TEKRAM nvram if Symbios nvram not found.
9173 if (SYM_SETUP_SYMBIOS_NVRAM &&
9174 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9175 nvp->type = SYM_SYMBIOS_NVRAM;
9176 #ifdef SYM_CONF_DEBUG_NVRAM
9177 sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9180 else if (SYM_SETUP_TEKRAM_NVRAM &&
9181 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9182 nvp->type = SYM_TEKRAM_NVRAM;
9183 #ifdef SYM_CONF_DEBUG_NVRAM
9184 sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9195 #ifdef SYM_CONF_NVRAM_SUPPORT
9197 * 24C16 EEPROM reading.
9199 * GPOI0 - data in/data out
9201 * Symbios NVRAM wiring now also used by Tekram.
9210 * Set/clear data/clock bit in GPIO0
9212 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9218 *gpreg |= write_bit;
9231 OUTB (nc_gpreg, *gpreg);
9236 * Send START condition to NVRAM to wake it up.
9238 static void S24C16_start(hcb_p np, u_char *gpreg)
9240 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9241 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9242 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9243 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9247 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9249 static void S24C16_stop(hcb_p np, u_char *gpreg)
9251 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9252 S24C16_set_bit(np, 1, gpreg, SET_BIT);
9256 * Read or write a bit to the NVRAM,
9257 * read if GPIO0 input else write if GPIO0 output
9259 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9262 S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9263 S24C16_set_bit(np, 0, gpreg, SET_CLK);
9265 *read_bit = INB (nc_gpreg);
9266 S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9267 S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9271 * Output an ACK to the NVRAM after reading,
9272 * change GPIO0 to output and when done back to an input
9274 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
9277 OUTB (nc_gpcntl, *gpcntl & 0xfe);
9278 S24C16_do_bit(np, 0, write_bit, gpreg);
9279 OUTB (nc_gpcntl, *gpcntl);
9283 * Input an ACK from NVRAM after writing,
9284 * change GPIO0 to input and when done back to an output
9286 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
9289 OUTB (nc_gpcntl, *gpcntl | 0x01);
9290 S24C16_do_bit(np, read_bit, 1, gpreg);
9291 OUTB (nc_gpcntl, *gpcntl);
9295 * WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
9296 * GPIO0 must already be set as an output
9298 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
9299 u_char *gpreg, u_char *gpcntl)
9303 for (x = 0; x < 8; x++)
9304 S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
9306 S24C16_read_ack(np, ack_data, gpreg, gpcntl);
9310 * READ a byte from the NVRAM and then send an ACK to say we have got it,
9311 * GPIO0 must already be set as an input
9313 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
9314 u_char *gpreg, u_char *gpcntl)
9320 for (x = 0; x < 8; x++) {
9321 S24C16_do_bit(np, &read_bit, 1, gpreg);
9322 *read_data |= ((read_bit & 0x01) << (7 - x));
9325 S24C16_write_ack(np, ack_data, gpreg, gpcntl);
9329 * Read 'len' bytes starting at 'offset'.
9331 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
9333 u_char gpcntl, gpreg;
9334 u_char old_gpcntl, old_gpreg;
9339 /* save current state of GPCNTL and GPREG */
9340 old_gpreg = INB (nc_gpreg);
9341 old_gpcntl = INB (nc_gpcntl);
9342 gpcntl = old_gpcntl & 0x1c;
9344 /* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
9345 OUTB (nc_gpreg, old_gpreg);
9346 OUTB (nc_gpcntl, gpcntl);
9348 /* this is to set NVRAM into a known state with GPIO0/1 both low */
9350 S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
9351 S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
9353 /* now set NVRAM inactive with GPIO0/1 both high */
9354 S24C16_stop(np, &gpreg);
9356 /* activate NVRAM */
9357 S24C16_start(np, &gpreg);
9359 /* write device code and random address MSB */
9360 S24C16_write_byte(np, &ack_data,
9361 0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9362 if (ack_data & 0x01)
9365 /* write random address LSB */
9366 S24C16_write_byte(np, &ack_data,
9367 offset & 0xff, &gpreg, &gpcntl);
9368 if (ack_data & 0x01)
9371 /* regenerate START state to set up for reading */
9372 S24C16_start(np, &gpreg);
9374 /* rewrite device code and address MSB with read bit set (lsb = 0x01) */
9375 S24C16_write_byte(np, &ack_data,
9376 0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
9377 if (ack_data & 0x01)
9380 /* now set up GPIO0 for inputting data */
9382 OUTB (nc_gpcntl, gpcntl);
9384 /* input all requested data - only part of total NVRAM */
9385 for (x = 0; x < len; x++)
9386 S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
9388 /* finally put NVRAM back in inactive mode */
9390 OUTB (nc_gpcntl, gpcntl);
9391 S24C16_stop(np, &gpreg);
9394 /* return GPIO0/1 to original states after having accessed NVRAM */
9395 OUTB (nc_gpcntl, old_gpcntl);
9396 OUTB (nc_gpreg, old_gpreg);
9401 #undef SET_BIT /* 0 */
9402 #undef CLR_BIT /* 1 */
9403 #undef SET_CLK /* 2 */
9404 #undef CLR_CLK /* 3 */
9407 * Try reading Symbios NVRAM.
9410 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
9412 static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
9413 u_char *data = (u_char *) nvram;
9414 int len = sizeof(*nvram);
9418 /* probe the 24c16 and read the SYMBIOS 24c16 area */
9419 if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
9422 /* check valid NVRAM signature, verify byte count and checksum */
9423 if (nvram->type != 0 ||
9424 bcmp(nvram->trailer, Symbios_trailer, 6) ||
9425 nvram->byte_count != len - 12)
9428 /* verify checksum */
9429 for (x = 6, csum = 0; x < len - 6; x++)
9431 if (csum != nvram->checksum)
9438 * 93C46 EEPROM reading.
9443 * GPIO4 - chip select
9449 * Pulse clock bit in GPIO0
9451 static void T93C46_Clk(hcb_p np, u_char *gpreg)
9453 OUTB (nc_gpreg, *gpreg | 0x04);
9455 OUTB (nc_gpreg, *gpreg);
9459 * Read bit from NVRAM
9461 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
9464 T93C46_Clk(np, gpreg);
9465 *read_bit = INB (nc_gpreg);
9469 * Write bit to GPIO0
9471 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
9473 if (write_bit & 0x01)
9480 OUTB (nc_gpreg, *gpreg);
9483 T93C46_Clk(np, gpreg);
9487 * Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
9489 static void T93C46_Stop(hcb_p np, u_char *gpreg)
9492 OUTB (nc_gpreg, *gpreg);
9495 T93C46_Clk(np, gpreg);
9499 * Send read command and address to NVRAM
9501 static void T93C46_Send_Command(hcb_p np, u_short write_data,
9502 u_char *read_bit, u_char *gpreg)
9506 /* send 9 bits, start bit (1), command (2), address (6) */
9507 for (x = 0; x < 9; x++)
9508 T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
9510 *read_bit = INB (nc_gpreg);
9514 * READ 2 bytes from the NVRAM
9516 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
9522 for (x = 0; x < 16; x++) {
9523 T93C46_Read_Bit(np, &read_bit, gpreg);
9525 if (read_bit & 0x01)
9526 *nvram_data |= (0x01 << (15 - x));
9528 *nvram_data &= ~(0x01 << (15 - x));
9533 * Read Tekram NvRAM data.
9535 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
9540 for (x = 0; x < len; x++) {
9542 /* output read command and address */
9543 T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
9544 if (read_bit & 0x01)
9546 T93C46_Read_Word(np, &data[x], gpreg);
9547 T93C46_Stop(np, gpreg);
9554 * Try reading 93C46 Tekram NVRAM.
9556 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
9558 u_char gpcntl, gpreg;
9559 u_char old_gpcntl, old_gpreg;
9562 /* save current state of GPCNTL and GPREG */
9563 old_gpreg = INB (nc_gpreg);
9564 old_gpcntl = INB (nc_gpcntl);
9566 /* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
9568 gpreg = old_gpreg & 0xe9;
9569 OUTB (nc_gpreg, gpreg);
9570 gpcntl = (old_gpcntl & 0xe9) | 0x09;
9571 OUTB (nc_gpcntl, gpcntl);
9573 /* input all of NVRAM, 64 words */
9574 retv = T93C46_Read_Data(np, (u_short *) nvram,
9575 sizeof(*nvram) / sizeof(short), &gpreg);
9577 /* return GPIO0/1/2/4 to original states after having accessed NVRAM */
9578 OUTB (nc_gpcntl, old_gpcntl);
9579 OUTB (nc_gpreg, old_gpreg);
9585 * Try reading Tekram NVRAM.
9588 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
9590 u_char *data = (u_char *) nvram;
9591 int len = sizeof(*nvram);
9595 switch (np->device_id) {
9596 case PCI_ID_SYM53C885:
9597 case PCI_ID_SYM53C895:
9598 case PCI_ID_SYM53C896:
9599 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9602 case PCI_ID_SYM53C875:
9603 x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
9608 x = sym_read_T93C46_nvram(np, nvram);
9614 /* verify checksum */
9615 for (x = 0, csum = 0; x < len - 1; x += 2)
9616 csum += data[x] + (data[x+1] << 8);
9623 #endif /* SYM_CONF_NVRAM_SUPPORT */