sys/dev/usb/controller/ehci.c

   1 /*-
   2  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
   3  * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
   4  * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
   5  * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  31  *
  32  * The EHCI 0.96 spec can be found at
  33  * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
  34  * The EHCI 1.0 spec can be found at
  35  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  36  * and the USB 2.0 spec at
  37  * http://www.usb.org/developers/docs/usb_20.zip
  38  *
  39  */
  40
  41 /*
  42  * TODO:
  43  * 1) command failures are not recovered correctly
  44  */
  45
  46 #include <sys/cdefs.h>
  47 __FBSDID("$FreeBSD$");
  48
  49 #include <sys/stdint.h>
  50 #include <sys/stddef.h>
  51 #include <sys/param.h>
  52 #include <sys/queue.h>
  53 #include <sys/types.h>
  54 #include <sys/systm.h>
  55 #include <sys/kernel.h>
  56 #include <sys/bus.h>
  57 #include <sys/module.h>
  58 #include <sys/lock.h>
  59 #include <sys/mutex.h>
  60 #include <sys/condvar.h>
  61 #include <sys/sysctl.h>
  62 #include <sys/sx.h>
  63 #include <sys/unistd.h>
  64 #include <sys/callout.h>
  65 #include <sys/malloc.h>
  66 #include <sys/priv.h>
  67
  68 #include <dev/usb/usb.h>
  69 #include <dev/usb/usbdi.h>
  70
  71 #define USB_DEBUG_VAR ehcidebug
  72
  73 #include <dev/usb/usb_core.h>
  74 #include <dev/usb/usb_debug.h>
  75 #include <dev/usb/usb_busdma.h>
  76 #include <dev/usb/usb_process.h>
  77 #include <dev/usb/usb_transfer.h>
  78 #include <dev/usb/usb_device.h>
  79 #include <dev/usb/usb_hub.h>
  80 #include <dev/usb/usb_util.h>
  81
  82 #include <dev/usb/usb_controller.h>
  83 #include <dev/usb/usb_bus.h>
  84 #include <dev/usb/controller/ehci.h>
  85 #include <dev/usb/controller/ehcireg.h>
  86
  87 #define EHCI_BUS2SC(bus) \
  88    ((ehci_softc_t *)(((uint8_t *)(bus)) - \
  89     ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
  90
  91 #ifdef USB_DEBUG
  92 static int ehcidebug = 0;
  93 static int ehcinohighspeed = 0;
  94 static int ehciiaadbug = 0;
  95 static int ehcilostintrbug = 0;
  96
  97 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
  98 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN,
  99     &ehcidebug, 0, "Debug level");
 100 TUNABLE_INT("hw.usb.ehci.debug", &ehcidebug);
 101 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RW | CTLFLAG_TUN,
 102     &ehcinohighspeed, 0, "Disable High Speed USB");
 103 TUNABLE_INT("hw.usb.ehci.no_hs", &ehcinohighspeed);
 104 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, iaadbug, CTLFLAG_RW | CTLFLAG_TUN,
 105     &ehciiaadbug, 0, "Enable doorbell bug workaround");
 106 TUNABLE_INT("hw.usb.ehci.iaadbug", &ehciiaadbug);
 107 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, lostintrbug, CTLFLAG_RW | CTLFLAG_TUN,
 108     &ehcilostintrbug, 0, "Enable lost interrupt bug workaround");
 109 TUNABLE_INT("hw.usb.ehci.lostintrbug", &ehcilostintrbug);
 110
 111
 112 static void ehci_dump_regs(ehci_softc_t *sc);
 113 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
 114
 115 #endif
 116
 117 #define EHCI_INTR_ENDPT 1
 118
 119 extern struct usb_bus_methods ehci_bus_methods;
 120 extern struct usb_pipe_methods ehci_device_bulk_methods;
 121 extern struct usb_pipe_methods ehci_device_ctrl_methods;
 122 extern struct usb_pipe_methods ehci_device_intr_methods;
 123 extern struct usb_pipe_methods ehci_device_isoc_fs_methods;
 124 extern struct usb_pipe_methods ehci_device_isoc_hs_methods;
 125
 126 static void ehci_do_poll(struct usb_bus *);
 127 static void ehci_device_done(struct usb_xfer *, usb_error_t);
 128 static uint8_t ehci_check_transfer(struct usb_xfer *);
 129 static void ehci_timeout(void *);
 130 static void ehci_poll_timeout(void *);
 131
 132 static void ehci_root_intr(ehci_softc_t *sc);
 133
 134 struct ehci_std_temp {
 135         ehci_softc_t *sc;
 136         struct usb_page_cache *pc;
 137         ehci_qtd_t *td;
 138         ehci_qtd_t *td_next;
 139         uint32_t average;
 140         uint32_t qtd_status;
 141         uint32_t len;
 142         uint16_t max_frame_size;
 143         uint8_t shortpkt;
 144         uint8_t auto_data_toggle;
 145         uint8_t setup_alt_next;
 146         uint8_t last_frame;
 147 };
 148
 149 void
 150 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
 151 {
 152         ehci_softc_t *sc = EHCI_BUS2SC(bus);
 153         uint32_t i;
 154
 155         cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
 156             sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
 157
 158         cb(bus, &sc->sc_hw.terminate_pc, &sc->sc_hw.terminate_pg,
 159             sizeof(struct ehci_qh_sub), EHCI_QH_ALIGN);
 160
 161         cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
 162             sizeof(ehci_qh_t), EHCI_QH_ALIGN);
 163
 164         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 165                 cb(bus, sc->sc_hw.intr_start_pc + i,
 166                     sc->sc_hw.intr_start_pg + i,
 167                     sizeof(ehci_qh_t), EHCI_QH_ALIGN);
 168         }
 169
 170         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 171                 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
 172                     sc->sc_hw.isoc_hs_start_pg + i,
 173                     sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
 174         }
 175
 176         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 177                 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
 178                     sc->sc_hw.isoc_fs_start_pg + i,
 179                     sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
 180         }
 181 }
 182
 183 usb_error_t
 184 ehci_reset(ehci_softc_t *sc)
 185 {
 186         uint32_t hcr;
 187         int i;
 188
 189         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 190         for (i = 0; i < 100; i++) {
 191                 usb_pause_mtx(NULL, hz / 128);
 192                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 193                 if (!hcr) {
 194                         if (sc->sc_flags & (EHCI_SCFLG_SETMODE | EHCI_SCFLG_BIGEMMIO)) {
 195                                 /*
 196                                  * Force USBMODE as requested.  Controllers
 197                                  * may have multiple operating modes.
 198                                  */
 199                                 uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
 200                                 if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
 201                                         usbmode = (usbmode &~ EHCI_UM_CM) | EHCI_UM_CM_HOST;
 202                                         device_printf(sc->sc_bus.bdev,
 203                                             "set host controller mode\n");
 204                                 }
 205                                 if (sc->sc_flags & EHCI_SCFLG_BIGEMMIO) {
 206                                         usbmode = (usbmode &~ EHCI_UM_ES) | EHCI_UM_ES_BE;
 207                                         device_printf(sc->sc_bus.bdev,
 208                                             "set big-endian mode\n");
 209                                 }
 210                                 EOWRITE4(sc,  EHCI_USBMODE, usbmode);
 211                         }
 212                         return (0);
 213                 }
 214         }
 215         device_printf(sc->sc_bus.bdev, "Reset timeout\n");
 216         return (USB_ERR_IOERROR);
 217 }
 218
 219 static usb_error_t
 220 ehci_hcreset(ehci_softc_t *sc)
 221 {
 222         uint32_t hcr;
 223         int i;
 224
 225         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 226         for (i = 0; i < 100; i++) {
 227                 usb_pause_mtx(NULL, hz / 128);
 228                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 229                 if (hcr)
 230                         break;
 231         }
 232         if (!hcr)
 233                 /*
 234                  * Fall through and try reset anyway even though
 235                  * Table 2-9 in the EHCI spec says this will result
 236                  * in undefined behavior.
 237                  */
 238                 device_printf(sc->sc_bus.bdev, "stop timeout\n");
 239
 240         return (ehci_reset(sc));
 241 }
 242
 243 static int
 244 ehci_init_sub(struct ehci_softc *sc)
 245 {
 246         struct usb_page_search buf_res;
 247         uint32_t cparams;
 248         uint32_t hcr;
 249         uint8_t i;
 250
 251         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 252
 253         DPRINTF("cparams=0x%x\n", cparams);
 254
 255         if (EHCI_HCC_64BIT(cparams)) {
 256                 DPRINTF("HCC uses 64-bit structures\n");
 257
 258                 /* MUST clear segment register if 64 bit capable */
 259                 EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 260         }
 261
 262         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
 263         EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
 264
 265         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
 266         EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
 267
 268         /* enable interrupts */
 269         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 270
 271         /* turn on controller */
 272         EOWRITE4(sc, EHCI_USBCMD,
 273             EHCI_CMD_ITC_1 |            /* 1 microframes interrupt delay */
 274             (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 275             EHCI_CMD_ASE |
 276             EHCI_CMD_PSE |
 277             EHCI_CMD_RS);
 278
 279         /* Take over port ownership */
 280         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 281
 282         for (i = 0; i < 100; i++) {
 283                 usb_pause_mtx(NULL, hz / 128);
 284                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 285                 if (!hcr) {
 286                         break;
 287                 }
 288         }
 289         if (hcr) {
 290                 device_printf(sc->sc_bus.bdev, "Run timeout\n");
 291                 return (USB_ERR_IOERROR);
 292         }
 293         return (USB_ERR_NORMAL_COMPLETION);
 294 }
 295
 296 usb_error_t
 297 ehci_init(ehci_softc_t *sc)
 298 {
 299         struct usb_page_search buf_res;
 300         uint32_t version;
 301         uint32_t sparams;
 302         uint16_t i;
 303         uint16_t x;
 304         uint16_t y;
 305         uint16_t bit;
 306         usb_error_t err = 0;
 307
 308         DPRINTF("start\n");
 309
 310         usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
 311         usb_callout_init_mtx(&sc->sc_tmo_poll, &sc->sc_bus.bus_mtx, 0);
 312
 313         sc->sc_offs = EHCI_CAPLENGTH(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
 314
 315 #ifdef USB_DEBUG
 316         if (ehciiaadbug)
 317                 sc->sc_flags |= EHCI_SCFLG_IAADBUG;
 318         if (ehcilostintrbug)
 319                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
 320         if (ehcidebug > 2) {
 321                 ehci_dump_regs(sc);
 322         }
 323 #endif
 324
 325         version = EHCI_HCIVERSION(EREAD4(sc, EHCI_CAPLEN_HCIVERSION));
 326         device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
 327             version >> 8, version & 0xff);
 328
 329         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 330         DPRINTF("sparams=0x%x\n", sparams);
 331
 332         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 333         sc->sc_bus.usbrev = USB_REV_2_0;
 334
 335         /* Reset the controller */
 336         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
 337
 338         err = ehci_hcreset(sc);
 339         if (err) {
 340                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
 341                 return (err);
 342         }
 343         /*
 344          * use current frame-list-size selection 0: 1024*4 bytes 1:  512*4
 345          * bytes 2:  256*4 bytes 3:      unknown
 346          */
 347         if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
 348                 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
 349                 return (USB_ERR_IOERROR);
 350         }
 351         /* set up the bus struct */
 352         sc->sc_bus.methods = &ehci_bus_methods;
 353
 354         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 355
 356         if (1) {
 357                 struct ehci_qh_sub *qh;
 358
 359                 usbd_get_page(&sc->sc_hw.terminate_pc, 0, &buf_res);
 360
 361                 qh = buf_res.buffer;
 362
 363                 sc->sc_terminate_self = htohc32(sc, buf_res.physaddr);
 364
 365                 /* init terminate TD */
 366                 qh->qtd_next =
 367                     htohc32(sc, EHCI_LINK_TERMINATE);
 368                 qh->qtd_altnext =
 369                     htohc32(sc, EHCI_LINK_TERMINATE);
 370                 qh->qtd_status =
 371                     htohc32(sc, EHCI_QTD_HALTED);
 372         }
 373
 374         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 375                 ehci_qh_t *qh;
 376
 377                 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
 378
 379                 qh = buf_res.buffer;
 380
 381                 /* initialize page cache pointer */
 382
 383                 qh->page_cache = sc->sc_hw.intr_start_pc + i;
 384
 385                 /* store a pointer to queue head */
 386
 387                 sc->sc_intr_p_last[i] = qh;
 388
 389                 qh->qh_self =
 390                     htohc32(sc, buf_res.physaddr) |
 391                     htohc32(sc, EHCI_LINK_QH);
 392
 393                 qh->qh_endp =
 394                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 395                 qh->qh_endphub =
 396                     htohc32(sc, EHCI_QH_SET_MULT(1));
 397                 qh->qh_curqtd = 0;
 398
 399                 qh->qh_qtd.qtd_next =
 400                     htohc32(sc, EHCI_LINK_TERMINATE);
 401                 qh->qh_qtd.qtd_altnext =
 402                     htohc32(sc, EHCI_LINK_TERMINATE);
 403                 qh->qh_qtd.qtd_status =
 404                     htohc32(sc, EHCI_QTD_HALTED);
 405         }
 406
 407         /*
 408          * the QHs are arranged to give poll intervals that are
 409          * powers of 2 times 1ms
 410          */
 411         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
 412         while (bit) {
 413                 x = bit;
 414                 while (x & bit) {
 415                         ehci_qh_t *qh_x;
 416                         ehci_qh_t *qh_y;
 417
 418                         y = (x ^ bit) | (bit / 2);
 419
 420                         qh_x = sc->sc_intr_p_last[x];
 421                         qh_y = sc->sc_intr_p_last[y];
 422
 423                         /*
 424                          * the next QH has half the poll interval
 425                          */
 426                         qh_x->qh_link = qh_y->qh_self;
 427
 428                         x++;
 429                 }
 430                 bit >>= 1;
 431         }
 432
 433         if (1) {
 434                 ehci_qh_t *qh;
 435
 436                 qh = sc->sc_intr_p_last[0];
 437
 438                 /* the last (1ms) QH terminates */
 439                 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
 440         }
 441         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 442                 ehci_sitd_t *sitd;
 443                 ehci_itd_t *itd;
 444
 445                 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
 446
 447                 sitd = buf_res.buffer;
 448
 449                 /* initialize page cache pointer */
 450
 451                 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
 452
 453                 /* store a pointer to the transfer descriptor */
 454
 455                 sc->sc_isoc_fs_p_last[i] = sitd;
 456
 457                 /* initialize full speed isochronous */
 458
 459                 sitd->sitd_self =
 460                     htohc32(sc, buf_res.physaddr) |
 461                     htohc32(sc, EHCI_LINK_SITD);
 462
 463                 sitd->sitd_back =
 464                     htohc32(sc, EHCI_LINK_TERMINATE);
 465
 466                 sitd->sitd_next =
 467                     sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
 468
 469
 470                 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
 471
 472                 itd = buf_res.buffer;
 473
 474                 /* initialize page cache pointer */
 475
 476                 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
 477
 478                 /* store a pointer to the transfer descriptor */
 479
 480                 sc->sc_isoc_hs_p_last[i] = itd;
 481
 482                 /* initialize high speed isochronous */
 483
 484                 itd->itd_self =
 485                     htohc32(sc, buf_res.physaddr) |
 486                     htohc32(sc, EHCI_LINK_ITD);
 487
 488                 itd->itd_next =
 489                     sitd->sitd_self;
 490         }
 491
 492         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
 493
 494         if (1) {
 495                 uint32_t *pframes;
 496
 497                 pframes = buf_res.buffer;
 498
 499                 /*
 500                  * execution order:
 501                  * pframes -> high speed isochronous ->
 502                  *    full speed isochronous -> interrupt QH's
 503                  */
 504                 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
 505                         pframes[i] = sc->sc_isoc_hs_p_last
 506                             [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
 507                 }
 508         }
 509         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
 510
 511         if (1) {
 512
 513                 ehci_qh_t *qh;
 514
 515                 qh = buf_res.buffer;
 516
 517                 /* initialize page cache pointer */
 518
 519                 qh->page_cache = &sc->sc_hw.async_start_pc;
 520
 521                 /* store a pointer to the queue head */
 522
 523                 sc->sc_async_p_last = qh;
 524
 525                 /* init dummy QH that starts the async list */
 526
 527                 qh->qh_self =
 528                     htohc32(sc, buf_res.physaddr) |
 529                     htohc32(sc, EHCI_LINK_QH);
 530
 531                 /* fill the QH */
 532                 qh->qh_endp =
 533                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 534                 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
 535                 qh->qh_link = qh->qh_self;
 536                 qh->qh_curqtd = 0;
 537
 538                 /* fill the overlay qTD */
 539                 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
 540                 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
 541                 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
 542         }
 543         /* flush all cache into memory */
 544
 545         usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
 546
 547 #ifdef USB_DEBUG
 548         if (ehcidebug) {
 549                 ehci_dump_sqh(sc, sc->sc_async_p_last);
 550         }
 551 #endif
 552
 553         /* finial setup */
 554         err = ehci_init_sub(sc);
 555
 556         if (!err) {
 557                 /* catch any lost interrupts */
 558                 ehci_do_poll(&sc->sc_bus);
 559         }
 560         return (err);
 561 }
 562
 563 /*
 564  * shut down the controller when the system is going down
 565  */
 566 void
 567 ehci_detach(ehci_softc_t *sc)
 568 {
 569         USB_BUS_LOCK(&sc->sc_bus);
 570
 571         usb_callout_stop(&sc->sc_tmo_pcd);
 572         usb_callout_stop(&sc->sc_tmo_poll);
 573
 574         EOWRITE4(sc, EHCI_USBINTR, 0);
 575         USB_BUS_UNLOCK(&sc->sc_bus);
 576
 577         if (ehci_hcreset(sc)) {
 578                 DPRINTF("reset failed!\n");
 579         }
 580
 581         /* XXX let stray task complete */
 582         usb_pause_mtx(NULL, hz / 20);
 583
 584         usb_callout_drain(&sc->sc_tmo_pcd);
 585         usb_callout_drain(&sc->sc_tmo_poll);
 586 }
 587
 588 static void
 589 ehci_suspend(ehci_softc_t *sc)
 590 {
 591         DPRINTF("stopping the HC\n");
 592
 593         /* reset HC */
 594         ehci_hcreset(sc);
 595 }
 596
 597 static void
 598 ehci_resume(ehci_softc_t *sc)
 599 {
 600         /* reset HC */
 601         ehci_hcreset(sc);
 602
 603         /* setup HC */
 604         ehci_init_sub(sc);
 605
 606         /* catch any lost interrupts */
 607         ehci_do_poll(&sc->sc_bus);
 608 }
 609
 610 #ifdef USB_DEBUG
 611 static void
 612 ehci_dump_regs(ehci_softc_t *sc)
 613 {
 614         uint32_t i;
 615
 616         i = EOREAD4(sc, EHCI_USBCMD);
 617         printf("cmd=0x%08x\n", i);
 618
 619         if (i & EHCI_CMD_ITC_1)
 620                 printf(" EHCI_CMD_ITC_1\n");
 621         if (i & EHCI_CMD_ITC_2)
 622                 printf(" EHCI_CMD_ITC_2\n");
 623         if (i & EHCI_CMD_ITC_4)
 624                 printf(" EHCI_CMD_ITC_4\n");
 625         if (i & EHCI_CMD_ITC_8)
 626                 printf(" EHCI_CMD_ITC_8\n");
 627         if (i & EHCI_CMD_ITC_16)
 628                 printf(" EHCI_CMD_ITC_16\n");
 629         if (i & EHCI_CMD_ITC_32)
 630                 printf(" EHCI_CMD_ITC_32\n");
 631         if (i & EHCI_CMD_ITC_64)
 632                 printf(" EHCI_CMD_ITC_64\n");
 633         if (i & EHCI_CMD_ASPME)
 634                 printf(" EHCI_CMD_ASPME\n");
 635         if (i & EHCI_CMD_ASPMC)
 636                 printf(" EHCI_CMD_ASPMC\n");
 637         if (i & EHCI_CMD_LHCR)
 638                 printf(" EHCI_CMD_LHCR\n");
 639         if (i & EHCI_CMD_IAAD)
 640                 printf(" EHCI_CMD_IAAD\n");
 641         if (i & EHCI_CMD_ASE)
 642                 printf(" EHCI_CMD_ASE\n");
 643         if (i & EHCI_CMD_PSE)
 644                 printf(" EHCI_CMD_PSE\n");
 645         if (i & EHCI_CMD_FLS_M)
 646                 printf(" EHCI_CMD_FLS_M\n");
 647         if (i & EHCI_CMD_HCRESET)
 648                 printf(" EHCI_CMD_HCRESET\n");
 649         if (i & EHCI_CMD_RS)
 650                 printf(" EHCI_CMD_RS\n");
 651
 652         i = EOREAD4(sc, EHCI_USBSTS);
 653
 654         printf("sts=0x%08x\n", i);
 655
 656         if (i & EHCI_STS_ASS)
 657                 printf(" EHCI_STS_ASS\n");
 658         if (i & EHCI_STS_PSS)
 659                 printf(" EHCI_STS_PSS\n");
 660         if (i & EHCI_STS_REC)
 661                 printf(" EHCI_STS_REC\n");
 662         if (i & EHCI_STS_HCH)
 663                 printf(" EHCI_STS_HCH\n");
 664         if (i & EHCI_STS_IAA)
 665                 printf(" EHCI_STS_IAA\n");
 666         if (i & EHCI_STS_HSE)
 667                 printf(" EHCI_STS_HSE\n");
 668         if (i & EHCI_STS_FLR)
 669                 printf(" EHCI_STS_FLR\n");
 670         if (i & EHCI_STS_PCD)
 671                 printf(" EHCI_STS_PCD\n");
 672         if (i & EHCI_STS_ERRINT)
 673                 printf(" EHCI_STS_ERRINT\n");
 674         if (i & EHCI_STS_INT)
 675                 printf(" EHCI_STS_INT\n");
 676
 677         printf("ien=0x%08x\n",
 678             EOREAD4(sc, EHCI_USBINTR));
 679         printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
 680             EOREAD4(sc, EHCI_FRINDEX),
 681             EOREAD4(sc, EHCI_CTRLDSSEGMENT),
 682             EOREAD4(sc, EHCI_PERIODICLISTBASE),
 683             EOREAD4(sc, EHCI_ASYNCLISTADDR));
 684         for (i = 1; i <= sc->sc_noport; i++) {
 685                 printf("port %d status=0x%08x\n", i,
 686                     EOREAD4(sc, EHCI_PORTSC(i)));
 687         }
 688 }
 689
 690 static void
 691 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
 692 {
 693         link = hc32toh(sc, link);
 694         printf("0x%08x", link);
 695         if (link & EHCI_LINK_TERMINATE)
 696                 printf("<T>");
 697         else {
 698                 printf("<");
 699                 if (type) {
 700                         switch (EHCI_LINK_TYPE(link)) {
 701                         case EHCI_LINK_ITD:
 702                                 printf("ITD");
 703                                 break;
 704                         case EHCI_LINK_QH:
 705                                 printf("QH");
 706                                 break;
 707                         case EHCI_LINK_SITD:
 708                                 printf("SITD");
 709                                 break;
 710                         case EHCI_LINK_FSTN:
 711                                 printf("FSTN");
 712                                 break;
 713                         }
 714                 }
 715                 printf(">");
 716         }
 717 }
 718
 719 static void
 720 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
 721 {
 722         uint32_t s;
 723
 724         printf("  next=");
 725         ehci_dump_link(sc, qtd->qtd_next, 0);
 726         printf(" altnext=");
 727         ehci_dump_link(sc, qtd->qtd_altnext, 0);
 728         printf("\n");
 729         s = hc32toh(sc, qtd->qtd_status);
 730         printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
 731             s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
 732             EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
 733         printf("    cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
 734             EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
 735             (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
 736             (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
 737             (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
 738             (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
 739             (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
 740             (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
 741             (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
 742             (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
 743
 744         for (s = 0; s < 5; s++) {
 745                 printf("  buffer[%d]=0x%08x\n", s,
 746                     hc32toh(sc, qtd->qtd_buffer[s]));
 747         }
 748         for (s = 0; s < 5; s++) {
 749                 printf("  buffer_hi[%d]=0x%08x\n", s,
 750                     hc32toh(sc, qtd->qtd_buffer_hi[s]));
 751         }
 752 }
 753
 754 static uint8_t
 755 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
 756 {
 757         uint8_t temp;
 758
 759         usb_pc_cpu_invalidate(sqtd->page_cache);
 760         printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
 761         ehci_dump_qtd(sc, sqtd);
 762         temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
 763         return (temp);
 764 }
 765
 766 static void
 767 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
 768 {
 769         uint16_t i;
 770         uint8_t stop;
 771
 772         stop = 0;
 773         for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
 774                 stop = ehci_dump_sqtd(sc, sqtd);
 775         }
 776         if (sqtd) {
 777                 printf("dump aborted, too many TDs\n");
 778         }
 779 }
 780
 781 static void
 782 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
 783 {
 784         uint32_t endp;
 785         uint32_t endphub;
 786
 787         usb_pc_cpu_invalidate(qh->page_cache);
 788         printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
 789         printf("  link=");
 790         ehci_dump_link(sc, qh->qh_link, 1);
 791         printf("\n");
 792         endp = hc32toh(sc, qh->qh_endp);
 793         printf("  endp=0x%08x\n", endp);
 794         printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
 795             EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
 796             EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
 797             EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
 798         printf("    mpl=0x%x ctl=%d nrl=%d\n",
 799             EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
 800             EHCI_QH_GET_NRL(endp));
 801         endphub = hc32toh(sc, qh->qh_endphub);
 802         printf("  endphub=0x%08x\n", endphub);
 803         printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
 804             EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
 805             EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
 806             EHCI_QH_GET_MULT(endphub));
 807         printf("  curqtd=");
 808         ehci_dump_link(sc, qh->qh_curqtd, 0);
 809         printf("\n");
 810         printf("Overlay qTD:\n");
 811         ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
 812 }
 813
 814 static void
 815 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
 816 {
 817         usb_pc_cpu_invalidate(sitd->page_cache);
 818         printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
 819         printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
 820         printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
 821             hc32toh(sc, sitd->sitd_portaddr),
 822             (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
 823             ? "in" : "out",
 824             EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
 825             EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
 826             EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
 827             EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
 828         printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
 829         printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
 830             (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
 831             EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
 832         printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
 833             hc32toh(sc, sitd->sitd_back),
 834             hc32toh(sc, sitd->sitd_bp[0]),
 835             hc32toh(sc, sitd->sitd_bp[1]),
 836             hc32toh(sc, sitd->sitd_bp_hi[0]),
 837             hc32toh(sc, sitd->sitd_bp_hi[1]));
 838 }
 839
 840 static void
 841 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
 842 {
 843         usb_pc_cpu_invalidate(itd->page_cache);
 844         printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
 845         printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
 846         printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
 847             (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 848         printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
 849             (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 850         printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
 851             (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 852         printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
 853             (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 854         printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
 855             (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 856         printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
 857             (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 858         printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
 859             (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 860         printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
 861             (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 862         printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
 863         printf("  addr=0x%02x; endpt=0x%01x\n",
 864             EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
 865             EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
 866         printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
 867         printf(" dir=%s; mpl=0x%02x\n",
 868             (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
 869             EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
 870         printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
 871             hc32toh(sc, itd->itd_bp[2]),
 872             hc32toh(sc, itd->itd_bp[3]),
 873             hc32toh(sc, itd->itd_bp[4]),
 874             hc32toh(sc, itd->itd_bp[5]),
 875             hc32toh(sc, itd->itd_bp[6]));
 876         printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
 877             "       0x%08x,0x%08x,0x%08x\n",
 878             hc32toh(sc, itd->itd_bp_hi[0]),
 879             hc32toh(sc, itd->itd_bp_hi[1]),
 880             hc32toh(sc, itd->itd_bp_hi[2]),
 881             hc32toh(sc, itd->itd_bp_hi[3]),
 882             hc32toh(sc, itd->itd_bp_hi[4]),
 883             hc32toh(sc, itd->itd_bp_hi[5]),
 884             hc32toh(sc, itd->itd_bp_hi[6]));
 885 }
 886
 887 static void
 888 ehci_dump_isoc(ehci_softc_t *sc)
 889 {
 890         ehci_itd_t *itd;
 891         ehci_sitd_t *sitd;
 892         uint16_t max = 1000;
 893         uint16_t pos;
 894
 895         pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
 896             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
 897
 898         printf("%s: isochronous dump from frame 0x%03x:\n",
 899             __FUNCTION__, pos);
 900
 901         itd = sc->sc_isoc_hs_p_last[pos];
 902         sitd = sc->sc_isoc_fs_p_last[pos];
 903
 904         while (itd && max && max--) {
 905                 ehci_dump_itd(sc, itd);
 906                 itd = itd->prev;
 907         }
 908
 909         while (sitd && max && max--) {
 910                 ehci_dump_sitd(sc, sitd);
 911                 sitd = sitd->prev;
 912         }
 913 }
 914
 915 #endif
 916
 917 static void
 918 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
 919 {
 920         /* check for early completion */
 921         if (ehci_check_transfer(xfer)) {
 922                 return;
 923         }
 924         /* put transfer on interrupt queue */
 925         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
 926
 927         /* start timeout, if any */
 928         if (xfer->timeout != 0) {
 929                 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
 930         }
 931 }
 932
 933 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
 934 static ehci_sitd_t *
 935 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
 936 {
 937         DPRINTFN(11, "%p to %p\n", std, last);
 938
 939         /* (sc->sc_bus.mtx) must be locked */
 940
 941         std->next = last->next;
 942         std->sitd_next = last->sitd_next;
 943
 944         std->prev = last;
 945
 946         usb_pc_cpu_flush(std->page_cache);
 947
 948         /*
 949          * the last->next->prev is never followed: std->next->prev = std;
 950          */
 951         last->next = std;
 952         last->sitd_next = std->sitd_self;
 953
 954         usb_pc_cpu_flush(last->page_cache);
 955
 956         return (std);
 957 }
 958
 959 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
 960 static ehci_itd_t *
 961 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
 962 {
 963         DPRINTFN(11, "%p to %p\n", std, last);
 964
 965         /* (sc->sc_bus.mtx) must be locked */
 966
 967         std->next = last->next;
 968         std->itd_next = last->itd_next;
 969
 970         std->prev = last;
 971
 972         usb_pc_cpu_flush(std->page_cache);
 973
 974         /*
 975          * the last->next->prev is never followed: std->next->prev = std;
 976          */
 977         last->next = std;
 978         last->itd_next = std->itd_self;
 979
 980         usb_pc_cpu_flush(last->page_cache);
 981
 982         return (std);
 983 }
 984
 985 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
 986 static ehci_qh_t *
 987 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
 988 {
 989         DPRINTFN(11, "%p to %p\n", sqh, last);
 990
 991         if (sqh->prev != NULL) {
 992                 /* should not happen */
 993                 DPRINTFN(0, "QH already linked!\n");
 994                 return (last);
 995         }
 996         /* (sc->sc_bus.mtx) must be locked */
 997
 998         sqh->next = last->next;
 999         sqh->qh_link = last->qh_link;
1000
1001         sqh->prev = last;
1002
1003         usb_pc_cpu_flush(sqh->page_cache);
1004
1005         /*
1006          * the last->next->prev is never followed: sqh->next->prev = sqh;
1007          */
1008
1009         last->next = sqh;
1010         last->qh_link = sqh->qh_self;
1011
1012         usb_pc_cpu_flush(last->page_cache);
1013
1014         return (sqh);
1015 }
1016
1017 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1018 static ehci_sitd_t *
1019 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1020 {
1021         DPRINTFN(11, "%p from %p\n", std, last);
1022
1023         /* (sc->sc_bus.mtx) must be locked */
1024
1025         std->prev->next = std->next;
1026         std->prev->sitd_next = std->sitd_next;
1027
1028         usb_pc_cpu_flush(std->prev->page_cache);
1029
1030         if (std->next) {
1031                 std->next->prev = std->prev;
1032                 usb_pc_cpu_flush(std->next->page_cache);
1033         }
1034         return ((last == std) ? std->prev : last);
1035 }
1036
1037 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1038 static ehci_itd_t *
1039 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1040 {
1041         DPRINTFN(11, "%p from %p\n", std, last);
1042
1043         /* (sc->sc_bus.mtx) must be locked */
1044
1045         std->prev->next = std->next;
1046         std->prev->itd_next = std->itd_next;
1047
1048         usb_pc_cpu_flush(std->prev->page_cache);
1049
1050         if (std->next) {
1051                 std->next->prev = std->prev;
1052                 usb_pc_cpu_flush(std->next->page_cache);
1053         }
1054         return ((last == std) ? std->prev : last);
1055 }
1056
1057 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1058 static ehci_qh_t *
1059 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1060 {
1061         DPRINTFN(11, "%p from %p\n", sqh, last);
1062
1063         /* (sc->sc_bus.mtx) must be locked */
1064
1065         /* only remove if not removed from a queue */
1066         if (sqh->prev) {
1067
1068                 sqh->prev->next = sqh->next;
1069                 sqh->prev->qh_link = sqh->qh_link;
1070
1071                 usb_pc_cpu_flush(sqh->prev->page_cache);
1072
1073                 if (sqh->next) {
1074                         sqh->next->prev = sqh->prev;
1075                         usb_pc_cpu_flush(sqh->next->page_cache);
1076                 }
1077                 last = ((last == sqh) ? sqh->prev : last);
1078
1079                 sqh->prev = 0;
1080
1081                 usb_pc_cpu_flush(sqh->page_cache);
1082         }
1083         return (last);
1084 }
1085
1086 static void
1087 ehci_data_toggle_update(struct usb_xfer *xfer, uint16_t actlen, uint16_t xlen)
1088 {
1089         uint16_t rem;
1090         uint8_t dt;
1091
1092         /* count number of full packets */
1093         dt = (actlen / xfer->max_packet_size) & 1;
1094
1095         /* compute remainder */
1096         rem = actlen % xfer->max_packet_size;
1097
1098         if (rem > 0)
1099                 dt ^= 1;        /* short packet at the end */
1100         else if (actlen != xlen)
1101                 dt ^= 1;        /* zero length packet at the end */
1102         else if (xlen == 0)
1103                 dt ^= 1;        /* zero length transfer */
1104
1105         xfer->endpoint->toggle_next ^= dt;
1106 }
1107
1108 static usb_error_t
1109 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1110 {
1111         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1112         ehci_qtd_t *td;
1113         ehci_qtd_t *td_alt_next;
1114         uint32_t status;
1115         uint16_t len;
1116
1117         td = xfer->td_transfer_cache;
1118         td_alt_next = td->alt_next;
1119
1120         if (xfer->aframes != xfer->nframes) {
1121                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1122         }
1123         while (1) {
1124
1125                 usb_pc_cpu_invalidate(td->page_cache);
1126                 status = hc32toh(sc, td->qtd_status);
1127
1128                 len = EHCI_QTD_GET_BYTES(status);
1129
1130                 /*
1131                  * Verify the status length and
1132                  * add the length to "frlengths[]":
1133                  */
1134                 if (len > td->len) {
1135                         /* should not happen */
1136                         DPRINTF("Invalid status length, "
1137                             "0x%04x/0x%04x bytes\n", len, td->len);
1138                         status |= EHCI_QTD_HALTED;
1139                 } else if (xfer->aframes != xfer->nframes) {
1140                         xfer->frlengths[xfer->aframes] += td->len - len;
1141                         /* manually update data toggle */
1142                         ehci_data_toggle_update(xfer, td->len - len, td->len);
1143                 }
1144
1145                 /* Check for last transfer */
1146                 if (((void *)td) == xfer->td_transfer_last) {
1147                         td = NULL;
1148                         break;
1149                 }
1150                 /* Check for transfer error */
1151                 if (status & EHCI_QTD_HALTED) {
1152                         /* the transfer is finished */
1153                         td = NULL;
1154                         break;
1155                 }
1156                 /* Check for short transfer */
1157                 if (len > 0) {
1158                         if (xfer->flags_int.short_frames_ok) {
1159                                 /* follow alt next */
1160                                 td = td->alt_next;
1161                         } else {
1162                                 /* the transfer is finished */
1163                                 td = NULL;
1164                         }
1165                         break;
1166                 }
1167                 td = td->obj_next;
1168
1169                 if (td->alt_next != td_alt_next) {
1170                         /* this USB frame is complete */
1171                         break;
1172                 }
1173         }
1174
1175         /* update transfer cache */
1176
1177         xfer->td_transfer_cache = td;
1178
1179 #ifdef USB_DEBUG
1180         if (status & EHCI_QTD_STATERRS) {
1181                 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1182                     "status=%s%s%s%s%s%s%s%s\n",
1183                     xfer->address, xfer->endpointno, xfer->aframes,
1184                     (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1185                     (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1186                     (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1187                     (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1188                     (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1189                     (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1190                     (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1191                     (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1192         }
1193 #endif
1194         if (status & EHCI_QTD_HALTED) {
1195                 if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1196                     (xfer->xroot->udev->address != 0)) {
1197                         /* try to separate I/O errors from STALL */
1198                         if (EHCI_QTD_GET_CERR(status) == 0)
1199                                 return (USB_ERR_IOERROR);
1200                 }
1201                 return (USB_ERR_STALLED);
1202         }
1203         return (USB_ERR_NORMAL_COMPLETION);
1204 }
1205
1206 static void
1207 ehci_non_isoc_done(struct usb_xfer *xfer)
1208 {
1209         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1210         ehci_qh_t *qh;
1211         uint32_t status;
1212         usb_error_t err = 0;
1213
1214         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1215             xfer, xfer->endpoint);
1216
1217 #ifdef USB_DEBUG
1218         if (ehcidebug > 10) {
1219                 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1220
1221                 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1222         }
1223 #endif
1224
1225         /* extract data toggle directly from the QH's overlay area */
1226
1227         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1228
1229         usb_pc_cpu_invalidate(qh->page_cache);
1230
1231         status = hc32toh(sc, qh->qh_qtd.qtd_status);
1232
1233         /* reset scanner */
1234
1235         xfer->td_transfer_cache = xfer->td_transfer_first;
1236
1237         if (xfer->flags_int.control_xfr) {
1238
1239                 if (xfer->flags_int.control_hdr) {
1240
1241                         err = ehci_non_isoc_done_sub(xfer);
1242                 }
1243                 xfer->aframes = 1;
1244
1245                 if (xfer->td_transfer_cache == NULL) {
1246                         goto done;
1247                 }
1248         }
1249         while (xfer->aframes != xfer->nframes) {
1250
1251                 err = ehci_non_isoc_done_sub(xfer);
1252                 xfer->aframes++;
1253
1254                 if (xfer->td_transfer_cache == NULL) {
1255                         goto done;
1256                 }
1257         }
1258
1259         if (xfer->flags_int.control_xfr &&
1260             !xfer->flags_int.control_act) {
1261
1262                 err = ehci_non_isoc_done_sub(xfer);
1263         }
1264 done:
1265         ehci_device_done(xfer, err);
1266 }
1267
1268 /*------------------------------------------------------------------------*
1269  *      ehci_check_transfer
1270  *
1271  * Return values:
1272  *    0: USB transfer is not finished
1273  * Else: USB transfer is finished
1274  *------------------------------------------------------------------------*/
1275 static uint8_t
1276 ehci_check_transfer(struct usb_xfer *xfer)
1277 {
1278         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1279         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1280
1281         uint32_t status;
1282
1283         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1284
1285         if (methods == &ehci_device_isoc_fs_methods) {
1286                 ehci_sitd_t *td;
1287
1288                 /* isochronous full speed transfer */
1289
1290                 td = xfer->td_transfer_last;
1291                 usb_pc_cpu_invalidate(td->page_cache);
1292                 status = hc32toh(sc, td->sitd_status);
1293
1294                 /* also check if first is complete */
1295
1296                 td = xfer->td_transfer_first;
1297                 usb_pc_cpu_invalidate(td->page_cache);
1298                 status |= hc32toh(sc, td->sitd_status);
1299
1300                 if (!(status & EHCI_SITD_ACTIVE)) {
1301                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1302                         goto transferred;
1303                 }
1304         } else if (methods == &ehci_device_isoc_hs_methods) {
1305                 ehci_itd_t *td;
1306
1307                 /* isochronous high speed transfer */
1308
1309                 /* check last transfer */
1310                 td = xfer->td_transfer_last;
1311                 usb_pc_cpu_invalidate(td->page_cache);
1312                 status = td->itd_status[0];
1313                 status |= td->itd_status[1];
1314                 status |= td->itd_status[2];
1315                 status |= td->itd_status[3];
1316                 status |= td->itd_status[4];
1317                 status |= td->itd_status[5];
1318                 status |= td->itd_status[6];
1319                 status |= td->itd_status[7];
1320
1321                 /* also check first transfer */
1322                 td = xfer->td_transfer_first;
1323                 usb_pc_cpu_invalidate(td->page_cache);
1324                 status |= td->itd_status[0];
1325                 status |= td->itd_status[1];
1326                 status |= td->itd_status[2];
1327                 status |= td->itd_status[3];
1328                 status |= td->itd_status[4];
1329                 status |= td->itd_status[5];
1330                 status |= td->itd_status[6];
1331                 status |= td->itd_status[7];
1332
1333                 /* if no transactions are active we continue */
1334                 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1335                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1336                         goto transferred;
1337                 }
1338         } else {
1339                 ehci_qtd_t *td;
1340                 ehci_qh_t *qh;
1341
1342                 /* non-isochronous transfer */
1343
1344                 /*
1345                  * check whether there is an error somewhere in the middle,
1346                  * or whether there was a short packet (SPD and not ACTIVE)
1347                  */
1348                 td = xfer->td_transfer_cache;
1349
1350                 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1351
1352                 usb_pc_cpu_invalidate(qh->page_cache);
1353
1354                 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1355                 if (status & EHCI_QTD_ACTIVE) {
1356                         /* transfer is pending */
1357                         goto done;
1358                 }
1359
1360                 while (1) {
1361                         usb_pc_cpu_invalidate(td->page_cache);
1362                         status = hc32toh(sc, td->qtd_status);
1363
1364                         /*
1365                          * Check if there is an active TD which
1366                          * indicates that the transfer isn't done.
1367                          */
1368                         if (status & EHCI_QTD_ACTIVE) {
1369                                 /* update cache */
1370                                 xfer->td_transfer_cache = td;
1371                                 goto done;
1372                         }
1373                         /*
1374                          * last transfer descriptor makes the transfer done
1375                          */
1376                         if (((void *)td) == xfer->td_transfer_last) {
1377                                 break;
1378                         }
1379                         /*
1380                          * any kind of error makes the transfer done
1381                          */
1382                         if (status & EHCI_QTD_HALTED) {
1383                                 break;
1384                         }
1385                         /*
1386                          * if there is no alternate next transfer, a short
1387                          * packet also makes the transfer done
1388                          */
1389                         if (EHCI_QTD_GET_BYTES(status)) {
1390                                 if (xfer->flags_int.short_frames_ok) {
1391                                         /* follow alt next */
1392                                         if (td->alt_next) {
1393                                                 td = td->alt_next;
1394                                                 continue;
1395                                         }
1396                                 }
1397                                 /* transfer is done */
1398                                 break;
1399                         }
1400                         td = td->obj_next;
1401                 }
1402                 ehci_non_isoc_done(xfer);
1403                 goto transferred;
1404         }
1405
1406 done:
1407         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1408         return (0);
1409
1410 transferred:
1411         return (1);
1412 }
1413
1414 static void
1415 ehci_pcd_enable(ehci_softc_t *sc)
1416 {
1417         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1418
1419         sc->sc_eintrs |= EHCI_STS_PCD;
1420         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1421
1422         /* acknowledge any PCD interrupt */
1423         EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1424
1425         ehci_root_intr(sc);
1426 }
1427
1428 static void
1429 ehci_interrupt_poll(ehci_softc_t *sc)
1430 {
1431         struct usb_xfer *xfer;
1432
1433 repeat:
1434         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1435                 /*
1436                  * check if transfer is transferred
1437                  */
1438                 if (ehci_check_transfer(xfer)) {
1439                         /* queue has been modified */
1440                         goto repeat;
1441                 }
1442         }
1443 }
1444
1445 /*
1446  * Some EHCI chips from VIA / ATI seem to trigger interrupts before
1447  * writing back the qTD status, or miss signalling occasionally under
1448  * heavy load.  If the host machine is too fast, we can miss
1449  * transaction completion - when we scan the active list the
1450  * transaction still seems to be active. This generally exhibits
1451  * itself as a umass stall that never recovers.
1452  *
1453  * We work around this behaviour by setting up this callback after any
1454  * softintr that completes with transactions still pending, giving us
1455  * another chance to check for completion after the writeback has
1456  * taken place.
1457  */
1458 static void
1459 ehci_poll_timeout(void *arg)
1460 {
1461         ehci_softc_t *sc = arg;
1462
1463         DPRINTFN(3, "\n");
1464         ehci_interrupt_poll(sc);
1465 }
1466
1467 /*------------------------------------------------------------------------*
1468  *      ehci_interrupt - EHCI interrupt handler
1469  *
1470  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1471  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1472  * is present !
1473  *------------------------------------------------------------------------*/
1474 void
1475 ehci_interrupt(ehci_softc_t *sc)
1476 {
1477         uint32_t status;
1478
1479         USB_BUS_LOCK(&sc->sc_bus);
1480
1481         DPRINTFN(16, "real interrupt\n");
1482
1483 #ifdef USB_DEBUG
1484         if (ehcidebug > 15) {
1485                 ehci_dump_regs(sc);
1486         }
1487 #endif
1488
1489         status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1490         if (status == 0) {
1491                 /* the interrupt was not for us */
1492                 goto done;
1493         }
1494         if (!(status & sc->sc_eintrs)) {
1495                 goto done;
1496         }
1497         EOWRITE4(sc, EHCI_USBSTS, status);      /* acknowledge */
1498
1499         status &= sc->sc_eintrs;
1500
1501         if (status & EHCI_STS_HSE) {
1502                 printf("%s: unrecoverable error, "
1503                     "controller halted\n", __FUNCTION__);
1504 #ifdef USB_DEBUG
1505                 ehci_dump_regs(sc);
1506                 ehci_dump_isoc(sc);
1507 #endif
1508         }
1509         if (status & EHCI_STS_PCD) {
1510                 /*
1511                  * Disable PCD interrupt for now, because it will be
1512                  * on until the port has been reset.
1513                  */
1514                 sc->sc_eintrs &= ~EHCI_STS_PCD;
1515                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1516
1517                 ehci_root_intr(sc);
1518
1519                 /* do not allow RHSC interrupts > 1 per second */
1520                 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1521                     (void *)&ehci_pcd_enable, sc);
1522         }
1523         status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1524
1525         if (status != 0) {
1526                 /* block unprocessed interrupts */
1527                 sc->sc_eintrs &= ~status;
1528                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1529                 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1530         }
1531         /* poll all the USB transfers */
1532         ehci_interrupt_poll(sc);
1533
1534         if (sc->sc_flags & EHCI_SCFLG_LOSTINTRBUG) {
1535                 usb_callout_reset(&sc->sc_tmo_poll, hz / 128,
1536                     (void *)&ehci_poll_timeout, sc);
1537         }
1538
1539 done:
1540         USB_BUS_UNLOCK(&sc->sc_bus);
1541 }
1542
1543 /*
1544  * called when a request does not complete
1545  */
1546 static void
1547 ehci_timeout(void *arg)
1548 {
1549         struct usb_xfer *xfer = arg;
1550
1551         DPRINTF("xfer=%p\n", xfer);
1552
1553         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1554
1555         /* transfer is transferred */
1556         ehci_device_done(xfer, USB_ERR_TIMEOUT);
1557 }
1558
1559 static void
1560 ehci_do_poll(struct usb_bus *bus)
1561 {
1562         ehci_softc_t *sc = EHCI_BUS2SC(bus);
1563
1564         USB_BUS_LOCK(&sc->sc_bus);
1565         ehci_interrupt_poll(sc);
1566         USB_BUS_UNLOCK(&sc->sc_bus);
1567 }
1568
1569 static void
1570 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1571 {
1572         struct usb_page_search buf_res;
1573         ehci_qtd_t *td;
1574         ehci_qtd_t *td_next;
1575         ehci_qtd_t *td_alt_next;
1576         uint32_t buf_offset;
1577         uint32_t average;
1578         uint32_t len_old;
1579         uint32_t terminate;
1580         uint32_t qtd_altnext;
1581         uint8_t shortpkt_old;
1582         uint8_t precompute;
1583
1584         terminate = temp->sc->sc_terminate_self;
1585         qtd_altnext = temp->sc->sc_terminate_self;
1586         td_alt_next = NULL;
1587         buf_offset = 0;
1588         shortpkt_old = temp->shortpkt;
1589         len_old = temp->len;
1590         precompute = 1;
1591
1592 restart:
1593
1594         td = temp->td;
1595         td_next = temp->td_next;
1596
1597         while (1) {
1598
1599                 if (temp->len == 0) {
1600
1601                         if (temp->shortpkt) {
1602                                 break;
1603                         }
1604                         /* send a Zero Length Packet, ZLP, last */
1605
1606                         temp->shortpkt = 1;
1607                         average = 0;
1608
1609                 } else {
1610
1611                         average = temp->average;
1612
1613                         if (temp->len < average) {
1614                                 if (temp->len % temp->max_frame_size) {
1615                                         temp->shortpkt = 1;
1616                                 }
1617                                 average = temp->len;
1618                         }
1619                 }
1620
1621                 if (td_next == NULL) {
1622                         panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1623                 }
1624                 /* get next TD */
1625
1626                 td = td_next;
1627                 td_next = td->obj_next;
1628
1629                 /* check if we are pre-computing */
1630
1631                 if (precompute) {
1632
1633                         /* update remaining length */
1634
1635                         temp->len -= average;
1636
1637                         continue;
1638                 }
1639                 /* fill out current TD */
1640
1641                 td->qtd_status =
1642                     temp->qtd_status |
1643                     htohc32(temp->sc, EHCI_QTD_IOC |
1644                         EHCI_QTD_SET_BYTES(average));
1645
1646                 if (average == 0) {
1647
1648                         if (temp->auto_data_toggle == 0) {
1649
1650                                 /* update data toggle, ZLP case */
1651
1652                                 temp->qtd_status ^=
1653                                     htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1654                         }
1655                         td->len = 0;
1656
1657                         /* properly reset reserved fields */
1658                         td->qtd_buffer[0] = 0;
1659                         td->qtd_buffer[1] = 0;
1660                         td->qtd_buffer[2] = 0;
1661                         td->qtd_buffer[3] = 0;
1662                         td->qtd_buffer[4] = 0;
1663                         td->qtd_buffer_hi[0] = 0;
1664                         td->qtd_buffer_hi[1] = 0;
1665                         td->qtd_buffer_hi[2] = 0;
1666                         td->qtd_buffer_hi[3] = 0;
1667                         td->qtd_buffer_hi[4] = 0;
1668                 } else {
1669
1670                         uint8_t x;
1671
1672                         if (temp->auto_data_toggle == 0) {
1673
1674                                 /* update data toggle */
1675
1676                                 if (((average + temp->max_frame_size - 1) /
1677                                     temp->max_frame_size) & 1) {
1678                                         temp->qtd_status ^=
1679                                             htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1680                                 }
1681                         }
1682                         td->len = average;
1683
1684                         /* update remaining length */
1685
1686                         temp->len -= average;
1687
1688                         /* fill out buffer pointers */
1689
1690                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1691                         td->qtd_buffer[0] =
1692                             htohc32(temp->sc, buf_res.physaddr);
1693                         td->qtd_buffer_hi[0] = 0;
1694
1695                         x = 1;
1696
1697                         while (average > EHCI_PAGE_SIZE) {
1698                                 average -= EHCI_PAGE_SIZE;
1699                                 buf_offset += EHCI_PAGE_SIZE;
1700                                 usbd_get_page(temp->pc, buf_offset, &buf_res);
1701                                 td->qtd_buffer[x] =
1702                                     htohc32(temp->sc,
1703                                     buf_res.physaddr & (~0xFFF));
1704                                 td->qtd_buffer_hi[x] = 0;
1705                                 x++;
1706                         }
1707
1708                         /*
1709                          * NOTE: The "average" variable is never zero after
1710                          * exiting the loop above !
1711                          *
1712                          * NOTE: We have to subtract one from the offset to
1713                          * ensure that we are computing the physical address
1714                          * of a valid page !
1715                          */
1716                         buf_offset += average;
1717                         usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1718                         td->qtd_buffer[x] =
1719                             htohc32(temp->sc,
1720                             buf_res.physaddr & (~0xFFF));
1721                         td->qtd_buffer_hi[x] = 0;
1722
1723                         /* properly reset reserved fields */
1724                         while (++x < EHCI_QTD_NBUFFERS) {
1725                                 td->qtd_buffer[x] = 0;
1726                                 td->qtd_buffer_hi[x] = 0;
1727                         }
1728                 }
1729
1730                 if (td_next) {
1731                         /* link the current TD with the next one */
1732                         td->qtd_next = td_next->qtd_self;
1733                 }
1734                 td->qtd_altnext = qtd_altnext;
1735                 td->alt_next = td_alt_next;
1736
1737                 usb_pc_cpu_flush(td->page_cache);
1738         }
1739
1740         if (precompute) {
1741                 precompute = 0;
1742
1743                 /* setup alt next pointer, if any */
1744                 if (temp->last_frame) {
1745                         td_alt_next = NULL;
1746                         qtd_altnext = terminate;
1747                 } else {
1748                         /* we use this field internally */
1749                         td_alt_next = td_next;
1750                         if (temp->setup_alt_next) {
1751                                 qtd_altnext = td_next->qtd_self;
1752                         } else {
1753                                 qtd_altnext = terminate;
1754                         }
1755                 }
1756
1757                 /* restore */
1758                 temp->shortpkt = shortpkt_old;
1759                 temp->len = len_old;
1760                 goto restart;
1761         }
1762         temp->td = td;
1763         temp->td_next = td_next;
1764 }
1765
1766 static void
1767 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1768 {
1769         struct ehci_std_temp temp;
1770         struct usb_pipe_methods *methods;
1771         ehci_qh_t *qh;
1772         ehci_qtd_t *td;
1773         uint32_t qh_endp;
1774         uint32_t qh_endphub;
1775         uint32_t x;
1776
1777         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1778             xfer->address, UE_GET_ADDR(xfer->endpointno),
1779             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1780
1781         temp.average = xfer->max_hc_frame_size;
1782         temp.max_frame_size = xfer->max_frame_size;
1783         temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1784
1785         /* toggle the DMA set we are using */
1786         xfer->flags_int.curr_dma_set ^= 1;
1787
1788         /* get next DMA set */
1789         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1790
1791         xfer->td_transfer_first = td;
1792         xfer->td_transfer_cache = td;
1793
1794         temp.td = NULL;
1795         temp.td_next = td;
1796         temp.qtd_status = 0;
1797         temp.last_frame = 0;
1798         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1799
1800         if (xfer->flags_int.control_xfr) {
1801                 if (xfer->endpoint->toggle_next) {
1802                         /* DATA1 is next */
1803                         temp.qtd_status |=
1804                             htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1805                 }
1806                 temp.auto_data_toggle = 0;
1807         } else {
1808                 temp.auto_data_toggle = 1;
1809         }
1810
1811         if ((xfer->xroot->udev->parent_hs_hub != NULL) ||
1812             (xfer->xroot->udev->address != 0)) {
1813                 /* max 3 retries */
1814                 temp.qtd_status |=
1815                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1816         }
1817         /* check if we should prepend a setup message */
1818
1819         if (xfer->flags_int.control_xfr) {
1820                 if (xfer->flags_int.control_hdr) {
1821
1822                         xfer->endpoint->toggle_next = 0;
1823
1824                         temp.qtd_status &=
1825                             htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1826                         temp.qtd_status |= htohc32(temp.sc,
1827                             EHCI_QTD_ACTIVE |
1828                             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1829                             EHCI_QTD_SET_TOGGLE(0));
1830
1831                         temp.len = xfer->frlengths[0];
1832                         temp.pc = xfer->frbuffers + 0;
1833                         temp.shortpkt = temp.len ? 1 : 0;
1834                         /* check for last frame */
1835                         if (xfer->nframes == 1) {
1836                                 /* no STATUS stage yet, SETUP is last */
1837                                 if (xfer->flags_int.control_act) {
1838                                         temp.last_frame = 1;
1839                                         temp.setup_alt_next = 0;
1840                                 }
1841                         }
1842                         ehci_setup_standard_chain_sub(&temp);
1843                 }
1844                 x = 1;
1845         } else {
1846                 x = 0;
1847         }
1848
1849         while (x != xfer->nframes) {
1850
1851                 /* DATA0 / DATA1 message */
1852
1853                 temp.len = xfer->frlengths[x];
1854                 temp.pc = xfer->frbuffers + x;
1855
1856                 x++;
1857
1858                 if (x == xfer->nframes) {
1859                         if (xfer->flags_int.control_xfr) {
1860                                 /* no STATUS stage yet, DATA is last */
1861                                 if (xfer->flags_int.control_act) {
1862                                         temp.last_frame = 1;
1863                                         temp.setup_alt_next = 0;
1864                                 }
1865                         } else {
1866                                 temp.last_frame = 1;
1867                                 temp.setup_alt_next = 0;
1868                         }
1869                 }
1870                 /* keep previous data toggle and error count */
1871
1872                 temp.qtd_status &=
1873                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1874                     EHCI_QTD_SET_TOGGLE(1));
1875
1876                 if (temp.len == 0) {
1877
1878                         /* make sure that we send an USB packet */
1879
1880                         temp.shortpkt = 0;
1881
1882                 } else {
1883
1884                         /* regular data transfer */
1885
1886                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1887                 }
1888
1889                 /* set endpoint direction */
1890
1891                 temp.qtd_status |=
1892                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1893                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1894                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1895                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1896                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1897
1898                 ehci_setup_standard_chain_sub(&temp);
1899         }
1900
1901         /* check if we should append a status stage */
1902
1903         if (xfer->flags_int.control_xfr &&
1904             !xfer->flags_int.control_act) {
1905
1906                 /*
1907                  * Send a DATA1 message and invert the current endpoint
1908                  * direction.
1909                  */
1910
1911                 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1912                     EHCI_QTD_SET_TOGGLE(1));
1913                 temp.qtd_status |=
1914                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1915                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1916                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1917                     EHCI_QTD_SET_TOGGLE(1)) :
1918                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1919                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1920                     EHCI_QTD_SET_TOGGLE(1));
1921
1922                 temp.len = 0;
1923                 temp.pc = NULL;
1924                 temp.shortpkt = 0;
1925                 temp.last_frame = 1;
1926                 temp.setup_alt_next = 0;
1927
1928                 ehci_setup_standard_chain_sub(&temp);
1929         }
1930         td = temp.td;
1931
1932         /* the last TD terminates the transfer: */
1933         td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1934         td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1935
1936         usb_pc_cpu_flush(td->page_cache);
1937
1938         /* must have at least one frame! */
1939
1940         xfer->td_transfer_last = td;
1941
1942 #ifdef USB_DEBUG
1943         if (ehcidebug > 8) {
1944                 DPRINTF("nexttog=%d; data before transfer:\n",
1945                     xfer->endpoint->toggle_next);
1946                 ehci_dump_sqtds(temp.sc,
1947                     xfer->td_transfer_first);
1948         }
1949 #endif
1950
1951         methods = xfer->endpoint->methods;
1952
1953         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1954
1955         /* the "qh_link" field is filled when the QH is added */
1956
1957         qh_endp =
1958             (EHCI_QH_SET_ADDR(xfer->address) |
1959             EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1960             EHCI_QH_SET_MPL(xfer->max_packet_size));
1961
1962         if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1963                 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH);
1964                 if (methods != &ehci_device_intr_methods)
1965                         qh_endp |= EHCI_QH_SET_NRL(8);
1966         } else {
1967
1968                 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1969                         qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL);
1970                 } else {
1971                         qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW);
1972                 }
1973
1974                 if (methods == &ehci_device_ctrl_methods) {
1975                         qh_endp |= EHCI_QH_CTL;
1976                 }
1977                 if (methods != &ehci_device_intr_methods) {
1978                         /* Only try one time per microframe! */
1979                         qh_endp |= EHCI_QH_SET_NRL(1);
1980                 }
1981         }
1982
1983         if (temp.auto_data_toggle == 0) {
1984                 /* software computes the data toggle */
1985                 qh_endp |= EHCI_QH_DTC;
1986         }
1987
1988         qh->qh_endp = htohc32(temp.sc, qh_endp);
1989
1990         qh_endphub =
1991             (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1992             EHCI_QH_SET_CMASK(xfer->endpoint->usb_cmask) |
1993             EHCI_QH_SET_SMASK(xfer->endpoint->usb_smask) |
1994             EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
1995             EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
1996
1997         qh->qh_endphub = htohc32(temp.sc, qh_endphub);
1998         qh->qh_curqtd = 0;
1999
2000         /* fill the overlay qTD */
2001
2002         if (temp.auto_data_toggle && xfer->endpoint->toggle_next) {
2003                 /* DATA1 is next */
2004                 qh->qh_qtd.qtd_status = htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
2005         } else {
2006                 qh->qh_qtd.qtd_status = 0;
2007         }
2008
2009         td = xfer->td_transfer_first;
2010
2011         qh->qh_qtd.qtd_next = td->qtd_self;
2012         qh->qh_qtd.qtd_altnext =
2013             htohc32(temp.sc, EHCI_LINK_TERMINATE);
2014
2015         /* properly reset reserved fields */
2016         qh->qh_qtd.qtd_buffer[0] = 0;
2017         qh->qh_qtd.qtd_buffer[1] = 0;
2018         qh->qh_qtd.qtd_buffer[2] = 0;
2019         qh->qh_qtd.qtd_buffer[3] = 0;
2020         qh->qh_qtd.qtd_buffer[4] = 0;
2021         qh->qh_qtd.qtd_buffer_hi[0] = 0;
2022         qh->qh_qtd.qtd_buffer_hi[1] = 0;
2023         qh->qh_qtd.qtd_buffer_hi[2] = 0;
2024         qh->qh_qtd.qtd_buffer_hi[3] = 0;
2025         qh->qh_qtd.qtd_buffer_hi[4] = 0;
2026
2027         usb_pc_cpu_flush(qh->page_cache);
2028
2029         if (xfer->xroot->udev->flags.self_suspended == 0) {
2030                 EHCI_APPEND_QH(qh, *qh_last);
2031         }
2032 }
2033
2034 static void
2035 ehci_root_intr(ehci_softc_t *sc)
2036 {
2037         uint16_t i;
2038         uint16_t m;
2039
2040         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2041
2042         /* clear any old interrupt data */
2043         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2044
2045         /* set bits */
2046         m = (sc->sc_noport + 1);
2047         if (m > (8 * sizeof(sc->sc_hub_idata))) {
2048                 m = (8 * sizeof(sc->sc_hub_idata));
2049         }
2050         for (i = 1; i < m; i++) {
2051                 /* pick out CHANGE bits from the status register */
2052                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2053                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2054                         DPRINTF("port %d changed\n", i);
2055                 }
2056         }
2057         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2058             sizeof(sc->sc_hub_idata));
2059 }
2060
2061 static void
2062 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2063 {
2064         uint32_t nframes = xfer->nframes;
2065         uint32_t status;
2066         uint32_t *plen = xfer->frlengths;
2067         uint16_t len = 0;
2068         ehci_sitd_t *td = xfer->td_transfer_first;
2069         ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2070
2071         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2072             xfer, xfer->endpoint);
2073
2074         while (nframes--) {
2075                 if (td == NULL) {
2076                         panic("%s:%d: out of TD's\n",
2077                             __FUNCTION__, __LINE__);
2078                 }
2079                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2080                         pp_last = &sc->sc_isoc_fs_p_last[0];
2081                 }
2082 #ifdef USB_DEBUG
2083                 if (ehcidebug > 15) {
2084                         DPRINTF("isoc FS-TD\n");
2085                         ehci_dump_sitd(sc, td);
2086                 }
2087 #endif
2088                 usb_pc_cpu_invalidate(td->page_cache);
2089                 status = hc32toh(sc, td->sitd_status);
2090
2091                 len = EHCI_SITD_GET_LEN(status);
2092
2093                 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2094
2095                 if (*plen >= len) {
2096                         len = *plen - len;
2097                 } else {
2098                         len = 0;
2099                 }
2100
2101                 *plen = len;
2102
2103                 /* remove FS-TD from schedule */
2104                 EHCI_REMOVE_FS_TD(td, *pp_last);
2105
2106                 pp_last++;
2107                 plen++;
2108                 td = td->obj_next;
2109         }
2110
2111         xfer->aframes = xfer->nframes;
2112 }
2113
2114 static void
2115 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2116 {
2117         uint32_t nframes = xfer->nframes;
2118         uint32_t status;
2119         uint32_t *plen = xfer->frlengths;
2120         uint16_t len = 0;
2121         uint8_t td_no = 0;
2122         ehci_itd_t *td = xfer->td_transfer_first;
2123         ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2124
2125         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2126             xfer, xfer->endpoint);
2127
2128         while (nframes) {
2129                 if (td == NULL) {
2130                         panic("%s:%d: out of TD's\n",
2131                             __FUNCTION__, __LINE__);
2132                 }
2133                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2134                         pp_last = &sc->sc_isoc_hs_p_last[0];
2135                 }
2136 #ifdef USB_DEBUG
2137                 if (ehcidebug > 15) {
2138                         DPRINTF("isoc HS-TD\n");
2139                         ehci_dump_itd(sc, td);
2140                 }
2141 #endif
2142
2143                 usb_pc_cpu_invalidate(td->page_cache);
2144                 status = hc32toh(sc, td->itd_status[td_no]);
2145
2146                 len = EHCI_ITD_GET_LEN(status);
2147
2148                 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2149
2150                 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2151
2152                         if (*plen >= len) {
2153                                 /*
2154                                  * The length is valid. NOTE: The
2155                                  * complete length is written back
2156                                  * into the status field, and not the
2157                                  * remainder like with other transfer
2158                                  * descriptor types.
2159                                  */
2160                         } else {
2161                                 /* Invalid length - truncate */
2162                                 len = 0;
2163                         }
2164
2165                         *plen = len;
2166                         plen++;
2167                         nframes--;
2168                 }
2169
2170                 td_no++;
2171
2172                 if ((td_no == 8) || (nframes == 0)) {
2173                         /* remove HS-TD from schedule */
2174                         EHCI_REMOVE_HS_TD(td, *pp_last);
2175                         pp_last++;
2176
2177                         td_no = 0;
2178                         td = td->obj_next;
2179                 }
2180         }
2181         xfer->aframes = xfer->nframes;
2182 }
2183
2184 /* NOTE: "done" can be run two times in a row,
2185  * from close and from interrupt
2186  */
2187 static void
2188 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2189 {
2190         struct usb_pipe_methods *methods = xfer->endpoint->methods;
2191         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2192
2193         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2194
2195         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2196             xfer, xfer->endpoint, error);
2197
2198         if ((methods == &ehci_device_bulk_methods) ||
2199             (methods == &ehci_device_ctrl_methods)) {
2200 #ifdef USB_DEBUG
2201                 if (ehcidebug > 8) {
2202                         DPRINTF("nexttog=%d; data after transfer:\n",
2203                             xfer->endpoint->toggle_next);
2204                         ehci_dump_sqtds(sc,
2205                             xfer->td_transfer_first);
2206                 }
2207 #endif
2208
2209                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2210                     sc->sc_async_p_last);
2211         }
2212         if (methods == &ehci_device_intr_methods) {
2213                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2214                     sc->sc_intr_p_last[xfer->qh_pos]);
2215         }
2216         /*
2217          * Only finish isochronous transfers once which will update
2218          * "xfer->frlengths".
2219          */
2220         if (xfer->td_transfer_first &&
2221             xfer->td_transfer_last) {
2222                 if (methods == &ehci_device_isoc_fs_methods) {
2223                         ehci_isoc_fs_done(sc, xfer);
2224                 }
2225                 if (methods == &ehci_device_isoc_hs_methods) {
2226                         ehci_isoc_hs_done(sc, xfer);
2227                 }
2228                 xfer->td_transfer_first = NULL;
2229                 xfer->td_transfer_last = NULL;
2230         }
2231         /* dequeue transfer and start next transfer */
2232         usbd_transfer_done(xfer, error);
2233 }
2234
2235 /*------------------------------------------------------------------------*
2236  * ehci bulk support
2237  *------------------------------------------------------------------------*/
2238 static void
2239 ehci_device_bulk_open(struct usb_xfer *xfer)
2240 {
2241         return;
2242 }
2243
2244 static void
2245 ehci_device_bulk_close(struct usb_xfer *xfer)
2246 {
2247         ehci_device_done(xfer, USB_ERR_CANCELLED);
2248 }
2249
2250 static void
2251 ehci_device_bulk_enter(struct usb_xfer *xfer)
2252 {
2253         return;
2254 }
2255
2256 static void
2257 ehci_device_bulk_start(struct usb_xfer *xfer)
2258 {
2259         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2260         uint32_t temp;
2261
2262         /* setup TD's and QH */
2263         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2264
2265         /* put transfer on interrupt queue */
2266         ehci_transfer_intr_enqueue(xfer);
2267
2268         /*
2269          * XXX Certain nVidia chipsets choke when using the IAAD
2270          * feature too frequently.
2271          */
2272         if (sc->sc_flags & EHCI_SCFLG_IAADBUG)
2273                 return;
2274
2275         /* XXX Performance quirk: Some Host Controllers have a too low
2276          * interrupt rate. Issue an IAAD to stimulate the Host
2277          * Controller after queueing the BULK transfer.
2278          */
2279         temp = EOREAD4(sc, EHCI_USBCMD);
2280         if (!(temp & EHCI_CMD_IAAD))
2281                 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2282 }
2283
2284 struct usb_pipe_methods ehci_device_bulk_methods =
2285 {
2286         .open = ehci_device_bulk_open,
2287         .close = ehci_device_bulk_close,
2288         .enter = ehci_device_bulk_enter,
2289         .start = ehci_device_bulk_start,
2290 };
2291
2292 /*------------------------------------------------------------------------*
2293  * ehci control support
2294  *------------------------------------------------------------------------*/
2295 static void
2296 ehci_device_ctrl_open(struct usb_xfer *xfer)
2297 {
2298         return;
2299 }
2300
2301 static void
2302 ehci_device_ctrl_close(struct usb_xfer *xfer)
2303 {
2304         ehci_device_done(xfer, USB_ERR_CANCELLED);
2305 }
2306
2307 static void
2308 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2309 {
2310         return;
2311 }
2312
2313 static void
2314 ehci_device_ctrl_start(struct usb_xfer *xfer)
2315 {
2316         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2317
2318         /* setup TD's and QH */
2319         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2320
2321         /* put transfer on interrupt queue */
2322         ehci_transfer_intr_enqueue(xfer);
2323 }
2324
2325 struct usb_pipe_methods ehci_device_ctrl_methods =
2326 {
2327         .open = ehci_device_ctrl_open,
2328         .close = ehci_device_ctrl_close,
2329         .enter = ehci_device_ctrl_enter,
2330         .start = ehci_device_ctrl_start,
2331 };
2332
2333 /*------------------------------------------------------------------------*
2334  * ehci interrupt support
2335  *------------------------------------------------------------------------*/
2336 static void
2337 ehci_device_intr_open(struct usb_xfer *xfer)
2338 {
2339         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2340         uint16_t best;
2341         uint16_t bit;
2342         uint16_t x;
2343
2344         usb_hs_bandwidth_alloc(xfer);
2345
2346         /*
2347          * Find the best QH position corresponding to the given interval:
2348          */
2349
2350         best = 0;
2351         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2352         while (bit) {
2353                 if (xfer->interval >= bit) {
2354                         x = bit;
2355                         best = bit;
2356                         while (x & bit) {
2357                                 if (sc->sc_intr_stat[x] <
2358                                     sc->sc_intr_stat[best]) {
2359                                         best = x;
2360                                 }
2361                                 x++;
2362                         }
2363                         break;
2364                 }
2365                 bit >>= 1;
2366         }
2367
2368         sc->sc_intr_stat[best]++;
2369         xfer->qh_pos = best;
2370
2371         DPRINTFN(3, "best=%d interval=%d\n",
2372             best, xfer->interval);
2373 }
2374
2375 static void
2376 ehci_device_intr_close(struct usb_xfer *xfer)
2377 {
2378         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2379
2380         sc->sc_intr_stat[xfer->qh_pos]--;
2381
2382         ehci_device_done(xfer, USB_ERR_CANCELLED);
2383
2384         /* bandwidth must be freed after device done */
2385         usb_hs_bandwidth_free(xfer);
2386 }
2387
2388 static void
2389 ehci_device_intr_enter(struct usb_xfer *xfer)
2390 {
2391         return;
2392 }
2393
2394 static void
2395 ehci_device_intr_start(struct usb_xfer *xfer)
2396 {
2397         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2398
2399         /* setup TD's and QH */
2400         ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2401
2402         /* put transfer on interrupt queue */
2403         ehci_transfer_intr_enqueue(xfer);
2404 }
2405
2406 struct usb_pipe_methods ehci_device_intr_methods =
2407 {
2408         .open = ehci_device_intr_open,
2409         .close = ehci_device_intr_close,
2410         .enter = ehci_device_intr_enter,
2411         .start = ehci_device_intr_start,
2412 };
2413
2414 /*------------------------------------------------------------------------*
2415  * ehci full speed isochronous support
2416  *------------------------------------------------------------------------*/
2417 static void
2418 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2419 {
2420         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2421         ehci_sitd_t *td;
2422         uint32_t sitd_portaddr;
2423         uint8_t ds;
2424
2425         sitd_portaddr =
2426             EHCI_SITD_SET_ADDR(xfer->address) |
2427             EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2428             EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2429             EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2430
2431         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
2432                 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2433
2434         sitd_portaddr = htohc32(sc, sitd_portaddr);
2435
2436         /* initialize all TD's */
2437
2438         for (ds = 0; ds != 2; ds++) {
2439
2440                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2441
2442                         td->sitd_portaddr = sitd_portaddr;
2443
2444                         /*
2445                          * TODO: make some kind of automatic
2446                          * SMASK/CMASK selection based on micro-frame
2447                          * usage
2448                          *
2449                          * micro-frame usage (8 microframes per 1ms)
2450                          */
2451                         td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2452
2453                         usb_pc_cpu_flush(td->page_cache);
2454                 }
2455         }
2456 }
2457
2458 static void
2459 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2460 {
2461         ehci_device_done(xfer, USB_ERR_CANCELLED);
2462 }
2463
2464 static void
2465 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2466 {
2467         struct usb_page_search buf_res;
2468         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2469         ehci_sitd_t *td;
2470         ehci_sitd_t *td_last = NULL;
2471         ehci_sitd_t **pp_last;
2472         uint32_t *plen;
2473         uint32_t buf_offset;
2474         uint32_t nframes;
2475         uint32_t temp;
2476         uint32_t sitd_mask;
2477         uint16_t tlen;
2478         uint8_t sa;
2479         uint8_t sb;
2480
2481 #ifdef USB_DEBUG
2482         uint8_t once = 1;
2483
2484 #endif
2485
2486         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2487             xfer, xfer->endpoint->isoc_next, xfer->nframes);
2488
2489         /* get the current frame index */
2490
2491         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2492
2493         /*
2494          * check if the frame index is within the window where the frames
2495          * will be inserted
2496          */
2497         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2498             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2499
2500         if ((xfer->endpoint->is_synced == 0) ||
2501             (buf_offset < xfer->nframes)) {
2502                 /*
2503                  * If there is data underflow or the pipe queue is empty we
2504                  * schedule the transfer a few frames ahead of the current
2505                  * frame position. Else two isochronous transfers might
2506                  * overlap.
2507                  */
2508                 xfer->endpoint->isoc_next = (nframes + 3) &
2509                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2510                 xfer->endpoint->is_synced = 1;
2511                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2512         }
2513         /*
2514          * compute how many milliseconds the insertion is ahead of the
2515          * current frame position:
2516          */
2517         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2518             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2519
2520         /*
2521          * pre-compute when the isochronous transfer will be finished:
2522          */
2523         xfer->isoc_time_complete =
2524             usb_isoc_time_expand(&sc->sc_bus, nframes) +
2525             buf_offset + xfer->nframes;
2526
2527         /* get the real number of frames */
2528
2529         nframes = xfer->nframes;
2530
2531         buf_offset = 0;
2532
2533         plen = xfer->frlengths;
2534
2535         /* toggle the DMA set we are using */
2536         xfer->flags_int.curr_dma_set ^= 1;
2537
2538         /* get next DMA set */
2539         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2540         xfer->td_transfer_first = td;
2541
2542         pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2543
2544         /* store starting position */
2545
2546         xfer->qh_pos = xfer->endpoint->isoc_next;
2547
2548         while (nframes--) {
2549                 if (td == NULL) {
2550                         panic("%s:%d: out of TD's\n",
2551                             __FUNCTION__, __LINE__);
2552                 }
2553                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT])
2554                         pp_last = &sc->sc_isoc_fs_p_last[0];
2555
2556                 /* reuse sitd_portaddr and sitd_back from last transfer */
2557
2558                 if (*plen > xfer->max_frame_size) {
2559 #ifdef USB_DEBUG
2560                         if (once) {
2561                                 once = 0;
2562                                 printf("%s: frame length(%d) exceeds %d "
2563                                     "bytes (frame truncated)\n",
2564                                     __FUNCTION__, *plen,
2565                                     xfer->max_frame_size);
2566                         }
2567 #endif
2568                         *plen = xfer->max_frame_size;
2569                 }
2570
2571                 /* allocate a slot */
2572
2573                 sa = usbd_fs_isoc_schedule_alloc_slot(xfer,
2574                     xfer->isoc_time_complete - nframes - 1);
2575
2576                 if (sa == 255) {
2577                         /*
2578                          * Schedule is FULL, set length to zero:
2579                          */
2580
2581                         *plen = 0;
2582                         sa = USB_FS_ISOC_UFRAME_MAX - 1;
2583                 }
2584                 if (*plen) {
2585                         /*
2586                          * only call "usbd_get_page()" when we have a
2587                          * non-zero length
2588                          */
2589                         usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2590                         td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2591                         buf_offset += *plen;
2592                         /*
2593                          * NOTE: We need to subtract one from the offset so
2594                          * that we are on a valid page!
2595                          */
2596                         usbd_get_page(xfer->frbuffers, buf_offset - 1,
2597                             &buf_res);
2598                         temp = buf_res.physaddr & ~0xFFF;
2599                 } else {
2600                         td->sitd_bp[0] = 0;
2601                         temp = 0;
2602                 }
2603
2604                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2605                         tlen = *plen;
2606                         if (tlen <= 188) {
2607                                 temp |= 1;      /* T-count = 1, TP = ALL */
2608                                 tlen = 1;
2609                         } else {
2610                                 tlen += 187;
2611                                 tlen /= 188;
2612                                 temp |= tlen;   /* T-count = [1..6] */
2613                                 temp |= 8;      /* TP = Begin */
2614                         }
2615
2616                         tlen += sa;
2617
2618                         if (tlen >= 8) {
2619                                 sb = 0;
2620                         } else {
2621                                 sb = (1 << tlen);
2622                         }
2623
2624                         sa = (1 << sa);
2625                         sa = (sb - sa) & 0x3F;
2626                         sb = 0;
2627                 } else {
2628                         sb = (-(4 << sa)) & 0xFE;
2629                         sa = (1 << sa) & 0x3F;
2630                 }
2631
2632                 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2633                     EHCI_SITD_SET_CMASK(sb));
2634
2635                 td->sitd_bp[1] = htohc32(sc, temp);
2636
2637                 td->sitd_mask = htohc32(sc, sitd_mask);
2638
2639                 if (nframes == 0) {
2640                         td->sitd_status = htohc32(sc,
2641                             EHCI_SITD_IOC |
2642                             EHCI_SITD_ACTIVE |
2643                             EHCI_SITD_SET_LEN(*plen));
2644                 } else {
2645                         td->sitd_status = htohc32(sc,
2646                             EHCI_SITD_ACTIVE |
2647                             EHCI_SITD_SET_LEN(*plen));
2648                 }
2649                 usb_pc_cpu_flush(td->page_cache);
2650
2651 #ifdef USB_DEBUG
2652                 if (ehcidebug > 15) {
2653                         DPRINTF("FS-TD %d\n", nframes);
2654                         ehci_dump_sitd(sc, td);
2655                 }
2656 #endif
2657                 /* insert TD into schedule */
2658                 EHCI_APPEND_FS_TD(td, *pp_last);
2659                 pp_last++;
2660
2661                 plen++;
2662                 td_last = td;
2663                 td = td->obj_next;
2664         }
2665
2666         xfer->td_transfer_last = td_last;
2667
2668         /* update isoc_next */
2669         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2670             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2671
2672         /*
2673          * We don't allow cancelling of the SPLIT transaction USB FULL
2674          * speed transfer, because it disturbs the bandwidth
2675          * computation algorithm.
2676          */
2677         xfer->flags_int.can_cancel_immed = 0;
2678 }
2679
2680 static void
2681 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2682 {
2683         /*
2684          * We don't allow cancelling of the SPLIT transaction USB FULL
2685          * speed transfer, because it disturbs the bandwidth
2686          * computation algorithm.
2687          */
2688         xfer->flags_int.can_cancel_immed = 0;
2689
2690         /* set a default timeout */
2691         if (xfer->timeout == 0)
2692                 xfer->timeout = 500; /* ms */
2693
2694         /* put transfer on interrupt queue */
2695         ehci_transfer_intr_enqueue(xfer);
2696 }
2697
2698 struct usb_pipe_methods ehci_device_isoc_fs_methods =
2699 {
2700         .open = ehci_device_isoc_fs_open,
2701         .close = ehci_device_isoc_fs_close,
2702         .enter = ehci_device_isoc_fs_enter,
2703         .start = ehci_device_isoc_fs_start,
2704 };
2705
2706 /*------------------------------------------------------------------------*
2707  * ehci high speed isochronous support
2708  *------------------------------------------------------------------------*/
2709 static void
2710 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2711 {
2712         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2713         ehci_itd_t *td;
2714         uint32_t temp;
2715         uint8_t ds;
2716
2717         usb_hs_bandwidth_alloc(xfer);
2718
2719         /* initialize all TD's */
2720
2721         for (ds = 0; ds != 2; ds++) {
2722
2723                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2724
2725                         /* set TD inactive */
2726                         td->itd_status[0] = 0;
2727                         td->itd_status[1] = 0;
2728                         td->itd_status[2] = 0;
2729                         td->itd_status[3] = 0;
2730                         td->itd_status[4] = 0;
2731                         td->itd_status[5] = 0;
2732                         td->itd_status[6] = 0;
2733                         td->itd_status[7] = 0;
2734
2735                         /* set endpoint and address */
2736                         td->itd_bp[0] = htohc32(sc,
2737                             EHCI_ITD_SET_ADDR(xfer->address) |
2738                             EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2739
2740                         temp =
2741                             EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2742
2743                         /* set direction */
2744                         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2745                                 temp |= EHCI_ITD_SET_DIR_IN;
2746                         }
2747                         /* set maximum packet size */
2748                         td->itd_bp[1] = htohc32(sc, temp);
2749
2750                         /* set transfer multiplier */
2751                         td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2752
2753                         usb_pc_cpu_flush(td->page_cache);
2754                 }
2755         }
2756 }
2757
2758 static void
2759 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2760 {
2761         ehci_device_done(xfer, USB_ERR_CANCELLED);
2762
2763         /* bandwidth must be freed after device done */
2764         usb_hs_bandwidth_free(xfer);
2765 }
2766
2767 static void
2768 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2769 {
2770         struct usb_page_search buf_res;
2771         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2772         ehci_itd_t *td;
2773         ehci_itd_t *td_last = NULL;
2774         ehci_itd_t **pp_last;
2775         bus_size_t page_addr;
2776         uint32_t *plen;
2777         uint32_t status;
2778         uint32_t buf_offset;
2779         uint32_t nframes;
2780         uint32_t itd_offset[8 + 1];
2781         uint8_t x;
2782         uint8_t td_no;
2783         uint8_t page_no;
2784         uint8_t shift = usbd_xfer_get_fps_shift(xfer);
2785
2786 #ifdef USB_DEBUG
2787         uint8_t once = 1;
2788
2789 #endif
2790
2791         DPRINTFN(6, "xfer=%p next=%d nframes=%d shift=%d\n",
2792             xfer, xfer->endpoint->isoc_next, xfer->nframes, (int)shift);
2793
2794         /* get the current frame index */
2795
2796         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2797
2798         /*
2799          * check if the frame index is within the window where the frames
2800          * will be inserted
2801          */
2802         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2803             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2804
2805         if ((xfer->endpoint->is_synced == 0) ||
2806             (buf_offset < (((xfer->nframes << shift) + 7) / 8))) {
2807                 /*
2808                  * If there is data underflow or the pipe queue is empty we
2809                  * schedule the transfer a few frames ahead of the current
2810                  * frame position. Else two isochronous transfers might
2811                  * overlap.
2812                  */
2813                 xfer->endpoint->isoc_next = (nframes + 3) &
2814                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2815                 xfer->endpoint->is_synced = 1;
2816                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2817         }
2818         /*
2819          * compute how many milliseconds the insertion is ahead of the
2820          * current frame position:
2821          */
2822         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2823             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2824
2825         /*
2826          * pre-compute when the isochronous transfer will be finished:
2827          */
2828         xfer->isoc_time_complete =
2829             usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2830             (((xfer->nframes << shift) + 7) / 8);
2831
2832         /* get the real number of frames */
2833
2834         nframes = xfer->nframes;
2835
2836         buf_offset = 0;
2837         td_no = 0;
2838
2839         plen = xfer->frlengths;
2840
2841         /* toggle the DMA set we are using */
2842         xfer->flags_int.curr_dma_set ^= 1;
2843
2844         /* get next DMA set */
2845         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2846         xfer->td_transfer_first = td;
2847
2848         pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2849
2850         /* store starting position */
2851
2852         xfer->qh_pos = xfer->endpoint->isoc_next;
2853
2854         while (nframes) {
2855                 if (td == NULL) {
2856                         panic("%s:%d: out of TD's\n",
2857                             __FUNCTION__, __LINE__);
2858                 }
2859                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2860                         pp_last = &sc->sc_isoc_hs_p_last[0];
2861                 }
2862                 /* range check */
2863                 if (*plen > xfer->max_frame_size) {
2864 #ifdef USB_DEBUG
2865                         if (once) {
2866                                 once = 0;
2867                                 printf("%s: frame length(%d) exceeds %d bytes "
2868                                     "(frame truncated)\n",
2869                                     __FUNCTION__, *plen, xfer->max_frame_size);
2870                         }
2871 #endif
2872                         *plen = xfer->max_frame_size;
2873                 }
2874
2875                 if (xfer->endpoint->usb_smask & (1 << td_no)) {
2876                         status = (EHCI_ITD_SET_LEN(*plen) |
2877                             EHCI_ITD_ACTIVE |
2878                             EHCI_ITD_SET_PG(0));
2879                         td->itd_status[td_no] = htohc32(sc, status);
2880                         itd_offset[td_no] = buf_offset;
2881                         buf_offset += *plen;
2882                         plen++;
2883                         nframes --;
2884                 } else {
2885                         td->itd_status[td_no] = 0;      /* not active */
2886                         itd_offset[td_no] = buf_offset;
2887                 }
2888
2889                 td_no++;
2890
2891                 if ((td_no == 8) || (nframes == 0)) {
2892
2893                         /* the rest of the transfers are not active, if any */
2894                         for (x = td_no; x != 8; x++) {
2895                                 td->itd_status[x] = 0;  /* not active */
2896                         }
2897
2898                         /* check if there is any data to be transferred */
2899                         if (itd_offset[0] != buf_offset) {
2900                                 page_no = 0;
2901                                 itd_offset[td_no] = buf_offset;
2902
2903                                 /* get first page offset */
2904                                 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2905                                 /* get page address */
2906                                 page_addr = buf_res.physaddr & ~0xFFF;
2907                                 /* update page address */
2908                                 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2909                                 td->itd_bp[0] |= htohc32(sc, page_addr);
2910
2911                                 for (x = 0; x != td_no; x++) {
2912                                         /* set page number and page offset */
2913                                         status = (EHCI_ITD_SET_PG(page_no) |
2914                                             (buf_res.physaddr & 0xFFF));
2915                                         td->itd_status[x] |= htohc32(sc, status);
2916
2917                                         /* get next page offset */
2918                                         if (itd_offset[x + 1] == buf_offset) {
2919                                                 /*
2920                                                  * We subtract one so that
2921                                                  * we don't go off the last
2922                                                  * page!
2923                                                  */
2924                                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2925                                         } else {
2926                                                 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2927                                         }
2928
2929                                         /* check if we need a new page */
2930                                         if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2931                                                 /* new page needed */
2932                                                 page_addr = buf_res.physaddr & ~0xFFF;
2933                                                 if (page_no == 6) {
2934                                                         panic("%s: too many pages\n", __FUNCTION__);
2935                                                 }
2936                                                 page_no++;
2937                                                 /* update page address */
2938                                                 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2939                                                 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2940                                         }
2941                                 }
2942                         }
2943                         /* set IOC bit if we are complete */
2944                         if (nframes == 0) {
2945                                 td->itd_status[td_no - 1] |= htohc32(sc, EHCI_ITD_IOC);
2946                         }
2947                         usb_pc_cpu_flush(td->page_cache);
2948 #ifdef USB_DEBUG
2949                         if (ehcidebug > 15) {
2950                                 DPRINTF("HS-TD %d\n", nframes);
2951                                 ehci_dump_itd(sc, td);
2952                         }
2953 #endif
2954                         /* insert TD into schedule */
2955                         EHCI_APPEND_HS_TD(td, *pp_last);
2956                         pp_last++;
2957
2958                         td_no = 0;
2959                         td_last = td;
2960                         td = td->obj_next;
2961                 }
2962         }
2963
2964         xfer->td_transfer_last = td_last;
2965
2966         /* update isoc_next */
2967         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
2968             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2969 }
2970
2971 static void
2972 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2973 {
2974         /* put transfer on interrupt queue */
2975         ehci_transfer_intr_enqueue(xfer);
2976 }
2977
2978 struct usb_pipe_methods ehci_device_isoc_hs_methods =
2979 {
2980         .open = ehci_device_isoc_hs_open,
2981         .close = ehci_device_isoc_hs_close,
2982         .enter = ehci_device_isoc_hs_enter,
2983         .start = ehci_device_isoc_hs_start,
2984 };
2985
2986 /*------------------------------------------------------------------------*
2987  * ehci root control support
2988  *------------------------------------------------------------------------*
2989  * Simulate a hardware hub by handling all the necessary requests.
2990  *------------------------------------------------------------------------*/
2991
2992 static const
2993 struct usb_device_descriptor ehci_devd =
2994 {
2995         sizeof(struct usb_device_descriptor),
2996         UDESC_DEVICE,                   /* type */
2997         {0x00, 0x02},                   /* USB version */
2998         UDCLASS_HUB,                    /* class */
2999         UDSUBCLASS_HUB,                 /* subclass */
3000         UDPROTO_HSHUBSTT,               /* protocol */
3001         64,                             /* max packet */
3002         {0}, {0}, {0x00, 0x01},         /* device id */
3003         1, 2, 0,                        /* string indicies */
3004         1                               /* # of configurations */
3005 };
3006
3007 static const
3008 struct usb_device_qualifier ehci_odevd =
3009 {
3010         sizeof(struct usb_device_qualifier),
3011         UDESC_DEVICE_QUALIFIER,         /* type */
3012         {0x00, 0x02},                   /* USB version */
3013         UDCLASS_HUB,                    /* class */
3014         UDSUBCLASS_HUB,                 /* subclass */
3015         UDPROTO_FSHUB,                  /* protocol */
3016         0,                              /* max packet */
3017         0,                              /* # of configurations */
3018         0
3019 };
3020
3021 static const struct ehci_config_desc ehci_confd = {
3022         .confd = {
3023                 .bLength = sizeof(struct usb_config_descriptor),
3024                 .bDescriptorType = UDESC_CONFIG,
3025                 .wTotalLength[0] = sizeof(ehci_confd),
3026                 .bNumInterface = 1,
3027                 .bConfigurationValue = 1,
3028                 .iConfiguration = 0,
3029                 .bmAttributes = UC_SELF_POWERED,
3030                 .bMaxPower = 0          /* max power */
3031         },
3032         .ifcd = {
3033                 .bLength = sizeof(struct usb_interface_descriptor),
3034                 .bDescriptorType = UDESC_INTERFACE,
3035                 .bNumEndpoints = 1,
3036                 .bInterfaceClass = UICLASS_HUB,
3037                 .bInterfaceSubClass = UISUBCLASS_HUB,
3038                 .bInterfaceProtocol = 0,
3039         },
3040         .endpd = {
3041                 .bLength = sizeof(struct usb_endpoint_descriptor),
3042                 .bDescriptorType = UDESC_ENDPOINT,
3043                 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3044                 .bmAttributes = UE_INTERRUPT,
3045                 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3046                 .bInterval = 255,
3047         },
3048 };
3049
3050 static const
3051 struct usb_hub_descriptor ehci_hubd =
3052 {
3053         .bDescLength = 0,               /* dynamic length */
3054         .bDescriptorType = UDESC_HUB,
3055 };
3056
3057 static void
3058 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3059 {
3060         uint32_t port;
3061         uint32_t v;
3062
3063         DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3064
3065         port = EHCI_PORTSC(index);
3066         v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3067         EOWRITE4(sc, port, v | EHCI_PS_PO);
3068 }
3069
3070 static usb_error_t
3071 ehci_roothub_exec(struct usb_device *udev,
3072     struct usb_device_request *req, const void **pptr, uint16_t *plength)
3073 {
3074         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3075         const char *str_ptr;
3076         const void *ptr;
3077         uint32_t port;
3078         uint32_t v;
3079         uint16_t len;
3080         uint16_t i;
3081         uint16_t value;
3082         uint16_t index;
3083         usb_error_t err;
3084
3085         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3086
3087         /* buffer reset */
3088         ptr = (const void *)&sc->sc_hub_desc;
3089         len = 0;
3090         err = 0;
3091
3092         value = UGETW(req->wValue);
3093         index = UGETW(req->wIndex);
3094
3095         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3096             "wValue=0x%04x wIndex=0x%04x\n",
3097             req->bmRequestType, req->bRequest,
3098             UGETW(req->wLength), value, index);
3099
3100 #define C(x,y) ((x) | ((y) << 8))
3101         switch (C(req->bRequest, req->bmRequestType)) {
3102         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3103         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3104         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3105                 /*
3106                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3107                  * for the integrated root hub.
3108                  */
3109                 break;
3110         case C(UR_GET_CONFIG, UT_READ_DEVICE):
3111                 len = 1;
3112                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3113                 break;
3114         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3115                 switch (value >> 8) {
3116                 case UDESC_DEVICE:
3117                         if ((value & 0xff) != 0) {
3118                                 err = USB_ERR_IOERROR;
3119                                 goto done;
3120                         }
3121                         len = sizeof(ehci_devd);
3122                         ptr = (const void *)&ehci_devd;
3123                         break;
3124                         /*
3125                          * We can't really operate at another speed,
3126                          * but the specification says we need this
3127                          * descriptor:
3128                          */
3129                 case UDESC_DEVICE_QUALIFIER:
3130                         if ((value & 0xff) != 0) {
3131                                 err = USB_ERR_IOERROR;
3132                                 goto done;
3133                         }
3134                         len = sizeof(ehci_odevd);
3135                         ptr = (const void *)&ehci_odevd;
3136                         break;
3137
3138                 case UDESC_CONFIG:
3139                         if ((value & 0xff) != 0) {
3140                                 err = USB_ERR_IOERROR;
3141                                 goto done;
3142                         }
3143                         len = sizeof(ehci_confd);
3144                         ptr = (const void *)&ehci_confd;
3145                         break;
3146
3147                 case UDESC_STRING:
3148                         switch (value & 0xff) {
3149                         case 0: /* Language table */
3150                                 str_ptr = "\001";
3151                                 break;
3152
3153                         case 1: /* Vendor */
3154                                 str_ptr = sc->sc_vendor;
3155                                 break;
3156
3157                         case 2: /* Product */
3158                                 str_ptr = "EHCI root HUB";
3159                                 break;
3160
3161                         default:
3162                                 str_ptr = "";
3163                                 break;
3164                         }
3165
3166                         len = usb_make_str_desc(
3167                             sc->sc_hub_desc.temp,
3168                             sizeof(sc->sc_hub_desc.temp),
3169                             str_ptr);
3170                         break;
3171                 default:
3172                         err = USB_ERR_IOERROR;
3173                         goto done;
3174                 }
3175                 break;
3176         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3177                 len = 1;
3178                 sc->sc_hub_desc.temp[0] = 0;
3179                 break;
3180         case C(UR_GET_STATUS, UT_READ_DEVICE):
3181                 len = 2;
3182                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3183                 break;
3184         case C(UR_GET_STATUS, UT_READ_INTERFACE):
3185         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3186                 len = 2;
3187                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3188                 break;
3189         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3190                 if (value >= EHCI_MAX_DEVICES) {
3191                         err = USB_ERR_IOERROR;
3192                         goto done;
3193                 }
3194                 sc->sc_addr = value;
3195                 break;
3196         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3197                 if ((value != 0) && (value != 1)) {
3198                         err = USB_ERR_IOERROR;
3199                         goto done;
3200                 }
3201                 sc->sc_conf = value;
3202                 break;
3203         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3204                 break;
3205         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3206         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3207         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3208                 err = USB_ERR_IOERROR;
3209                 goto done;
3210         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3211                 break;
3212         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3213                 break;
3214                 /* Hub requests */
3215         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3216                 break;
3217         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3218                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3219
3220                 if ((index < 1) ||
3221                     (index > sc->sc_noport)) {
3222                         err = USB_ERR_IOERROR;
3223                         goto done;
3224                 }
3225                 port = EHCI_PORTSC(index);
3226                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3227                 switch (value) {
3228                 case UHF_PORT_ENABLE:
3229                         EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3230                         break;
3231                 case UHF_PORT_SUSPEND:
3232                         if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3233
3234                                 /*
3235                                  * waking up a High Speed device is rather
3236                                  * complicated if
3237                                  */
3238                                 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3239                         }
3240                         /* wait 20ms for resume sequence to complete */
3241                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3242
3243                         EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3244                             EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3245
3246                         /* 4ms settle time */
3247                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3248                         break;
3249                 case UHF_PORT_POWER:
3250                         EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3251                         break;
3252                 case UHF_PORT_TEST:
3253                         DPRINTFN(3, "clear port test "
3254                             "%d\n", index);
3255                         break;
3256                 case UHF_PORT_INDICATOR:
3257                         DPRINTFN(3, "clear port ind "
3258                             "%d\n", index);
3259                         EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3260                         break;
3261                 case UHF_C_PORT_CONNECTION:
3262                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
3263                         break;
3264                 case UHF_C_PORT_ENABLE:
3265                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
3266                         break;
3267                 case UHF_C_PORT_SUSPEND:
3268                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3269                         break;
3270                 case UHF_C_PORT_OVER_CURRENT:
3271                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
3272                         break;
3273                 case UHF_C_PORT_RESET:
3274                         sc->sc_isreset = 0;
3275                         break;
3276                 default:
3277                         err = USB_ERR_IOERROR;
3278                         goto done;
3279                 }
3280                 break;
3281         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3282                 if ((value & 0xff) != 0) {
3283                         err = USB_ERR_IOERROR;
3284                         goto done;
3285                 }
3286                 v = EREAD4(sc, EHCI_HCSPARAMS);
3287
3288                 sc->sc_hub_desc.hubd = ehci_hubd;
3289                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3290
3291                 if (EHCI_HCS_PPC(v))
3292                         i = UHD_PWR_INDIVIDUAL;
3293                 else
3294                         i = UHD_PWR_NO_SWITCH;
3295
3296                 if (EHCI_HCS_P_INDICATOR(v))
3297                         i |= UHD_PORT_IND;
3298
3299                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics, i);
3300                 /* XXX can't find out? */
3301                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3302                 /* XXX don't know if ports are removable or not */
3303                 sc->sc_hub_desc.hubd.bDescLength =
3304                     8 + ((sc->sc_noport + 7) / 8);
3305                 len = sc->sc_hub_desc.hubd.bDescLength;
3306                 break;
3307         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3308                 len = 16;
3309                 memset(sc->sc_hub_desc.temp, 0, 16);
3310                 break;
3311         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3312                 DPRINTFN(9, "get port status i=%d\n",
3313                     index);
3314                 if ((index < 1) ||
3315                     (index > sc->sc_noport)) {
3316                         err = USB_ERR_IOERROR;
3317                         goto done;
3318                 }
3319                 v = EOREAD4(sc, EHCI_PORTSC(index));
3320                 DPRINTFN(9, "port status=0x%04x\n", v);
3321                 if (sc->sc_flags & (EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_TT)) {
3322                         if ((v & 0xc000000) == 0x8000000)
3323                                 i = UPS_HIGH_SPEED;
3324                         else if ((v & 0xc000000) == 0x4000000)
3325                                 i = UPS_LOW_SPEED;
3326                         else
3327                                 i = 0;
3328                 } else {
3329                         i = UPS_HIGH_SPEED;
3330                 }
3331                 if (v & EHCI_PS_CS)
3332                         i |= UPS_CURRENT_CONNECT_STATUS;
3333                 if (v & EHCI_PS_PE)
3334                         i |= UPS_PORT_ENABLED;
3335                 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3336                         i |= UPS_SUSPEND;
3337                 if (v & EHCI_PS_OCA)
3338                         i |= UPS_OVERCURRENT_INDICATOR;
3339                 if (v & EHCI_PS_PR)
3340                         i |= UPS_RESET;
3341                 if (v & EHCI_PS_PP)
3342                         i |= UPS_PORT_POWER;
3343                 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3344                 i = 0;
3345                 if (v & EHCI_PS_CSC)
3346                         i |= UPS_C_CONNECT_STATUS;
3347                 if (v & EHCI_PS_PEC)
3348                         i |= UPS_C_PORT_ENABLED;
3349                 if (v & EHCI_PS_OCC)
3350                         i |= UPS_C_OVERCURRENT_INDICATOR;
3351                 if (v & EHCI_PS_FPR)
3352                         i |= UPS_C_SUSPEND;
3353                 if (sc->sc_isreset)
3354                         i |= UPS_C_PORT_RESET;
3355                 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3356                 len = sizeof(sc->sc_hub_desc.ps);
3357                 break;
3358         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3359                 err = USB_ERR_IOERROR;
3360                 goto done;
3361         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3362                 break;
3363         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3364                 if ((index < 1) ||
3365                     (index > sc->sc_noport)) {
3366                         err = USB_ERR_IOERROR;
3367                         goto done;
3368                 }
3369                 port = EHCI_PORTSC(index);
3370                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3371                 switch (value) {
3372                 case UHF_PORT_ENABLE:
3373                         EOWRITE4(sc, port, v | EHCI_PS_PE);
3374                         break;
3375                 case UHF_PORT_SUSPEND:
3376                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3377                         break;
3378                 case UHF_PORT_RESET:
3379                         DPRINTFN(6, "reset port %d\n", index);
3380 #ifdef USB_DEBUG
3381                         if (ehcinohighspeed) {
3382                                 /*
3383                                  * Connect USB device to companion
3384                                  * controller.
3385                                  */
3386                                 ehci_disown(sc, index, 1);
3387                                 break;
3388                         }
3389 #endif
3390                         if (EHCI_PS_IS_LOWSPEED(v) &&
3391                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3392                                 /* Low speed device, give up ownership. */
3393                                 ehci_disown(sc, index, 1);
3394                                 break;
3395                         }
3396                         /* Start reset sequence. */
3397                         v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3398                         EOWRITE4(sc, port, v | EHCI_PS_PR);
3399
3400                         /* Wait for reset to complete. */
3401                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3402                             USB_MS_TO_TICKS(usb_port_root_reset_delay));
3403
3404                         /* Terminate reset sequence. */
3405                         if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3406                                 EOWRITE4(sc, port, v);
3407
3408                         /* Wait for HC to complete reset. */
3409                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3410                             USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3411
3412                         v = EOREAD4(sc, port);
3413                         DPRINTF("ehci after reset, status=0x%08x\n", v);
3414                         if (v & EHCI_PS_PR) {
3415                                 device_printf(sc->sc_bus.bdev,
3416                                     "port reset timeout\n");
3417                                 err = USB_ERR_TIMEOUT;
3418                                 goto done;
3419                         }
3420                         if (!(v & EHCI_PS_PE) &&
3421                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3422                                 /* Not a high speed device, give up ownership.*/
3423                                 ehci_disown(sc, index, 0);
3424                                 break;
3425                         }
3426                         sc->sc_isreset = 1;
3427                         DPRINTF("ehci port %d reset, status = 0x%08x\n",
3428                             index, v);
3429                         break;
3430
3431                 case UHF_PORT_POWER:
3432                         DPRINTFN(3, "set port power %d\n", index);
3433                         EOWRITE4(sc, port, v | EHCI_PS_PP);
3434                         break;
3435
3436                 case UHF_PORT_TEST:
3437                         DPRINTFN(3, "set port test %d\n", index);
3438                         break;
3439
3440                 case UHF_PORT_INDICATOR:
3441                         DPRINTFN(3, "set port ind %d\n", index);
3442                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
3443                         break;
3444
3445                 default:
3446                         err = USB_ERR_IOERROR;
3447                         goto done;
3448                 }
3449                 break;
3450         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3451         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3452         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3453         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3454                 break;
3455         default:
3456                 err = USB_ERR_IOERROR;
3457                 goto done;
3458         }
3459 done:
3460         *plength = len;
3461         *pptr = ptr;
3462         return (err);
3463 }
3464
3465 static void
3466 ehci_xfer_setup(struct usb_setup_params *parm)
3467 {
3468         struct usb_page_search page_info;
3469         struct usb_page_cache *pc;
3470         ehci_softc_t *sc;
3471         struct usb_xfer *xfer;
3472         void *last_obj;
3473         uint32_t nqtd;
3474         uint32_t nqh;
3475         uint32_t nsitd;
3476         uint32_t nitd;
3477         uint32_t n;
3478
3479         sc = EHCI_BUS2SC(parm->udev->bus);
3480         xfer = parm->curr_xfer;
3481
3482         nqtd = 0;
3483         nqh = 0;
3484         nsitd = 0;
3485         nitd = 0;
3486
3487         /*
3488          * compute maximum number of some structures
3489          */
3490         if (parm->methods == &ehci_device_ctrl_methods) {
3491
3492                 /*
3493                  * The proof for the "nqtd" formula is illustrated like
3494                  * this:
3495                  *
3496                  * +------------------------------------+
3497                  * |                                    |
3498                  * |         |remainder ->              |
3499                  * |   +-----+---+                      |
3500                  * |   | xxx | x | frm 0                |
3501                  * |   +-----+---++                     |
3502                  * |   | xxx | xx | frm 1               |
3503                  * |   +-----+----+                     |
3504                  * |            ...                     |
3505                  * +------------------------------------+
3506                  *
3507                  * "xxx" means a completely full USB transfer descriptor
3508                  *
3509                  * "x" and "xx" means a short USB packet
3510                  *
3511                  * For the remainder of an USB transfer modulo
3512                  * "max_data_length" we need two USB transfer descriptors.
3513                  * One to transfer the remaining data and one to finalise
3514                  * with a zero length packet in case the "force_short_xfer"
3515                  * flag is set. We only need two USB transfer descriptors in
3516                  * the case where the transfer length of the first one is a
3517                  * factor of "max_frame_size". The rest of the needed USB
3518                  * transfer descriptors is given by the buffer size divided
3519                  * by the maximum data payload.
3520                  */
3521                 parm->hc_max_packet_size = 0x400;
3522                 parm->hc_max_packet_count = 1;
3523                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3524                 xfer->flags_int.bdma_enable = 1;
3525
3526                 usbd_transfer_setup_sub(parm);
3527
3528                 nqh = 1;
3529                 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3530                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3531
3532         } else if (parm->methods == &ehci_device_bulk_methods) {
3533
3534                 parm->hc_max_packet_size = 0x400;
3535                 parm->hc_max_packet_count = 1;
3536                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3537                 xfer->flags_int.bdma_enable = 1;
3538
3539                 usbd_transfer_setup_sub(parm);
3540
3541                 nqh = 1;
3542                 nqtd = ((2 * xfer->nframes)
3543                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3544
3545         } else if (parm->methods == &ehci_device_intr_methods) {
3546
3547                 if (parm->speed == USB_SPEED_HIGH) {
3548                         parm->hc_max_packet_size = 0x400;
3549                         parm->hc_max_packet_count = 3;
3550                 } else if (parm->speed == USB_SPEED_FULL) {
3551                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3552                         parm->hc_max_packet_count = 1;
3553                 } else {
3554                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3555                         parm->hc_max_packet_count = 1;
3556                 }
3557
3558                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3559                 xfer->flags_int.bdma_enable = 1;
3560
3561                 usbd_transfer_setup_sub(parm);
3562
3563                 nqh = 1;
3564                 nqtd = ((2 * xfer->nframes)
3565                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3566
3567         } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3568
3569                 parm->hc_max_packet_size = 0x3FF;
3570                 parm->hc_max_packet_count = 1;
3571                 parm->hc_max_frame_size = 0x3FF;
3572                 xfer->flags_int.bdma_enable = 1;
3573
3574                 usbd_transfer_setup_sub(parm);
3575
3576                 nsitd = xfer->nframes;
3577
3578         } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3579
3580                 parm->hc_max_packet_size = 0x400;
3581                 parm->hc_max_packet_count = 3;
3582                 parm->hc_max_frame_size = 0xC00;
3583                 xfer->flags_int.bdma_enable = 1;
3584
3585                 usbd_transfer_setup_sub(parm);
3586
3587                 nitd = ((xfer->nframes + 7) / 8) <<
3588                     usbd_xfer_get_fps_shift(xfer);
3589
3590         } else {
3591
3592                 parm->hc_max_packet_size = 0x400;
3593                 parm->hc_max_packet_count = 1;
3594                 parm->hc_max_frame_size = 0x400;
3595
3596                 usbd_transfer_setup_sub(parm);
3597         }
3598
3599 alloc_dma_set:
3600
3601         if (parm->err) {
3602                 return;
3603         }
3604         /*
3605          * Allocate queue heads and transfer descriptors
3606          */
3607         last_obj = NULL;
3608
3609         if (usbd_transfer_setup_sub_malloc(
3610             parm, &pc, sizeof(ehci_itd_t),
3611             EHCI_ITD_ALIGN, nitd)) {
3612                 parm->err = USB_ERR_NOMEM;
3613                 return;
3614         }
3615         if (parm->buf) {
3616                 for (n = 0; n != nitd; n++) {
3617                         ehci_itd_t *td;
3618
3619                         usbd_get_page(pc + n, 0, &page_info);
3620
3621                         td = page_info.buffer;
3622
3623                         /* init TD */
3624                         td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3625                         td->obj_next = last_obj;
3626                         td->page_cache = pc + n;
3627
3628                         last_obj = td;
3629
3630                         usb_pc_cpu_flush(pc + n);
3631                 }
3632         }
3633         if (usbd_transfer_setup_sub_malloc(
3634             parm, &pc, sizeof(ehci_sitd_t),
3635             EHCI_SITD_ALIGN, nsitd)) {
3636                 parm->err = USB_ERR_NOMEM;
3637                 return;
3638         }
3639         if (parm->buf) {
3640                 for (n = 0; n != nsitd; n++) {
3641                         ehci_sitd_t *td;
3642
3643                         usbd_get_page(pc + n, 0, &page_info);
3644
3645                         td = page_info.buffer;
3646
3647                         /* init TD */
3648                         td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3649                         td->obj_next = last_obj;
3650                         td->page_cache = pc + n;
3651
3652                         last_obj = td;
3653
3654                         usb_pc_cpu_flush(pc + n);
3655                 }
3656         }
3657         if (usbd_transfer_setup_sub_malloc(
3658             parm, &pc, sizeof(ehci_qtd_t),
3659             EHCI_QTD_ALIGN, nqtd)) {
3660                 parm->err = USB_ERR_NOMEM;
3661                 return;
3662         }
3663         if (parm->buf) {
3664                 for (n = 0; n != nqtd; n++) {
3665                         ehci_qtd_t *qtd;
3666
3667                         usbd_get_page(pc + n, 0, &page_info);
3668
3669                         qtd = page_info.buffer;
3670
3671                         /* init TD */
3672                         qtd->qtd_self = htohc32(sc, page_info.physaddr);
3673                         qtd->obj_next = last_obj;
3674                         qtd->page_cache = pc + n;
3675
3676                         last_obj = qtd;
3677
3678                         usb_pc_cpu_flush(pc + n);
3679                 }
3680         }
3681         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3682
3683         last_obj = NULL;
3684
3685         if (usbd_transfer_setup_sub_malloc(
3686             parm, &pc, sizeof(ehci_qh_t),
3687             EHCI_QH_ALIGN, nqh)) {
3688                 parm->err = USB_ERR_NOMEM;
3689                 return;
3690         }
3691         if (parm->buf) {
3692                 for (n = 0; n != nqh; n++) {
3693                         ehci_qh_t *qh;
3694
3695                         usbd_get_page(pc + n, 0, &page_info);
3696
3697                         qh = page_info.buffer;
3698
3699                         /* init QH */
3700                         qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3701                         qh->obj_next = last_obj;
3702                         qh->page_cache = pc + n;
3703
3704                         last_obj = qh;
3705
3706                         usb_pc_cpu_flush(pc + n);
3707                 }
3708         }
3709         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3710
3711         if (!xfer->flags_int.curr_dma_set) {
3712                 xfer->flags_int.curr_dma_set = 1;
3713                 goto alloc_dma_set;
3714         }
3715 }
3716
3717 static void
3718 ehci_xfer_unsetup(struct usb_xfer *xfer)
3719 {
3720         return;
3721 }
3722
3723 static void
3724 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3725     struct usb_endpoint *ep)
3726 {
3727         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3728
3729         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3730             ep, udev->address,
3731             edesc->bEndpointAddress, udev->flags.usb_mode,
3732             sc->sc_addr);
3733
3734         if (udev->flags.usb_mode != USB_MODE_HOST) {
3735                 /* not supported */
3736                 return;
3737         }
3738         if (udev->device_index != sc->sc_addr) {
3739
3740                 if ((udev->speed != USB_SPEED_HIGH) &&
3741                     ((udev->hs_hub_addr == 0) ||
3742                     (udev->hs_port_no == 0) ||
3743                     (udev->parent_hs_hub == NULL) ||
3744                     (udev->parent_hs_hub->hub == NULL))) {
3745                         /* We need a transaction translator */
3746                         goto done;
3747                 }
3748                 switch (edesc->bmAttributes & UE_XFERTYPE) {
3749                 case UE_CONTROL:
3750                         ep->methods = &ehci_device_ctrl_methods;
3751                         break;
3752                 case UE_INTERRUPT:
3753                         ep->methods = &ehci_device_intr_methods;
3754                         break;
3755                 case UE_ISOCHRONOUS:
3756                         if (udev->speed == USB_SPEED_HIGH) {
3757                                 ep->methods = &ehci_device_isoc_hs_methods;
3758                         } else if (udev->speed == USB_SPEED_FULL) {
3759                                 ep->methods = &ehci_device_isoc_fs_methods;
3760                         }
3761                         break;
3762                 case UE_BULK:
3763                         ep->methods = &ehci_device_bulk_methods;
3764                         break;
3765                 default:
3766                         /* do nothing */
3767                         break;
3768                 }
3769         }
3770 done:
3771         return;
3772 }
3773
3774 static void
3775 ehci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
3776 {
3777         /*
3778          * Wait until the hardware has finished any possible use of
3779          * the transfer descriptor(s) and QH
3780          */
3781         *pus = (1125);                  /* microseconds */
3782 }
3783
3784 static void
3785 ehci_device_resume(struct usb_device *udev)
3786 {
3787         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3788         struct usb_xfer *xfer;
3789         struct usb_pipe_methods *methods;
3790
3791         DPRINTF("\n");
3792
3793         USB_BUS_LOCK(udev->bus);
3794
3795         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3796
3797                 if (xfer->xroot->udev == udev) {
3798
3799                         methods = xfer->endpoint->methods;
3800
3801                         if ((methods == &ehci_device_bulk_methods) ||
3802                             (methods == &ehci_device_ctrl_methods)) {
3803                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3804                                     sc->sc_async_p_last);
3805                         }
3806                         if (methods == &ehci_device_intr_methods) {
3807                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3808                                     sc->sc_intr_p_last[xfer->qh_pos]);
3809                         }
3810                 }
3811         }
3812
3813         USB_BUS_UNLOCK(udev->bus);
3814
3815         return;
3816 }
3817
3818 static void
3819 ehci_device_suspend(struct usb_device *udev)
3820 {
3821         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3822         struct usb_xfer *xfer;
3823         struct usb_pipe_methods *methods;
3824
3825         DPRINTF("\n");
3826
3827         USB_BUS_LOCK(udev->bus);
3828
3829         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3830
3831                 if (xfer->xroot->udev == udev) {
3832
3833                         methods = xfer->endpoint->methods;
3834
3835                         if ((methods == &ehci_device_bulk_methods) ||
3836                             (methods == &ehci_device_ctrl_methods)) {
3837                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3838                                     sc->sc_async_p_last);
3839                         }
3840                         if (methods == &ehci_device_intr_methods) {
3841                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3842                                     sc->sc_intr_p_last[xfer->qh_pos]);
3843                         }
3844                 }
3845         }
3846
3847         USB_BUS_UNLOCK(udev->bus);
3848 }
3849
3850 static void
3851 ehci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
3852 {
3853         struct ehci_softc *sc = EHCI_BUS2SC(bus);
3854
3855         switch (state) {
3856         case USB_HW_POWER_SUSPEND:
3857         case USB_HW_POWER_SHUTDOWN:
3858                 ehci_suspend(sc);
3859                 break;
3860         case USB_HW_POWER_RESUME:
3861                 ehci_resume(sc);
3862                 break;
3863         default:
3864                 break;
3865         }
3866 }
3867
3868 static void
3869 ehci_set_hw_power(struct usb_bus *bus)
3870 {
3871         ehci_softc_t *sc = EHCI_BUS2SC(bus);
3872         uint32_t temp;
3873         uint32_t flags;
3874
3875         DPRINTF("\n");
3876
3877         USB_BUS_LOCK(bus);
3878
3879         flags = bus->hw_power_state;
3880
3881         temp = EOREAD4(sc, EHCI_USBCMD);
3882
3883         temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3884
3885         if (flags & (USB_HW_POWER_CONTROL |
3886             USB_HW_POWER_BULK)) {
3887                 DPRINTF("Async is active\n");
3888                 temp |= EHCI_CMD_ASE;
3889         }
3890         if (flags & (USB_HW_POWER_INTERRUPT |
3891             USB_HW_POWER_ISOC)) {
3892                 DPRINTF("Periodic is active\n");
3893                 temp |= EHCI_CMD_PSE;
3894         }
3895         EOWRITE4(sc, EHCI_USBCMD, temp);
3896
3897         USB_BUS_UNLOCK(bus);
3898
3899         return;
3900 }
3901
3902 struct usb_bus_methods ehci_bus_methods =
3903 {
3904         .endpoint_init = ehci_ep_init,
3905         .xfer_setup = ehci_xfer_setup,
3906         .xfer_unsetup = ehci_xfer_unsetup,
3907         .get_dma_delay = ehci_get_dma_delay,
3908         .device_resume = ehci_device_resume,
3909         .device_suspend = ehci_device_suspend,
3910         .set_hw_power = ehci_set_hw_power,
3911         .set_hw_power_sleep = ehci_set_hw_power_sleep,
3912         .roothub_exec = ehci_roothub_exec,
3913         .xfer_poll = ehci_do_poll,
3914 };