sys/dev/usb/controller/ehci.c

   1 /*-
   2  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
   3  * Copyright (c) 2004 The NetBSD Foundation, Inc. All rights reserved.
   4  * Copyright (c) 2004 Lennart Augustsson. All rights reserved.
   5  * Copyright (c) 2004 Charles M. Hannum. All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  31  *
  32  * The EHCI 0.96 spec can be found at
  33  * http://developer.intel.com/technology/usb/download/ehci-r096.pdf
  34  * The EHCI 1.0 spec can be found at
  35  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  36  * and the USB 2.0 spec at
  37  * http://www.usb.org/developers/docs/usb_20.zip
  38  *
  39  */
  40
  41 /*
  42  * TODO:
  43  * 1) command failures are not recovered correctly
  44  */
  45
  46 #include <sys/cdefs.h>
  47 __FBSDID("$FreeBSD$");
  48
  49 #include <sys/stdint.h>
  50 #include <sys/stddef.h>
  51 #include <sys/param.h>
  52 #include <sys/queue.h>
  53 #include <sys/types.h>
  54 #include <sys/systm.h>
  55 #include <sys/kernel.h>
  56 #include <sys/bus.h>
  57 #include <sys/linker_set.h>
  58 #include <sys/module.h>
  59 #include <sys/lock.h>
  60 #include <sys/mutex.h>
  61 #include <sys/condvar.h>
  62 #include <sys/sysctl.h>
  63 #include <sys/sx.h>
  64 #include <sys/unistd.h>
  65 #include <sys/callout.h>
  66 #include <sys/malloc.h>
  67 #include <sys/priv.h>
  68
  69 #include <dev/usb/usb.h>
  70 #include <dev/usb/usbdi.h>
  71
  72 #define USB_DEBUG_VAR ehcidebug
  73
  74 #include <dev/usb/usb_core.h>
  75 #include <dev/usb/usb_debug.h>
  76 #include <dev/usb/usb_busdma.h>
  77 #include <dev/usb/usb_process.h>
  78 #include <dev/usb/usb_transfer.h>
  79 #include <dev/usb/usb_device.h>
  80 #include <dev/usb/usb_hub.h>
  81 #include <dev/usb/usb_util.h>
  82
  83 #include <dev/usb/usb_controller.h>
  84 #include <dev/usb/usb_bus.h>
  85 #include <dev/usb/controller/ehci.h>
  86 #include <dev/usb/controller/ehcireg.h>
  87
  88 #define EHCI_BUS2SC(bus) \
  89    ((ehci_softc_t *)(((uint8_t *)(bus)) - \
  90     ((uint8_t *)&(((ehci_softc_t *)0)->sc_bus))))
  91
  92 #if USB_DEBUG
  93 static int ehcidebug = 0;
  94 static int ehcinohighspeed = 0;
  95
  96 SYSCTL_NODE(_hw_usb, OID_AUTO, ehci, CTLFLAG_RW, 0, "USB ehci");
  97 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, debug, CTLFLAG_RW,
  98     &ehcidebug, 0, "Debug level");
  99 SYSCTL_INT(_hw_usb_ehci, OID_AUTO, no_hs, CTLFLAG_RW,
 100     &ehcinohighspeed, 0, "Disable High Speed USB");
 101
 102 static void ehci_dump_regs(ehci_softc_t *sc);
 103 static void ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *sqh);
 104
 105 #endif
 106
 107 #define EHCI_INTR_ENDPT 1
 108
 109 extern struct usb_bus_methods ehci_bus_methods;
 110 extern struct usb_pipe_methods ehci_device_bulk_methods;
 111 extern struct usb_pipe_methods ehci_device_ctrl_methods;
 112 extern struct usb_pipe_methods ehci_device_intr_methods;
 113 extern struct usb_pipe_methods ehci_device_isoc_fs_methods;
 114 extern struct usb_pipe_methods ehci_device_isoc_hs_methods;
 115
 116 static void ehci_do_poll(struct usb_bus *bus);
 117 static void ehci_device_done(struct usb_xfer *xfer, usb_error_t error);
 118 static uint8_t ehci_check_transfer(struct usb_xfer *xfer);
 119 static void ehci_timeout(void *arg);
 120 static void ehci_root_intr(ehci_softc_t *sc);
 121
 122 struct ehci_std_temp {
 123         ehci_softc_t *sc;
 124         struct usb_page_cache *pc;
 125         ehci_qtd_t *td;
 126         ehci_qtd_t *td_next;
 127         uint32_t average;
 128         uint32_t qtd_status;
 129         uint32_t len;
 130         uint16_t max_frame_size;
 131         uint8_t shortpkt;
 132         uint8_t auto_data_toggle;
 133         uint8_t setup_alt_next;
 134         uint8_t last_frame;
 135         uint8_t can_use_next;
 136 };
 137
 138 void
 139 ehci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
 140 {
 141         ehci_softc_t *sc = EHCI_BUS2SC(bus);
 142         uint32_t i;
 143
 144         cb(bus, &sc->sc_hw.pframes_pc, &sc->sc_hw.pframes_pg,
 145             sizeof(uint32_t) * EHCI_FRAMELIST_COUNT, EHCI_FRAMELIST_ALIGN);
 146
 147         cb(bus, &sc->sc_hw.async_start_pc, &sc->sc_hw.async_start_pg,
 148             sizeof(ehci_qh_t), EHCI_QH_ALIGN);
 149
 150         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 151                 cb(bus, sc->sc_hw.intr_start_pc + i,
 152                     sc->sc_hw.intr_start_pg + i,
 153                     sizeof(ehci_qh_t), EHCI_QH_ALIGN);
 154         }
 155
 156         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 157                 cb(bus, sc->sc_hw.isoc_hs_start_pc + i,
 158                     sc->sc_hw.isoc_hs_start_pg + i,
 159                     sizeof(ehci_itd_t), EHCI_ITD_ALIGN);
 160         }
 161
 162         for (i = 0; i != EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 163                 cb(bus, sc->sc_hw.isoc_fs_start_pc + i,
 164                     sc->sc_hw.isoc_fs_start_pg + i,
 165                     sizeof(ehci_sitd_t), EHCI_SITD_ALIGN);
 166         }
 167 }
 168
 169 usb_error_t
 170 ehci_reset(ehci_softc_t *sc)
 171 {
 172         uint32_t hcr;
 173         int i;
 174
 175         EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 176         for (i = 0; i < 100; i++) {
 177                 usb_pause_mtx(NULL, hz / 1000);
 178                 hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 179                 if (!hcr) {
 180                         if (sc->sc_flags & (EHCI_SCFLG_SETMODE | EHCI_SCFLG_BIGEMMIO)) {
 181                                 /*
 182                                  * Force USBMODE as requested.  Controllers
 183                                  * may have multiple operating modes.
 184                                  */
 185                                 uint32_t usbmode = EOREAD4(sc, EHCI_USBMODE);
 186                                 if (sc->sc_flags & EHCI_SCFLG_SETMODE) {
 187                                         usbmode = (usbmode &~ EHCI_UM_CM) | EHCI_UM_CM_HOST;
 188                                         device_printf(sc->sc_bus.bdev,
 189                                             "set host controller mode\n");
 190                                 }
 191                                 if (sc->sc_flags & EHCI_SCFLG_BIGEMMIO) {
 192                                         usbmode = (usbmode &~ EHCI_UM_ES) | EHCI_UM_ES_BE;
 193                                         device_printf(sc->sc_bus.bdev,
 194                                             "set big-endian mode\n");
 195                                 }
 196                                 EOWRITE4(sc,  EHCI_USBMODE, usbmode);
 197                         }
 198                         return (0);
 199                 }
 200         }
 201         device_printf(sc->sc_bus.bdev, "reset timeout\n");
 202         return (USB_ERR_IOERROR);
 203 }
 204
 205 static usb_error_t
 206 ehci_hcreset(ehci_softc_t *sc)
 207 {
 208         uint32_t hcr;
 209         int i;
 210
 211         EOWRITE4(sc, EHCI_USBCMD, 0);   /* Halt controller */
 212         for (i = 0; i < 100; i++) {
 213                 usb_pause_mtx(NULL, hz / 1000);
 214                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 215                 if (hcr)
 216                         break;
 217         }
 218         if (!hcr)
 219                 /*
 220                  * Fall through and try reset anyway even though
 221                  * Table 2-9 in the EHCI spec says this will result
 222                  * in undefined behavior.
 223                  */
 224                 device_printf(sc->sc_bus.bdev, "stop timeout\n");
 225
 226         return ehci_reset(sc);
 227 }
 228
 229 usb_error_t
 230 ehci_init(ehci_softc_t *sc)
 231 {
 232         struct usb_page_search buf_res;
 233         uint32_t version;
 234         uint32_t sparams;
 235         uint32_t cparams;
 236         uint32_t hcr;
 237         uint16_t i;
 238         uint16_t x;
 239         uint16_t y;
 240         uint16_t bit;
 241         usb_error_t err = 0;
 242
 243         DPRINTF("start\n");
 244
 245         usb_callout_init_mtx(&sc->sc_tmo_pcd, &sc->sc_bus.bus_mtx, 0);
 246
 247 #if USB_DEBUG
 248         if (ehcidebug > 2) {
 249                 ehci_dump_regs(sc);
 250         }
 251 #endif
 252
 253         sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 254
 255         version = EREAD2(sc, EHCI_HCIVERSION);
 256         device_printf(sc->sc_bus.bdev, "EHCI version %x.%x\n",
 257             version >> 8, version & 0xff);
 258
 259         sparams = EREAD4(sc, EHCI_HCSPARAMS);
 260         DPRINTF("sparams=0x%x\n", sparams);
 261
 262         sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 263         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 264         DPRINTF("cparams=0x%x\n", cparams);
 265
 266         if (EHCI_HCC_64BIT(cparams)) {
 267                 DPRINTF("HCC uses 64-bit structures\n");
 268
 269                 /* MUST clear segment register if 64 bit capable */
 270                 EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 271         }
 272         sc->sc_bus.usbrev = USB_REV_2_0;
 273
 274         /* Reset the controller */
 275         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
 276
 277         err = ehci_hcreset(sc);
 278         if (err) {
 279                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
 280                 return (err);
 281         }
 282         /*
 283          * use current frame-list-size selection 0: 1024*4 bytes 1:  512*4
 284          * bytes 2:  256*4 bytes 3:      unknown
 285          */
 286         if (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD)) == 3) {
 287                 device_printf(sc->sc_bus.bdev, "invalid frame-list-size\n");
 288                 return (USB_ERR_IOERROR);
 289         }
 290         /* set up the bus struct */
 291         sc->sc_bus.methods = &ehci_bus_methods;
 292
 293         sc->sc_eintrs = EHCI_NORMAL_INTRS;
 294
 295         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 296                 ehci_qh_t *qh;
 297
 298                 usbd_get_page(sc->sc_hw.intr_start_pc + i, 0, &buf_res);
 299
 300                 qh = buf_res.buffer;
 301
 302                 /* initialize page cache pointer */
 303
 304                 qh->page_cache = sc->sc_hw.intr_start_pc + i;
 305
 306                 /* store a pointer to queue head */
 307
 308                 sc->sc_intr_p_last[i] = qh;
 309
 310                 qh->qh_self =
 311                     htohc32(sc, buf_res.physaddr) |
 312                     htohc32(sc, EHCI_LINK_QH);
 313
 314                 qh->qh_endp =
 315                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 316                 qh->qh_endphub =
 317                     htohc32(sc, EHCI_QH_SET_MULT(1));
 318                 qh->qh_curqtd = 0;
 319
 320                 qh->qh_qtd.qtd_next =
 321                     htohc32(sc, EHCI_LINK_TERMINATE);
 322                 qh->qh_qtd.qtd_altnext =
 323                     htohc32(sc, EHCI_LINK_TERMINATE);
 324                 qh->qh_qtd.qtd_status =
 325                     htohc32(sc, EHCI_QTD_HALTED);
 326         }
 327
 328         /*
 329          * the QHs are arranged to give poll intervals that are
 330          * powers of 2 times 1ms
 331          */
 332         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
 333         while (bit) {
 334                 x = bit;
 335                 while (x & bit) {
 336                         ehci_qh_t *qh_x;
 337                         ehci_qh_t *qh_y;
 338
 339                         y = (x ^ bit) | (bit / 2);
 340
 341                         qh_x = sc->sc_intr_p_last[x];
 342                         qh_y = sc->sc_intr_p_last[y];
 343
 344                         /*
 345                          * the next QH has half the poll interval
 346                          */
 347                         qh_x->qh_link = qh_y->qh_self;
 348
 349                         x++;
 350                 }
 351                 bit >>= 1;
 352         }
 353
 354         if (1) {
 355                 ehci_qh_t *qh;
 356
 357                 qh = sc->sc_intr_p_last[0];
 358
 359                 /* the last (1ms) QH terminates */
 360                 qh->qh_link = htohc32(sc, EHCI_LINK_TERMINATE);
 361         }
 362         for (i = 0; i < EHCI_VIRTUAL_FRAMELIST_COUNT; i++) {
 363                 ehci_sitd_t *sitd;
 364                 ehci_itd_t *itd;
 365
 366                 usbd_get_page(sc->sc_hw.isoc_fs_start_pc + i, 0, &buf_res);
 367
 368                 sitd = buf_res.buffer;
 369
 370                 /* initialize page cache pointer */
 371
 372                 sitd->page_cache = sc->sc_hw.isoc_fs_start_pc + i;
 373
 374                 /* store a pointer to the transfer descriptor */
 375
 376                 sc->sc_isoc_fs_p_last[i] = sitd;
 377
 378                 /* initialize full speed isochronous */
 379
 380                 sitd->sitd_self =
 381                     htohc32(sc, buf_res.physaddr) |
 382                     htohc32(sc, EHCI_LINK_SITD);
 383
 384                 sitd->sitd_back =
 385                     htohc32(sc, EHCI_LINK_TERMINATE);
 386
 387                 sitd->sitd_next =
 388                     sc->sc_intr_p_last[i | (EHCI_VIRTUAL_FRAMELIST_COUNT / 2)]->qh_self;
 389
 390
 391                 usbd_get_page(sc->sc_hw.isoc_hs_start_pc + i, 0, &buf_res);
 392
 393                 itd = buf_res.buffer;
 394
 395                 /* initialize page cache pointer */
 396
 397                 itd->page_cache = sc->sc_hw.isoc_hs_start_pc + i;
 398
 399                 /* store a pointer to the transfer descriptor */
 400
 401                 sc->sc_isoc_hs_p_last[i] = itd;
 402
 403                 /* initialize high speed isochronous */
 404
 405                 itd->itd_self =
 406                     htohc32(sc, buf_res.physaddr) |
 407                     htohc32(sc, EHCI_LINK_ITD);
 408
 409                 itd->itd_next =
 410                     sitd->sitd_self;
 411         }
 412
 413         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
 414
 415         if (1) {
 416                 uint32_t *pframes;
 417
 418                 pframes = buf_res.buffer;
 419
 420                 /*
 421                  * execution order:
 422                  * pframes -> high speed isochronous ->
 423                  *    full speed isochronous -> interrupt QH's
 424                  */
 425                 for (i = 0; i < EHCI_FRAMELIST_COUNT; i++) {
 426                         pframes[i] = sc->sc_isoc_hs_p_last
 427                             [i & (EHCI_VIRTUAL_FRAMELIST_COUNT - 1)]->itd_self;
 428                 }
 429         }
 430         /* setup sync list pointer */
 431         EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
 432
 433         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
 434
 435         if (1) {
 436
 437                 ehci_qh_t *qh;
 438
 439                 qh = buf_res.buffer;
 440
 441                 /* initialize page cache pointer */
 442
 443                 qh->page_cache = &sc->sc_hw.async_start_pc;
 444
 445                 /* store a pointer to the queue head */
 446
 447                 sc->sc_async_p_last = qh;
 448
 449                 /* init dummy QH that starts the async list */
 450
 451                 qh->qh_self =
 452                     htohc32(sc, buf_res.physaddr) |
 453                     htohc32(sc, EHCI_LINK_QH);
 454
 455                 /* fill the QH */
 456                 qh->qh_endp =
 457                     htohc32(sc, EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 458                 qh->qh_endphub = htohc32(sc, EHCI_QH_SET_MULT(1));
 459                 qh->qh_link = qh->qh_self;
 460                 qh->qh_curqtd = 0;
 461
 462                 /* fill the overlay qTD */
 463                 qh->qh_qtd.qtd_next = htohc32(sc, EHCI_LINK_TERMINATE);
 464                 qh->qh_qtd.qtd_altnext = htohc32(sc, EHCI_LINK_TERMINATE);
 465                 qh->qh_qtd.qtd_status = htohc32(sc, EHCI_QTD_HALTED);
 466         }
 467         /* flush all cache into memory */
 468
 469         usb_bus_mem_flush_all(&sc->sc_bus, &ehci_iterate_hw_softc);
 470
 471 #if USB_DEBUG
 472         if (ehcidebug) {
 473                 ehci_dump_sqh(sc, sc->sc_async_p_last);
 474         }
 475 #endif
 476
 477         /* setup async list pointer */
 478         EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
 479
 480
 481         /* enable interrupts */
 482         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 483
 484         /* turn on controller */
 485         EOWRITE4(sc, EHCI_USBCMD,
 486             EHCI_CMD_ITC_1 |            /* 1 microframes interrupt delay */
 487             (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 488             EHCI_CMD_ASE |
 489             EHCI_CMD_PSE |
 490             EHCI_CMD_RS);
 491
 492         /* Take over port ownership */
 493         EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 494
 495         for (i = 0; i < 100; i++) {
 496                 usb_pause_mtx(NULL, hz / 1000);
 497                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 498                 if (!hcr) {
 499                         break;
 500                 }
 501         }
 502         if (hcr) {
 503                 device_printf(sc->sc_bus.bdev, "run timeout\n");
 504                 return (USB_ERR_IOERROR);
 505         }
 506
 507         if (!err) {
 508                 /* catch any lost interrupts */
 509                 ehci_do_poll(&sc->sc_bus);
 510         }
 511         return (err);
 512 }
 513
 514 /*
 515  * shut down the controller when the system is going down
 516  */
 517 void
 518 ehci_detach(ehci_softc_t *sc)
 519 {
 520         USB_BUS_LOCK(&sc->sc_bus);
 521
 522         usb_callout_stop(&sc->sc_tmo_pcd);
 523
 524         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 525         USB_BUS_UNLOCK(&sc->sc_bus);
 526
 527         if (ehci_hcreset(sc)) {
 528                 DPRINTF("reset failed!\n");
 529         }
 530
 531         /* XXX let stray task complete */
 532         usb_pause_mtx(NULL, hz / 20);
 533
 534         usb_callout_drain(&sc->sc_tmo_pcd);
 535 }
 536
 537 void
 538 ehci_suspend(ehci_softc_t *sc)
 539 {
 540         uint32_t cmd;
 541         uint32_t hcr;
 542         uint8_t i;
 543
 544         USB_BUS_LOCK(&sc->sc_bus);
 545
 546         for (i = 1; i <= sc->sc_noport; i++) {
 547                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
 548                 if (((cmd & EHCI_PS_PO) == 0) &&
 549                     ((cmd & EHCI_PS_PE) == EHCI_PS_PE)) {
 550                         EOWRITE4(sc, EHCI_PORTSC(i),
 551                             cmd | EHCI_PS_SUSP);
 552                 }
 553         }
 554
 555         sc->sc_cmd = EOREAD4(sc, EHCI_USBCMD);
 556
 557         cmd = sc->sc_cmd & ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
 558         EOWRITE4(sc, EHCI_USBCMD, cmd);
 559
 560         for (i = 0; i < 100; i++) {
 561                 hcr = EOREAD4(sc, EHCI_USBSTS) &
 562                     (EHCI_STS_ASS | EHCI_STS_PSS);
 563
 564                 if (hcr == 0) {
 565                         break;
 566                 }
 567                 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
 568         }
 569
 570         if (hcr != 0) {
 571                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
 572         }
 573         cmd &= ~EHCI_CMD_RS;
 574         EOWRITE4(sc, EHCI_USBCMD, cmd);
 575
 576         for (i = 0; i < 100; i++) {
 577                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 578                 if (hcr == EHCI_STS_HCH) {
 579                         break;
 580                 }
 581                 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
 582         }
 583
 584         if (hcr != EHCI_STS_HCH) {
 585                 device_printf(sc->sc_bus.bdev,
 586                     "config timeout\n");
 587         }
 588         USB_BUS_UNLOCK(&sc->sc_bus);
 589 }
 590
 591 void
 592 ehci_resume(ehci_softc_t *sc)
 593 {
 594         struct usb_page_search buf_res;
 595         uint32_t cmd;
 596         uint32_t hcr;
 597         uint8_t i;
 598
 599         USB_BUS_LOCK(&sc->sc_bus);
 600
 601         /* restore things in case the bios doesn't */
 602         EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
 603
 604         usbd_get_page(&sc->sc_hw.pframes_pc, 0, &buf_res);
 605         EOWRITE4(sc, EHCI_PERIODICLISTBASE, buf_res.physaddr);
 606
 607         usbd_get_page(&sc->sc_hw.async_start_pc, 0, &buf_res);
 608         EOWRITE4(sc, EHCI_ASYNCLISTADDR, buf_res.physaddr | EHCI_LINK_QH);
 609
 610         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 611
 612         hcr = 0;
 613         for (i = 1; i <= sc->sc_noport; i++) {
 614                 cmd = EOREAD4(sc, EHCI_PORTSC(i));
 615                 if (((cmd & EHCI_PS_PO) == 0) &&
 616                     ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
 617                         EOWRITE4(sc, EHCI_PORTSC(i),
 618                             cmd | EHCI_PS_FPR);
 619                         hcr = 1;
 620                 }
 621         }
 622
 623         if (hcr) {
 624                 usb_pause_mtx(&sc->sc_bus.bus_mtx,
 625                     USB_MS_TO_TICKS(USB_RESUME_WAIT));
 626
 627                 for (i = 1; i <= sc->sc_noport; i++) {
 628                         cmd = EOREAD4(sc, EHCI_PORTSC(i));
 629                         if (((cmd & EHCI_PS_PO) == 0) &&
 630                             ((cmd & EHCI_PS_SUSP) == EHCI_PS_SUSP)) {
 631                                 EOWRITE4(sc, EHCI_PORTSC(i),
 632                                     cmd & ~EHCI_PS_FPR);
 633                         }
 634                 }
 635         }
 636         EOWRITE4(sc, EHCI_USBCMD, sc->sc_cmd);
 637
 638         for (i = 0; i < 100; i++) {
 639                 hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 640                 if (hcr != EHCI_STS_HCH) {
 641                         break;
 642                 }
 643                 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 1000);
 644         }
 645         if (hcr == EHCI_STS_HCH) {
 646                 device_printf(sc->sc_bus.bdev, "config timeout\n");
 647         }
 648
 649         USB_BUS_UNLOCK(&sc->sc_bus);
 650
 651         usb_pause_mtx(NULL,
 652             USB_MS_TO_TICKS(USB_RESUME_WAIT));
 653
 654         /* catch any lost interrupts */
 655         ehci_do_poll(&sc->sc_bus);
 656 }
 657
 658 void
 659 ehci_shutdown(ehci_softc_t *sc)
 660 {
 661         DPRINTF("stopping the HC\n");
 662
 663         if (ehci_hcreset(sc)) {
 664                 DPRINTF("reset failed!\n");
 665         }
 666 }
 667
 668 #if USB_DEBUG
 669 static void
 670 ehci_dump_regs(ehci_softc_t *sc)
 671 {
 672         uint32_t i;
 673
 674         i = EOREAD4(sc, EHCI_USBCMD);
 675         printf("cmd=0x%08x\n", i);
 676
 677         if (i & EHCI_CMD_ITC_1)
 678                 printf(" EHCI_CMD_ITC_1\n");
 679         if (i & EHCI_CMD_ITC_2)
 680                 printf(" EHCI_CMD_ITC_2\n");
 681         if (i & EHCI_CMD_ITC_4)
 682                 printf(" EHCI_CMD_ITC_4\n");
 683         if (i & EHCI_CMD_ITC_8)
 684                 printf(" EHCI_CMD_ITC_8\n");
 685         if (i & EHCI_CMD_ITC_16)
 686                 printf(" EHCI_CMD_ITC_16\n");
 687         if (i & EHCI_CMD_ITC_32)
 688                 printf(" EHCI_CMD_ITC_32\n");
 689         if (i & EHCI_CMD_ITC_64)
 690                 printf(" EHCI_CMD_ITC_64\n");
 691         if (i & EHCI_CMD_ASPME)
 692                 printf(" EHCI_CMD_ASPME\n");
 693         if (i & EHCI_CMD_ASPMC)
 694                 printf(" EHCI_CMD_ASPMC\n");
 695         if (i & EHCI_CMD_LHCR)
 696                 printf(" EHCI_CMD_LHCR\n");
 697         if (i & EHCI_CMD_IAAD)
 698                 printf(" EHCI_CMD_IAAD\n");
 699         if (i & EHCI_CMD_ASE)
 700                 printf(" EHCI_CMD_ASE\n");
 701         if (i & EHCI_CMD_PSE)
 702                 printf(" EHCI_CMD_PSE\n");
 703         if (i & EHCI_CMD_FLS_M)
 704                 printf(" EHCI_CMD_FLS_M\n");
 705         if (i & EHCI_CMD_HCRESET)
 706                 printf(" EHCI_CMD_HCRESET\n");
 707         if (i & EHCI_CMD_RS)
 708                 printf(" EHCI_CMD_RS\n");
 709
 710         i = EOREAD4(sc, EHCI_USBSTS);
 711
 712         printf("sts=0x%08x\n", i);
 713
 714         if (i & EHCI_STS_ASS)
 715                 printf(" EHCI_STS_ASS\n");
 716         if (i & EHCI_STS_PSS)
 717                 printf(" EHCI_STS_PSS\n");
 718         if (i & EHCI_STS_REC)
 719                 printf(" EHCI_STS_REC\n");
 720         if (i & EHCI_STS_HCH)
 721                 printf(" EHCI_STS_HCH\n");
 722         if (i & EHCI_STS_IAA)
 723                 printf(" EHCI_STS_IAA\n");
 724         if (i & EHCI_STS_HSE)
 725                 printf(" EHCI_STS_HSE\n");
 726         if (i & EHCI_STS_FLR)
 727                 printf(" EHCI_STS_FLR\n");
 728         if (i & EHCI_STS_PCD)
 729                 printf(" EHCI_STS_PCD\n");
 730         if (i & EHCI_STS_ERRINT)
 731                 printf(" EHCI_STS_ERRINT\n");
 732         if (i & EHCI_STS_INT)
 733                 printf(" EHCI_STS_INT\n");
 734
 735         printf("ien=0x%08x\n",
 736             EOREAD4(sc, EHCI_USBINTR));
 737         printf("frindex=0x%08x ctrdsegm=0x%08x periodic=0x%08x async=0x%08x\n",
 738             EOREAD4(sc, EHCI_FRINDEX),
 739             EOREAD4(sc, EHCI_CTRLDSSEGMENT),
 740             EOREAD4(sc, EHCI_PERIODICLISTBASE),
 741             EOREAD4(sc, EHCI_ASYNCLISTADDR));
 742         for (i = 1; i <= sc->sc_noport; i++) {
 743                 printf("port %d status=0x%08x\n", i,
 744                     EOREAD4(sc, EHCI_PORTSC(i)));
 745         }
 746 }
 747
 748 static void
 749 ehci_dump_link(ehci_softc_t *sc, uint32_t link, int type)
 750 {
 751         link = hc32toh(sc, link);
 752         printf("0x%08x", link);
 753         if (link & EHCI_LINK_TERMINATE)
 754                 printf("<T>");
 755         else {
 756                 printf("<");
 757                 if (type) {
 758                         switch (EHCI_LINK_TYPE(link)) {
 759                         case EHCI_LINK_ITD:
 760                                 printf("ITD");
 761                                 break;
 762                         case EHCI_LINK_QH:
 763                                 printf("QH");
 764                                 break;
 765                         case EHCI_LINK_SITD:
 766                                 printf("SITD");
 767                                 break;
 768                         case EHCI_LINK_FSTN:
 769                                 printf("FSTN");
 770                                 break;
 771                         }
 772                 }
 773                 printf(">");
 774         }
 775 }
 776
 777 static void
 778 ehci_dump_qtd(ehci_softc_t *sc, ehci_qtd_t *qtd)
 779 {
 780         uint32_t s;
 781
 782         printf("  next=");
 783         ehci_dump_link(sc, qtd->qtd_next, 0);
 784         printf(" altnext=");
 785         ehci_dump_link(sc, qtd->qtd_altnext, 0);
 786         printf("\n");
 787         s = hc32toh(sc, qtd->qtd_status);
 788         printf("  status=0x%08x: toggle=%d bytes=0x%x ioc=%d c_page=0x%x\n",
 789             s, EHCI_QTD_GET_TOGGLE(s), EHCI_QTD_GET_BYTES(s),
 790             EHCI_QTD_GET_IOC(s), EHCI_QTD_GET_C_PAGE(s));
 791         printf("    cerr=%d pid=%d stat=%s%s%s%s%s%s%s%s\n",
 792             EHCI_QTD_GET_CERR(s), EHCI_QTD_GET_PID(s),
 793             (s & EHCI_QTD_ACTIVE) ? "ACTIVE" : "NOT_ACTIVE",
 794             (s & EHCI_QTD_HALTED) ? "-HALTED" : "",
 795             (s & EHCI_QTD_BUFERR) ? "-BUFERR" : "",
 796             (s & EHCI_QTD_BABBLE) ? "-BABBLE" : "",
 797             (s & EHCI_QTD_XACTERR) ? "-XACTERR" : "",
 798             (s & EHCI_QTD_MISSEDMICRO) ? "-MISSED" : "",
 799             (s & EHCI_QTD_SPLITXSTATE) ? "-SPLIT" : "",
 800             (s & EHCI_QTD_PINGSTATE) ? "-PING" : "");
 801
 802         for (s = 0; s < 5; s++) {
 803                 printf("  buffer[%d]=0x%08x\n", s,
 804                     hc32toh(sc, qtd->qtd_buffer[s]));
 805         }
 806         for (s = 0; s < 5; s++) {
 807                 printf("  buffer_hi[%d]=0x%08x\n", s,
 808                     hc32toh(sc, qtd->qtd_buffer_hi[s]));
 809         }
 810 }
 811
 812 static uint8_t
 813 ehci_dump_sqtd(ehci_softc_t *sc, ehci_qtd_t *sqtd)
 814 {
 815         uint8_t temp;
 816
 817         usb_pc_cpu_invalidate(sqtd->page_cache);
 818         printf("QTD(%p) at 0x%08x:\n", sqtd, hc32toh(sc, sqtd->qtd_self));
 819         ehci_dump_qtd(sc, sqtd);
 820         temp = (sqtd->qtd_next & htohc32(sc, EHCI_LINK_TERMINATE)) ? 1 : 0;
 821         return (temp);
 822 }
 823
 824 static void
 825 ehci_dump_sqtds(ehci_softc_t *sc, ehci_qtd_t *sqtd)
 826 {
 827         uint16_t i;
 828         uint8_t stop;
 829
 830         stop = 0;
 831         for (i = 0; sqtd && (i < 20) && !stop; sqtd = sqtd->obj_next, i++) {
 832                 stop = ehci_dump_sqtd(sc, sqtd);
 833         }
 834         if (sqtd) {
 835                 printf("dump aborted, too many TDs\n");
 836         }
 837 }
 838
 839 static void
 840 ehci_dump_sqh(ehci_softc_t *sc, ehci_qh_t *qh)
 841 {
 842         uint32_t endp;
 843         uint32_t endphub;
 844
 845         usb_pc_cpu_invalidate(qh->page_cache);
 846         printf("QH(%p) at 0x%08x:\n", qh, hc32toh(sc, qh->qh_self) & ~0x1F);
 847         printf("  link=");
 848         ehci_dump_link(sc, qh->qh_link, 1);
 849         printf("\n");
 850         endp = hc32toh(sc, qh->qh_endp);
 851         printf("  endp=0x%08x\n", endp);
 852         printf("    addr=0x%02x inact=%d endpt=%d eps=%d dtc=%d hrecl=%d\n",
 853             EHCI_QH_GET_ADDR(endp), EHCI_QH_GET_INACT(endp),
 854             EHCI_QH_GET_ENDPT(endp), EHCI_QH_GET_EPS(endp),
 855             EHCI_QH_GET_DTC(endp), EHCI_QH_GET_HRECL(endp));
 856         printf("    mpl=0x%x ctl=%d nrl=%d\n",
 857             EHCI_QH_GET_MPL(endp), EHCI_QH_GET_CTL(endp),
 858             EHCI_QH_GET_NRL(endp));
 859         endphub = hc32toh(sc, qh->qh_endphub);
 860         printf("  endphub=0x%08x\n", endphub);
 861         printf("    smask=0x%02x cmask=0x%02x huba=0x%02x port=%d mult=%d\n",
 862             EHCI_QH_GET_SMASK(endphub), EHCI_QH_GET_CMASK(endphub),
 863             EHCI_QH_GET_HUBA(endphub), EHCI_QH_GET_PORT(endphub),
 864             EHCI_QH_GET_MULT(endphub));
 865         printf("  curqtd=");
 866         ehci_dump_link(sc, qh->qh_curqtd, 0);
 867         printf("\n");
 868         printf("Overlay qTD:\n");
 869         ehci_dump_qtd(sc, (void *)&qh->qh_qtd);
 870 }
 871
 872 static void
 873 ehci_dump_sitd(ehci_softc_t *sc, ehci_sitd_t *sitd)
 874 {
 875         usb_pc_cpu_invalidate(sitd->page_cache);
 876         printf("SITD(%p) at 0x%08x\n", sitd, hc32toh(sc, sitd->sitd_self) & ~0x1F);
 877         printf(" next=0x%08x\n", hc32toh(sc, sitd->sitd_next));
 878         printf(" portaddr=0x%08x dir=%s addr=%d endpt=0x%x port=0x%x huba=0x%x\n",
 879             hc32toh(sc, sitd->sitd_portaddr),
 880             (sitd->sitd_portaddr & htohc32(sc, EHCI_SITD_SET_DIR_IN))
 881             ? "in" : "out",
 882             EHCI_SITD_GET_ADDR(hc32toh(sc, sitd->sitd_portaddr)),
 883             EHCI_SITD_GET_ENDPT(hc32toh(sc, sitd->sitd_portaddr)),
 884             EHCI_SITD_GET_PORT(hc32toh(sc, sitd->sitd_portaddr)),
 885             EHCI_SITD_GET_HUBA(hc32toh(sc, sitd->sitd_portaddr)));
 886         printf(" mask=0x%08x\n", hc32toh(sc, sitd->sitd_mask));
 887         printf(" status=0x%08x <%s> len=0x%x\n", hc32toh(sc, sitd->sitd_status),
 888             (sitd->sitd_status & htohc32(sc, EHCI_SITD_ACTIVE)) ? "ACTIVE" : "",
 889             EHCI_SITD_GET_LEN(hc32toh(sc, sitd->sitd_status)));
 890         printf(" back=0x%08x, bp=0x%08x,0x%08x,0x%08x,0x%08x\n",
 891             hc32toh(sc, sitd->sitd_back),
 892             hc32toh(sc, sitd->sitd_bp[0]),
 893             hc32toh(sc, sitd->sitd_bp[1]),
 894             hc32toh(sc, sitd->sitd_bp_hi[0]),
 895             hc32toh(sc, sitd->sitd_bp_hi[1]));
 896 }
 897
 898 static void
 899 ehci_dump_itd(ehci_softc_t *sc, ehci_itd_t *itd)
 900 {
 901         usb_pc_cpu_invalidate(itd->page_cache);
 902         printf("ITD(%p) at 0x%08x\n", itd, hc32toh(sc, itd->itd_self) & ~0x1F);
 903         printf(" next=0x%08x\n", hc32toh(sc, itd->itd_next));
 904         printf(" status[0]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[0]),
 905             (itd->itd_status[0] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 906         printf(" status[1]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[1]),
 907             (itd->itd_status[1] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 908         printf(" status[2]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[2]),
 909             (itd->itd_status[2] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 910         printf(" status[3]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[3]),
 911             (itd->itd_status[3] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 912         printf(" status[4]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[4]),
 913             (itd->itd_status[4] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 914         printf(" status[5]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[5]),
 915             (itd->itd_status[5] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 916         printf(" status[6]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[6]),
 917             (itd->itd_status[6] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 918         printf(" status[7]=0x%08x; <%s>\n", hc32toh(sc, itd->itd_status[7]),
 919             (itd->itd_status[7] & htohc32(sc, EHCI_ITD_ACTIVE)) ? "ACTIVE" : "");
 920         printf(" bp[0]=0x%08x\n", hc32toh(sc, itd->itd_bp[0]));
 921         printf("  addr=0x%02x; endpt=0x%01x\n",
 922             EHCI_ITD_GET_ADDR(hc32toh(sc, itd->itd_bp[0])),
 923             EHCI_ITD_GET_ENDPT(hc32toh(sc, itd->itd_bp[0])));
 924         printf(" bp[1]=0x%08x\n", hc32toh(sc, itd->itd_bp[1]));
 925         printf(" dir=%s; mpl=0x%02x\n",
 926             (hc32toh(sc, itd->itd_bp[1]) & EHCI_ITD_SET_DIR_IN) ? "in" : "out",
 927             EHCI_ITD_GET_MPL(hc32toh(sc, itd->itd_bp[1])));
 928         printf(" bp[2..6]=0x%08x,0x%08x,0x%08x,0x%08x,0x%08x\n",
 929             hc32toh(sc, itd->itd_bp[2]),
 930             hc32toh(sc, itd->itd_bp[3]),
 931             hc32toh(sc, itd->itd_bp[4]),
 932             hc32toh(sc, itd->itd_bp[5]),
 933             hc32toh(sc, itd->itd_bp[6]));
 934         printf(" bp_hi=0x%08x,0x%08x,0x%08x,0x%08x,\n"
 935             "       0x%08x,0x%08x,0x%08x\n",
 936             hc32toh(sc, itd->itd_bp_hi[0]),
 937             hc32toh(sc, itd->itd_bp_hi[1]),
 938             hc32toh(sc, itd->itd_bp_hi[2]),
 939             hc32toh(sc, itd->itd_bp_hi[3]),
 940             hc32toh(sc, itd->itd_bp_hi[4]),
 941             hc32toh(sc, itd->itd_bp_hi[5]),
 942             hc32toh(sc, itd->itd_bp_hi[6]));
 943 }
 944
 945 static void
 946 ehci_dump_isoc(ehci_softc_t *sc)
 947 {
 948         ehci_itd_t *itd;
 949         ehci_sitd_t *sitd;
 950         uint16_t max = 1000;
 951         uint16_t pos;
 952
 953         pos = (EOREAD4(sc, EHCI_FRINDEX) / 8) &
 954             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
 955
 956         printf("%s: isochronous dump from frame 0x%03x:\n",
 957             __FUNCTION__, pos);
 958
 959         itd = sc->sc_isoc_hs_p_last[pos];
 960         sitd = sc->sc_isoc_fs_p_last[pos];
 961
 962         while (itd && max && max--) {
 963                 ehci_dump_itd(sc, itd);
 964                 itd = itd->prev;
 965         }
 966
 967         while (sitd && max && max--) {
 968                 ehci_dump_sitd(sc, sitd);
 969                 sitd = sitd->prev;
 970         }
 971 }
 972
 973 #endif
 974
 975 static void
 976 ehci_transfer_intr_enqueue(struct usb_xfer *xfer)
 977 {
 978         /* check for early completion */
 979         if (ehci_check_transfer(xfer)) {
 980                 return;
 981         }
 982         /* put transfer on interrupt queue */
 983         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
 984
 985         /* start timeout, if any */
 986         if (xfer->timeout != 0) {
 987                 usbd_transfer_timeout_ms(xfer, &ehci_timeout, xfer->timeout);
 988         }
 989 }
 990
 991 #define EHCI_APPEND_FS_TD(std,last) (last) = _ehci_append_fs_td(std,last)
 992 static ehci_sitd_t *
 993 _ehci_append_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
 994 {
 995         DPRINTFN(11, "%p to %p\n", std, last);
 996
 997         /* (sc->sc_bus.mtx) must be locked */
 998
 999         std->next = last->next;
1000         std->sitd_next = last->sitd_next;
1001
1002         std->prev = last;
1003
1004         usb_pc_cpu_flush(std->page_cache);
1005
1006         /*
1007          * the last->next->prev is never followed: std->next->prev = std;
1008          */
1009         last->next = std;
1010         last->sitd_next = std->sitd_self;
1011
1012         usb_pc_cpu_flush(last->page_cache);
1013
1014         return (std);
1015 }
1016
1017 #define EHCI_APPEND_HS_TD(std,last) (last) = _ehci_append_hs_td(std,last)
1018 static ehci_itd_t *
1019 _ehci_append_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1020 {
1021         DPRINTFN(11, "%p to %p\n", std, last);
1022
1023         /* (sc->sc_bus.mtx) must be locked */
1024
1025         std->next = last->next;
1026         std->itd_next = last->itd_next;
1027
1028         std->prev = last;
1029
1030         usb_pc_cpu_flush(std->page_cache);
1031
1032         /*
1033          * the last->next->prev is never followed: std->next->prev = std;
1034          */
1035         last->next = std;
1036         last->itd_next = std->itd_self;
1037
1038         usb_pc_cpu_flush(last->page_cache);
1039
1040         return (std);
1041 }
1042
1043 #define EHCI_APPEND_QH(sqh,last) (last) = _ehci_append_qh(sqh,last)
1044 static ehci_qh_t *
1045 _ehci_append_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1046 {
1047         DPRINTFN(11, "%p to %p\n", sqh, last);
1048
1049         if (sqh->prev != NULL) {
1050                 /* should not happen */
1051                 DPRINTFN(0, "QH already linked!\n");
1052                 return (last);
1053         }
1054         /* (sc->sc_bus.mtx) must be locked */
1055
1056         sqh->next = last->next;
1057         sqh->qh_link = last->qh_link;
1058
1059         sqh->prev = last;
1060
1061         usb_pc_cpu_flush(sqh->page_cache);
1062
1063         /*
1064          * the last->next->prev is never followed: sqh->next->prev = sqh;
1065          */
1066
1067         last->next = sqh;
1068         last->qh_link = sqh->qh_self;
1069
1070         usb_pc_cpu_flush(last->page_cache);
1071
1072         return (sqh);
1073 }
1074
1075 #define EHCI_REMOVE_FS_TD(std,last) (last) = _ehci_remove_fs_td(std,last)
1076 static ehci_sitd_t *
1077 _ehci_remove_fs_td(ehci_sitd_t *std, ehci_sitd_t *last)
1078 {
1079         DPRINTFN(11, "%p from %p\n", std, last);
1080
1081         /* (sc->sc_bus.mtx) must be locked */
1082
1083         std->prev->next = std->next;
1084         std->prev->sitd_next = std->sitd_next;
1085
1086         usb_pc_cpu_flush(std->prev->page_cache);
1087
1088         if (std->next) {
1089                 std->next->prev = std->prev;
1090                 usb_pc_cpu_flush(std->next->page_cache);
1091         }
1092         return ((last == std) ? std->prev : last);
1093 }
1094
1095 #define EHCI_REMOVE_HS_TD(std,last) (last) = _ehci_remove_hs_td(std,last)
1096 static ehci_itd_t *
1097 _ehci_remove_hs_td(ehci_itd_t *std, ehci_itd_t *last)
1098 {
1099         DPRINTFN(11, "%p from %p\n", std, last);
1100
1101         /* (sc->sc_bus.mtx) must be locked */
1102
1103         std->prev->next = std->next;
1104         std->prev->itd_next = std->itd_next;
1105
1106         usb_pc_cpu_flush(std->prev->page_cache);
1107
1108         if (std->next) {
1109                 std->next->prev = std->prev;
1110                 usb_pc_cpu_flush(std->next->page_cache);
1111         }
1112         return ((last == std) ? std->prev : last);
1113 }
1114
1115 #define EHCI_REMOVE_QH(sqh,last) (last) = _ehci_remove_qh(sqh,last)
1116 static ehci_qh_t *
1117 _ehci_remove_qh(ehci_qh_t *sqh, ehci_qh_t *last)
1118 {
1119         DPRINTFN(11, "%p from %p\n", sqh, last);
1120
1121         /* (sc->sc_bus.mtx) must be locked */
1122
1123         /* only remove if not removed from a queue */
1124         if (sqh->prev) {
1125
1126                 sqh->prev->next = sqh->next;
1127                 sqh->prev->qh_link = sqh->qh_link;
1128
1129                 usb_pc_cpu_flush(sqh->prev->page_cache);
1130
1131                 if (sqh->next) {
1132                         sqh->next->prev = sqh->prev;
1133                         usb_pc_cpu_flush(sqh->next->page_cache);
1134                 }
1135                 last = ((last == sqh) ? sqh->prev : last);
1136
1137                 sqh->prev = 0;
1138
1139                 usb_pc_cpu_flush(sqh->page_cache);
1140         }
1141         return (last);
1142 }
1143
1144 static usb_error_t
1145 ehci_non_isoc_done_sub(struct usb_xfer *xfer)
1146 {
1147         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1148         ehci_qtd_t *td;
1149         ehci_qtd_t *td_alt_next;
1150         uint32_t status;
1151         uint16_t len;
1152
1153         td = xfer->td_transfer_cache;
1154         td_alt_next = td->alt_next;
1155
1156         if (xfer->aframes != xfer->nframes) {
1157                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
1158         }
1159         while (1) {
1160
1161                 usb_pc_cpu_invalidate(td->page_cache);
1162                 status = hc32toh(sc, td->qtd_status);
1163
1164                 len = EHCI_QTD_GET_BYTES(status);
1165
1166                 /*
1167                  * Verify the status length and
1168                  * add the length to "frlengths[]":
1169                  */
1170                 if (len > td->len) {
1171                         /* should not happen */
1172                         DPRINTF("Invalid status length, "
1173                             "0x%04x/0x%04x bytes\n", len, td->len);
1174                         status |= EHCI_QTD_HALTED;
1175                 } else if (xfer->aframes != xfer->nframes) {
1176                         xfer->frlengths[xfer->aframes] += td->len - len;
1177                 }
1178                 /* Check for last transfer */
1179                 if (((void *)td) == xfer->td_transfer_last) {
1180                         td = NULL;
1181                         break;
1182                 }
1183                 /* Check for transfer error */
1184                 if (status & EHCI_QTD_HALTED) {
1185                         /* the transfer is finished */
1186                         td = NULL;
1187                         break;
1188                 }
1189                 /* Check for short transfer */
1190                 if (len > 0) {
1191                         if (xfer->flags_int.short_frames_ok) {
1192                                 /* follow alt next */
1193                                 td = td->alt_next;
1194                         } else {
1195                                 /* the transfer is finished */
1196                                 td = NULL;
1197                         }
1198                         break;
1199                 }
1200                 td = td->obj_next;
1201
1202                 if (td->alt_next != td_alt_next) {
1203                         /* this USB frame is complete */
1204                         break;
1205                 }
1206         }
1207
1208         /* update transfer cache */
1209
1210         xfer->td_transfer_cache = td;
1211
1212 #if USB_DEBUG
1213         if (status & EHCI_QTD_STATERRS) {
1214                 DPRINTFN(11, "error, addr=%d, endpt=0x%02x, frame=0x%02x"
1215                     "status=%s%s%s%s%s%s%s%s\n",
1216                     xfer->address, xfer->endpointno, xfer->aframes,
1217                     (status & EHCI_QTD_ACTIVE) ? "[ACTIVE]" : "[NOT_ACTIVE]",
1218                     (status & EHCI_QTD_HALTED) ? "[HALTED]" : "",
1219                     (status & EHCI_QTD_BUFERR) ? "[BUFERR]" : "",
1220                     (status & EHCI_QTD_BABBLE) ? "[BABBLE]" : "",
1221                     (status & EHCI_QTD_XACTERR) ? "[XACTERR]" : "",
1222                     (status & EHCI_QTD_MISSEDMICRO) ? "[MISSED]" : "",
1223                     (status & EHCI_QTD_SPLITXSTATE) ? "[SPLIT]" : "",
1224                     (status & EHCI_QTD_PINGSTATE) ? "[PING]" : "");
1225         }
1226 #endif
1227
1228         return ((status & EHCI_QTD_HALTED) ?
1229             USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1230 }
1231
1232 static void
1233 ehci_non_isoc_done(struct usb_xfer *xfer)
1234 {
1235         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1236         ehci_qh_t *qh;
1237         uint32_t status;
1238         usb_error_t err = 0;
1239
1240         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1241             xfer, xfer->endpoint);
1242
1243 #if USB_DEBUG
1244         if (ehcidebug > 10) {
1245                 ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1246
1247                 ehci_dump_sqtds(sc, xfer->td_transfer_first);
1248         }
1249 #endif
1250
1251         /* extract data toggle directly from the QH's overlay area */
1252
1253         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1254
1255         usb_pc_cpu_invalidate(qh->page_cache);
1256
1257         status = hc32toh(sc, qh->qh_qtd.qtd_status);
1258
1259         xfer->endpoint->toggle_next =
1260             (status & EHCI_QTD_TOGGLE_MASK) ? 1 : 0;
1261
1262         /* reset scanner */
1263
1264         xfer->td_transfer_cache = xfer->td_transfer_first;
1265
1266         if (xfer->flags_int.control_xfr) {
1267
1268                 if (xfer->flags_int.control_hdr) {
1269
1270                         err = ehci_non_isoc_done_sub(xfer);
1271                 }
1272                 xfer->aframes = 1;
1273
1274                 if (xfer->td_transfer_cache == NULL) {
1275                         goto done;
1276                 }
1277         }
1278         while (xfer->aframes != xfer->nframes) {
1279
1280                 err = ehci_non_isoc_done_sub(xfer);
1281                 xfer->aframes++;
1282
1283                 if (xfer->td_transfer_cache == NULL) {
1284                         goto done;
1285                 }
1286         }
1287
1288         if (xfer->flags_int.control_xfr &&
1289             !xfer->flags_int.control_act) {
1290
1291                 err = ehci_non_isoc_done_sub(xfer);
1292         }
1293 done:
1294         ehci_device_done(xfer, err);
1295 }
1296
1297 /*------------------------------------------------------------------------*
1298  *      ehci_check_transfer
1299  *
1300  * Return values:
1301  *    0: USB transfer is not finished
1302  * Else: USB transfer is finished
1303  *------------------------------------------------------------------------*/
1304 static uint8_t
1305 ehci_check_transfer(struct usb_xfer *xfer)
1306 {
1307         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1308         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
1309
1310         uint32_t status;
1311
1312         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1313
1314         if (methods == &ehci_device_isoc_fs_methods) {
1315                 ehci_sitd_t *td;
1316
1317                 /* isochronous full speed transfer */
1318
1319                 td = xfer->td_transfer_last;
1320                 usb_pc_cpu_invalidate(td->page_cache);
1321                 status = hc32toh(sc, td->sitd_status);
1322
1323                 /* also check if first is complete */
1324
1325                 td = xfer->td_transfer_first;
1326                 usb_pc_cpu_invalidate(td->page_cache);
1327                 status |= hc32toh(sc, td->sitd_status);
1328
1329                 if (!(status & EHCI_SITD_ACTIVE)) {
1330                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1331                         goto transferred;
1332                 }
1333         } else if (methods == &ehci_device_isoc_hs_methods) {
1334                 ehci_itd_t *td;
1335
1336                 /* isochronous high speed transfer */
1337
1338                 td = xfer->td_transfer_last;
1339                 usb_pc_cpu_invalidate(td->page_cache);
1340                 status =
1341                     td->itd_status[0] | td->itd_status[1] |
1342                     td->itd_status[2] | td->itd_status[3] |
1343                     td->itd_status[4] | td->itd_status[5] |
1344                     td->itd_status[6] | td->itd_status[7];
1345
1346                 /* also check first transfer */
1347                 td = xfer->td_transfer_first;
1348                 usb_pc_cpu_invalidate(td->page_cache);
1349                 status |=
1350                     td->itd_status[0] | td->itd_status[1] |
1351                     td->itd_status[2] | td->itd_status[3] |
1352                     td->itd_status[4] | td->itd_status[5] |
1353                     td->itd_status[6] | td->itd_status[7];
1354
1355                 /* if no transactions are active we continue */
1356                 if (!(status & htohc32(sc, EHCI_ITD_ACTIVE))) {
1357                         ehci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
1358                         goto transferred;
1359                 }
1360         } else {
1361                 ehci_qtd_t *td;
1362                 ehci_qh_t *qh;
1363
1364                 /* non-isochronous transfer */
1365
1366                 /*
1367                  * check whether there is an error somewhere in the middle,
1368                  * or whether there was a short packet (SPD and not ACTIVE)
1369                  */
1370                 td = xfer->td_transfer_cache;
1371
1372                 qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1373
1374                 usb_pc_cpu_invalidate(qh->page_cache);
1375
1376                 status = hc32toh(sc, qh->qh_qtd.qtd_status);
1377                 if (status & EHCI_QTD_ACTIVE) {
1378                         /* transfer is pending */
1379                         goto done;
1380                 }
1381
1382                 while (1) {
1383                         usb_pc_cpu_invalidate(td->page_cache);
1384                         status = hc32toh(sc, td->qtd_status);
1385
1386                         /*
1387                          * Check if there is an active TD which
1388                          * indicates that the transfer isn't done.
1389                          */
1390                         if (status & EHCI_QTD_ACTIVE) {
1391                                 /* update cache */
1392                                 if (xfer->td_transfer_cache != td) {
1393                                         xfer->td_transfer_cache = td;
1394                                         if (qh->qh_qtd.qtd_next &
1395                                             htohc32(sc, EHCI_LINK_TERMINATE)) {
1396                                                 /* XXX - manually advance to next frame */
1397                                                 qh->qh_qtd.qtd_next = td->qtd_self;
1398                                                 usb_pc_cpu_flush(td->page_cache);
1399                                         }
1400                                 }
1401                                 goto done;
1402                         }
1403                         /*
1404                          * last transfer descriptor makes the transfer done
1405                          */
1406                         if (((void *)td) == xfer->td_transfer_last) {
1407                                 break;
1408                         }
1409                         /*
1410                          * any kind of error makes the transfer done
1411                          */
1412                         if (status & EHCI_QTD_HALTED) {
1413                                 break;
1414                         }
1415                         /*
1416                          * if there is no alternate next transfer, a short
1417                          * packet also makes the transfer done
1418                          */
1419                         if (EHCI_QTD_GET_BYTES(status)) {
1420                                 if (xfer->flags_int.short_frames_ok) {
1421                                         /* follow alt next */
1422                                         if (td->alt_next) {
1423                                                 td = td->alt_next;
1424                                                 continue;
1425                                         }
1426                                 }
1427                                 /* transfer is done */
1428                                 break;
1429                         }
1430                         td = td->obj_next;
1431                 }
1432                 ehci_non_isoc_done(xfer);
1433                 goto transferred;
1434         }
1435
1436 done:
1437         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1438         return (0);
1439
1440 transferred:
1441         return (1);
1442 }
1443
1444 static void
1445 ehci_pcd_enable(ehci_softc_t *sc)
1446 {
1447         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1448
1449         sc->sc_eintrs |= EHCI_STS_PCD;
1450         EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1451
1452         /* acknowledge any PCD interrupt */
1453         EOWRITE4(sc, EHCI_USBSTS, EHCI_STS_PCD);
1454
1455         ehci_root_intr(sc);
1456 }
1457
1458 static void
1459 ehci_interrupt_poll(ehci_softc_t *sc)
1460 {
1461         struct usb_xfer *xfer;
1462
1463 repeat:
1464         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1465                 /*
1466                  * check if transfer is transferred
1467                  */
1468                 if (ehci_check_transfer(xfer)) {
1469                         /* queue has been modified */
1470                         goto repeat;
1471                 }
1472         }
1473 }
1474
1475 /*------------------------------------------------------------------------*
1476  *      ehci_interrupt - EHCI interrupt handler
1477  *
1478  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1479  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1480  * is present !
1481  *------------------------------------------------------------------------*/
1482 void
1483 ehci_interrupt(ehci_softc_t *sc)
1484 {
1485         uint32_t status;
1486
1487         USB_BUS_LOCK(&sc->sc_bus);
1488
1489         DPRINTFN(16, "real interrupt\n");
1490
1491 #if USB_DEBUG
1492         if (ehcidebug > 15) {
1493                 ehci_dump_regs(sc);
1494         }
1495 #endif
1496
1497         status = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
1498         if (status == 0) {
1499                 /* the interrupt was not for us */
1500                 goto done;
1501         }
1502         if (!(status & sc->sc_eintrs)) {
1503                 goto done;
1504         }
1505         EOWRITE4(sc, EHCI_USBSTS, status);      /* acknowledge */
1506
1507         status &= sc->sc_eintrs;
1508
1509         if (status & EHCI_STS_HSE) {
1510                 printf("%s: unrecoverable error, "
1511                     "controller halted\n", __FUNCTION__);
1512 #if USB_DEBUG
1513                 ehci_dump_regs(sc);
1514                 ehci_dump_isoc(sc);
1515 #endif
1516         }
1517         if (status & EHCI_STS_PCD) {
1518                 /*
1519                  * Disable PCD interrupt for now, because it will be
1520                  * on until the port has been reset.
1521                  */
1522                 sc->sc_eintrs &= ~EHCI_STS_PCD;
1523                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1524
1525                 ehci_root_intr(sc);
1526
1527                 /* do not allow RHSC interrupts > 1 per second */
1528                 usb_callout_reset(&sc->sc_tmo_pcd, hz,
1529                     (void *)&ehci_pcd_enable, sc);
1530         }
1531         status &= ~(EHCI_STS_INT | EHCI_STS_ERRINT | EHCI_STS_PCD | EHCI_STS_IAA);
1532
1533         if (status != 0) {
1534                 /* block unprocessed interrupts */
1535                 sc->sc_eintrs &= ~status;
1536                 EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
1537                 printf("%s: blocking interrupts 0x%x\n", __FUNCTION__, status);
1538         }
1539         /* poll all the USB transfers */
1540         ehci_interrupt_poll(sc);
1541
1542 done:
1543         USB_BUS_UNLOCK(&sc->sc_bus);
1544 }
1545
1546 /*
1547  * called when a request does not complete
1548  */
1549 static void
1550 ehci_timeout(void *arg)
1551 {
1552         struct usb_xfer *xfer = arg;
1553
1554         DPRINTF("xfer=%p\n", xfer);
1555
1556         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1557
1558         /* transfer is transferred */
1559         ehci_device_done(xfer, USB_ERR_TIMEOUT);
1560 }
1561
1562 static void
1563 ehci_do_poll(struct usb_bus *bus)
1564 {
1565         ehci_softc_t *sc = EHCI_BUS2SC(bus);
1566
1567         USB_BUS_LOCK(&sc->sc_bus);
1568         ehci_interrupt_poll(sc);
1569         USB_BUS_UNLOCK(&sc->sc_bus);
1570 }
1571
1572 static void
1573 ehci_setup_standard_chain_sub(struct ehci_std_temp *temp)
1574 {
1575         struct usb_page_search buf_res;
1576         ehci_qtd_t *td;
1577         ehci_qtd_t *td_next;
1578         ehci_qtd_t *td_alt_next;
1579         uint32_t buf_offset;
1580         uint32_t average;
1581         uint32_t len_old;
1582         uint32_t terminate;
1583         uint8_t shortpkt_old;
1584         uint8_t precompute;
1585
1586         terminate = htohc32(temp->sc, EHCI_LINK_TERMINATE);
1587         td_alt_next = NULL;
1588         buf_offset = 0;
1589         shortpkt_old = temp->shortpkt;
1590         len_old = temp->len;
1591         precompute = 1;
1592
1593 restart:
1594
1595         td = temp->td;
1596         td_next = temp->td_next;
1597
1598         while (1) {
1599
1600                 if (temp->len == 0) {
1601
1602                         if (temp->shortpkt) {
1603                                 break;
1604                         }
1605                         /* send a Zero Length Packet, ZLP, last */
1606
1607                         temp->shortpkt = 1;
1608                         average = 0;
1609
1610                 } else {
1611
1612                         average = temp->average;
1613
1614                         if (temp->len < average) {
1615                                 if (temp->len % temp->max_frame_size) {
1616                                         temp->shortpkt = 1;
1617                                 }
1618                                 average = temp->len;
1619                         }
1620                 }
1621
1622                 if (td_next == NULL) {
1623                         panic("%s: out of EHCI transfer descriptors!", __FUNCTION__);
1624                 }
1625                 /* get next TD */
1626
1627                 td = td_next;
1628                 td_next = td->obj_next;
1629
1630                 /* check if we are pre-computing */
1631
1632                 if (precompute) {
1633
1634                         /* update remaining length */
1635
1636                         temp->len -= average;
1637
1638                         continue;
1639                 }
1640                 /* fill out current TD */
1641
1642                 td->qtd_status =
1643                     temp->qtd_status |
1644                     htohc32(temp->sc, EHCI_QTD_IOC |
1645                         EHCI_QTD_SET_BYTES(average));
1646
1647                 if (average == 0) {
1648
1649                         if (temp->auto_data_toggle == 0) {
1650
1651                                 /* update data toggle, ZLP case */
1652
1653                                 temp->qtd_status ^=
1654                                     htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1655                         }
1656                         td->len = 0;
1657
1658                         td->qtd_buffer[0] = 0;
1659                         td->qtd_buffer_hi[0] = 0;
1660
1661                         td->qtd_buffer[1] = 0;
1662                         td->qtd_buffer_hi[1] = 0;
1663
1664                 } else {
1665
1666                         uint8_t x;
1667
1668                         if (temp->auto_data_toggle == 0) {
1669
1670                                 /* update data toggle */
1671
1672                                 if (((average + temp->max_frame_size - 1) /
1673                                     temp->max_frame_size) & 1) {
1674                                         temp->qtd_status ^=
1675                                             htohc32(temp->sc, EHCI_QTD_TOGGLE_MASK);
1676                                 }
1677                         }
1678                         td->len = average;
1679
1680                         /* update remaining length */
1681
1682                         temp->len -= average;
1683
1684                         /* fill out buffer pointers */
1685
1686                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1687                         td->qtd_buffer[0] =
1688                             htohc32(temp->sc, buf_res.physaddr);
1689                         td->qtd_buffer_hi[0] = 0;
1690
1691                         x = 1;
1692
1693                         while (average > EHCI_PAGE_SIZE) {
1694                                 average -= EHCI_PAGE_SIZE;
1695                                 buf_offset += EHCI_PAGE_SIZE;
1696                                 usbd_get_page(temp->pc, buf_offset, &buf_res);
1697                                 td->qtd_buffer[x] =
1698                                     htohc32(temp->sc,
1699                                     buf_res.physaddr & (~0xFFF));
1700                                 td->qtd_buffer_hi[x] = 0;
1701                                 x++;
1702                         }
1703
1704                         /*
1705                          * NOTE: The "average" variable is never zero after
1706                          * exiting the loop above !
1707                          *
1708                          * NOTE: We have to subtract one from the offset to
1709                          * ensure that we are computing the physical address
1710                          * of a valid page !
1711                          */
1712                         buf_offset += average;
1713                         usbd_get_page(temp->pc, buf_offset - 1, &buf_res);
1714                         td->qtd_buffer[x] =
1715                             htohc32(temp->sc,
1716                             buf_res.physaddr & (~0xFFF));
1717                         td->qtd_buffer_hi[x] = 0;
1718                 }
1719
1720                 if (temp->can_use_next) {
1721                         if (td_next) {
1722                                 /* link the current TD with the next one */
1723                                 td->qtd_next = td_next->qtd_self;
1724                         }
1725                 } else {
1726                         /*
1727                          * BUG WARNING: The EHCI HW can use the
1728                          * qtd_next field instead of qtd_altnext when
1729                          * a short packet is received! We work this
1730                          * around in software by not queueing more
1731                          * than one job/TD at a time!
1732                          */
1733                         td->qtd_next = terminate;
1734                 }
1735
1736                 td->qtd_altnext = terminate;
1737                 td->alt_next = td_alt_next;
1738
1739                 usb_pc_cpu_flush(td->page_cache);
1740         }
1741
1742         if (precompute) {
1743                 precompute = 0;
1744
1745                 /* setup alt next pointer, if any */
1746                 if (temp->last_frame) {
1747                         td_alt_next = NULL;
1748                 } else {
1749                         /* we use this field internally */
1750                         td_alt_next = td_next;
1751                 }
1752
1753                 /* restore */
1754                 temp->shortpkt = shortpkt_old;
1755                 temp->len = len_old;
1756                 goto restart;
1757         }
1758         temp->td = td;
1759         temp->td_next = td_next;
1760 }
1761
1762 static void
1763 ehci_setup_standard_chain(struct usb_xfer *xfer, ehci_qh_t **qh_last)
1764 {
1765         struct ehci_std_temp temp;
1766         struct usb_pipe_methods *methods;
1767         ehci_qh_t *qh;
1768         ehci_qtd_t *td;
1769         uint32_t qh_endp;
1770         uint32_t qh_endphub;
1771         uint32_t x;
1772
1773         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1774             xfer->address, UE_GET_ADDR(xfer->endpointno),
1775             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1776
1777         temp.average = xfer->max_hc_frame_size;
1778         temp.max_frame_size = xfer->max_frame_size;
1779         temp.sc = EHCI_BUS2SC(xfer->xroot->bus);
1780
1781         /* toggle the DMA set we are using */
1782         xfer->flags_int.curr_dma_set ^= 1;
1783
1784         /* get next DMA set */
1785         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1786
1787         xfer->td_transfer_first = td;
1788         xfer->td_transfer_cache = td;
1789
1790         temp.td = NULL;
1791         temp.td_next = td;
1792         temp.qtd_status = 0;
1793         temp.last_frame = 0;
1794         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1795         temp.can_use_next = (xfer->flags_int.control_xfr ||
1796             (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT));
1797
1798         if (xfer->flags_int.control_xfr) {
1799                 if (xfer->endpoint->toggle_next) {
1800                         /* DATA1 is next */
1801                         temp.qtd_status |=
1802                             htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
1803                 }
1804                 temp.auto_data_toggle = 0;
1805         } else {
1806                 temp.auto_data_toggle = 1;
1807         }
1808
1809         if (usbd_get_speed(xfer->xroot->udev) != USB_SPEED_HIGH) {
1810                 /* max 3 retries */
1811                 temp.qtd_status |=
1812                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1813         }
1814         /* check if we should prepend a setup message */
1815
1816         if (xfer->flags_int.control_xfr) {
1817                 if (xfer->flags_int.control_hdr) {
1818
1819                         temp.qtd_status &=
1820                             htohc32(temp.sc, EHCI_QTD_SET_CERR(3));
1821                         temp.qtd_status |= htohc32(temp.sc,
1822                             EHCI_QTD_ACTIVE |
1823                             EHCI_QTD_SET_PID(EHCI_QTD_PID_SETUP) |
1824                             EHCI_QTD_SET_TOGGLE(0));
1825
1826                         temp.len = xfer->frlengths[0];
1827                         temp.pc = xfer->frbuffers + 0;
1828                         temp.shortpkt = temp.len ? 1 : 0;
1829                         /* check for last frame */
1830                         if (xfer->nframes == 1) {
1831                                 /* no STATUS stage yet, SETUP is last */
1832                                 if (xfer->flags_int.control_act) {
1833                                         temp.last_frame = 1;
1834                                         temp.setup_alt_next = 0;
1835                                 }
1836                         }
1837                         ehci_setup_standard_chain_sub(&temp);
1838                 }
1839                 x = 1;
1840         } else {
1841                 x = 0;
1842         }
1843
1844         while (x != xfer->nframes) {
1845
1846                 /* DATA0 / DATA1 message */
1847
1848                 temp.len = xfer->frlengths[x];
1849                 temp.pc = xfer->frbuffers + x;
1850
1851                 x++;
1852
1853                 if (x == xfer->nframes) {
1854                         if (xfer->flags_int.control_xfr) {
1855                                 /* no STATUS stage yet, DATA is last */
1856                                 if (xfer->flags_int.control_act) {
1857                                         temp.last_frame = 1;
1858                                         temp.setup_alt_next = 0;
1859                                 }
1860                         } else {
1861                                 temp.last_frame = 1;
1862                                 temp.setup_alt_next = 0;
1863                         }
1864                 }
1865                 /* keep previous data toggle and error count */
1866
1867                 temp.qtd_status &=
1868                     htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1869                     EHCI_QTD_SET_TOGGLE(1));
1870
1871                 if (temp.len == 0) {
1872
1873                         /* make sure that we send an USB packet */
1874
1875                         temp.shortpkt = 0;
1876
1877                 } else {
1878
1879                         /* regular data transfer */
1880
1881                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1882                 }
1883
1884                 /* set endpoint direction */
1885
1886                 temp.qtd_status |=
1887                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) ?
1888                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1889                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN)) :
1890                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1891                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT));
1892
1893                 ehci_setup_standard_chain_sub(&temp);
1894         }
1895
1896         /* check if we should append a status stage */
1897
1898         if (xfer->flags_int.control_xfr &&
1899             !xfer->flags_int.control_act) {
1900
1901                 /*
1902                  * Send a DATA1 message and invert the current endpoint
1903                  * direction.
1904                  */
1905
1906                 temp.qtd_status &= htohc32(temp.sc, EHCI_QTD_SET_CERR(3) |
1907                     EHCI_QTD_SET_TOGGLE(1));
1908                 temp.qtd_status |=
1909                     (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) ?
1910                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1911                     EHCI_QTD_SET_PID(EHCI_QTD_PID_IN) |
1912                     EHCI_QTD_SET_TOGGLE(1)) :
1913                     htohc32(temp.sc, EHCI_QTD_ACTIVE |
1914                     EHCI_QTD_SET_PID(EHCI_QTD_PID_OUT) |
1915                     EHCI_QTD_SET_TOGGLE(1));
1916
1917                 temp.len = 0;
1918                 temp.pc = NULL;
1919                 temp.shortpkt = 0;
1920                 temp.last_frame = 1;
1921                 temp.setup_alt_next = 0;
1922
1923                 ehci_setup_standard_chain_sub(&temp);
1924         }
1925         td = temp.td;
1926
1927         /* the last TD terminates the transfer: */
1928         td->qtd_next = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1929         td->qtd_altnext = htohc32(temp.sc, EHCI_LINK_TERMINATE);
1930
1931         usb_pc_cpu_flush(td->page_cache);
1932
1933         /* must have at least one frame! */
1934
1935         xfer->td_transfer_last = td;
1936
1937 #if USB_DEBUG
1938         if (ehcidebug > 8) {
1939                 DPRINTF("nexttog=%d; data before transfer:\n",
1940                     xfer->endpoint->toggle_next);
1941                 ehci_dump_sqtds(temp.sc,
1942                     xfer->td_transfer_first);
1943         }
1944 #endif
1945
1946         methods = xfer->endpoint->methods;
1947
1948         qh = xfer->qh_start[xfer->flags_int.curr_dma_set];
1949
1950         /* the "qh_link" field is filled when the QH is added */
1951
1952         qh_endp =
1953             (EHCI_QH_SET_ADDR(xfer->address) |
1954             EHCI_QH_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
1955             EHCI_QH_SET_MPL(xfer->max_packet_size));
1956
1957         if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
1958                 qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH);
1959                 if (methods != &ehci_device_intr_methods)
1960                         qh_endp |= EHCI_QH_SET_NRL(8);
1961         } else {
1962
1963                 if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_FULL) {
1964                         qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_FULL);
1965                 } else {
1966                         qh_endp |= EHCI_QH_SET_EPS(EHCI_QH_SPEED_LOW);
1967                 }
1968
1969                 if (methods == &ehci_device_ctrl_methods) {
1970                         qh_endp |= EHCI_QH_CTL;
1971                 }
1972                 if (methods != &ehci_device_intr_methods) {
1973                         /* Only try one time per microframe! */
1974                         qh_endp |= EHCI_QH_SET_NRL(1);
1975                 }
1976         }
1977
1978         if (temp.auto_data_toggle == 0) {
1979                 /* software computes the data toggle */
1980                 qh_endp |= EHCI_QH_DTC;
1981         }
1982
1983         qh->qh_endp = htohc32(temp.sc, qh_endp);
1984
1985         qh_endphub =
1986             (EHCI_QH_SET_MULT(xfer->max_packet_count & 3) |
1987             EHCI_QH_SET_CMASK(xfer->usb_cmask) |
1988             EHCI_QH_SET_SMASK(xfer->usb_smask) |
1989             EHCI_QH_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
1990             EHCI_QH_SET_PORT(xfer->xroot->udev->hs_port_no));
1991
1992         qh->qh_endphub = htohc32(temp.sc, qh_endphub);
1993         qh->qh_curqtd = 0;
1994
1995         /* fill the overlay qTD */
1996
1997         if (temp.auto_data_toggle && xfer->endpoint->toggle_next) {
1998                 /* DATA1 is next */
1999                 qh->qh_qtd.qtd_status = htohc32(temp.sc, EHCI_QTD_SET_TOGGLE(1));
2000         } else {
2001                 qh->qh_qtd.qtd_status = 0;
2002         }
2003
2004         td = xfer->td_transfer_first;
2005
2006         qh->qh_qtd.qtd_next = td->qtd_self;
2007         qh->qh_qtd.qtd_altnext =
2008             htohc32(temp.sc, EHCI_LINK_TERMINATE);
2009
2010         usb_pc_cpu_flush(qh->page_cache);
2011
2012         if (xfer->xroot->udev->flags.self_suspended == 0) {
2013                 EHCI_APPEND_QH(qh, *qh_last);
2014         }
2015 }
2016
2017 static void
2018 ehci_root_intr(ehci_softc_t *sc)
2019 {
2020         uint16_t i;
2021         uint16_t m;
2022
2023         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2024
2025         /* clear any old interrupt data */
2026         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
2027
2028         /* set bits */
2029         m = (sc->sc_noport + 1);
2030         if (m > (8 * sizeof(sc->sc_hub_idata))) {
2031                 m = (8 * sizeof(sc->sc_hub_idata));
2032         }
2033         for (i = 1; i < m; i++) {
2034                 /* pick out CHANGE bits from the status register */
2035                 if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR) {
2036                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
2037                         DPRINTF("port %d changed\n", i);
2038                 }
2039         }
2040         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
2041             sizeof(sc->sc_hub_idata));
2042 }
2043
2044 static void
2045 ehci_isoc_fs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2046 {
2047         uint32_t nframes = xfer->nframes;
2048         uint32_t status;
2049         uint32_t *plen = xfer->frlengths;
2050         uint16_t len = 0;
2051         ehci_sitd_t *td = xfer->td_transfer_first;
2052         ehci_sitd_t **pp_last = &sc->sc_isoc_fs_p_last[xfer->qh_pos];
2053
2054         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2055             xfer, xfer->endpoint);
2056
2057         while (nframes--) {
2058                 if (td == NULL) {
2059                         panic("%s:%d: out of TD's\n",
2060                             __FUNCTION__, __LINE__);
2061                 }
2062                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2063                         pp_last = &sc->sc_isoc_fs_p_last[0];
2064                 }
2065 #if USB_DEBUG
2066                 if (ehcidebug > 15) {
2067                         DPRINTF("isoc FS-TD\n");
2068                         ehci_dump_sitd(sc, td);
2069                 }
2070 #endif
2071                 usb_pc_cpu_invalidate(td->page_cache);
2072                 status = hc32toh(sc, td->sitd_status);
2073
2074                 len = EHCI_SITD_GET_LEN(status);
2075
2076                 DPRINTFN(2, "status=0x%08x, rem=%u\n", status, len);
2077
2078                 if (*plen >= len) {
2079                         len = *plen - len;
2080                 } else {
2081                         len = 0;
2082                 }
2083
2084                 *plen = len;
2085
2086                 /* remove FS-TD from schedule */
2087                 EHCI_REMOVE_FS_TD(td, *pp_last);
2088
2089                 pp_last++;
2090                 plen++;
2091                 td = td->obj_next;
2092         }
2093
2094         xfer->aframes = xfer->nframes;
2095 }
2096
2097 static void
2098 ehci_isoc_hs_done(ehci_softc_t *sc, struct usb_xfer *xfer)
2099 {
2100         uint32_t nframes = xfer->nframes;
2101         uint32_t status;
2102         uint32_t *plen = xfer->frlengths;
2103         uint16_t len = 0;
2104         uint8_t td_no = 0;
2105         ehci_itd_t *td = xfer->td_transfer_first;
2106         ehci_itd_t **pp_last = &sc->sc_isoc_hs_p_last[xfer->qh_pos];
2107
2108         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
2109             xfer, xfer->endpoint);
2110
2111         while (nframes--) {
2112                 if (td == NULL) {
2113                         panic("%s:%d: out of TD's\n",
2114                             __FUNCTION__, __LINE__);
2115                 }
2116                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2117                         pp_last = &sc->sc_isoc_hs_p_last[0];
2118                 }
2119 #if USB_DEBUG
2120                 if (ehcidebug > 15) {
2121                         DPRINTF("isoc HS-TD\n");
2122                         ehci_dump_itd(sc, td);
2123                 }
2124 #endif
2125
2126                 usb_pc_cpu_invalidate(td->page_cache);
2127                 status = hc32toh(sc, td->itd_status[td_no]);
2128
2129                 len = EHCI_ITD_GET_LEN(status);
2130
2131                 DPRINTFN(2, "status=0x%08x, len=%u\n", status, len);
2132
2133                 if (*plen >= len) {
2134                         /*
2135                          * The length is valid. NOTE: The complete
2136                          * length is written back into the status
2137                          * field, and not the remainder like with
2138                          * other transfer descriptor types.
2139                          */
2140                 } else {
2141                         /* Invalid length - truncate */
2142                         len = 0;
2143                 }
2144
2145                 *plen = len;
2146
2147                 plen++;
2148                 td_no++;
2149
2150                 if ((td_no == 8) || (nframes == 0)) {
2151                         /* remove HS-TD from schedule */
2152                         EHCI_REMOVE_HS_TD(td, *pp_last);
2153                         pp_last++;
2154
2155                         td_no = 0;
2156                         td = td->obj_next;
2157                 }
2158         }
2159         xfer->aframes = xfer->nframes;
2160 }
2161
2162 /* NOTE: "done" can be run two times in a row,
2163  * from close and from interrupt
2164  */
2165 static void
2166 ehci_device_done(struct usb_xfer *xfer, usb_error_t error)
2167 {
2168         struct usb_pipe_methods *methods = xfer->endpoint->methods;
2169         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2170
2171         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2172
2173         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
2174             xfer, xfer->endpoint, error);
2175
2176         if ((methods == &ehci_device_bulk_methods) ||
2177             (methods == &ehci_device_ctrl_methods)) {
2178 #if USB_DEBUG
2179                 if (ehcidebug > 8) {
2180                         DPRINTF("nexttog=%d; data after transfer:\n",
2181                             xfer->endpoint->toggle_next);
2182                         ehci_dump_sqtds(sc,
2183                             xfer->td_transfer_first);
2184                 }
2185 #endif
2186
2187                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2188                     sc->sc_async_p_last);
2189         }
2190         if (methods == &ehci_device_intr_methods) {
2191                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
2192                     sc->sc_intr_p_last[xfer->qh_pos]);
2193         }
2194         /*
2195          * Only finish isochronous transfers once which will update
2196          * "xfer->frlengths".
2197          */
2198         if (xfer->td_transfer_first &&
2199             xfer->td_transfer_last) {
2200                 if (methods == &ehci_device_isoc_fs_methods) {
2201                         ehci_isoc_fs_done(sc, xfer);
2202                 }
2203                 if (methods == &ehci_device_isoc_hs_methods) {
2204                         ehci_isoc_hs_done(sc, xfer);
2205                 }
2206                 xfer->td_transfer_first = NULL;
2207                 xfer->td_transfer_last = NULL;
2208         }
2209         /* dequeue transfer and start next transfer */
2210         usbd_transfer_done(xfer, error);
2211 }
2212
2213 /*------------------------------------------------------------------------*
2214  * ehci bulk support
2215  *------------------------------------------------------------------------*/
2216 static void
2217 ehci_device_bulk_open(struct usb_xfer *xfer)
2218 {
2219         return;
2220 }
2221
2222 static void
2223 ehci_device_bulk_close(struct usb_xfer *xfer)
2224 {
2225         ehci_device_done(xfer, USB_ERR_CANCELLED);
2226 }
2227
2228 static void
2229 ehci_device_bulk_enter(struct usb_xfer *xfer)
2230 {
2231         return;
2232 }
2233
2234 static void
2235 ehci_device_bulk_start(struct usb_xfer *xfer)
2236 {
2237         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2238         uint32_t temp;
2239
2240         /* setup TD's and QH */
2241         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2242
2243         /* put transfer on interrupt queue */
2244         ehci_transfer_intr_enqueue(xfer);
2245
2246         /* XXX Performance quirk: Some Host Controllers have a too low
2247          * interrupt rate. Issue an IAAD to stimulate the Host
2248          * Controller after queueing the BULK transfer.
2249          */
2250         temp = EOREAD4(sc, EHCI_USBCMD);
2251         if (!(temp & EHCI_CMD_IAAD))
2252                 EOWRITE4(sc, EHCI_USBCMD, temp | EHCI_CMD_IAAD);
2253 }
2254
2255 struct usb_pipe_methods ehci_device_bulk_methods =
2256 {
2257         .open = ehci_device_bulk_open,
2258         .close = ehci_device_bulk_close,
2259         .enter = ehci_device_bulk_enter,
2260         .start = ehci_device_bulk_start,
2261 };
2262
2263 /*------------------------------------------------------------------------*
2264  * ehci control support
2265  *------------------------------------------------------------------------*/
2266 static void
2267 ehci_device_ctrl_open(struct usb_xfer *xfer)
2268 {
2269         return;
2270 }
2271
2272 static void
2273 ehci_device_ctrl_close(struct usb_xfer *xfer)
2274 {
2275         ehci_device_done(xfer, USB_ERR_CANCELLED);
2276 }
2277
2278 static void
2279 ehci_device_ctrl_enter(struct usb_xfer *xfer)
2280 {
2281         return;
2282 }
2283
2284 static void
2285 ehci_device_ctrl_start(struct usb_xfer *xfer)
2286 {
2287         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2288
2289         /* setup TD's and QH */
2290         ehci_setup_standard_chain(xfer, &sc->sc_async_p_last);
2291
2292         /* put transfer on interrupt queue */
2293         ehci_transfer_intr_enqueue(xfer);
2294 }
2295
2296 struct usb_pipe_methods ehci_device_ctrl_methods =
2297 {
2298         .open = ehci_device_ctrl_open,
2299         .close = ehci_device_ctrl_close,
2300         .enter = ehci_device_ctrl_enter,
2301         .start = ehci_device_ctrl_start,
2302 };
2303
2304 /*------------------------------------------------------------------------*
2305  * ehci interrupt support
2306  *------------------------------------------------------------------------*/
2307 static void
2308 ehci_device_intr_open(struct usb_xfer *xfer)
2309 {
2310         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2311         uint16_t best;
2312         uint16_t bit;
2313         uint16_t x;
2314         uint8_t slot;
2315
2316         /* Allocate a microframe slot first: */
2317
2318         slot = usb_intr_schedule_adjust
2319             (xfer->xroot->udev, xfer->max_frame_size, USB_HS_MICRO_FRAMES_MAX);
2320
2321         if (usbd_get_speed(xfer->xroot->udev) == USB_SPEED_HIGH) {
2322                 xfer->usb_uframe = slot;
2323                 xfer->usb_smask = (1 << slot) & 0xFF;
2324                 xfer->usb_cmask = 0;
2325         } else {
2326                 xfer->usb_uframe = slot;
2327                 xfer->usb_smask = (1 << slot) & 0x3F;
2328                 xfer->usb_cmask = (-(4 << slot)) & 0xFE;
2329         }
2330
2331         /*
2332          * Find the best QH position corresponding to the given interval:
2333          */
2334
2335         best = 0;
2336         bit = EHCI_VIRTUAL_FRAMELIST_COUNT / 2;
2337         while (bit) {
2338                 if (xfer->interval >= bit) {
2339                         x = bit;
2340                         best = bit;
2341                         while (x & bit) {
2342                                 if (sc->sc_intr_stat[x] <
2343                                     sc->sc_intr_stat[best]) {
2344                                         best = x;
2345                                 }
2346                                 x++;
2347                         }
2348                         break;
2349                 }
2350                 bit >>= 1;
2351         }
2352
2353         sc->sc_intr_stat[best]++;
2354         xfer->qh_pos = best;
2355
2356         DPRINTFN(3, "best=%d interval=%d\n",
2357             best, xfer->interval);
2358 }
2359
2360 static void
2361 ehci_device_intr_close(struct usb_xfer *xfer)
2362 {
2363         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2364         uint8_t slot;
2365
2366         slot = usb_intr_schedule_adjust
2367             (xfer->xroot->udev, -(xfer->max_frame_size), xfer->usb_uframe);
2368
2369         sc->sc_intr_stat[xfer->qh_pos]--;
2370
2371         ehci_device_done(xfer, USB_ERR_CANCELLED);
2372 }
2373
2374 static void
2375 ehci_device_intr_enter(struct usb_xfer *xfer)
2376 {
2377         return;
2378 }
2379
2380 static void
2381 ehci_device_intr_start(struct usb_xfer *xfer)
2382 {
2383         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2384
2385         /* setup TD's and QH */
2386         ehci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
2387
2388         /* put transfer on interrupt queue */
2389         ehci_transfer_intr_enqueue(xfer);
2390 }
2391
2392 struct usb_pipe_methods ehci_device_intr_methods =
2393 {
2394         .open = ehci_device_intr_open,
2395         .close = ehci_device_intr_close,
2396         .enter = ehci_device_intr_enter,
2397         .start = ehci_device_intr_start,
2398 };
2399
2400 /*------------------------------------------------------------------------*
2401  * ehci full speed isochronous support
2402  *------------------------------------------------------------------------*/
2403 static void
2404 ehci_device_isoc_fs_open(struct usb_xfer *xfer)
2405 {
2406         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2407         ehci_sitd_t *td;
2408         uint32_t sitd_portaddr;
2409         uint8_t ds;
2410
2411         sitd_portaddr =
2412             EHCI_SITD_SET_ADDR(xfer->address) |
2413             EHCI_SITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)) |
2414             EHCI_SITD_SET_HUBA(xfer->xroot->udev->hs_hub_addr) |
2415             EHCI_SITD_SET_PORT(xfer->xroot->udev->hs_port_no);
2416
2417         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2418                 sitd_portaddr |= EHCI_SITD_SET_DIR_IN;
2419         }
2420         sitd_portaddr = htohc32(sc, sitd_portaddr);
2421
2422         /* initialize all TD's */
2423
2424         for (ds = 0; ds != 2; ds++) {
2425
2426                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2427
2428                         td->sitd_portaddr = sitd_portaddr;
2429
2430                         /*
2431                          * TODO: make some kind of automatic
2432                          * SMASK/CMASK selection based on micro-frame
2433                          * usage
2434                          *
2435                          * micro-frame usage (8 microframes per 1ms)
2436                          */
2437                         td->sitd_back = htohc32(sc, EHCI_LINK_TERMINATE);
2438
2439                         usb_pc_cpu_flush(td->page_cache);
2440                 }
2441         }
2442 }
2443
2444 static void
2445 ehci_device_isoc_fs_close(struct usb_xfer *xfer)
2446 {
2447         ehci_device_done(xfer, USB_ERR_CANCELLED);
2448 }
2449
2450 static void
2451 ehci_device_isoc_fs_enter(struct usb_xfer *xfer)
2452 {
2453         struct usb_page_search buf_res;
2454         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2455         struct usb_fs_isoc_schedule *fss_start;
2456         struct usb_fs_isoc_schedule *fss_end;
2457         struct usb_fs_isoc_schedule *fss;
2458         ehci_sitd_t *td;
2459         ehci_sitd_t *td_last = NULL;
2460         ehci_sitd_t **pp_last;
2461         uint32_t *plen;
2462         uint32_t buf_offset;
2463         uint32_t nframes;
2464         uint32_t temp;
2465         uint32_t sitd_mask;
2466         uint16_t tlen;
2467         uint8_t sa;
2468         uint8_t sb;
2469         uint8_t error;
2470
2471 #if USB_DEBUG
2472         uint8_t once = 1;
2473
2474 #endif
2475
2476         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2477             xfer, xfer->endpoint->isoc_next, xfer->nframes);
2478
2479         /* get the current frame index */
2480
2481         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2482
2483         /*
2484          * check if the frame index is within the window where the frames
2485          * will be inserted
2486          */
2487         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2488             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2489
2490         if ((xfer->endpoint->is_synced == 0) ||
2491             (buf_offset < xfer->nframes)) {
2492                 /*
2493                  * If there is data underflow or the pipe queue is empty we
2494                  * schedule the transfer a few frames ahead of the current
2495                  * frame position. Else two isochronous transfers might
2496                  * overlap.
2497                  */
2498                 xfer->endpoint->isoc_next = (nframes + 3) &
2499                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2500                 xfer->endpoint->is_synced = 1;
2501                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2502         }
2503         /*
2504          * compute how many milliseconds the insertion is ahead of the
2505          * current frame position:
2506          */
2507         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2508             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2509
2510         /*
2511          * pre-compute when the isochronous transfer will be finished:
2512          */
2513         xfer->isoc_time_complete =
2514             usbd_fs_isoc_schedule_isoc_time_expand
2515             (xfer->xroot->udev, &fss_start, &fss_end, nframes) + buf_offset +
2516             xfer->nframes;
2517
2518         /* get the real number of frames */
2519
2520         nframes = xfer->nframes;
2521
2522         buf_offset = 0;
2523
2524         plen = xfer->frlengths;
2525
2526         /* toggle the DMA set we are using */
2527         xfer->flags_int.curr_dma_set ^= 1;
2528
2529         /* get next DMA set */
2530         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2531         xfer->td_transfer_first = td;
2532
2533         pp_last = &sc->sc_isoc_fs_p_last[xfer->endpoint->isoc_next];
2534
2535         /* store starting position */
2536
2537         xfer->qh_pos = xfer->endpoint->isoc_next;
2538
2539         fss = fss_start + (xfer->qh_pos % USB_ISOC_TIME_MAX);
2540
2541         while (nframes--) {
2542                 if (td == NULL) {
2543                         panic("%s:%d: out of TD's\n",
2544                             __FUNCTION__, __LINE__);
2545                 }
2546                 if (pp_last >= &sc->sc_isoc_fs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2547                         pp_last = &sc->sc_isoc_fs_p_last[0];
2548                 }
2549                 if (fss >= fss_end) {
2550                         fss = fss_start;
2551                 }
2552                 /* reuse sitd_portaddr and sitd_back from last transfer */
2553
2554                 if (*plen > xfer->max_frame_size) {
2555 #if USB_DEBUG
2556                         if (once) {
2557                                 once = 0;
2558                                 printf("%s: frame length(%d) exceeds %d "
2559                                     "bytes (frame truncated)\n",
2560                                     __FUNCTION__, *plen,
2561                                     xfer->max_frame_size);
2562                         }
2563 #endif
2564                         *plen = xfer->max_frame_size;
2565                 }
2566                 /*
2567                  * We currently don't care if the ISOCHRONOUS schedule is
2568                  * full!
2569                  */
2570                 error = usbd_fs_isoc_schedule_alloc(fss, &sa, *plen);
2571                 if (error) {
2572                         /*
2573                          * The FULL speed schedule is FULL! Set length
2574                          * to zero.
2575                          */
2576                         *plen = 0;
2577                 }
2578                 if (*plen) {
2579                         /*
2580                          * only call "usbd_get_page()" when we have a
2581                          * non-zero length
2582                          */
2583                         usbd_get_page(xfer->frbuffers, buf_offset, &buf_res);
2584                         td->sitd_bp[0] = htohc32(sc, buf_res.physaddr);
2585                         buf_offset += *plen;
2586                         /*
2587                          * NOTE: We need to subtract one from the offset so
2588                          * that we are on a valid page!
2589                          */
2590                         usbd_get_page(xfer->frbuffers, buf_offset - 1,
2591                             &buf_res);
2592                         temp = buf_res.physaddr & ~0xFFF;
2593                 } else {
2594                         td->sitd_bp[0] = 0;
2595                         temp = 0;
2596                 }
2597
2598                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_OUT) {
2599                         tlen = *plen;
2600                         if (tlen <= 188) {
2601                                 temp |= 1;      /* T-count = 1, TP = ALL */
2602                                 tlen = 1;
2603                         } else {
2604                                 tlen += 187;
2605                                 tlen /= 188;
2606                                 temp |= tlen;   /* T-count = [1..6] */
2607                                 temp |= 8;      /* TP = Begin */
2608                         }
2609
2610                         tlen += sa;
2611
2612                         if (tlen >= 8) {
2613                                 sb = 0;
2614                         } else {
2615                                 sb = (1 << tlen);
2616                         }
2617
2618                         sa = (1 << sa);
2619                         sa = (sb - sa) & 0x3F;
2620                         sb = 0;
2621                 } else {
2622                         sb = (-(4 << sa)) & 0xFE;
2623                         sa = (1 << sa) & 0x3F;
2624                 }
2625
2626                 sitd_mask = (EHCI_SITD_SET_SMASK(sa) |
2627                     EHCI_SITD_SET_CMASK(sb));
2628
2629                 td->sitd_bp[1] = htohc32(sc, temp);
2630
2631                 td->sitd_mask = htohc32(sc, sitd_mask);
2632
2633                 if (nframes == 0) {
2634                         td->sitd_status = htohc32(sc,
2635                             EHCI_SITD_IOC |
2636                             EHCI_SITD_ACTIVE |
2637                             EHCI_SITD_SET_LEN(*plen));
2638                 } else {
2639                         td->sitd_status = htohc32(sc,
2640                             EHCI_SITD_ACTIVE |
2641                             EHCI_SITD_SET_LEN(*plen));
2642                 }
2643                 usb_pc_cpu_flush(td->page_cache);
2644
2645 #if USB_DEBUG
2646                 if (ehcidebug > 15) {
2647                         DPRINTF("FS-TD %d\n", nframes);
2648                         ehci_dump_sitd(sc, td);
2649                 }
2650 #endif
2651                 /* insert TD into schedule */
2652                 EHCI_APPEND_FS_TD(td, *pp_last);
2653                 pp_last++;
2654
2655                 plen++;
2656                 fss++;
2657                 td_last = td;
2658                 td = td->obj_next;
2659         }
2660
2661         xfer->td_transfer_last = td_last;
2662
2663         /* update isoc_next */
2664         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_fs_p_last[0]) &
2665             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2666 }
2667
2668 static void
2669 ehci_device_isoc_fs_start(struct usb_xfer *xfer)
2670 {
2671         /* put transfer on interrupt queue */
2672         ehci_transfer_intr_enqueue(xfer);
2673 }
2674
2675 struct usb_pipe_methods ehci_device_isoc_fs_methods =
2676 {
2677         .open = ehci_device_isoc_fs_open,
2678         .close = ehci_device_isoc_fs_close,
2679         .enter = ehci_device_isoc_fs_enter,
2680         .start = ehci_device_isoc_fs_start,
2681 };
2682
2683 /*------------------------------------------------------------------------*
2684  * ehci high speed isochronous support
2685  *------------------------------------------------------------------------*/
2686 static void
2687 ehci_device_isoc_hs_open(struct usb_xfer *xfer)
2688 {
2689         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2690         ehci_itd_t *td;
2691         uint32_t temp;
2692         uint8_t ds;
2693
2694         /* initialize all TD's */
2695
2696         for (ds = 0; ds != 2; ds++) {
2697
2698                 for (td = xfer->td_start[ds]; td; td = td->obj_next) {
2699
2700                         /* set TD inactive */
2701                         td->itd_status[0] = 0;
2702                         td->itd_status[1] = 0;
2703                         td->itd_status[2] = 0;
2704                         td->itd_status[3] = 0;
2705                         td->itd_status[4] = 0;
2706                         td->itd_status[5] = 0;
2707                         td->itd_status[6] = 0;
2708                         td->itd_status[7] = 0;
2709
2710                         /* set endpoint and address */
2711                         td->itd_bp[0] = htohc32(sc,
2712                             EHCI_ITD_SET_ADDR(xfer->address) |
2713                             EHCI_ITD_SET_ENDPT(UE_GET_ADDR(xfer->endpointno)));
2714
2715                         temp =
2716                             EHCI_ITD_SET_MPL(xfer->max_packet_size & 0x7FF);
2717
2718                         /* set direction */
2719                         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
2720                                 temp |= EHCI_ITD_SET_DIR_IN;
2721                         }
2722                         /* set maximum packet size */
2723                         td->itd_bp[1] = htohc32(sc, temp);
2724
2725                         /* set transfer multiplier */
2726                         td->itd_bp[2] = htohc32(sc, xfer->max_packet_count & 3);
2727
2728                         usb_pc_cpu_flush(td->page_cache);
2729                 }
2730         }
2731 }
2732
2733 static void
2734 ehci_device_isoc_hs_close(struct usb_xfer *xfer)
2735 {
2736         ehci_device_done(xfer, USB_ERR_CANCELLED);
2737 }
2738
2739 static void
2740 ehci_device_isoc_hs_enter(struct usb_xfer *xfer)
2741 {
2742         struct usb_page_search buf_res;
2743         ehci_softc_t *sc = EHCI_BUS2SC(xfer->xroot->bus);
2744         ehci_itd_t *td;
2745         ehci_itd_t *td_last = NULL;
2746         ehci_itd_t **pp_last;
2747         bus_size_t page_addr;
2748         uint32_t *plen;
2749         uint32_t status;
2750         uint32_t buf_offset;
2751         uint32_t nframes;
2752         uint32_t itd_offset[8 + 1];
2753         uint8_t x;
2754         uint8_t td_no;
2755         uint8_t page_no;
2756
2757 #if USB_DEBUG
2758         uint8_t once = 1;
2759
2760 #endif
2761
2762         DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
2763             xfer, xfer->endpoint->isoc_next, xfer->nframes);
2764
2765         /* get the current frame index */
2766
2767         nframes = EOREAD4(sc, EHCI_FRINDEX) / 8;
2768
2769         /*
2770          * check if the frame index is within the window where the frames
2771          * will be inserted
2772          */
2773         buf_offset = (nframes - xfer->endpoint->isoc_next) &
2774             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2775
2776         if ((xfer->endpoint->is_synced == 0) ||
2777             (buf_offset < ((xfer->nframes + 7) / 8))) {
2778                 /*
2779                  * If there is data underflow or the pipe queue is empty we
2780                  * schedule the transfer a few frames ahead of the current
2781                  * frame position. Else two isochronous transfers might
2782                  * overlap.
2783                  */
2784                 xfer->endpoint->isoc_next = (nframes + 3) &
2785                     (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2786                 xfer->endpoint->is_synced = 1;
2787                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
2788         }
2789         /*
2790          * compute how many milliseconds the insertion is ahead of the
2791          * current frame position:
2792          */
2793         buf_offset = (xfer->endpoint->isoc_next - nframes) &
2794             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2795
2796         /*
2797          * pre-compute when the isochronous transfer will be finished:
2798          */
2799         xfer->isoc_time_complete =
2800             usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
2801             ((xfer->nframes + 7) / 8);
2802
2803         /* get the real number of frames */
2804
2805         nframes = xfer->nframes;
2806
2807         buf_offset = 0;
2808         td_no = 0;
2809
2810         plen = xfer->frlengths;
2811
2812         /* toggle the DMA set we are using */
2813         xfer->flags_int.curr_dma_set ^= 1;
2814
2815         /* get next DMA set */
2816         td = xfer->td_start[xfer->flags_int.curr_dma_set];
2817         xfer->td_transfer_first = td;
2818
2819         pp_last = &sc->sc_isoc_hs_p_last[xfer->endpoint->isoc_next];
2820
2821         /* store starting position */
2822
2823         xfer->qh_pos = xfer->endpoint->isoc_next;
2824
2825         while (nframes--) {
2826                 if (td == NULL) {
2827                         panic("%s:%d: out of TD's\n",
2828                             __FUNCTION__, __LINE__);
2829                 }
2830                 if (pp_last >= &sc->sc_isoc_hs_p_last[EHCI_VIRTUAL_FRAMELIST_COUNT]) {
2831                         pp_last = &sc->sc_isoc_hs_p_last[0];
2832                 }
2833                 /* range check */
2834                 if (*plen > xfer->max_frame_size) {
2835 #if USB_DEBUG
2836                         if (once) {
2837                                 once = 0;
2838                                 printf("%s: frame length(%d) exceeds %d bytes "
2839                                     "(frame truncated)\n",
2840                                     __FUNCTION__, *plen, xfer->max_frame_size);
2841                         }
2842 #endif
2843                         *plen = xfer->max_frame_size;
2844                 }
2845                 status = (EHCI_ITD_SET_LEN(*plen) |
2846                     EHCI_ITD_ACTIVE |
2847                     EHCI_ITD_SET_PG(0));
2848                 td->itd_status[td_no] = htohc32(sc, status);
2849                 itd_offset[td_no] = buf_offset;
2850                 buf_offset += *plen;
2851                 plen++;
2852                 td_no++;
2853
2854                 if ((td_no == 8) || (nframes == 0)) {
2855
2856                         /* the rest of the transfers are not active, if any */
2857                         for (x = td_no; x != 8; x++) {
2858                                 td->itd_status[x] = 0;  /* not active */
2859                         }
2860
2861                         /* check if there is any data to be transferred */
2862                         if (itd_offset[0] != buf_offset) {
2863                                 page_no = 0;
2864                                 itd_offset[td_no] = buf_offset;
2865
2866                                 /* get first page offset */
2867                                 usbd_get_page(xfer->frbuffers, itd_offset[0], &buf_res);
2868                                 /* get page address */
2869                                 page_addr = buf_res.physaddr & ~0xFFF;
2870                                 /* update page address */
2871                                 td->itd_bp[0] &= htohc32(sc, 0xFFF);
2872                                 td->itd_bp[0] |= htohc32(sc, page_addr);
2873
2874                                 for (x = 0; x != td_no; x++) {
2875                                         /* set page number and page offset */
2876                                         status = (EHCI_ITD_SET_PG(page_no) |
2877                                             (buf_res.physaddr & 0xFFF));
2878                                         td->itd_status[x] |= htohc32(sc, status);
2879
2880                                         /* get next page offset */
2881                                         if (itd_offset[x + 1] == buf_offset) {
2882                                                 /*
2883                                                  * We subtract one so that
2884                                                  * we don't go off the last
2885                                                  * page!
2886                                                  */
2887                                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
2888                                         } else {
2889                                                 usbd_get_page(xfer->frbuffers, itd_offset[x + 1], &buf_res);
2890                                         }
2891
2892                                         /* check if we need a new page */
2893                                         if ((buf_res.physaddr ^ page_addr) & ~0xFFF) {
2894                                                 /* new page needed */
2895                                                 page_addr = buf_res.physaddr & ~0xFFF;
2896                                                 if (page_no == 6) {
2897                                                         panic("%s: too many pages\n", __FUNCTION__);
2898                                                 }
2899                                                 page_no++;
2900                                                 /* update page address */
2901                                                 td->itd_bp[page_no] &= htohc32(sc, 0xFFF);
2902                                                 td->itd_bp[page_no] |= htohc32(sc, page_addr);
2903                                         }
2904                                 }
2905                         }
2906                         /* set IOC bit if we are complete */
2907                         if (nframes == 0) {
2908                                 td->itd_status[7] |= htohc32(sc, EHCI_ITD_IOC);
2909                         }
2910                         usb_pc_cpu_flush(td->page_cache);
2911 #if USB_DEBUG
2912                         if (ehcidebug > 15) {
2913                                 DPRINTF("HS-TD %d\n", nframes);
2914                                 ehci_dump_itd(sc, td);
2915                         }
2916 #endif
2917                         /* insert TD into schedule */
2918                         EHCI_APPEND_HS_TD(td, *pp_last);
2919                         pp_last++;
2920
2921                         td_no = 0;
2922                         td_last = td;
2923                         td = td->obj_next;
2924                 }
2925         }
2926
2927         xfer->td_transfer_last = td_last;
2928
2929         /* update isoc_next */
2930         xfer->endpoint->isoc_next = (pp_last - &sc->sc_isoc_hs_p_last[0]) &
2931             (EHCI_VIRTUAL_FRAMELIST_COUNT - 1);
2932 }
2933
2934 static void
2935 ehci_device_isoc_hs_start(struct usb_xfer *xfer)
2936 {
2937         /* put transfer on interrupt queue */
2938         ehci_transfer_intr_enqueue(xfer);
2939 }
2940
2941 struct usb_pipe_methods ehci_device_isoc_hs_methods =
2942 {
2943         .open = ehci_device_isoc_hs_open,
2944         .close = ehci_device_isoc_hs_close,
2945         .enter = ehci_device_isoc_hs_enter,
2946         .start = ehci_device_isoc_hs_start,
2947 };
2948
2949 /*------------------------------------------------------------------------*
2950  * ehci root control support
2951  *------------------------------------------------------------------------*
2952  * Simulate a hardware hub by handling all the necessary requests.
2953  *------------------------------------------------------------------------*/
2954
2955 static const
2956 struct usb_device_descriptor ehci_devd =
2957 {
2958         sizeof(struct usb_device_descriptor),
2959         UDESC_DEVICE,                   /* type */
2960         {0x00, 0x02},                   /* USB version */
2961         UDCLASS_HUB,                    /* class */
2962         UDSUBCLASS_HUB,                 /* subclass */
2963         UDPROTO_HSHUBSTT,               /* protocol */
2964         64,                             /* max packet */
2965         {0}, {0}, {0x00, 0x01},         /* device id */
2966         1, 2, 0,                        /* string indicies */
2967         1                               /* # of configurations */
2968 };
2969
2970 static const
2971 struct usb_device_qualifier ehci_odevd =
2972 {
2973         sizeof(struct usb_device_qualifier),
2974         UDESC_DEVICE_QUALIFIER,         /* type */
2975         {0x00, 0x02},                   /* USB version */
2976         UDCLASS_HUB,                    /* class */
2977         UDSUBCLASS_HUB,                 /* subclass */
2978         UDPROTO_FSHUB,                  /* protocol */
2979         0,                              /* max packet */
2980         0,                              /* # of configurations */
2981         0
2982 };
2983
2984 static const struct ehci_config_desc ehci_confd = {
2985         .confd = {
2986                 .bLength = sizeof(struct usb_config_descriptor),
2987                 .bDescriptorType = UDESC_CONFIG,
2988                 .wTotalLength[0] = sizeof(ehci_confd),
2989                 .bNumInterface = 1,
2990                 .bConfigurationValue = 1,
2991                 .iConfiguration = 0,
2992                 .bmAttributes = UC_SELF_POWERED,
2993                 .bMaxPower = 0          /* max power */
2994         },
2995         .ifcd = {
2996                 .bLength = sizeof(struct usb_interface_descriptor),
2997                 .bDescriptorType = UDESC_INTERFACE,
2998                 .bNumEndpoints = 1,
2999                 .bInterfaceClass = UICLASS_HUB,
3000                 .bInterfaceSubClass = UISUBCLASS_HUB,
3001                 .bInterfaceProtocol = UIPROTO_HSHUBSTT,
3002                 0
3003         },
3004         .endpd = {
3005                 .bLength = sizeof(struct usb_endpoint_descriptor),
3006                 .bDescriptorType = UDESC_ENDPOINT,
3007                 .bEndpointAddress = UE_DIR_IN | EHCI_INTR_ENDPT,
3008                 .bmAttributes = UE_INTERRUPT,
3009                 .wMaxPacketSize[0] = 8, /* max packet (63 ports) */
3010                 .bInterval = 255,
3011         },
3012 };
3013
3014 static const
3015 struct usb_hub_descriptor ehci_hubd =
3016 {
3017         0,                              /* dynamic length */
3018         UDESC_HUB,
3019         0,
3020         {0, 0},
3021         0,
3022         0,
3023         {0},
3024 };
3025
3026 static void
3027 ehci_disown(ehci_softc_t *sc, uint16_t index, uint8_t lowspeed)
3028 {
3029         uint32_t port;
3030         uint32_t v;
3031
3032         DPRINTF("index=%d lowspeed=%d\n", index, lowspeed);
3033
3034         port = EHCI_PORTSC(index);
3035         v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3036         EOWRITE4(sc, port, v | EHCI_PS_PO);
3037 }
3038
3039 static usb_error_t
3040 ehci_roothub_exec(struct usb_device *udev,
3041     struct usb_device_request *req, const void **pptr, uint16_t *plength)
3042 {
3043         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3044         const char *str_ptr;
3045         const void *ptr;
3046         uint32_t port;
3047         uint32_t v;
3048         uint16_t len;
3049         uint16_t i;
3050         uint16_t value;
3051         uint16_t index;
3052         uint8_t l;
3053         usb_error_t err;
3054
3055         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
3056
3057         /* buffer reset */
3058         ptr = (const void *)&sc->sc_hub_desc;
3059         len = 0;
3060         err = 0;
3061
3062         value = UGETW(req->wValue);
3063         index = UGETW(req->wIndex);
3064
3065         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
3066             "wValue=0x%04x wIndex=0x%04x\n",
3067             req->bmRequestType, req->bRequest,
3068             UGETW(req->wLength), value, index);
3069
3070 #define C(x,y) ((x) | ((y) << 8))
3071         switch (C(req->bRequest, req->bmRequestType)) {
3072         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3073         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3074         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3075                 /*
3076                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3077                  * for the integrated root hub.
3078                  */
3079                 break;
3080         case C(UR_GET_CONFIG, UT_READ_DEVICE):
3081                 len = 1;
3082                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
3083                 break;
3084         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3085                 switch (value >> 8) {
3086                 case UDESC_DEVICE:
3087                         if ((value & 0xff) != 0) {
3088                                 err = USB_ERR_IOERROR;
3089                                 goto done;
3090                         }
3091                         len = sizeof(ehci_devd);
3092                         ptr = (const void *)&ehci_devd;
3093                         break;
3094                         /*
3095                          * We can't really operate at another speed,
3096                          * but the specification says we need this
3097                          * descriptor:
3098                          */
3099                 case UDESC_DEVICE_QUALIFIER:
3100                         if ((value & 0xff) != 0) {
3101                                 err = USB_ERR_IOERROR;
3102                                 goto done;
3103                         }
3104                         len = sizeof(ehci_odevd);
3105                         ptr = (const void *)&ehci_odevd;
3106                         break;
3107
3108                 case UDESC_CONFIG:
3109                         if ((value & 0xff) != 0) {
3110                                 err = USB_ERR_IOERROR;
3111                                 goto done;
3112                         }
3113                         len = sizeof(ehci_confd);
3114                         ptr = (const void *)&ehci_confd;
3115                         break;
3116
3117                 case UDESC_STRING:
3118                         switch (value & 0xff) {
3119                         case 0: /* Language table */
3120                                 str_ptr = "\001";
3121                                 break;
3122
3123                         case 1: /* Vendor */
3124                                 str_ptr = sc->sc_vendor;
3125                                 break;
3126
3127                         case 2: /* Product */
3128                                 str_ptr = "EHCI root HUB";
3129                                 break;
3130
3131                         default:
3132                                 str_ptr = "";
3133                                 break;
3134                         }
3135
3136                         len = usb_make_str_desc(
3137                             sc->sc_hub_desc.temp,
3138                             sizeof(sc->sc_hub_desc.temp),
3139                             str_ptr);
3140                         break;
3141                 default:
3142                         err = USB_ERR_IOERROR;
3143                         goto done;
3144                 }
3145                 break;
3146         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3147                 len = 1;
3148                 sc->sc_hub_desc.temp[0] = 0;
3149                 break;
3150         case C(UR_GET_STATUS, UT_READ_DEVICE):
3151                 len = 2;
3152                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
3153                 break;
3154         case C(UR_GET_STATUS, UT_READ_INTERFACE):
3155         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3156                 len = 2;
3157                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
3158                 break;
3159         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3160                 if (value >= EHCI_MAX_DEVICES) {
3161                         err = USB_ERR_IOERROR;
3162                         goto done;
3163                 }
3164                 sc->sc_addr = value;
3165                 break;
3166         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3167                 if ((value != 0) && (value != 1)) {
3168                         err = USB_ERR_IOERROR;
3169                         goto done;
3170                 }
3171                 sc->sc_conf = value;
3172                 break;
3173         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3174                 break;
3175         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3176         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3177         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3178                 err = USB_ERR_IOERROR;
3179                 goto done;
3180         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3181                 break;
3182         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3183                 break;
3184                 /* Hub requests */
3185         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3186                 break;
3187         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3188                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE\n");
3189
3190                 if ((index < 1) ||
3191                     (index > sc->sc_noport)) {
3192                         err = USB_ERR_IOERROR;
3193                         goto done;
3194                 }
3195                 port = EHCI_PORTSC(index);
3196                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3197                 switch (value) {
3198                 case UHF_PORT_ENABLE:
3199                         EOWRITE4(sc, port, v & ~EHCI_PS_PE);
3200                         break;
3201                 case UHF_PORT_SUSPEND:
3202                         if ((v & EHCI_PS_SUSP) && (!(v & EHCI_PS_FPR))) {
3203
3204                                 /*
3205                                  * waking up a High Speed device is rather
3206                                  * complicated if
3207                                  */
3208                                 EOWRITE4(sc, port, v | EHCI_PS_FPR);
3209                         }
3210                         /* wait 20ms for resume sequence to complete */
3211                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 50);
3212
3213                         EOWRITE4(sc, port, v & ~(EHCI_PS_SUSP |
3214                             EHCI_PS_FPR | (3 << 10) /* High Speed */ ));
3215
3216                         /* 4ms settle time */
3217                         usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 250);
3218                         break;
3219                 case UHF_PORT_POWER:
3220                         EOWRITE4(sc, port, v & ~EHCI_PS_PP);
3221                         break;
3222                 case UHF_PORT_TEST:
3223                         DPRINTFN(3, "clear port test "
3224                             "%d\n", index);
3225                         break;
3226                 case UHF_PORT_INDICATOR:
3227                         DPRINTFN(3, "clear port ind "
3228                             "%d\n", index);
3229                         EOWRITE4(sc, port, v & ~EHCI_PS_PIC);
3230                         break;
3231                 case UHF_C_PORT_CONNECTION:
3232                         EOWRITE4(sc, port, v | EHCI_PS_CSC);
3233                         break;
3234                 case UHF_C_PORT_ENABLE:
3235                         EOWRITE4(sc, port, v | EHCI_PS_PEC);
3236                         break;
3237                 case UHF_C_PORT_SUSPEND:
3238                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3239                         break;
3240                 case UHF_C_PORT_OVER_CURRENT:
3241                         EOWRITE4(sc, port, v | EHCI_PS_OCC);
3242                         break;
3243                 case UHF_C_PORT_RESET:
3244                         sc->sc_isreset = 0;
3245                         break;
3246                 default:
3247                         err = USB_ERR_IOERROR;
3248                         goto done;
3249                 }
3250                 break;
3251         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3252                 if ((value & 0xff) != 0) {
3253                         err = USB_ERR_IOERROR;
3254                         goto done;
3255                 }
3256                 v = EOREAD4(sc, EHCI_HCSPARAMS);
3257
3258                 sc->sc_hub_desc.hubd = ehci_hubd;
3259                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
3260                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
3261                     (EHCI_HCS_PPC(v) ? UHD_PWR_INDIVIDUAL : UHD_PWR_NO_SWITCH) |
3262                     (EHCI_HCS_P_INDICATOR(EREAD4(sc, EHCI_HCSPARAMS)) ?
3263                     UHD_PORT_IND : 0));
3264                 /* XXX can't find out? */
3265                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = 200;
3266                 for (l = 0; l < sc->sc_noport; l++) {
3267                         /* XXX can't find out? */
3268                         sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] &= ~(1 << (l % 8));
3269                 }
3270                 sc->sc_hub_desc.hubd.bDescLength =
3271                     8 + ((sc->sc_noport + 7) / 8);
3272                 len = sc->sc_hub_desc.hubd.bDescLength;
3273                 break;
3274         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3275                 len = 16;
3276                 bzero(sc->sc_hub_desc.temp, 16);
3277                 break;
3278         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3279                 DPRINTFN(9, "get port status i=%d\n",
3280                     index);
3281                 if ((index < 1) ||
3282                     (index > sc->sc_noport)) {
3283                         err = USB_ERR_IOERROR;
3284                         goto done;
3285                 }
3286                 v = EOREAD4(sc, EHCI_PORTSC(index));
3287                 DPRINTFN(9, "port status=0x%04x\n", v);
3288                 if (sc->sc_flags & (EHCI_SCFLG_FORCESPEED | EHCI_SCFLG_TT)) {
3289                         if ((v & 0xc000000) == 0x8000000)
3290                                 i = UPS_HIGH_SPEED;
3291                         else if ((v & 0xc000000) == 0x4000000)
3292                                 i = UPS_LOW_SPEED;
3293                         else
3294                                 i = 0;
3295                 } else {
3296                         i = UPS_HIGH_SPEED;
3297                 }
3298                 if (v & EHCI_PS_CS)
3299                         i |= UPS_CURRENT_CONNECT_STATUS;
3300                 if (v & EHCI_PS_PE)
3301                         i |= UPS_PORT_ENABLED;
3302                 if ((v & EHCI_PS_SUSP) && !(v & EHCI_PS_FPR))
3303                         i |= UPS_SUSPEND;
3304                 if (v & EHCI_PS_OCA)
3305                         i |= UPS_OVERCURRENT_INDICATOR;
3306                 if (v & EHCI_PS_PR)
3307                         i |= UPS_RESET;
3308                 if (v & EHCI_PS_PP)
3309                         i |= UPS_PORT_POWER;
3310                 USETW(sc->sc_hub_desc.ps.wPortStatus, i);
3311                 i = 0;
3312                 if (v & EHCI_PS_CSC)
3313                         i |= UPS_C_CONNECT_STATUS;
3314                 if (v & EHCI_PS_PEC)
3315                         i |= UPS_C_PORT_ENABLED;
3316                 if (v & EHCI_PS_OCC)
3317                         i |= UPS_C_OVERCURRENT_INDICATOR;
3318                 if (v & EHCI_PS_FPR)
3319                         i |= UPS_C_SUSPEND;
3320                 if (sc->sc_isreset)
3321                         i |= UPS_C_PORT_RESET;
3322                 USETW(sc->sc_hub_desc.ps.wPortChange, i);
3323                 len = sizeof(sc->sc_hub_desc.ps);
3324                 break;
3325         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3326                 err = USB_ERR_IOERROR;
3327                 goto done;
3328         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3329                 break;
3330         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3331                 if ((index < 1) ||
3332                     (index > sc->sc_noport)) {
3333                         err = USB_ERR_IOERROR;
3334                         goto done;
3335                 }
3336                 port = EHCI_PORTSC(index);
3337                 v = EOREAD4(sc, port) & ~EHCI_PS_CLEAR;
3338                 switch (value) {
3339                 case UHF_PORT_ENABLE:
3340                         EOWRITE4(sc, port, v | EHCI_PS_PE);
3341                         break;
3342                 case UHF_PORT_SUSPEND:
3343                         EOWRITE4(sc, port, v | EHCI_PS_SUSP);
3344                         break;
3345                 case UHF_PORT_RESET:
3346                         DPRINTFN(6, "reset port %d\n", index);
3347 #if USB_DEBUG
3348                         if (ehcinohighspeed) {
3349                                 /*
3350                                  * Connect USB device to companion
3351                                  * controller.
3352                                  */
3353                                 ehci_disown(sc, index, 1);
3354                                 break;
3355                         }
3356 #endif
3357                         if (EHCI_PS_IS_LOWSPEED(v) &&
3358                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3359                                 /* Low speed device, give up ownership. */
3360                                 ehci_disown(sc, index, 1);
3361                                 break;
3362                         }
3363                         /* Start reset sequence. */
3364                         v &= ~(EHCI_PS_PE | EHCI_PS_PR);
3365                         EOWRITE4(sc, port, v | EHCI_PS_PR);
3366
3367                         /* Wait for reset to complete. */
3368                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3369                             USB_MS_TO_TICKS(USB_PORT_ROOT_RESET_DELAY));
3370
3371                         /* Terminate reset sequence. */
3372                         if (!(sc->sc_flags & EHCI_SCFLG_NORESTERM))
3373                                 EOWRITE4(sc, port, v);
3374
3375                         /* Wait for HC to complete reset. */
3376                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
3377                             USB_MS_TO_TICKS(EHCI_PORT_RESET_COMPLETE));
3378
3379                         v = EOREAD4(sc, port);
3380                         DPRINTF("ehci after reset, status=0x%08x\n", v);
3381                         if (v & EHCI_PS_PR) {
3382                                 device_printf(sc->sc_bus.bdev,
3383                                     "port reset timeout\n");
3384                                 err = USB_ERR_TIMEOUT;
3385                                 goto done;
3386                         }
3387                         if (!(v & EHCI_PS_PE) &&
3388                             (sc->sc_flags & EHCI_SCFLG_TT) == 0) {
3389                                 /* Not a high speed device, give up ownership.*/
3390                                 ehci_disown(sc, index, 0);
3391                                 break;
3392                         }
3393                         sc->sc_isreset = 1;
3394                         DPRINTF("ehci port %d reset, status = 0x%08x\n",
3395                             index, v);
3396                         break;
3397
3398                 case UHF_PORT_POWER:
3399                         DPRINTFN(3, "set port power %d\n", index);
3400                         EOWRITE4(sc, port, v | EHCI_PS_PP);
3401                         break;
3402
3403                 case UHF_PORT_TEST:
3404                         DPRINTFN(3, "set port test %d\n", index);
3405                         break;
3406
3407                 case UHF_PORT_INDICATOR:
3408                         DPRINTFN(3, "set port ind %d\n", index);
3409                         EOWRITE4(sc, port, v | EHCI_PS_PIC);
3410                         break;
3411
3412                 default:
3413                         err = USB_ERR_IOERROR;
3414                         goto done;
3415                 }
3416                 break;
3417         case C(UR_CLEAR_TT_BUFFER, UT_WRITE_CLASS_OTHER):
3418         case C(UR_RESET_TT, UT_WRITE_CLASS_OTHER):
3419         case C(UR_GET_TT_STATE, UT_READ_CLASS_OTHER):
3420         case C(UR_STOP_TT, UT_WRITE_CLASS_OTHER):
3421                 break;
3422         default:
3423                 err = USB_ERR_IOERROR;
3424                 goto done;
3425         }
3426 done:
3427         *plength = len;
3428         *pptr = ptr;
3429         return (err);
3430 }
3431
3432 static void
3433 ehci_xfer_setup(struct usb_setup_params *parm)
3434 {
3435         struct usb_page_search page_info;
3436         struct usb_page_cache *pc;
3437         ehci_softc_t *sc;
3438         struct usb_xfer *xfer;
3439         void *last_obj;
3440         uint32_t nqtd;
3441         uint32_t nqh;
3442         uint32_t nsitd;
3443         uint32_t nitd;
3444         uint32_t n;
3445
3446         sc = EHCI_BUS2SC(parm->udev->bus);
3447         xfer = parm->curr_xfer;
3448
3449         nqtd = 0;
3450         nqh = 0;
3451         nsitd = 0;
3452         nitd = 0;
3453
3454         /*
3455          * compute maximum number of some structures
3456          */
3457         if (parm->methods == &ehci_device_ctrl_methods) {
3458
3459                 /*
3460                  * The proof for the "nqtd" formula is illustrated like
3461                  * this:
3462                  *
3463                  * +------------------------------------+
3464                  * |                                    |
3465                  * |         |remainder ->              |
3466                  * |   +-----+---+                      |
3467                  * |   | xxx | x | frm 0                |
3468                  * |   +-----+---++                     |
3469                  * |   | xxx | xx | frm 1               |
3470                  * |   +-----+----+                     |
3471                  * |            ...                     |
3472                  * +------------------------------------+
3473                  *
3474                  * "xxx" means a completely full USB transfer descriptor
3475                  *
3476                  * "x" and "xx" means a short USB packet
3477                  *
3478                  * For the remainder of an USB transfer modulo
3479                  * "max_data_length" we need two USB transfer descriptors.
3480                  * One to transfer the remaining data and one to finalise
3481                  * with a zero length packet in case the "force_short_xfer"
3482                  * flag is set. We only need two USB transfer descriptors in
3483                  * the case where the transfer length of the first one is a
3484                  * factor of "max_frame_size". The rest of the needed USB
3485                  * transfer descriptors is given by the buffer size divided
3486                  * by the maximum data payload.
3487                  */
3488                 parm->hc_max_packet_size = 0x400;
3489                 parm->hc_max_packet_count = 1;
3490                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3491                 xfer->flags_int.bdma_enable = 1;
3492
3493                 usbd_transfer_setup_sub(parm);
3494
3495                 nqh = 1;
3496                 nqtd = ((2 * xfer->nframes) + 1 /* STATUS */
3497                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3498
3499         } else if (parm->methods == &ehci_device_bulk_methods) {
3500
3501                 parm->hc_max_packet_size = 0x400;
3502                 parm->hc_max_packet_count = 1;
3503                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3504                 xfer->flags_int.bdma_enable = 1;
3505
3506                 usbd_transfer_setup_sub(parm);
3507
3508                 nqh = 1;
3509                 nqtd = ((2 * xfer->nframes)
3510                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3511
3512         } else if (parm->methods == &ehci_device_intr_methods) {
3513
3514                 if (parm->speed == USB_SPEED_HIGH) {
3515                         parm->hc_max_packet_size = 0x400;
3516                         parm->hc_max_packet_count = 3;
3517                 } else if (parm->speed == USB_SPEED_FULL) {
3518                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME;
3519                         parm->hc_max_packet_count = 1;
3520                 } else {
3521                         parm->hc_max_packet_size = USB_FS_BYTES_PER_HS_UFRAME / 8;
3522                         parm->hc_max_packet_count = 1;
3523                 }
3524
3525                 parm->hc_max_frame_size = EHCI_QTD_PAYLOAD_MAX;
3526                 xfer->flags_int.bdma_enable = 1;
3527
3528                 usbd_transfer_setup_sub(parm);
3529
3530                 nqh = 1;
3531                 nqtd = ((2 * xfer->nframes)
3532                     + (xfer->max_data_length / xfer->max_hc_frame_size));
3533
3534         } else if (parm->methods == &ehci_device_isoc_fs_methods) {
3535
3536                 parm->hc_max_packet_size = 0x3FF;
3537                 parm->hc_max_packet_count = 1;
3538                 parm->hc_max_frame_size = 0x3FF;
3539                 xfer->flags_int.bdma_enable = 1;
3540
3541                 usbd_transfer_setup_sub(parm);
3542
3543                 nsitd = xfer->nframes;
3544
3545         } else if (parm->methods == &ehci_device_isoc_hs_methods) {
3546
3547                 parm->hc_max_packet_size = 0x400;
3548                 parm->hc_max_packet_count = 3;
3549                 parm->hc_max_frame_size = 0xC00;
3550                 xfer->flags_int.bdma_enable = 1;
3551
3552                 usbd_transfer_setup_sub(parm);
3553
3554                 nitd = (xfer->nframes + 7) / 8;
3555
3556         } else {
3557
3558                 parm->hc_max_packet_size = 0x400;
3559                 parm->hc_max_packet_count = 1;
3560                 parm->hc_max_frame_size = 0x400;
3561
3562                 usbd_transfer_setup_sub(parm);
3563         }
3564
3565 alloc_dma_set:
3566
3567         if (parm->err) {
3568                 return;
3569         }
3570         /*
3571          * Allocate queue heads and transfer descriptors
3572          */
3573         last_obj = NULL;
3574
3575         if (usbd_transfer_setup_sub_malloc(
3576             parm, &pc, sizeof(ehci_itd_t),
3577             EHCI_ITD_ALIGN, nitd)) {
3578                 parm->err = USB_ERR_NOMEM;
3579                 return;
3580         }
3581         if (parm->buf) {
3582                 for (n = 0; n != nitd; n++) {
3583                         ehci_itd_t *td;
3584
3585                         usbd_get_page(pc + n, 0, &page_info);
3586
3587                         td = page_info.buffer;
3588
3589                         /* init TD */
3590                         td->itd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_ITD);
3591                         td->obj_next = last_obj;
3592                         td->page_cache = pc + n;
3593
3594                         last_obj = td;
3595
3596                         usb_pc_cpu_flush(pc + n);
3597                 }
3598         }
3599         if (usbd_transfer_setup_sub_malloc(
3600             parm, &pc, sizeof(ehci_sitd_t),
3601             EHCI_SITD_ALIGN, nsitd)) {
3602                 parm->err = USB_ERR_NOMEM;
3603                 return;
3604         }
3605         if (parm->buf) {
3606                 for (n = 0; n != nsitd; n++) {
3607                         ehci_sitd_t *td;
3608
3609                         usbd_get_page(pc + n, 0, &page_info);
3610
3611                         td = page_info.buffer;
3612
3613                         /* init TD */
3614                         td->sitd_self = htohc32(sc, page_info.physaddr | EHCI_LINK_SITD);
3615                         td->obj_next = last_obj;
3616                         td->page_cache = pc + n;
3617
3618                         last_obj = td;
3619
3620                         usb_pc_cpu_flush(pc + n);
3621                 }
3622         }
3623         if (usbd_transfer_setup_sub_malloc(
3624             parm, &pc, sizeof(ehci_qtd_t),
3625             EHCI_QTD_ALIGN, nqtd)) {
3626                 parm->err = USB_ERR_NOMEM;
3627                 return;
3628         }
3629         if (parm->buf) {
3630                 for (n = 0; n != nqtd; n++) {
3631                         ehci_qtd_t *qtd;
3632
3633                         usbd_get_page(pc + n, 0, &page_info);
3634
3635                         qtd = page_info.buffer;
3636
3637                         /* init TD */
3638                         qtd->qtd_self = htohc32(sc, page_info.physaddr);
3639                         qtd->obj_next = last_obj;
3640                         qtd->page_cache = pc + n;
3641
3642                         last_obj = qtd;
3643
3644                         usb_pc_cpu_flush(pc + n);
3645                 }
3646         }
3647         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
3648
3649         last_obj = NULL;
3650
3651         if (usbd_transfer_setup_sub_malloc(
3652             parm, &pc, sizeof(ehci_qh_t),
3653             EHCI_QH_ALIGN, nqh)) {
3654                 parm->err = USB_ERR_NOMEM;
3655                 return;
3656         }
3657         if (parm->buf) {
3658                 for (n = 0; n != nqh; n++) {
3659                         ehci_qh_t *qh;
3660
3661                         usbd_get_page(pc + n, 0, &page_info);
3662
3663                         qh = page_info.buffer;
3664
3665                         /* init QH */
3666                         qh->qh_self = htohc32(sc, page_info.physaddr | EHCI_LINK_QH);
3667                         qh->obj_next = last_obj;
3668                         qh->page_cache = pc + n;
3669
3670                         last_obj = qh;
3671
3672                         usb_pc_cpu_flush(pc + n);
3673                 }
3674         }
3675         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
3676
3677         if (!xfer->flags_int.curr_dma_set) {
3678                 xfer->flags_int.curr_dma_set = 1;
3679                 goto alloc_dma_set;
3680         }
3681 }
3682
3683 static void
3684 ehci_xfer_unsetup(struct usb_xfer *xfer)
3685 {
3686         return;
3687 }
3688
3689 static void
3690 ehci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
3691     struct usb_endpoint *ep)
3692 {
3693         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3694
3695         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
3696             ep, udev->address,
3697             edesc->bEndpointAddress, udev->flags.usb_mode,
3698             sc->sc_addr);
3699
3700         if (udev->flags.usb_mode != USB_MODE_HOST) {
3701                 /* not supported */
3702                 return;
3703         }
3704         if (udev->device_index != sc->sc_addr) {
3705
3706                 if ((udev->speed != USB_SPEED_HIGH) &&
3707                     ((udev->hs_hub_addr == 0) ||
3708                     (udev->hs_port_no == 0) ||
3709                     (udev->parent_hs_hub == NULL) ||
3710                     (udev->parent_hs_hub->hub == NULL))) {
3711                         /* We need a transaction translator */
3712                         goto done;
3713                 }
3714                 switch (edesc->bmAttributes & UE_XFERTYPE) {
3715                 case UE_CONTROL:
3716                         ep->methods = &ehci_device_ctrl_methods;
3717                         break;
3718                 case UE_INTERRUPT:
3719                         ep->methods = &ehci_device_intr_methods;
3720                         break;
3721                 case UE_ISOCHRONOUS:
3722                         if (udev->speed == USB_SPEED_HIGH) {
3723                                 ep->methods = &ehci_device_isoc_hs_methods;
3724                         } else if (udev->speed == USB_SPEED_FULL) {
3725                                 ep->methods = &ehci_device_isoc_fs_methods;
3726                         }
3727                         break;
3728                 case UE_BULK:
3729                         if (udev->speed != USB_SPEED_LOW) {
3730                                 ep->methods = &ehci_device_bulk_methods;
3731                         }
3732                         break;
3733                 default:
3734                         /* do nothing */
3735                         break;
3736                 }
3737         }
3738 done:
3739         return;
3740 }
3741
3742 static void
3743 ehci_get_dma_delay(struct usb_bus *bus, uint32_t *pus)
3744 {
3745         /*
3746          * Wait until the hardware has finished any possible use of
3747          * the transfer descriptor(s) and QH
3748          */
3749         *pus = (188);                   /* microseconds */
3750 }
3751
3752 static void
3753 ehci_device_resume(struct usb_device *udev)
3754 {
3755         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3756         struct usb_xfer *xfer;
3757         struct usb_pipe_methods *methods;
3758
3759         DPRINTF("\n");
3760
3761         USB_BUS_LOCK(udev->bus);
3762
3763         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3764
3765                 if (xfer->xroot->udev == udev) {
3766
3767                         methods = xfer->endpoint->methods;
3768
3769                         if ((methods == &ehci_device_bulk_methods) ||
3770                             (methods == &ehci_device_ctrl_methods)) {
3771                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3772                                     sc->sc_async_p_last);
3773                         }
3774                         if (methods == &ehci_device_intr_methods) {
3775                                 EHCI_APPEND_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3776                                     sc->sc_intr_p_last[xfer->qh_pos]);
3777                         }
3778                 }
3779         }
3780
3781         USB_BUS_UNLOCK(udev->bus);
3782
3783         return;
3784 }
3785
3786 static void
3787 ehci_device_suspend(struct usb_device *udev)
3788 {
3789         ehci_softc_t *sc = EHCI_BUS2SC(udev->bus);
3790         struct usb_xfer *xfer;
3791         struct usb_pipe_methods *methods;
3792
3793         DPRINTF("\n");
3794
3795         USB_BUS_LOCK(udev->bus);
3796
3797         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
3798
3799                 if (xfer->xroot->udev == udev) {
3800
3801                         methods = xfer->endpoint->methods;
3802
3803                         if ((methods == &ehci_device_bulk_methods) ||
3804                             (methods == &ehci_device_ctrl_methods)) {
3805                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3806                                     sc->sc_async_p_last);
3807                         }
3808                         if (methods == &ehci_device_intr_methods) {
3809                                 EHCI_REMOVE_QH(xfer->qh_start[xfer->flags_int.curr_dma_set],
3810                                     sc->sc_intr_p_last[xfer->qh_pos]);
3811                         }
3812                 }
3813         }
3814
3815         USB_BUS_UNLOCK(udev->bus);
3816
3817         return;
3818 }
3819
3820 static void
3821 ehci_set_hw_power(struct usb_bus *bus)
3822 {
3823         ehci_softc_t *sc = EHCI_BUS2SC(bus);
3824         uint32_t temp;
3825         uint32_t flags;
3826
3827         DPRINTF("\n");
3828
3829         USB_BUS_LOCK(bus);
3830
3831         flags = bus->hw_power_state;
3832
3833         temp = EOREAD4(sc, EHCI_USBCMD);
3834
3835         temp &= ~(EHCI_CMD_ASE | EHCI_CMD_PSE);
3836
3837         if (flags & (USB_HW_POWER_CONTROL |
3838             USB_HW_POWER_BULK)) {
3839                 DPRINTF("Async is active\n");
3840                 temp |= EHCI_CMD_ASE;
3841         }
3842         if (flags & (USB_HW_POWER_INTERRUPT |
3843             USB_HW_POWER_ISOC)) {
3844                 DPRINTF("Periodic is active\n");
3845                 temp |= EHCI_CMD_PSE;
3846         }
3847         EOWRITE4(sc, EHCI_USBCMD, temp);
3848
3849         USB_BUS_UNLOCK(bus);
3850
3851         return;
3852 }
3853
3854 struct usb_bus_methods ehci_bus_methods =
3855 {
3856         .endpoint_init = ehci_ep_init,
3857         .xfer_setup = ehci_xfer_setup,
3858         .xfer_unsetup = ehci_xfer_unsetup,
3859         .get_dma_delay = ehci_get_dma_delay,
3860         .device_resume = ehci_device_resume,
3861         .device_suspend = ehci_device_suspend,
3862         .set_hw_power = ehci_set_hw_power,
3863         .roothub_exec = ehci_roothub_exec,
3864         .xfer_poll = ehci_do_poll,
3865 };