3 * Copyright (c) 2008 Hans Petter Selasky <hselasky@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * This file contains the driver for the USS820 series USB Device
32 * NOTE: The datasheet does not document everything.
35 #ifdef USB_GLOBAL_INCLUDE_FILE
36 #include USB_GLOBAL_INCLUDE_FILE
38 #include <sys/stdint.h>
39 #include <sys/stddef.h>
40 #include <sys/param.h>
41 #include <sys/queue.h>
42 #include <sys/types.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
46 #include <sys/module.h>
48 #include <sys/mutex.h>
49 #include <sys/condvar.h>
50 #include <sys/sysctl.h>
52 #include <sys/unistd.h>
53 #include <sys/callout.h>
54 #include <sys/malloc.h>
57 #include <dev/usb/usb.h>
58 #include <dev/usb/usbdi.h>
60 #define USB_DEBUG_VAR uss820dcidebug
62 #include <dev/usb/usb_core.h>
63 #include <dev/usb/usb_debug.h>
64 #include <dev/usb/usb_busdma.h>
65 #include <dev/usb/usb_process.h>
66 #include <dev/usb/usb_transfer.h>
67 #include <dev/usb/usb_device.h>
68 #include <dev/usb/usb_hub.h>
69 #include <dev/usb/usb_util.h>
71 #include <dev/usb/usb_controller.h>
72 #include <dev/usb/usb_bus.h>
73 #endif /* USB_GLOBAL_INCLUDE_FILE */
75 #include <dev/usb/controller/uss820dci.h>
77 #define USS820_DCI_BUS2SC(bus) \
78 ((struct uss820dci_softc *)(((uint8_t *)(bus)) - \
79 ((uint8_t *)&(((struct uss820dci_softc *)0)->sc_bus))))
81 #define USS820_DCI_PC2SC(pc) \
82 USS820_DCI_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
85 static int uss820dcidebug = 0;
87 static SYSCTL_NODE(_hw_usb, OID_AUTO, uss820dci, CTLFLAG_RW, 0,
89 SYSCTL_INT(_hw_usb_uss820dci, OID_AUTO, debug, CTLFLAG_RW,
90 &uss820dcidebug, 0, "uss820dci debug level");
93 #define USS820_DCI_INTR_ENDPT 1
97 struct usb_bus_methods uss820dci_bus_methods;
98 struct usb_pipe_methods uss820dci_device_bulk_methods;
99 struct usb_pipe_methods uss820dci_device_ctrl_methods;
100 struct usb_pipe_methods uss820dci_device_intr_methods;
101 struct usb_pipe_methods uss820dci_device_isoc_fs_methods;
103 static uss820dci_cmd_t uss820dci_setup_rx;
104 static uss820dci_cmd_t uss820dci_data_rx;
105 static uss820dci_cmd_t uss820dci_data_tx;
106 static uss820dci_cmd_t uss820dci_data_tx_sync;
107 static void uss820dci_device_done(struct usb_xfer *, usb_error_t);
108 static void uss820dci_do_poll(struct usb_bus *);
109 static void uss820dci_standard_done(struct usb_xfer *);
110 static void uss820dci_intr_set(struct usb_xfer *, uint8_t);
111 static void uss820dci_update_shared_1(struct uss820dci_softc *, uint8_t,
113 static void uss820dci_root_intr(struct uss820dci_softc *);
116 * Here is a list of what the USS820D chip can support. The main
117 * limitation is that the sum of the buffer sizes must be less than
120 static const struct usb_hw_ep_profile
121 uss820dci_ep_profile[] = {
124 .max_in_frame_size = 32,
125 .max_out_frame_size = 32,
127 .support_control = 1,
130 .max_in_frame_size = 64,
131 .max_out_frame_size = 64,
133 .support_multi_buffer = 1,
135 .support_interrupt = 1,
140 .max_in_frame_size = 8,
141 .max_out_frame_size = 8,
143 .support_multi_buffer = 1,
145 .support_interrupt = 1,
150 .max_in_frame_size = 256,
151 .max_out_frame_size = 256,
153 .support_multi_buffer = 1,
154 .support_isochronous = 1,
161 uss820dci_update_shared_1(struct uss820dci_softc *sc, uint8_t reg,
162 uint8_t keep_mask, uint8_t set_mask)
166 USS820_WRITE_1(sc, USS820_PEND, 1);
167 temp = USS820_READ_1(sc, reg);
170 USS820_WRITE_1(sc, reg, temp);
171 USS820_WRITE_1(sc, USS820_PEND, 0);
175 uss820dci_get_hw_ep_profile(struct usb_device *udev,
176 const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
179 *ppf = uss820dci_ep_profile + 0;
180 } else if (ep_addr < 5) {
181 *ppf = uss820dci_ep_profile + 1;
182 } else if (ep_addr < 7) {
183 *ppf = uss820dci_ep_profile + 2;
184 } else if (ep_addr == 7) {
185 *ppf = uss820dci_ep_profile + 3;
192 uss820dci_pull_up(struct uss820dci_softc *sc)
196 /* pullup D+, if possible */
198 if (!sc->sc_flags.d_pulled_up &&
199 sc->sc_flags.port_powered) {
200 sc->sc_flags.d_pulled_up = 1;
204 temp = USS820_READ_1(sc, USS820_MCSR);
205 temp |= USS820_MCSR_DPEN;
206 USS820_WRITE_1(sc, USS820_MCSR, temp);
211 uss820dci_pull_down(struct uss820dci_softc *sc)
215 /* pulldown D+, if possible */
217 if (sc->sc_flags.d_pulled_up) {
218 sc->sc_flags.d_pulled_up = 0;
222 temp = USS820_READ_1(sc, USS820_MCSR);
223 temp &= ~USS820_MCSR_DPEN;
224 USS820_WRITE_1(sc, USS820_MCSR, temp);
229 uss820dci_wakeup_peer(struct uss820dci_softc *sc)
231 if (!(sc->sc_flags.status_suspend)) {
234 DPRINTFN(0, "not supported\n");
238 uss820dci_set_address(struct uss820dci_softc *sc, uint8_t addr)
240 DPRINTFN(5, "addr=%d\n", addr);
242 USS820_WRITE_1(sc, USS820_FADDR, addr);
246 uss820dci_setup_rx(struct uss820dci_td *td)
248 struct uss820dci_softc *sc;
249 struct usb_device_request req;
254 /* select the correct endpoint */
255 bus_space_write_1(td->io_tag, td->io_hdl,
256 USS820_EPINDEX, td->ep_index);
258 /* read out FIFO status */
259 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
262 /* get pointer to softc */
263 sc = USS820_DCI_PC2SC(td->pc);
265 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
267 if (!(rx_stat & USS820_RXSTAT_RXSETUP)) {
270 /* clear did stall */
273 /* clear stall and all I/O */
274 uss820dci_update_shared_1(sc, USS820_EPCON,
275 0xFF ^ (USS820_EPCON_TXSTL |
278 USS820_EPCON_TXOE), 0);
280 /* clear end overwrite flag */
281 uss820dci_update_shared_1(sc, USS820_RXSTAT,
282 0xFF ^ USS820_RXSTAT_EDOVW, 0);
284 /* get the packet byte count */
285 count = bus_space_read_1(td->io_tag, td->io_hdl,
287 count |= (bus_space_read_1(td->io_tag, td->io_hdl,
288 USS820_RXCNTH) << 8);
291 /* verify data length */
292 if (count != td->remainder) {
293 DPRINTFN(0, "Invalid SETUP packet "
294 "length, %d bytes\n", count);
295 goto setup_not_complete;
297 if (count != sizeof(req)) {
298 DPRINTFN(0, "Unsupported SETUP packet "
299 "length, %d bytes\n", count);
300 goto setup_not_complete;
303 bus_space_read_multi_1(td->io_tag, td->io_hdl,
304 USS820_RXDAT, (void *)&req, sizeof(req));
306 /* read out FIFO status */
307 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
310 if (rx_stat & (USS820_RXSTAT_EDOVW |
311 USS820_RXSTAT_STOVW)) {
312 DPRINTF("new SETUP packet received\n");
313 return (1); /* not complete */
315 /* clear receive setup bit */
316 uss820dci_update_shared_1(sc, USS820_RXSTAT,
317 0xFF ^ (USS820_RXSTAT_RXSETUP |
318 USS820_RXSTAT_EDOVW |
319 USS820_RXSTAT_STOVW), 0);
322 temp = bus_space_read_1(td->io_tag, td->io_hdl,
324 temp |= USS820_RXCON_RXFFRC;
325 bus_space_write_1(td->io_tag, td->io_hdl,
328 /* copy data into real buffer */
329 usbd_copy_in(td->pc, 0, &req, sizeof(req));
331 td->offset = sizeof(req);
334 /* sneak peek the set address */
335 if ((req.bmRequestType == UT_WRITE_DEVICE) &&
336 (req.bRequest == UR_SET_ADDRESS)) {
337 sc->sc_dv_addr = req.wValue[0] & 0x7F;
339 sc->sc_dv_addr = 0xFF;
343 temp = USS820_READ_1(sc, USS820_TXCON);
344 temp |= USS820_TXCON_TXCLR;
345 USS820_WRITE_1(sc, USS820_TXCON, temp);
346 temp &= ~USS820_TXCON_TXCLR;
347 USS820_WRITE_1(sc, USS820_TXCON, temp);
349 return (0); /* complete */
354 temp = bus_space_read_1(td->io_tag, td->io_hdl,
356 temp |= USS820_RXCON_RXFFRC;
357 bus_space_write_1(td->io_tag, td->io_hdl,
363 /* abort any ongoing transfer */
364 if (!td->did_stall) {
365 DPRINTFN(5, "stalling\n");
367 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF,
368 (USS820_EPCON_TXSTL | USS820_EPCON_RXSTL));
373 /* clear end overwrite flag, if any */
374 if (rx_stat & USS820_RXSTAT_RXSETUP) {
375 uss820dci_update_shared_1(sc, USS820_RXSTAT,
376 0xFF ^ (USS820_RXSTAT_EDOVW |
377 USS820_RXSTAT_STOVW |
378 USS820_RXSTAT_RXSETUP), 0);
380 return (1); /* not complete */
385 uss820dci_data_rx(struct uss820dci_td *td)
387 struct usb_page_search buf_res;
395 to = 2; /* don't loop forever! */
398 /* select the correct endpoint */
399 bus_space_write_1(td->io_tag, td->io_hdl, USS820_EPINDEX, td->ep_index);
401 /* check if any of the FIFO banks have data */
403 /* read out FIFO flag */
404 rx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
406 /* read out FIFO status */
407 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
410 DPRINTFN(5, "rx_stat=0x%02x rx_flag=0x%02x rem=%u\n",
411 rx_stat, rx_flag, td->remainder);
413 if (rx_stat & (USS820_RXSTAT_RXSETUP |
414 USS820_RXSTAT_RXSOVW |
415 USS820_RXSTAT_EDOVW)) {
416 if (td->remainder == 0) {
418 * We are actually complete and have
419 * received the next SETUP
421 DPRINTFN(5, "faking complete\n");
422 return (0); /* complete */
425 * USB Host Aborted the transfer.
428 return (0); /* complete */
430 /* check for errors */
431 if (rx_flag & (USS820_RXFLG_RXOVF |
432 USS820_RXFLG_RXURF)) {
433 DPRINTFN(5, "overflow or underflow\n");
434 /* should not happen */
436 return (0); /* complete */
439 if (!(rx_flag & (USS820_RXFLG_RXFIF0 |
440 USS820_RXFLG_RXFIF1))) {
442 /* read out EPCON register */
443 /* enable RX input */
444 if (!td->did_enable) {
445 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
446 USS820_EPCON, 0xFF, USS820_EPCON_RXIE);
449 return (1); /* not complete */
451 /* get the packet byte count */
452 count = bus_space_read_1(td->io_tag, td->io_hdl,
455 count |= (bus_space_read_1(td->io_tag, td->io_hdl,
456 USS820_RXCNTH) << 8);
459 DPRINTFN(5, "count=0x%04x\n", count);
461 /* verify the packet byte count */
462 if (count != td->max_packet_size) {
463 if (count < td->max_packet_size) {
464 /* we have a short packet */
468 /* invalid USB packet */
470 return (0); /* we are complete */
473 /* verify the packet byte count */
474 if (count > td->remainder) {
475 /* invalid USB packet */
477 return (0); /* we are complete */
480 usbd_get_page(td->pc, td->offset, &buf_res);
482 /* get correct length */
483 if (buf_res.length > count) {
484 buf_res.length = count;
487 bus_space_read_multi_1(td->io_tag, td->io_hdl,
488 USS820_RXDAT, buf_res.buffer, buf_res.length);
490 /* update counters */
491 count -= buf_res.length;
492 td->offset += buf_res.length;
493 td->remainder -= buf_res.length;
497 rx_cntl = bus_space_read_1(td->io_tag, td->io_hdl,
499 rx_cntl |= USS820_RXCON_RXFFRC;
500 bus_space_write_1(td->io_tag, td->io_hdl,
501 USS820_RXCON, rx_cntl);
503 /* check if we are complete */
504 if ((td->remainder == 0) || got_short) {
506 /* we are complete */
509 /* else need to receive a zero length packet */
514 return (1); /* not complete */
518 uss820dci_data_tx(struct uss820dci_td *td)
520 struct usb_page_search buf_res;
527 /* select the correct endpoint */
528 bus_space_write_1(td->io_tag, td->io_hdl,
529 USS820_EPINDEX, td->ep_index);
531 to = 2; /* don't loop forever! */
534 /* read out TX FIFO flags */
535 tx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
538 /* read out RX FIFO status last */
539 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
542 DPRINTFN(5, "rx_stat=0x%02x tx_flag=0x%02x rem=%u\n",
543 rx_stat, tx_flag, td->remainder);
545 if (rx_stat & (USS820_RXSTAT_RXSETUP |
546 USS820_RXSTAT_RXSOVW |
547 USS820_RXSTAT_EDOVW)) {
549 * The current transfer was aborted
553 return (0); /* complete */
555 if (tx_flag & (USS820_TXFLG_TXOVF |
556 USS820_TXFLG_TXURF)) {
558 return (0); /* complete */
560 if (tx_flag & USS820_TXFLG_TXFIF0) {
561 if (tx_flag & USS820_TXFLG_TXFIF1) {
562 return (1); /* not complete */
565 if ((!td->support_multi_buffer) &&
566 (tx_flag & (USS820_TXFLG_TXFIF0 |
567 USS820_TXFLG_TXFIF1))) {
568 return (1); /* not complete */
570 count = td->max_packet_size;
571 if (td->remainder < count) {
572 /* we have a short packet */
574 count = td->remainder;
579 usbd_get_page(td->pc, td->offset, &buf_res);
581 /* get correct length */
582 if (buf_res.length > count) {
583 buf_res.length = count;
586 bus_space_write_multi_1(td->io_tag, td->io_hdl,
587 USS820_TXDAT, buf_res.buffer, buf_res.length);
589 /* update counters */
590 count -= buf_res.length;
591 td->offset += buf_res.length;
592 td->remainder -= buf_res.length;
595 /* post-write high packet byte count first */
596 bus_space_write_1(td->io_tag, td->io_hdl,
597 USS820_TXCNTH, count_copy >> 8);
599 /* post-write low packet byte count last */
600 bus_space_write_1(td->io_tag, td->io_hdl,
601 USS820_TXCNTL, count_copy);
604 * Enable TX output, which must happen after that we have written
605 * data into the FIFO. This is undocumented.
607 if (!td->did_enable) {
608 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
609 USS820_EPCON, 0xFF, USS820_EPCON_TXOE);
612 /* check remainder */
613 if (td->remainder == 0) {
615 return (0); /* complete */
617 /* else we need to transmit a short packet */
622 return (1); /* not complete */
626 uss820dci_data_tx_sync(struct uss820dci_td *td)
628 struct uss820dci_softc *sc;
632 /* select the correct endpoint */
633 bus_space_write_1(td->io_tag, td->io_hdl,
634 USS820_EPINDEX, td->ep_index);
636 /* read out TX FIFO flag */
637 tx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
640 /* read out RX FIFO status last */
641 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
644 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
646 if (rx_stat & (USS820_RXSTAT_RXSETUP |
647 USS820_RXSTAT_RXSOVW |
648 USS820_RXSTAT_EDOVW)) {
649 DPRINTFN(5, "faking complete\n");
651 return (0); /* complete */
653 DPRINTFN(5, "tx_flag=0x%02x rem=%u\n",
654 tx_flag, td->remainder);
656 if (tx_flag & (USS820_TXFLG_TXOVF |
657 USS820_TXFLG_TXURF)) {
659 return (0); /* complete */
661 if (tx_flag & (USS820_TXFLG_TXFIF0 |
662 USS820_TXFLG_TXFIF1)) {
663 return (1); /* not complete */
665 sc = USS820_DCI_PC2SC(td->pc);
666 if (sc->sc_dv_addr != 0xFF) {
667 /* write function address */
668 uss820dci_set_address(sc, sc->sc_dv_addr);
670 return (0); /* complete */
674 uss820dci_xfer_do_fifo(struct usb_xfer *xfer)
676 struct uss820dci_td *td;
680 td = xfer->td_transfer_cache;
682 if ((td->func) (td)) {
683 /* operation in progress */
686 if (((void *)td) == xfer->td_transfer_last) {
691 } else if (td->remainder > 0) {
693 * We had a short transfer. If there is no alternate
694 * next, stop processing !
701 * Fetch the next transfer descriptor.
704 xfer->td_transfer_cache = td;
706 return (1); /* not complete */
709 /* compute all actual lengths */
711 uss820dci_standard_done(xfer);
713 return (0); /* complete */
717 uss820dci_interrupt_poll(struct uss820dci_softc *sc)
719 struct usb_xfer *xfer;
722 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
723 if (!uss820dci_xfer_do_fifo(xfer)) {
724 /* queue has been modified */
731 uss820dci_wait_suspend(struct uss820dci_softc *sc, uint8_t on)
736 scr = USS820_READ_1(sc, USS820_SCR);
737 scratch = USS820_READ_1(sc, USS820_SCRATCH);
740 scr |= USS820_SCR_IE_SUSP;
741 scratch &= ~USS820_SCRATCH_IE_RESUME;
743 scr &= ~USS820_SCR_IE_SUSP;
744 scratch |= USS820_SCRATCH_IE_RESUME;
747 USS820_WRITE_1(sc, USS820_SCR, scr);
748 USS820_WRITE_1(sc, USS820_SCRATCH, scratch);
752 uss820dci_interrupt(struct uss820dci_softc *sc)
757 USB_BUS_LOCK(&sc->sc_bus);
759 ssr = USS820_READ_1(sc, USS820_SSR);
761 ssr &= (USS820_SSR_SUSPEND |
765 /* acknowledge all interrupts */
767 uss820dci_update_shared_1(sc, USS820_SSR, 0, 0);
769 /* check for any bus state change interrupts */
775 if (ssr & USS820_SSR_RESET) {
776 sc->sc_flags.status_bus_reset = 1;
777 sc->sc_flags.status_suspend = 0;
778 sc->sc_flags.change_suspend = 0;
779 sc->sc_flags.change_connect = 1;
781 /* disable resume interrupt */
782 uss820dci_wait_suspend(sc, 1);
787 * If "RESUME" and "SUSPEND" is set at the same time
788 * we interpret that like "RESUME". Resume is set when
789 * there is at least 3 milliseconds of inactivity on
792 if (ssr & USS820_SSR_RESUME) {
793 if (sc->sc_flags.status_suspend) {
794 sc->sc_flags.status_suspend = 0;
795 sc->sc_flags.change_suspend = 1;
796 /* disable resume interrupt */
797 uss820dci_wait_suspend(sc, 1);
800 } else if (ssr & USS820_SSR_SUSPEND) {
801 if (!sc->sc_flags.status_suspend) {
802 sc->sc_flags.status_suspend = 1;
803 sc->sc_flags.change_suspend = 1;
804 /* enable resume interrupt */
805 uss820dci_wait_suspend(sc, 0);
811 DPRINTF("real bus interrupt 0x%02x\n", ssr);
813 /* complete root HUB interrupt endpoint */
814 uss820dci_root_intr(sc);
817 /* acknowledge all SBI interrupts */
818 uss820dci_update_shared_1(sc, USS820_SBI, 0, 0);
820 /* acknowledge all SBI1 interrupts */
821 uss820dci_update_shared_1(sc, USS820_SBI1, 0, 0);
823 /* poll all active transfers */
824 uss820dci_interrupt_poll(sc);
826 USB_BUS_UNLOCK(&sc->sc_bus);
830 uss820dci_setup_standard_chain_sub(struct uss820_std_temp *temp)
832 struct uss820dci_td *td;
834 /* get current Transfer Descriptor */
838 /* prepare for next TD */
839 temp->td_next = td->obj_next;
841 /* fill out the Transfer Descriptor */
842 td->func = temp->func;
844 td->offset = temp->offset;
845 td->remainder = temp->len;
848 td->did_stall = temp->did_stall;
849 td->short_pkt = temp->short_pkt;
850 td->alt_next = temp->setup_alt_next;
854 uss820dci_setup_standard_chain(struct usb_xfer *xfer)
856 struct uss820_std_temp temp;
857 struct uss820dci_softc *sc;
858 struct uss820dci_td *td;
862 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
863 xfer->address, UE_GET_ADDR(xfer->endpointno),
864 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
866 temp.max_frame_size = xfer->max_frame_size;
868 td = xfer->td_start[0];
869 xfer->td_transfer_first = td;
870 xfer->td_transfer_cache = td;
876 temp.td_next = xfer->td_start[0];
878 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
879 temp.did_stall = !xfer->flags_int.control_stall;
881 sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
882 ep_no = (xfer->endpointno & UE_ADDR);
884 /* check if we should prepend a setup message */
886 if (xfer->flags_int.control_xfr) {
887 if (xfer->flags_int.control_hdr) {
889 temp.func = &uss820dci_setup_rx;
890 temp.len = xfer->frlengths[0];
891 temp.pc = xfer->frbuffers + 0;
892 temp.short_pkt = temp.len ? 1 : 0;
893 /* check for last frame */
894 if (xfer->nframes == 1) {
895 /* no STATUS stage yet, SETUP is last */
896 if (xfer->flags_int.control_act)
897 temp.setup_alt_next = 0;
900 uss820dci_setup_standard_chain_sub(&temp);
907 if (x != xfer->nframes) {
908 if (xfer->endpointno & UE_DIR_IN) {
909 temp.func = &uss820dci_data_tx;
911 temp.func = &uss820dci_data_rx;
914 /* setup "pc" pointer */
915 temp.pc = xfer->frbuffers + x;
917 while (x != xfer->nframes) {
919 /* DATA0 / DATA1 message */
921 temp.len = xfer->frlengths[x];
925 if (x == xfer->nframes) {
926 if (xfer->flags_int.control_xfr) {
927 if (xfer->flags_int.control_act) {
928 temp.setup_alt_next = 0;
931 temp.setup_alt_next = 0;
936 /* make sure that we send an USB packet */
942 /* regular data transfer */
944 temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
947 uss820dci_setup_standard_chain_sub(&temp);
949 if (xfer->flags_int.isochronous_xfr) {
950 temp.offset += temp.len;
952 /* get next Page Cache pointer */
953 temp.pc = xfer->frbuffers + x;
957 /* check for control transfer */
958 if (xfer->flags_int.control_xfr) {
961 /* always setup a valid "pc" pointer for status and sync */
962 temp.pc = xfer->frbuffers + 0;
965 temp.setup_alt_next = 0;
967 /* check if we should append a status stage */
968 if (!xfer->flags_int.control_act) {
971 * Send a DATA1 message and invert the current
972 * endpoint direction.
974 if (xfer->endpointno & UE_DIR_IN) {
975 temp.func = &uss820dci_data_rx;
978 temp.func = &uss820dci_data_tx;
984 uss820dci_setup_standard_chain_sub(&temp);
986 /* we need a SYNC point after TX */
987 temp.func = &uss820dci_data_tx_sync;
988 uss820dci_setup_standard_chain_sub(&temp);
992 /* must have at least one frame! */
994 xfer->td_transfer_last = td;
998 uss820dci_timeout(void *arg)
1000 struct usb_xfer *xfer = arg;
1002 DPRINTF("xfer=%p\n", xfer);
1004 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1006 /* transfer is transferred */
1007 uss820dci_device_done(xfer, USB_ERR_TIMEOUT);
1011 uss820dci_intr_set(struct usb_xfer *xfer, uint8_t set)
1013 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1014 uint8_t ep_no = (xfer->endpointno & UE_ADDR);
1018 DPRINTFN(15, "endpoint 0x%02x\n", xfer->endpointno);
1021 ep_reg = USS820_SBIE1;
1023 ep_reg = USS820_SBIE;
1027 ep_no = 1 << (2 * ep_no);
1029 if (xfer->flags_int.control_xfr) {
1030 if (xfer->flags_int.control_hdr) {
1031 ep_no <<= 1; /* RX interrupt only */
1033 ep_no |= (ep_no << 1); /* RX and TX interrupt */
1036 if (!(xfer->endpointno & UE_DIR_IN)) {
1040 temp = USS820_READ_1(sc, ep_reg);
1046 USS820_WRITE_1(sc, ep_reg, temp);
1050 uss820dci_start_standard_chain(struct usb_xfer *xfer)
1055 if (uss820dci_xfer_do_fifo(xfer)) {
1058 * Only enable the endpoint interrupt when we are
1059 * actually waiting for data, hence we are dealing
1060 * with level triggered interrupts !
1062 uss820dci_intr_set(xfer, 1);
1064 /* put transfer on interrupt queue */
1065 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
1067 /* start timeout, if any */
1068 if (xfer->timeout != 0) {
1069 usbd_transfer_timeout_ms(xfer,
1070 &uss820dci_timeout, xfer->timeout);
1076 uss820dci_root_intr(struct uss820dci_softc *sc)
1080 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1083 sc->sc_hub_idata[0] = 0x02; /* we only have one port */
1085 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1086 sizeof(sc->sc_hub_idata));
1090 uss820dci_standard_done_sub(struct usb_xfer *xfer)
1092 struct uss820dci_td *td;
1098 td = xfer->td_transfer_cache;
1101 len = td->remainder;
1103 if (xfer->aframes != xfer->nframes) {
1105 * Verify the length and subtract
1106 * the remainder from "frlengths[]":
1108 if (len > xfer->frlengths[xfer->aframes]) {
1111 xfer->frlengths[xfer->aframes] -= len;
1114 /* Check for transfer error */
1116 /* the transfer is finished */
1121 /* Check for short transfer */
1123 if (xfer->flags_int.short_frames_ok) {
1124 /* follow alt next */
1131 /* the transfer is finished */
1139 /* this USB frame is complete */
1145 /* update transfer cache */
1147 xfer->td_transfer_cache = td;
1150 USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1154 uss820dci_standard_done(struct usb_xfer *xfer)
1156 usb_error_t err = 0;
1158 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1159 xfer, xfer->endpoint);
1163 xfer->td_transfer_cache = xfer->td_transfer_first;
1165 if (xfer->flags_int.control_xfr) {
1167 if (xfer->flags_int.control_hdr) {
1169 err = uss820dci_standard_done_sub(xfer);
1173 if (xfer->td_transfer_cache == NULL) {
1177 while (xfer->aframes != xfer->nframes) {
1179 err = uss820dci_standard_done_sub(xfer);
1182 if (xfer->td_transfer_cache == NULL) {
1187 if (xfer->flags_int.control_xfr &&
1188 !xfer->flags_int.control_act) {
1190 err = uss820dci_standard_done_sub(xfer);
1193 uss820dci_device_done(xfer, err);
1196 /*------------------------------------------------------------------------*
1197 * uss820dci_device_done
1199 * NOTE: this function can be called more than one time on the
1200 * same USB transfer!
1201 *------------------------------------------------------------------------*/
1203 uss820dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1205 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1207 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1208 xfer, xfer->endpoint, error);
1210 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1211 uss820dci_intr_set(xfer, 0);
1213 /* dequeue transfer and start next transfer */
1214 usbd_transfer_done(xfer, error);
1218 uss820dci_xfer_stall(struct usb_xfer *xfer)
1220 uss820dci_device_done(xfer, USB_ERR_STALLED);
1224 uss820dci_set_stall(struct usb_device *udev,
1225 struct usb_endpoint *ep, uint8_t *did_stall)
1227 struct uss820dci_softc *sc;
1233 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1235 DPRINTFN(5, "endpoint=%p\n", ep);
1237 /* set FORCESTALL */
1238 sc = USS820_DCI_BUS2SC(udev->bus);
1239 ep_no = (ep->edesc->bEndpointAddress & UE_ADDR);
1240 ep_dir = (ep->edesc->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT));
1241 ep_type = (ep->edesc->bmAttributes & UE_XFERTYPE);
1243 if (ep_type == UE_CONTROL) {
1244 /* should not happen */
1247 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1249 if (ep_dir == UE_DIR_IN) {
1250 temp = USS820_EPCON_TXSTL;
1252 temp = USS820_EPCON_RXSTL;
1254 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1258 uss820dci_clear_stall_sub(struct uss820dci_softc *sc,
1259 uint8_t ep_no, uint8_t ep_type, uint8_t ep_dir)
1263 if (ep_type == UE_CONTROL) {
1264 /* clearing stall is not needed */
1267 /* select endpoint index */
1268 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1270 /* clear stall and disable I/O transfers */
1271 if (ep_dir == UE_DIR_IN) {
1272 temp = 0xFF ^ (USS820_EPCON_TXOE |
1273 USS820_EPCON_TXSTL);
1275 temp = 0xFF ^ (USS820_EPCON_RXIE |
1276 USS820_EPCON_RXSTL);
1278 uss820dci_update_shared_1(sc, USS820_EPCON, temp, 0);
1280 if (ep_dir == UE_DIR_IN) {
1281 /* reset data toggle */
1282 USS820_WRITE_1(sc, USS820_TXSTAT,
1283 USS820_TXSTAT_TXSOVW);
1286 temp = USS820_READ_1(sc, USS820_TXCON);
1287 temp |= USS820_TXCON_TXCLR;
1288 USS820_WRITE_1(sc, USS820_TXCON, temp);
1289 temp &= ~USS820_TXCON_TXCLR;
1290 USS820_WRITE_1(sc, USS820_TXCON, temp);
1293 /* reset data toggle */
1294 uss820dci_update_shared_1(sc, USS820_RXSTAT,
1295 0, USS820_RXSTAT_RXSOVW);
1298 temp = USS820_READ_1(sc, USS820_RXCON);
1299 temp |= USS820_RXCON_RXCLR;
1300 temp &= ~USS820_RXCON_RXFFRC;
1301 USS820_WRITE_1(sc, USS820_RXCON, temp);
1302 temp &= ~USS820_RXCON_RXCLR;
1303 USS820_WRITE_1(sc, USS820_RXCON, temp);
1308 uss820dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1310 struct uss820dci_softc *sc;
1311 struct usb_endpoint_descriptor *ed;
1313 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1315 DPRINTFN(5, "endpoint=%p\n", ep);
1318 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1323 sc = USS820_DCI_BUS2SC(udev->bus);
1325 /* get endpoint descriptor */
1328 /* reset endpoint */
1329 uss820dci_clear_stall_sub(sc,
1330 (ed->bEndpointAddress & UE_ADDR),
1331 (ed->bmAttributes & UE_XFERTYPE),
1332 (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1336 uss820dci_init(struct uss820dci_softc *sc)
1338 const struct usb_hw_ep_profile *pf;
1344 /* set up the bus structure */
1345 sc->sc_bus.usbrev = USB_REV_1_1;
1346 sc->sc_bus.methods = &uss820dci_bus_methods;
1348 USB_BUS_LOCK(&sc->sc_bus);
1350 /* we always have VBUS */
1351 sc->sc_flags.status_vbus = 1;
1353 /* reset the chip */
1354 USS820_WRITE_1(sc, USS820_SCR, USS820_SCR_SRESET);
1356 USS820_WRITE_1(sc, USS820_SCR, 0);
1358 /* wait for reset to complete */
1361 temp = USS820_READ_1(sc, USS820_MCSR);
1363 if (temp & USS820_MCSR_INIT) {
1367 USB_BUS_UNLOCK(&sc->sc_bus);
1368 return (USB_ERR_INVAL);
1370 /* wait a little for things to stabilise */
1375 uss820dci_pull_down(sc);
1377 /* wait 10ms for pulldown to stabilise */
1378 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100);
1380 /* check hardware revision */
1381 temp = USS820_READ_1(sc, USS820_REV);
1384 USB_BUS_UNLOCK(&sc->sc_bus);
1385 return (USB_ERR_INVAL);
1387 /* enable interrupts */
1388 USS820_WRITE_1(sc, USS820_SCR,
1390 USS820_SCR_IE_RESET |
1391 /* USS820_SCR_RWUPE | */
1392 USS820_SCR_IE_SUSP |
1395 /* enable interrupts */
1396 USS820_WRITE_1(sc, USS820_SCRATCH,
1397 USS820_SCRATCH_IE_RESUME);
1399 /* enable features */
1400 USS820_WRITE_1(sc, USS820_MCSR,
1401 USS820_MCSR_BDFEAT |
1404 sc->sc_flags.mcsr_feat = 1;
1406 /* disable interrupts */
1407 USS820_WRITE_1(sc, USS820_SBIE, 0);
1409 /* disable interrupts */
1410 USS820_WRITE_1(sc, USS820_SBIE1, 0);
1412 /* disable all endpoints */
1413 for (n = 0; n != USS820_EP_MAX; n++) {
1415 /* select endpoint */
1416 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1418 /* disable endpoint */
1419 uss820dci_update_shared_1(sc, USS820_EPCON, 0, 0);
1423 * Initialise default values for some registers that cannot be
1424 * changed during operation!
1426 for (n = 0; n != USS820_EP_MAX; n++) {
1428 uss820dci_get_hw_ep_profile(NULL, &pf, n);
1430 /* the maximum frame sizes should be the same */
1431 if (pf->max_in_frame_size != pf->max_out_frame_size) {
1432 DPRINTF("Max frame size mismatch %u != %u\n",
1433 pf->max_in_frame_size, pf->max_out_frame_size);
1435 if (pf->support_isochronous) {
1436 if (pf->max_in_frame_size <= 64) {
1437 temp = (USS820_TXCON_FFSZ_16_64 |
1438 USS820_TXCON_TXISO |
1440 } else if (pf->max_in_frame_size <= 256) {
1441 temp = (USS820_TXCON_FFSZ_64_256 |
1442 USS820_TXCON_TXISO |
1444 } else if (pf->max_in_frame_size <= 512) {
1445 temp = (USS820_TXCON_FFSZ_8_512 |
1446 USS820_TXCON_TXISO |
1448 } else { /* 1024 bytes */
1449 temp = (USS820_TXCON_FFSZ_32_1024 |
1450 USS820_TXCON_TXISO |
1454 if ((pf->max_in_frame_size <= 8) &&
1455 (sc->sc_flags.mcsr_feat)) {
1456 temp = (USS820_TXCON_FFSZ_8_512 |
1458 } else if (pf->max_in_frame_size <= 16) {
1459 temp = (USS820_TXCON_FFSZ_16_64 |
1461 } else if ((pf->max_in_frame_size <= 32) &&
1462 (sc->sc_flags.mcsr_feat)) {
1463 temp = (USS820_TXCON_FFSZ_32_1024 |
1465 } else { /* 64 bytes */
1466 temp = (USS820_TXCON_FFSZ_64_256 |
1471 /* need to configure the chip early */
1473 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1474 USS820_WRITE_1(sc, USS820_TXCON, temp);
1475 USS820_WRITE_1(sc, USS820_RXCON, temp);
1477 if (pf->support_control) {
1478 temp = USS820_EPCON_CTLEP |
1479 USS820_EPCON_RXSPM |
1481 USS820_EPCON_RXEPEN |
1483 USS820_EPCON_TXEPEN;
1485 temp = USS820_EPCON_RXEPEN | USS820_EPCON_TXEPEN;
1488 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1491 USB_BUS_UNLOCK(&sc->sc_bus);
1493 /* catch any lost interrupts */
1495 uss820dci_do_poll(&sc->sc_bus);
1497 return (0); /* success */
1501 uss820dci_uninit(struct uss820dci_softc *sc)
1505 USB_BUS_LOCK(&sc->sc_bus);
1507 /* disable all interrupts */
1508 temp = USS820_READ_1(sc, USS820_SCR);
1509 temp &= ~USS820_SCR_T_IRQ;
1510 USS820_WRITE_1(sc, USS820_SCR, temp);
1512 sc->sc_flags.port_powered = 0;
1513 sc->sc_flags.status_vbus = 0;
1514 sc->sc_flags.status_bus_reset = 0;
1515 sc->sc_flags.status_suspend = 0;
1516 sc->sc_flags.change_suspend = 0;
1517 sc->sc_flags.change_connect = 1;
1519 uss820dci_pull_down(sc);
1520 USB_BUS_UNLOCK(&sc->sc_bus);
1524 uss820dci_suspend(struct uss820dci_softc *sc)
1530 uss820dci_resume(struct uss820dci_softc *sc)
1536 uss820dci_do_poll(struct usb_bus *bus)
1538 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
1540 USB_BUS_LOCK(&sc->sc_bus);
1541 uss820dci_interrupt_poll(sc);
1542 USB_BUS_UNLOCK(&sc->sc_bus);
1545 /*------------------------------------------------------------------------*
1546 * at91dci bulk support
1547 *------------------------------------------------------------------------*/
1549 uss820dci_device_bulk_open(struct usb_xfer *xfer)
1555 uss820dci_device_bulk_close(struct usb_xfer *xfer)
1557 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1561 uss820dci_device_bulk_enter(struct usb_xfer *xfer)
1567 uss820dci_device_bulk_start(struct usb_xfer *xfer)
1570 uss820dci_setup_standard_chain(xfer);
1571 uss820dci_start_standard_chain(xfer);
1574 struct usb_pipe_methods uss820dci_device_bulk_methods =
1576 .open = uss820dci_device_bulk_open,
1577 .close = uss820dci_device_bulk_close,
1578 .enter = uss820dci_device_bulk_enter,
1579 .start = uss820dci_device_bulk_start,
1582 /*------------------------------------------------------------------------*
1583 * at91dci control support
1584 *------------------------------------------------------------------------*/
1586 uss820dci_device_ctrl_open(struct usb_xfer *xfer)
1592 uss820dci_device_ctrl_close(struct usb_xfer *xfer)
1594 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1598 uss820dci_device_ctrl_enter(struct usb_xfer *xfer)
1604 uss820dci_device_ctrl_start(struct usb_xfer *xfer)
1607 uss820dci_setup_standard_chain(xfer);
1608 uss820dci_start_standard_chain(xfer);
1611 struct usb_pipe_methods uss820dci_device_ctrl_methods =
1613 .open = uss820dci_device_ctrl_open,
1614 .close = uss820dci_device_ctrl_close,
1615 .enter = uss820dci_device_ctrl_enter,
1616 .start = uss820dci_device_ctrl_start,
1619 /*------------------------------------------------------------------------*
1620 * at91dci interrupt support
1621 *------------------------------------------------------------------------*/
1623 uss820dci_device_intr_open(struct usb_xfer *xfer)
1629 uss820dci_device_intr_close(struct usb_xfer *xfer)
1631 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1635 uss820dci_device_intr_enter(struct usb_xfer *xfer)
1641 uss820dci_device_intr_start(struct usb_xfer *xfer)
1644 uss820dci_setup_standard_chain(xfer);
1645 uss820dci_start_standard_chain(xfer);
1648 struct usb_pipe_methods uss820dci_device_intr_methods =
1650 .open = uss820dci_device_intr_open,
1651 .close = uss820dci_device_intr_close,
1652 .enter = uss820dci_device_intr_enter,
1653 .start = uss820dci_device_intr_start,
1656 /*------------------------------------------------------------------------*
1657 * at91dci full speed isochronous support
1658 *------------------------------------------------------------------------*/
1660 uss820dci_device_isoc_fs_open(struct usb_xfer *xfer)
1666 uss820dci_device_isoc_fs_close(struct usb_xfer *xfer)
1668 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1672 uss820dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1674 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1678 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1679 xfer, xfer->endpoint->isoc_next, xfer->nframes);
1681 /* get the current frame index - we don't need the high bits */
1683 nframes = USS820_READ_1(sc, USS820_SOFL);
1686 * check if the frame index is within the window where the
1687 * frames will be inserted
1689 temp = (nframes - xfer->endpoint->isoc_next) & USS820_SOFL_MASK;
1691 if ((xfer->endpoint->is_synced == 0) ||
1692 (temp < xfer->nframes)) {
1694 * If there is data underflow or the pipe queue is
1695 * empty we schedule the transfer a few frames ahead
1696 * of the current frame position. Else two isochronous
1697 * transfers might overlap.
1699 xfer->endpoint->isoc_next = (nframes + 3) & USS820_SOFL_MASK;
1700 xfer->endpoint->is_synced = 1;
1701 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1704 * compute how many milliseconds the insertion is ahead of the
1705 * current frame position:
1707 temp = (xfer->endpoint->isoc_next - nframes) & USS820_SOFL_MASK;
1710 * pre-compute when the isochronous transfer will be finished:
1712 xfer->isoc_time_complete =
1713 usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1716 /* compute frame number for next insertion */
1717 xfer->endpoint->isoc_next += xfer->nframes;
1720 uss820dci_setup_standard_chain(xfer);
1724 uss820dci_device_isoc_fs_start(struct usb_xfer *xfer)
1726 /* start TD chain */
1727 uss820dci_start_standard_chain(xfer);
1730 struct usb_pipe_methods uss820dci_device_isoc_fs_methods =
1732 .open = uss820dci_device_isoc_fs_open,
1733 .close = uss820dci_device_isoc_fs_close,
1734 .enter = uss820dci_device_isoc_fs_enter,
1735 .start = uss820dci_device_isoc_fs_start,
1738 /*------------------------------------------------------------------------*
1739 * at91dci root control support
1740 *------------------------------------------------------------------------*
1741 * Simulate a hardware HUB by handling all the necessary requests.
1742 *------------------------------------------------------------------------*/
1744 static const struct usb_device_descriptor uss820dci_devd = {
1745 .bLength = sizeof(struct usb_device_descriptor),
1746 .bDescriptorType = UDESC_DEVICE,
1747 .bcdUSB = {0x00, 0x02},
1748 .bDeviceClass = UDCLASS_HUB,
1749 .bDeviceSubClass = UDSUBCLASS_HUB,
1750 .bDeviceProtocol = UDPROTO_FSHUB,
1751 .bMaxPacketSize = 64,
1752 .bcdDevice = {0x00, 0x01},
1755 .bNumConfigurations = 1,
1758 static const struct usb_device_qualifier uss820dci_odevd = {
1759 .bLength = sizeof(struct usb_device_qualifier),
1760 .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1761 .bcdUSB = {0x00, 0x02},
1762 .bDeviceClass = UDCLASS_HUB,
1763 .bDeviceSubClass = UDSUBCLASS_HUB,
1764 .bDeviceProtocol = UDPROTO_FSHUB,
1765 .bMaxPacketSize0 = 0,
1766 .bNumConfigurations = 0,
1769 static const struct uss820dci_config_desc uss820dci_confd = {
1771 .bLength = sizeof(struct usb_config_descriptor),
1772 .bDescriptorType = UDESC_CONFIG,
1773 .wTotalLength[0] = sizeof(uss820dci_confd),
1775 .bConfigurationValue = 1,
1776 .iConfiguration = 0,
1777 .bmAttributes = UC_SELF_POWERED,
1781 .bLength = sizeof(struct usb_interface_descriptor),
1782 .bDescriptorType = UDESC_INTERFACE,
1784 .bInterfaceClass = UICLASS_HUB,
1785 .bInterfaceSubClass = UISUBCLASS_HUB,
1786 .bInterfaceProtocol = 0,
1790 .bLength = sizeof(struct usb_endpoint_descriptor),
1791 .bDescriptorType = UDESC_ENDPOINT,
1792 .bEndpointAddress = (UE_DIR_IN | USS820_DCI_INTR_ENDPT),
1793 .bmAttributes = UE_INTERRUPT,
1794 .wMaxPacketSize[0] = 8,
1799 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
1801 static const struct usb_hub_descriptor_min uss820dci_hubd = {
1802 .bDescLength = sizeof(uss820dci_hubd),
1803 .bDescriptorType = UDESC_HUB,
1805 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)),
1806 .bPwrOn2PwrGood = 50,
1807 .bHubContrCurrent = 0,
1808 .DeviceRemovable = {0}, /* port is removable */
1811 #define STRING_VENDOR \
1814 #define STRING_PRODUCT \
1815 "D\0C\0I\0 \0R\0o\0o\0t\0 \0H\0U\0B"
1817 USB_MAKE_STRING_DESC(STRING_VENDOR, uss820dci_vendor);
1818 USB_MAKE_STRING_DESC(STRING_PRODUCT, uss820dci_product);
1821 uss820dci_roothub_exec(struct usb_device *udev,
1822 struct usb_device_request *req, const void **pptr, uint16_t *plength)
1824 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
1831 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1834 ptr = (const void *)&sc->sc_hub_temp;
1838 value = UGETW(req->wValue);
1839 index = UGETW(req->wIndex);
1841 /* demultiplex the control request */
1843 switch (req->bmRequestType) {
1844 case UT_READ_DEVICE:
1845 switch (req->bRequest) {
1846 case UR_GET_DESCRIPTOR:
1847 goto tr_handle_get_descriptor;
1849 goto tr_handle_get_config;
1851 goto tr_handle_get_status;
1857 case UT_WRITE_DEVICE:
1858 switch (req->bRequest) {
1859 case UR_SET_ADDRESS:
1860 goto tr_handle_set_address;
1862 goto tr_handle_set_config;
1863 case UR_CLEAR_FEATURE:
1864 goto tr_valid; /* nop */
1865 case UR_SET_DESCRIPTOR:
1866 goto tr_valid; /* nop */
1867 case UR_SET_FEATURE:
1873 case UT_WRITE_ENDPOINT:
1874 switch (req->bRequest) {
1875 case UR_CLEAR_FEATURE:
1876 switch (UGETW(req->wValue)) {
1877 case UF_ENDPOINT_HALT:
1878 goto tr_handle_clear_halt;
1879 case UF_DEVICE_REMOTE_WAKEUP:
1880 goto tr_handle_clear_wakeup;
1885 case UR_SET_FEATURE:
1886 switch (UGETW(req->wValue)) {
1887 case UF_ENDPOINT_HALT:
1888 goto tr_handle_set_halt;
1889 case UF_DEVICE_REMOTE_WAKEUP:
1890 goto tr_handle_set_wakeup;
1895 case UR_SYNCH_FRAME:
1896 goto tr_valid; /* nop */
1902 case UT_READ_ENDPOINT:
1903 switch (req->bRequest) {
1905 goto tr_handle_get_ep_status;
1911 case UT_WRITE_INTERFACE:
1912 switch (req->bRequest) {
1913 case UR_SET_INTERFACE:
1914 goto tr_handle_set_interface;
1915 case UR_CLEAR_FEATURE:
1916 goto tr_valid; /* nop */
1917 case UR_SET_FEATURE:
1923 case UT_READ_INTERFACE:
1924 switch (req->bRequest) {
1925 case UR_GET_INTERFACE:
1926 goto tr_handle_get_interface;
1928 goto tr_handle_get_iface_status;
1934 case UT_WRITE_CLASS_INTERFACE:
1935 case UT_WRITE_VENDOR_INTERFACE:
1939 case UT_READ_CLASS_INTERFACE:
1940 case UT_READ_VENDOR_INTERFACE:
1944 case UT_WRITE_CLASS_DEVICE:
1945 switch (req->bRequest) {
1946 case UR_CLEAR_FEATURE:
1948 case UR_SET_DESCRIPTOR:
1949 case UR_SET_FEATURE:
1956 case UT_WRITE_CLASS_OTHER:
1957 switch (req->bRequest) {
1958 case UR_CLEAR_FEATURE:
1959 goto tr_handle_clear_port_feature;
1960 case UR_SET_FEATURE:
1961 goto tr_handle_set_port_feature;
1962 case UR_CLEAR_TT_BUFFER:
1972 case UT_READ_CLASS_OTHER:
1973 switch (req->bRequest) {
1974 case UR_GET_TT_STATE:
1975 goto tr_handle_get_tt_state;
1977 goto tr_handle_get_port_status;
1983 case UT_READ_CLASS_DEVICE:
1984 switch (req->bRequest) {
1985 case UR_GET_DESCRIPTOR:
1986 goto tr_handle_get_class_descriptor;
1988 goto tr_handle_get_class_status;
1999 tr_handle_get_descriptor:
2000 switch (value >> 8) {
2005 len = sizeof(uss820dci_devd);
2006 ptr = (const void *)&uss820dci_devd;
2008 case UDESC_DEVICE_QUALIFIER:
2012 len = sizeof(uss820dci_odevd);
2013 ptr = (const void *)&uss820dci_odevd;
2019 len = sizeof(uss820dci_confd);
2020 ptr = (const void *)&uss820dci_confd;
2023 switch (value & 0xff) {
2024 case 0: /* Language table */
2025 len = sizeof(usb_string_lang_en);
2026 ptr = (const void *)&usb_string_lang_en;
2029 case 1: /* Vendor */
2030 len = sizeof(uss820dci_vendor);
2031 ptr = (const void *)&uss820dci_vendor;
2034 case 2: /* Product */
2035 len = sizeof(uss820dci_product);
2036 ptr = (const void *)&uss820dci_product;
2047 tr_handle_get_config:
2049 sc->sc_hub_temp.wValue[0] = sc->sc_conf;
2052 tr_handle_get_status:
2054 USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
2057 tr_handle_set_address:
2058 if (value & 0xFF00) {
2061 sc->sc_rt_addr = value;
2064 tr_handle_set_config:
2068 sc->sc_conf = value;
2071 tr_handle_get_interface:
2073 sc->sc_hub_temp.wValue[0] = 0;
2076 tr_handle_get_tt_state:
2077 tr_handle_get_class_status:
2078 tr_handle_get_iface_status:
2079 tr_handle_get_ep_status:
2081 USETW(sc->sc_hub_temp.wValue, 0);
2085 tr_handle_set_interface:
2086 tr_handle_set_wakeup:
2087 tr_handle_clear_wakeup:
2088 tr_handle_clear_halt:
2091 tr_handle_clear_port_feature:
2095 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
2098 case UHF_PORT_SUSPEND:
2099 uss820dci_wakeup_peer(sc);
2102 case UHF_PORT_ENABLE:
2103 sc->sc_flags.port_enabled = 0;
2107 case UHF_PORT_INDICATOR:
2108 case UHF_C_PORT_ENABLE:
2109 case UHF_C_PORT_OVER_CURRENT:
2110 case UHF_C_PORT_RESET:
2113 case UHF_PORT_POWER:
2114 sc->sc_flags.port_powered = 0;
2115 uss820dci_pull_down(sc);
2117 case UHF_C_PORT_CONNECTION:
2118 sc->sc_flags.change_connect = 0;
2120 case UHF_C_PORT_SUSPEND:
2121 sc->sc_flags.change_suspend = 0;
2124 err = USB_ERR_IOERROR;
2129 tr_handle_set_port_feature:
2133 DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
2136 case UHF_PORT_ENABLE:
2137 sc->sc_flags.port_enabled = 1;
2139 case UHF_PORT_SUSPEND:
2140 case UHF_PORT_RESET:
2142 case UHF_PORT_INDICATOR:
2145 case UHF_PORT_POWER:
2146 sc->sc_flags.port_powered = 1;
2149 err = USB_ERR_IOERROR;
2154 tr_handle_get_port_status:
2156 DPRINTFN(9, "UR_GET_PORT_STATUS\n");
2161 if (sc->sc_flags.status_vbus) {
2162 uss820dci_pull_up(sc);
2164 uss820dci_pull_down(sc);
2167 /* Select FULL-speed and Device Side Mode */
2169 value = UPS_PORT_MODE_DEVICE;
2171 if (sc->sc_flags.port_powered) {
2172 value |= UPS_PORT_POWER;
2174 if (sc->sc_flags.port_enabled) {
2175 value |= UPS_PORT_ENABLED;
2177 if (sc->sc_flags.status_vbus &&
2178 sc->sc_flags.status_bus_reset) {
2179 value |= UPS_CURRENT_CONNECT_STATUS;
2181 if (sc->sc_flags.status_suspend) {
2182 value |= UPS_SUSPEND;
2184 USETW(sc->sc_hub_temp.ps.wPortStatus, value);
2188 if (sc->sc_flags.change_connect) {
2189 value |= UPS_C_CONNECT_STATUS;
2191 if (sc->sc_flags.change_suspend) {
2192 value |= UPS_C_SUSPEND;
2194 USETW(sc->sc_hub_temp.ps.wPortChange, value);
2195 len = sizeof(sc->sc_hub_temp.ps);
2198 tr_handle_get_class_descriptor:
2202 ptr = (const void *)&uss820dci_hubd;
2203 len = sizeof(uss820dci_hubd);
2207 err = USB_ERR_STALLED;
2216 uss820dci_xfer_setup(struct usb_setup_params *parm)
2218 const struct usb_hw_ep_profile *pf;
2219 struct uss820dci_softc *sc;
2220 struct usb_xfer *xfer;
2226 sc = USS820_DCI_BUS2SC(parm->udev->bus);
2227 xfer = parm->curr_xfer;
2230 * NOTE: This driver does not use any of the parameters that
2231 * are computed from the following values. Just set some
2232 * reasonable dummies:
2234 parm->hc_max_packet_size = 0x500;
2235 parm->hc_max_packet_count = 1;
2236 parm->hc_max_frame_size = 0x500;
2238 usbd_transfer_setup_sub(parm);
2241 * compute maximum number of TDs
2243 if (parm->methods == &uss820dci_device_ctrl_methods) {
2245 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ;
2247 } else if (parm->methods == &uss820dci_device_bulk_methods) {
2249 ntd = xfer->nframes + 1 /* SYNC */ ;
2251 } else if (parm->methods == &uss820dci_device_intr_methods) {
2253 ntd = xfer->nframes + 1 /* SYNC */ ;
2255 } else if (parm->methods == &uss820dci_device_isoc_fs_methods) {
2257 ntd = xfer->nframes + 1 /* SYNC */ ;
2265 * check if "usbd_transfer_setup_sub" set an error
2271 * allocate transfer descriptors
2280 ep_no = xfer->endpointno & UE_ADDR;
2281 uss820dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2284 /* should not happen */
2285 parm->err = USB_ERR_INVAL;
2294 parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2296 for (n = 0; n != ntd; n++) {
2298 struct uss820dci_td *td;
2302 td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2305 td->io_tag = sc->sc_io_tag;
2306 td->io_hdl = sc->sc_io_hdl;
2307 td->max_packet_size = xfer->max_packet_size;
2308 td->ep_index = ep_no;
2309 if (pf->support_multi_buffer &&
2310 (parm->methods != &uss820dci_device_ctrl_methods)) {
2311 td->support_multi_buffer = 1;
2313 td->obj_next = last_obj;
2317 parm->size[0] += sizeof(*td);
2320 xfer->td_start[0] = last_obj;
2324 uss820dci_xfer_unsetup(struct usb_xfer *xfer)
2330 uss820dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2331 struct usb_endpoint *ep)
2333 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
2335 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2337 edesc->bEndpointAddress, udev->flags.usb_mode,
2340 if (udev->device_index != sc->sc_rt_addr) {
2342 if (udev->speed != USB_SPEED_FULL) {
2346 switch (edesc->bmAttributes & UE_XFERTYPE) {
2348 ep->methods = &uss820dci_device_ctrl_methods;
2351 ep->methods = &uss820dci_device_intr_methods;
2353 case UE_ISOCHRONOUS:
2354 ep->methods = &uss820dci_device_isoc_fs_methods;
2357 ep->methods = &uss820dci_device_bulk_methods;
2367 uss820dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2369 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
2372 case USB_HW_POWER_SUSPEND:
2373 uss820dci_suspend(sc);
2375 case USB_HW_POWER_SHUTDOWN:
2376 uss820dci_uninit(sc);
2378 case USB_HW_POWER_RESUME:
2379 uss820dci_resume(sc);
2386 struct usb_bus_methods uss820dci_bus_methods =
2388 .endpoint_init = &uss820dci_ep_init,
2389 .xfer_setup = &uss820dci_xfer_setup,
2390 .xfer_unsetup = &uss820dci_xfer_unsetup,
2391 .get_hw_ep_profile = &uss820dci_get_hw_ep_profile,
2392 .xfer_stall = &uss820dci_xfer_stall,
2393 .set_stall = &uss820dci_set_stall,
2394 .clear_stall = &uss820dci_clear_stall,
2395 .roothub_exec = &uss820dci_roothub_exec,
2396 .xfer_poll = &uss820dci_do_poll,
2397 .set_hw_power_sleep = uss820dci_set_hw_power_sleep,