3 * Copyright (c) 2008 Hans Petter Selasky <hselasky@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * This file contains the driver for the USS820 series USB Device
32 * NOTE: The datasheet does not document everything.
35 #include <sys/stdint.h>
36 #include <sys/stddef.h>
37 #include <sys/param.h>
38 #include <sys/queue.h>
39 #include <sys/types.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
43 #include <sys/module.h>
45 #include <sys/mutex.h>
46 #include <sys/condvar.h>
47 #include <sys/sysctl.h>
49 #include <sys/unistd.h>
50 #include <sys/callout.h>
51 #include <sys/malloc.h>
54 #include <dev/usb/usb.h>
55 #include <dev/usb/usbdi.h>
57 #define USB_DEBUG_VAR uss820dcidebug
59 #include <dev/usb/usb_core.h>
60 #include <dev/usb/usb_debug.h>
61 #include <dev/usb/usb_busdma.h>
62 #include <dev/usb/usb_process.h>
63 #include <dev/usb/usb_transfer.h>
64 #include <dev/usb/usb_device.h>
65 #include <dev/usb/usb_hub.h>
66 #include <dev/usb/usb_util.h>
68 #include <dev/usb/usb_controller.h>
69 #include <dev/usb/usb_bus.h>
70 #include <dev/usb/controller/uss820dci.h>
72 #define USS820_DCI_BUS2SC(bus) \
73 ((struct uss820dci_softc *)(((uint8_t *)(bus)) - \
74 ((uint8_t *)&(((struct uss820dci_softc *)0)->sc_bus))))
76 #define USS820_DCI_PC2SC(pc) \
77 USS820_DCI_BUS2SC(USB_DMATAG_TO_XROOT((pc)->tag_parent)->bus)
80 static int uss820dcidebug = 0;
82 static SYSCTL_NODE(_hw_usb, OID_AUTO, uss820dci, CTLFLAG_RW, 0,
84 SYSCTL_INT(_hw_usb_uss820dci, OID_AUTO, debug, CTLFLAG_RW,
85 &uss820dcidebug, 0, "uss820dci debug level");
88 #define USS820_DCI_INTR_ENDPT 1
92 struct usb_bus_methods uss820dci_bus_methods;
93 struct usb_pipe_methods uss820dci_device_bulk_methods;
94 struct usb_pipe_methods uss820dci_device_ctrl_methods;
95 struct usb_pipe_methods uss820dci_device_intr_methods;
96 struct usb_pipe_methods uss820dci_device_isoc_fs_methods;
98 static uss820dci_cmd_t uss820dci_setup_rx;
99 static uss820dci_cmd_t uss820dci_data_rx;
100 static uss820dci_cmd_t uss820dci_data_tx;
101 static uss820dci_cmd_t uss820dci_data_tx_sync;
102 static void uss820dci_device_done(struct usb_xfer *, usb_error_t);
103 static void uss820dci_do_poll(struct usb_bus *);
104 static void uss820dci_standard_done(struct usb_xfer *);
105 static void uss820dci_intr_set(struct usb_xfer *, uint8_t);
106 static void uss820dci_update_shared_1(struct uss820dci_softc *, uint8_t,
108 static void uss820dci_root_intr(struct uss820dci_softc *);
111 * Here is a list of what the USS820D chip can support. The main
112 * limitation is that the sum of the buffer sizes must be less than
115 static const struct usb_hw_ep_profile
116 uss820dci_ep_profile[] = {
119 .max_in_frame_size = 32,
120 .max_out_frame_size = 32,
122 .support_control = 1,
125 .max_in_frame_size = 64,
126 .max_out_frame_size = 64,
128 .support_multi_buffer = 1,
130 .support_interrupt = 1,
135 .max_in_frame_size = 8,
136 .max_out_frame_size = 8,
138 .support_multi_buffer = 1,
140 .support_interrupt = 1,
145 .max_in_frame_size = 256,
146 .max_out_frame_size = 256,
148 .support_multi_buffer = 1,
149 .support_isochronous = 1,
156 uss820dci_update_shared_1(struct uss820dci_softc *sc, uint8_t reg,
157 uint8_t keep_mask, uint8_t set_mask)
161 USS820_WRITE_1(sc, USS820_PEND, 1);
162 temp = USS820_READ_1(sc, reg);
165 USS820_WRITE_1(sc, reg, temp);
166 USS820_WRITE_1(sc, USS820_PEND, 0);
170 uss820dci_get_hw_ep_profile(struct usb_device *udev,
171 const struct usb_hw_ep_profile **ppf, uint8_t ep_addr)
174 *ppf = uss820dci_ep_profile + 0;
175 } else if (ep_addr < 5) {
176 *ppf = uss820dci_ep_profile + 1;
177 } else if (ep_addr < 7) {
178 *ppf = uss820dci_ep_profile + 2;
179 } else if (ep_addr == 7) {
180 *ppf = uss820dci_ep_profile + 3;
187 uss820dci_pull_up(struct uss820dci_softc *sc)
191 /* pullup D+, if possible */
193 if (!sc->sc_flags.d_pulled_up &&
194 sc->sc_flags.port_powered) {
195 sc->sc_flags.d_pulled_up = 1;
199 temp = USS820_READ_1(sc, USS820_MCSR);
200 temp |= USS820_MCSR_DPEN;
201 USS820_WRITE_1(sc, USS820_MCSR, temp);
206 uss820dci_pull_down(struct uss820dci_softc *sc)
210 /* pulldown D+, if possible */
212 if (sc->sc_flags.d_pulled_up) {
213 sc->sc_flags.d_pulled_up = 0;
217 temp = USS820_READ_1(sc, USS820_MCSR);
218 temp &= ~USS820_MCSR_DPEN;
219 USS820_WRITE_1(sc, USS820_MCSR, temp);
224 uss820dci_wakeup_peer(struct uss820dci_softc *sc)
226 if (!(sc->sc_flags.status_suspend)) {
229 DPRINTFN(0, "not supported\n");
233 uss820dci_set_address(struct uss820dci_softc *sc, uint8_t addr)
235 DPRINTFN(5, "addr=%d\n", addr);
237 USS820_WRITE_1(sc, USS820_FADDR, addr);
241 uss820dci_setup_rx(struct uss820dci_td *td)
243 struct uss820dci_softc *sc;
244 struct usb_device_request req;
249 /* select the correct endpoint */
250 bus_space_write_1(td->io_tag, td->io_hdl,
251 USS820_EPINDEX, td->ep_index);
253 /* read out FIFO status */
254 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
257 /* get pointer to softc */
258 sc = USS820_DCI_PC2SC(td->pc);
260 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
262 if (!(rx_stat & USS820_RXSTAT_RXSETUP)) {
265 /* clear did stall */
268 /* clear stall and all I/O */
269 uss820dci_update_shared_1(sc, USS820_EPCON,
270 0xFF ^ (USS820_EPCON_TXSTL |
273 USS820_EPCON_TXOE), 0);
275 /* clear end overwrite flag */
276 uss820dci_update_shared_1(sc, USS820_RXSTAT,
277 0xFF ^ USS820_RXSTAT_EDOVW, 0);
279 /* get the packet byte count */
280 count = bus_space_read_1(td->io_tag, td->io_hdl,
282 count |= (bus_space_read_1(td->io_tag, td->io_hdl,
283 USS820_RXCNTH) << 8);
286 /* verify data length */
287 if (count != td->remainder) {
288 DPRINTFN(0, "Invalid SETUP packet "
289 "length, %d bytes\n", count);
290 goto setup_not_complete;
292 if (count != sizeof(req)) {
293 DPRINTFN(0, "Unsupported SETUP packet "
294 "length, %d bytes\n", count);
295 goto setup_not_complete;
298 bus_space_read_multi_1(td->io_tag, td->io_hdl,
299 USS820_RXDAT, (void *)&req, sizeof(req));
301 /* read out FIFO status */
302 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
305 if (rx_stat & (USS820_RXSTAT_EDOVW |
306 USS820_RXSTAT_STOVW)) {
307 DPRINTF("new SETUP packet received\n");
308 return (1); /* not complete */
310 /* clear receive setup bit */
311 uss820dci_update_shared_1(sc, USS820_RXSTAT,
312 0xFF ^ (USS820_RXSTAT_RXSETUP |
313 USS820_RXSTAT_EDOVW |
314 USS820_RXSTAT_STOVW), 0);
317 temp = bus_space_read_1(td->io_tag, td->io_hdl,
319 temp |= USS820_RXCON_RXFFRC;
320 bus_space_write_1(td->io_tag, td->io_hdl,
323 /* copy data into real buffer */
324 usbd_copy_in(td->pc, 0, &req, sizeof(req));
326 td->offset = sizeof(req);
329 /* sneak peek the set address */
330 if ((req.bmRequestType == UT_WRITE_DEVICE) &&
331 (req.bRequest == UR_SET_ADDRESS)) {
332 sc->sc_dv_addr = req.wValue[0] & 0x7F;
334 sc->sc_dv_addr = 0xFF;
338 temp = USS820_READ_1(sc, USS820_TXCON);
339 temp |= USS820_TXCON_TXCLR;
340 USS820_WRITE_1(sc, USS820_TXCON, temp);
341 temp &= ~USS820_TXCON_TXCLR;
342 USS820_WRITE_1(sc, USS820_TXCON, temp);
344 return (0); /* complete */
349 temp = bus_space_read_1(td->io_tag, td->io_hdl,
351 temp |= USS820_RXCON_RXFFRC;
352 bus_space_write_1(td->io_tag, td->io_hdl,
358 /* abort any ongoing transfer */
359 if (!td->did_stall) {
360 DPRINTFN(5, "stalling\n");
362 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF,
363 (USS820_EPCON_TXSTL | USS820_EPCON_RXSTL));
368 /* clear end overwrite flag, if any */
369 if (rx_stat & USS820_RXSTAT_RXSETUP) {
370 uss820dci_update_shared_1(sc, USS820_RXSTAT,
371 0xFF ^ (USS820_RXSTAT_EDOVW |
372 USS820_RXSTAT_STOVW |
373 USS820_RXSTAT_RXSETUP), 0);
375 return (1); /* not complete */
380 uss820dci_data_rx(struct uss820dci_td *td)
382 struct usb_page_search buf_res;
390 to = 2; /* don't loop forever! */
393 /* select the correct endpoint */
394 bus_space_write_1(td->io_tag, td->io_hdl, USS820_EPINDEX, td->ep_index);
396 /* check if any of the FIFO banks have data */
398 /* read out FIFO flag */
399 rx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
401 /* read out FIFO status */
402 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
405 DPRINTFN(5, "rx_stat=0x%02x rx_flag=0x%02x rem=%u\n",
406 rx_stat, rx_flag, td->remainder);
408 if (rx_stat & (USS820_RXSTAT_RXSETUP |
409 USS820_RXSTAT_RXSOVW |
410 USS820_RXSTAT_EDOVW)) {
411 if (td->remainder == 0) {
413 * We are actually complete and have
414 * received the next SETUP
416 DPRINTFN(5, "faking complete\n");
417 return (0); /* complete */
420 * USB Host Aborted the transfer.
423 return (0); /* complete */
425 /* check for errors */
426 if (rx_flag & (USS820_RXFLG_RXOVF |
427 USS820_RXFLG_RXURF)) {
428 DPRINTFN(5, "overflow or underflow\n");
429 /* should not happen */
431 return (0); /* complete */
434 if (!(rx_flag & (USS820_RXFLG_RXFIF0 |
435 USS820_RXFLG_RXFIF1))) {
437 /* read out EPCON register */
438 /* enable RX input */
439 if (!td->did_enable) {
440 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
441 USS820_EPCON, 0xFF, USS820_EPCON_RXIE);
444 return (1); /* not complete */
446 /* get the packet byte count */
447 count = bus_space_read_1(td->io_tag, td->io_hdl,
450 count |= (bus_space_read_1(td->io_tag, td->io_hdl,
451 USS820_RXCNTH) << 8);
454 DPRINTFN(5, "count=0x%04x\n", count);
456 /* verify the packet byte count */
457 if (count != td->max_packet_size) {
458 if (count < td->max_packet_size) {
459 /* we have a short packet */
463 /* invalid USB packet */
465 return (0); /* we are complete */
468 /* verify the packet byte count */
469 if (count > td->remainder) {
470 /* invalid USB packet */
472 return (0); /* we are complete */
475 usbd_get_page(td->pc, td->offset, &buf_res);
477 /* get correct length */
478 if (buf_res.length > count) {
479 buf_res.length = count;
482 bus_space_read_multi_1(td->io_tag, td->io_hdl,
483 USS820_RXDAT, buf_res.buffer, buf_res.length);
485 /* update counters */
486 count -= buf_res.length;
487 td->offset += buf_res.length;
488 td->remainder -= buf_res.length;
492 rx_cntl = bus_space_read_1(td->io_tag, td->io_hdl,
494 rx_cntl |= USS820_RXCON_RXFFRC;
495 bus_space_write_1(td->io_tag, td->io_hdl,
496 USS820_RXCON, rx_cntl);
498 /* check if we are complete */
499 if ((td->remainder == 0) || got_short) {
501 /* we are complete */
504 /* else need to receive a zero length packet */
509 return (1); /* not complete */
513 uss820dci_data_tx(struct uss820dci_td *td)
515 struct usb_page_search buf_res;
522 /* select the correct endpoint */
523 bus_space_write_1(td->io_tag, td->io_hdl,
524 USS820_EPINDEX, td->ep_index);
526 to = 2; /* don't loop forever! */
529 /* read out TX FIFO flags */
530 tx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
533 /* read out RX FIFO status last */
534 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
537 DPRINTFN(5, "rx_stat=0x%02x tx_flag=0x%02x rem=%u\n",
538 rx_stat, tx_flag, td->remainder);
540 if (rx_stat & (USS820_RXSTAT_RXSETUP |
541 USS820_RXSTAT_RXSOVW |
542 USS820_RXSTAT_EDOVW)) {
544 * The current transfer was aborted
548 return (0); /* complete */
550 if (tx_flag & (USS820_TXFLG_TXOVF |
551 USS820_TXFLG_TXURF)) {
553 return (0); /* complete */
555 if (tx_flag & USS820_TXFLG_TXFIF0) {
556 if (tx_flag & USS820_TXFLG_TXFIF1) {
557 return (1); /* not complete */
560 if ((!td->support_multi_buffer) &&
561 (tx_flag & (USS820_TXFLG_TXFIF0 |
562 USS820_TXFLG_TXFIF1))) {
563 return (1); /* not complete */
565 count = td->max_packet_size;
566 if (td->remainder < count) {
567 /* we have a short packet */
569 count = td->remainder;
574 usbd_get_page(td->pc, td->offset, &buf_res);
576 /* get correct length */
577 if (buf_res.length > count) {
578 buf_res.length = count;
581 bus_space_write_multi_1(td->io_tag, td->io_hdl,
582 USS820_TXDAT, buf_res.buffer, buf_res.length);
584 /* update counters */
585 count -= buf_res.length;
586 td->offset += buf_res.length;
587 td->remainder -= buf_res.length;
590 /* post-write high packet byte count first */
591 bus_space_write_1(td->io_tag, td->io_hdl,
592 USS820_TXCNTH, count_copy >> 8);
594 /* post-write low packet byte count last */
595 bus_space_write_1(td->io_tag, td->io_hdl,
596 USS820_TXCNTL, count_copy);
599 * Enable TX output, which must happen after that we have written
600 * data into the FIFO. This is undocumented.
602 if (!td->did_enable) {
603 uss820dci_update_shared_1(USS820_DCI_PC2SC(td->pc),
604 USS820_EPCON, 0xFF, USS820_EPCON_TXOE);
607 /* check remainder */
608 if (td->remainder == 0) {
610 return (0); /* complete */
612 /* else we need to transmit a short packet */
617 return (1); /* not complete */
621 uss820dci_data_tx_sync(struct uss820dci_td *td)
623 struct uss820dci_softc *sc;
627 /* select the correct endpoint */
628 bus_space_write_1(td->io_tag, td->io_hdl,
629 USS820_EPINDEX, td->ep_index);
631 /* read out TX FIFO flag */
632 tx_flag = bus_space_read_1(td->io_tag, td->io_hdl,
635 /* read out RX FIFO status last */
636 rx_stat = bus_space_read_1(td->io_tag, td->io_hdl,
639 DPRINTFN(5, "rx_stat=0x%02x rem=%u\n", rx_stat, td->remainder);
641 if (rx_stat & (USS820_RXSTAT_RXSETUP |
642 USS820_RXSTAT_RXSOVW |
643 USS820_RXSTAT_EDOVW)) {
644 DPRINTFN(5, "faking complete\n");
646 return (0); /* complete */
648 DPRINTFN(5, "tx_flag=0x%02x rem=%u\n",
649 tx_flag, td->remainder);
651 if (tx_flag & (USS820_TXFLG_TXOVF |
652 USS820_TXFLG_TXURF)) {
654 return (0); /* complete */
656 if (tx_flag & (USS820_TXFLG_TXFIF0 |
657 USS820_TXFLG_TXFIF1)) {
658 return (1); /* not complete */
660 sc = USS820_DCI_PC2SC(td->pc);
661 if (sc->sc_dv_addr != 0xFF) {
662 /* write function address */
663 uss820dci_set_address(sc, sc->sc_dv_addr);
665 return (0); /* complete */
669 uss820dci_xfer_do_fifo(struct usb_xfer *xfer)
671 struct uss820dci_td *td;
675 td = xfer->td_transfer_cache;
677 if ((td->func) (td)) {
678 /* operation in progress */
681 if (((void *)td) == xfer->td_transfer_last) {
686 } else if (td->remainder > 0) {
688 * We had a short transfer. If there is no alternate
689 * next, stop processing !
696 * Fetch the next transfer descriptor.
699 xfer->td_transfer_cache = td;
701 return (1); /* not complete */
704 /* compute all actual lengths */
706 uss820dci_standard_done(xfer);
708 return (0); /* complete */
712 uss820dci_interrupt_poll(struct uss820dci_softc *sc)
714 struct usb_xfer *xfer;
717 TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
718 if (!uss820dci_xfer_do_fifo(xfer)) {
719 /* queue has been modified */
726 uss820dci_wait_suspend(struct uss820dci_softc *sc, uint8_t on)
731 scr = USS820_READ_1(sc, USS820_SCR);
732 scratch = USS820_READ_1(sc, USS820_SCRATCH);
735 scr |= USS820_SCR_IE_SUSP;
736 scratch &= ~USS820_SCRATCH_IE_RESUME;
738 scr &= ~USS820_SCR_IE_SUSP;
739 scratch |= USS820_SCRATCH_IE_RESUME;
742 USS820_WRITE_1(sc, USS820_SCR, scr);
743 USS820_WRITE_1(sc, USS820_SCRATCH, scratch);
747 uss820dci_interrupt(struct uss820dci_softc *sc)
752 USB_BUS_LOCK(&sc->sc_bus);
754 ssr = USS820_READ_1(sc, USS820_SSR);
756 ssr &= (USS820_SSR_SUSPEND |
760 /* acknowledge all interrupts */
762 uss820dci_update_shared_1(sc, USS820_SSR, 0, 0);
764 /* check for any bus state change interrupts */
770 if (ssr & USS820_SSR_RESET) {
771 sc->sc_flags.status_bus_reset = 1;
772 sc->sc_flags.status_suspend = 0;
773 sc->sc_flags.change_suspend = 0;
774 sc->sc_flags.change_connect = 1;
776 /* disable resume interrupt */
777 uss820dci_wait_suspend(sc, 1);
782 * If "RESUME" and "SUSPEND" is set at the same time
783 * we interpret that like "RESUME". Resume is set when
784 * there is at least 3 milliseconds of inactivity on
787 if (ssr & USS820_SSR_RESUME) {
788 if (sc->sc_flags.status_suspend) {
789 sc->sc_flags.status_suspend = 0;
790 sc->sc_flags.change_suspend = 1;
791 /* disable resume interrupt */
792 uss820dci_wait_suspend(sc, 1);
795 } else if (ssr & USS820_SSR_SUSPEND) {
796 if (!sc->sc_flags.status_suspend) {
797 sc->sc_flags.status_suspend = 1;
798 sc->sc_flags.change_suspend = 1;
799 /* enable resume interrupt */
800 uss820dci_wait_suspend(sc, 0);
806 DPRINTF("real bus interrupt 0x%02x\n", ssr);
808 /* complete root HUB interrupt endpoint */
809 uss820dci_root_intr(sc);
812 /* acknowledge all SBI interrupts */
813 uss820dci_update_shared_1(sc, USS820_SBI, 0, 0);
815 /* acknowledge all SBI1 interrupts */
816 uss820dci_update_shared_1(sc, USS820_SBI1, 0, 0);
818 /* poll all active transfers */
819 uss820dci_interrupt_poll(sc);
821 USB_BUS_UNLOCK(&sc->sc_bus);
825 uss820dci_setup_standard_chain_sub(struct uss820_std_temp *temp)
827 struct uss820dci_td *td;
829 /* get current Transfer Descriptor */
833 /* prepare for next TD */
834 temp->td_next = td->obj_next;
836 /* fill out the Transfer Descriptor */
837 td->func = temp->func;
839 td->offset = temp->offset;
840 td->remainder = temp->len;
843 td->did_stall = temp->did_stall;
844 td->short_pkt = temp->short_pkt;
845 td->alt_next = temp->setup_alt_next;
849 uss820dci_setup_standard_chain(struct usb_xfer *xfer)
851 struct uss820_std_temp temp;
852 struct uss820dci_softc *sc;
853 struct uss820dci_td *td;
857 DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
858 xfer->address, UE_GET_ADDR(xfer->endpointno),
859 xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
861 temp.max_frame_size = xfer->max_frame_size;
863 td = xfer->td_start[0];
864 xfer->td_transfer_first = td;
865 xfer->td_transfer_cache = td;
871 temp.td_next = xfer->td_start[0];
873 temp.setup_alt_next = xfer->flags_int.short_frames_ok;
874 temp.did_stall = !xfer->flags_int.control_stall;
876 sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
877 ep_no = (xfer->endpointno & UE_ADDR);
879 /* check if we should prepend a setup message */
881 if (xfer->flags_int.control_xfr) {
882 if (xfer->flags_int.control_hdr) {
884 temp.func = &uss820dci_setup_rx;
885 temp.len = xfer->frlengths[0];
886 temp.pc = xfer->frbuffers + 0;
887 temp.short_pkt = temp.len ? 1 : 0;
888 /* check for last frame */
889 if (xfer->nframes == 1) {
890 /* no STATUS stage yet, SETUP is last */
891 if (xfer->flags_int.control_act)
892 temp.setup_alt_next = 0;
895 uss820dci_setup_standard_chain_sub(&temp);
902 if (x != xfer->nframes) {
903 if (xfer->endpointno & UE_DIR_IN) {
904 temp.func = &uss820dci_data_tx;
906 temp.func = &uss820dci_data_rx;
909 /* setup "pc" pointer */
910 temp.pc = xfer->frbuffers + x;
912 while (x != xfer->nframes) {
914 /* DATA0 / DATA1 message */
916 temp.len = xfer->frlengths[x];
920 if (x == xfer->nframes) {
921 if (xfer->flags_int.control_xfr) {
922 if (xfer->flags_int.control_act) {
923 temp.setup_alt_next = 0;
926 temp.setup_alt_next = 0;
931 /* make sure that we send an USB packet */
937 /* regular data transfer */
939 temp.short_pkt = (xfer->flags.force_short_xfer) ? 0 : 1;
942 uss820dci_setup_standard_chain_sub(&temp);
944 if (xfer->flags_int.isochronous_xfr) {
945 temp.offset += temp.len;
947 /* get next Page Cache pointer */
948 temp.pc = xfer->frbuffers + x;
952 /* check for control transfer */
953 if (xfer->flags_int.control_xfr) {
956 /* always setup a valid "pc" pointer for status and sync */
957 temp.pc = xfer->frbuffers + 0;
960 temp.setup_alt_next = 0;
962 /* check if we should append a status stage */
963 if (!xfer->flags_int.control_act) {
966 * Send a DATA1 message and invert the current
967 * endpoint direction.
969 if (xfer->endpointno & UE_DIR_IN) {
970 temp.func = &uss820dci_data_rx;
973 temp.func = &uss820dci_data_tx;
979 uss820dci_setup_standard_chain_sub(&temp);
981 /* we need a SYNC point after TX */
982 temp.func = &uss820dci_data_tx_sync;
983 uss820dci_setup_standard_chain_sub(&temp);
987 /* must have at least one frame! */
989 xfer->td_transfer_last = td;
993 uss820dci_timeout(void *arg)
995 struct usb_xfer *xfer = arg;
997 DPRINTF("xfer=%p\n", xfer);
999 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1001 /* transfer is transferred */
1002 uss820dci_device_done(xfer, USB_ERR_TIMEOUT);
1006 uss820dci_intr_set(struct usb_xfer *xfer, uint8_t set)
1008 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1009 uint8_t ep_no = (xfer->endpointno & UE_ADDR);
1013 DPRINTFN(15, "endpoint 0x%02x\n", xfer->endpointno);
1016 ep_reg = USS820_SBIE1;
1018 ep_reg = USS820_SBIE;
1022 ep_no = 1 << (2 * ep_no);
1024 if (xfer->flags_int.control_xfr) {
1025 if (xfer->flags_int.control_hdr) {
1026 ep_no <<= 1; /* RX interrupt only */
1028 ep_no |= (ep_no << 1); /* RX and TX interrupt */
1031 if (!(xfer->endpointno & UE_DIR_IN)) {
1035 temp = USS820_READ_1(sc, ep_reg);
1041 USS820_WRITE_1(sc, ep_reg, temp);
1045 uss820dci_start_standard_chain(struct usb_xfer *xfer)
1050 if (uss820dci_xfer_do_fifo(xfer)) {
1053 * Only enable the endpoint interrupt when we are
1054 * actually waiting for data, hence we are dealing
1055 * with level triggered interrupts !
1057 uss820dci_intr_set(xfer, 1);
1059 /* put transfer on interrupt queue */
1060 usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
1062 /* start timeout, if any */
1063 if (xfer->timeout != 0) {
1064 usbd_transfer_timeout_ms(xfer,
1065 &uss820dci_timeout, xfer->timeout);
1071 uss820dci_root_intr(struct uss820dci_softc *sc)
1075 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1078 sc->sc_hub_idata[0] = 0x02; /* we only have one port */
1080 uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1081 sizeof(sc->sc_hub_idata));
1085 uss820dci_standard_done_sub(struct usb_xfer *xfer)
1087 struct uss820dci_td *td;
1093 td = xfer->td_transfer_cache;
1096 len = td->remainder;
1098 if (xfer->aframes != xfer->nframes) {
1100 * Verify the length and subtract
1101 * the remainder from "frlengths[]":
1103 if (len > xfer->frlengths[xfer->aframes]) {
1106 xfer->frlengths[xfer->aframes] -= len;
1109 /* Check for transfer error */
1111 /* the transfer is finished */
1116 /* Check for short transfer */
1118 if (xfer->flags_int.short_frames_ok) {
1119 /* follow alt next */
1126 /* the transfer is finished */
1134 /* this USB frame is complete */
1140 /* update transfer cache */
1142 xfer->td_transfer_cache = td;
1145 USB_ERR_STALLED : USB_ERR_NORMAL_COMPLETION);
1149 uss820dci_standard_done(struct usb_xfer *xfer)
1151 usb_error_t err = 0;
1153 DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
1154 xfer, xfer->endpoint);
1158 xfer->td_transfer_cache = xfer->td_transfer_first;
1160 if (xfer->flags_int.control_xfr) {
1162 if (xfer->flags_int.control_hdr) {
1164 err = uss820dci_standard_done_sub(xfer);
1168 if (xfer->td_transfer_cache == NULL) {
1172 while (xfer->aframes != xfer->nframes) {
1174 err = uss820dci_standard_done_sub(xfer);
1177 if (xfer->td_transfer_cache == NULL) {
1182 if (xfer->flags_int.control_xfr &&
1183 !xfer->flags_int.control_act) {
1185 err = uss820dci_standard_done_sub(xfer);
1188 uss820dci_device_done(xfer, err);
1191 /*------------------------------------------------------------------------*
1192 * uss820dci_device_done
1194 * NOTE: this function can be called more than one time on the
1195 * same USB transfer!
1196 *------------------------------------------------------------------------*/
1198 uss820dci_device_done(struct usb_xfer *xfer, usb_error_t error)
1200 USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1202 DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1203 xfer, xfer->endpoint, error);
1205 if (xfer->flags_int.usb_mode == USB_MODE_DEVICE) {
1206 uss820dci_intr_set(xfer, 0);
1208 /* dequeue transfer and start next transfer */
1209 usbd_transfer_done(xfer, error);
1213 uss820dci_set_stall(struct usb_device *udev, struct usb_xfer *xfer,
1214 struct usb_endpoint *ep, uint8_t *did_stall)
1216 struct uss820dci_softc *sc;
1222 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1224 DPRINTFN(5, "endpoint=%p\n", ep);
1227 /* cancel any ongoing transfers */
1228 uss820dci_device_done(xfer, USB_ERR_STALLED);
1230 /* set FORCESTALL */
1231 sc = USS820_DCI_BUS2SC(udev->bus);
1232 ep_no = (ep->edesc->bEndpointAddress & UE_ADDR);
1233 ep_dir = (ep->edesc->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT));
1234 ep_type = (ep->edesc->bmAttributes & UE_XFERTYPE);
1236 if (ep_type == UE_CONTROL) {
1237 /* should not happen */
1240 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1242 if (ep_dir == UE_DIR_IN) {
1243 temp = USS820_EPCON_TXSTL;
1245 temp = USS820_EPCON_RXSTL;
1247 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1251 uss820dci_clear_stall_sub(struct uss820dci_softc *sc,
1252 uint8_t ep_no, uint8_t ep_type, uint8_t ep_dir)
1256 if (ep_type == UE_CONTROL) {
1257 /* clearing stall is not needed */
1260 /* select endpoint index */
1261 USS820_WRITE_1(sc, USS820_EPINDEX, ep_no);
1263 /* clear stall and disable I/O transfers */
1264 if (ep_dir == UE_DIR_IN) {
1265 temp = 0xFF ^ (USS820_EPCON_TXOE |
1266 USS820_EPCON_TXSTL);
1268 temp = 0xFF ^ (USS820_EPCON_RXIE |
1269 USS820_EPCON_RXSTL);
1271 uss820dci_update_shared_1(sc, USS820_EPCON, temp, 0);
1273 if (ep_dir == UE_DIR_IN) {
1274 /* reset data toggle */
1275 USS820_WRITE_1(sc, USS820_TXSTAT,
1276 USS820_TXSTAT_TXSOVW);
1279 temp = USS820_READ_1(sc, USS820_TXCON);
1280 temp |= USS820_TXCON_TXCLR;
1281 USS820_WRITE_1(sc, USS820_TXCON, temp);
1282 temp &= ~USS820_TXCON_TXCLR;
1283 USS820_WRITE_1(sc, USS820_TXCON, temp);
1286 /* reset data toggle */
1287 uss820dci_update_shared_1(sc, USS820_RXSTAT,
1288 0, USS820_RXSTAT_RXSOVW);
1291 temp = USS820_READ_1(sc, USS820_RXCON);
1292 temp |= USS820_RXCON_RXCLR;
1293 temp &= ~USS820_RXCON_RXFFRC;
1294 USS820_WRITE_1(sc, USS820_RXCON, temp);
1295 temp &= ~USS820_RXCON_RXCLR;
1296 USS820_WRITE_1(sc, USS820_RXCON, temp);
1301 uss820dci_clear_stall(struct usb_device *udev, struct usb_endpoint *ep)
1303 struct uss820dci_softc *sc;
1304 struct usb_endpoint_descriptor *ed;
1306 USB_BUS_LOCK_ASSERT(udev->bus, MA_OWNED);
1308 DPRINTFN(5, "endpoint=%p\n", ep);
1311 if (udev->flags.usb_mode != USB_MODE_DEVICE) {
1316 sc = USS820_DCI_BUS2SC(udev->bus);
1318 /* get endpoint descriptor */
1321 /* reset endpoint */
1322 uss820dci_clear_stall_sub(sc,
1323 (ed->bEndpointAddress & UE_ADDR),
1324 (ed->bmAttributes & UE_XFERTYPE),
1325 (ed->bEndpointAddress & (UE_DIR_IN | UE_DIR_OUT)));
1329 uss820dci_init(struct uss820dci_softc *sc)
1331 const struct usb_hw_ep_profile *pf;
1337 /* set up the bus structure */
1338 sc->sc_bus.usbrev = USB_REV_1_1;
1339 sc->sc_bus.methods = &uss820dci_bus_methods;
1341 USB_BUS_LOCK(&sc->sc_bus);
1343 /* we always have VBUS */
1344 sc->sc_flags.status_vbus = 1;
1346 /* reset the chip */
1347 USS820_WRITE_1(sc, USS820_SCR, USS820_SCR_SRESET);
1349 USS820_WRITE_1(sc, USS820_SCR, 0);
1351 /* wait for reset to complete */
1354 temp = USS820_READ_1(sc, USS820_MCSR);
1356 if (temp & USS820_MCSR_INIT) {
1360 USB_BUS_UNLOCK(&sc->sc_bus);
1361 return (USB_ERR_INVAL);
1363 /* wait a little for things to stabilise */
1368 uss820dci_pull_down(sc);
1370 /* wait 10ms for pulldown to stabilise */
1371 usb_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100);
1373 /* check hardware revision */
1374 temp = USS820_READ_1(sc, USS820_REV);
1377 USB_BUS_UNLOCK(&sc->sc_bus);
1378 return (USB_ERR_INVAL);
1380 /* enable interrupts */
1381 USS820_WRITE_1(sc, USS820_SCR,
1383 USS820_SCR_IE_RESET |
1384 /* USS820_SCR_RWUPE | */
1385 USS820_SCR_IE_SUSP |
1388 /* enable interrupts */
1389 USS820_WRITE_1(sc, USS820_SCRATCH,
1390 USS820_SCRATCH_IE_RESUME);
1392 /* enable features */
1393 USS820_WRITE_1(sc, USS820_MCSR,
1394 USS820_MCSR_BDFEAT |
1397 sc->sc_flags.mcsr_feat = 1;
1399 /* disable interrupts */
1400 USS820_WRITE_1(sc, USS820_SBIE, 0);
1402 /* disable interrupts */
1403 USS820_WRITE_1(sc, USS820_SBIE1, 0);
1405 /* disable all endpoints */
1406 for (n = 0; n != USS820_EP_MAX; n++) {
1408 /* select endpoint */
1409 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1411 /* disable endpoint */
1412 uss820dci_update_shared_1(sc, USS820_EPCON, 0, 0);
1416 * Initialise default values for some registers that cannot be
1417 * changed during operation!
1419 for (n = 0; n != USS820_EP_MAX; n++) {
1421 uss820dci_get_hw_ep_profile(NULL, &pf, n);
1423 /* the maximum frame sizes should be the same */
1424 if (pf->max_in_frame_size != pf->max_out_frame_size) {
1425 DPRINTF("Max frame size mismatch %u != %u\n",
1426 pf->max_in_frame_size, pf->max_out_frame_size);
1428 if (pf->support_isochronous) {
1429 if (pf->max_in_frame_size <= 64) {
1430 temp = (USS820_TXCON_FFSZ_16_64 |
1431 USS820_TXCON_TXISO |
1433 } else if (pf->max_in_frame_size <= 256) {
1434 temp = (USS820_TXCON_FFSZ_64_256 |
1435 USS820_TXCON_TXISO |
1437 } else if (pf->max_in_frame_size <= 512) {
1438 temp = (USS820_TXCON_FFSZ_8_512 |
1439 USS820_TXCON_TXISO |
1441 } else { /* 1024 bytes */
1442 temp = (USS820_TXCON_FFSZ_32_1024 |
1443 USS820_TXCON_TXISO |
1447 if ((pf->max_in_frame_size <= 8) &&
1448 (sc->sc_flags.mcsr_feat)) {
1449 temp = (USS820_TXCON_FFSZ_8_512 |
1451 } else if (pf->max_in_frame_size <= 16) {
1452 temp = (USS820_TXCON_FFSZ_16_64 |
1454 } else if ((pf->max_in_frame_size <= 32) &&
1455 (sc->sc_flags.mcsr_feat)) {
1456 temp = (USS820_TXCON_FFSZ_32_1024 |
1458 } else { /* 64 bytes */
1459 temp = (USS820_TXCON_FFSZ_64_256 |
1464 /* need to configure the chip early */
1466 USS820_WRITE_1(sc, USS820_EPINDEX, n);
1467 USS820_WRITE_1(sc, USS820_TXCON, temp);
1468 USS820_WRITE_1(sc, USS820_RXCON, temp);
1470 if (pf->support_control) {
1471 temp = USS820_EPCON_CTLEP |
1472 USS820_EPCON_RXSPM |
1474 USS820_EPCON_RXEPEN |
1476 USS820_EPCON_TXEPEN;
1478 temp = USS820_EPCON_RXEPEN | USS820_EPCON_TXEPEN;
1481 uss820dci_update_shared_1(sc, USS820_EPCON, 0xFF, temp);
1484 USB_BUS_UNLOCK(&sc->sc_bus);
1486 /* catch any lost interrupts */
1488 uss820dci_do_poll(&sc->sc_bus);
1490 return (0); /* success */
1494 uss820dci_uninit(struct uss820dci_softc *sc)
1498 USB_BUS_LOCK(&sc->sc_bus);
1500 /* disable all interrupts */
1501 temp = USS820_READ_1(sc, USS820_SCR);
1502 temp &= ~USS820_SCR_T_IRQ;
1503 USS820_WRITE_1(sc, USS820_SCR, temp);
1505 sc->sc_flags.port_powered = 0;
1506 sc->sc_flags.status_vbus = 0;
1507 sc->sc_flags.status_bus_reset = 0;
1508 sc->sc_flags.status_suspend = 0;
1509 sc->sc_flags.change_suspend = 0;
1510 sc->sc_flags.change_connect = 1;
1512 uss820dci_pull_down(sc);
1513 USB_BUS_UNLOCK(&sc->sc_bus);
1517 uss820dci_suspend(struct uss820dci_softc *sc)
1523 uss820dci_resume(struct uss820dci_softc *sc)
1529 uss820dci_do_poll(struct usb_bus *bus)
1531 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
1533 USB_BUS_LOCK(&sc->sc_bus);
1534 uss820dci_interrupt_poll(sc);
1535 USB_BUS_UNLOCK(&sc->sc_bus);
1538 /*------------------------------------------------------------------------*
1539 * at91dci bulk support
1540 *------------------------------------------------------------------------*/
1542 uss820dci_device_bulk_open(struct usb_xfer *xfer)
1548 uss820dci_device_bulk_close(struct usb_xfer *xfer)
1550 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1554 uss820dci_device_bulk_enter(struct usb_xfer *xfer)
1560 uss820dci_device_bulk_start(struct usb_xfer *xfer)
1563 uss820dci_setup_standard_chain(xfer);
1564 uss820dci_start_standard_chain(xfer);
1567 struct usb_pipe_methods uss820dci_device_bulk_methods =
1569 .open = uss820dci_device_bulk_open,
1570 .close = uss820dci_device_bulk_close,
1571 .enter = uss820dci_device_bulk_enter,
1572 .start = uss820dci_device_bulk_start,
1575 /*------------------------------------------------------------------------*
1576 * at91dci control support
1577 *------------------------------------------------------------------------*/
1579 uss820dci_device_ctrl_open(struct usb_xfer *xfer)
1585 uss820dci_device_ctrl_close(struct usb_xfer *xfer)
1587 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1591 uss820dci_device_ctrl_enter(struct usb_xfer *xfer)
1597 uss820dci_device_ctrl_start(struct usb_xfer *xfer)
1600 uss820dci_setup_standard_chain(xfer);
1601 uss820dci_start_standard_chain(xfer);
1604 struct usb_pipe_methods uss820dci_device_ctrl_methods =
1606 .open = uss820dci_device_ctrl_open,
1607 .close = uss820dci_device_ctrl_close,
1608 .enter = uss820dci_device_ctrl_enter,
1609 .start = uss820dci_device_ctrl_start,
1612 /*------------------------------------------------------------------------*
1613 * at91dci interrupt support
1614 *------------------------------------------------------------------------*/
1616 uss820dci_device_intr_open(struct usb_xfer *xfer)
1622 uss820dci_device_intr_close(struct usb_xfer *xfer)
1624 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1628 uss820dci_device_intr_enter(struct usb_xfer *xfer)
1634 uss820dci_device_intr_start(struct usb_xfer *xfer)
1637 uss820dci_setup_standard_chain(xfer);
1638 uss820dci_start_standard_chain(xfer);
1641 struct usb_pipe_methods uss820dci_device_intr_methods =
1643 .open = uss820dci_device_intr_open,
1644 .close = uss820dci_device_intr_close,
1645 .enter = uss820dci_device_intr_enter,
1646 .start = uss820dci_device_intr_start,
1649 /*------------------------------------------------------------------------*
1650 * at91dci full speed isochronous support
1651 *------------------------------------------------------------------------*/
1653 uss820dci_device_isoc_fs_open(struct usb_xfer *xfer)
1659 uss820dci_device_isoc_fs_close(struct usb_xfer *xfer)
1661 uss820dci_device_done(xfer, USB_ERR_CANCELLED);
1665 uss820dci_device_isoc_fs_enter(struct usb_xfer *xfer)
1667 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(xfer->xroot->bus);
1671 DPRINTFN(6, "xfer=%p next=%d nframes=%d\n",
1672 xfer, xfer->endpoint->isoc_next, xfer->nframes);
1674 /* get the current frame index - we don't need the high bits */
1676 nframes = USS820_READ_1(sc, USS820_SOFL);
1679 * check if the frame index is within the window where the
1680 * frames will be inserted
1682 temp = (nframes - xfer->endpoint->isoc_next) & USS820_SOFL_MASK;
1684 if ((xfer->endpoint->is_synced == 0) ||
1685 (temp < xfer->nframes)) {
1687 * If there is data underflow or the pipe queue is
1688 * empty we schedule the transfer a few frames ahead
1689 * of the current frame position. Else two isochronous
1690 * transfers might overlap.
1692 xfer->endpoint->isoc_next = (nframes + 3) & USS820_SOFL_MASK;
1693 xfer->endpoint->is_synced = 1;
1694 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1697 * compute how many milliseconds the insertion is ahead of the
1698 * current frame position:
1700 temp = (xfer->endpoint->isoc_next - nframes) & USS820_SOFL_MASK;
1703 * pre-compute when the isochronous transfer will be finished:
1705 xfer->isoc_time_complete =
1706 usb_isoc_time_expand(&sc->sc_bus, nframes) + temp +
1709 /* compute frame number for next insertion */
1710 xfer->endpoint->isoc_next += xfer->nframes;
1713 uss820dci_setup_standard_chain(xfer);
1717 uss820dci_device_isoc_fs_start(struct usb_xfer *xfer)
1719 /* start TD chain */
1720 uss820dci_start_standard_chain(xfer);
1723 struct usb_pipe_methods uss820dci_device_isoc_fs_methods =
1725 .open = uss820dci_device_isoc_fs_open,
1726 .close = uss820dci_device_isoc_fs_close,
1727 .enter = uss820dci_device_isoc_fs_enter,
1728 .start = uss820dci_device_isoc_fs_start,
1731 /*------------------------------------------------------------------------*
1732 * at91dci root control support
1733 *------------------------------------------------------------------------*
1734 * Simulate a hardware HUB by handling all the necessary requests.
1735 *------------------------------------------------------------------------*/
1737 static const struct usb_device_descriptor uss820dci_devd = {
1738 .bLength = sizeof(struct usb_device_descriptor),
1739 .bDescriptorType = UDESC_DEVICE,
1740 .bcdUSB = {0x00, 0x02},
1741 .bDeviceClass = UDCLASS_HUB,
1742 .bDeviceSubClass = UDSUBCLASS_HUB,
1743 .bDeviceProtocol = UDPROTO_FSHUB,
1744 .bMaxPacketSize = 64,
1745 .bcdDevice = {0x00, 0x01},
1748 .bNumConfigurations = 1,
1751 static const struct usb_device_qualifier uss820dci_odevd = {
1752 .bLength = sizeof(struct usb_device_qualifier),
1753 .bDescriptorType = UDESC_DEVICE_QUALIFIER,
1754 .bcdUSB = {0x00, 0x02},
1755 .bDeviceClass = UDCLASS_HUB,
1756 .bDeviceSubClass = UDSUBCLASS_HUB,
1757 .bDeviceProtocol = UDPROTO_FSHUB,
1758 .bMaxPacketSize0 = 0,
1759 .bNumConfigurations = 0,
1762 static const struct uss820dci_config_desc uss820dci_confd = {
1764 .bLength = sizeof(struct usb_config_descriptor),
1765 .bDescriptorType = UDESC_CONFIG,
1766 .wTotalLength[0] = sizeof(uss820dci_confd),
1768 .bConfigurationValue = 1,
1769 .iConfiguration = 0,
1770 .bmAttributes = UC_SELF_POWERED,
1774 .bLength = sizeof(struct usb_interface_descriptor),
1775 .bDescriptorType = UDESC_INTERFACE,
1777 .bInterfaceClass = UICLASS_HUB,
1778 .bInterfaceSubClass = UISUBCLASS_HUB,
1779 .bInterfaceProtocol = 0,
1783 .bLength = sizeof(struct usb_endpoint_descriptor),
1784 .bDescriptorType = UDESC_ENDPOINT,
1785 .bEndpointAddress = (UE_DIR_IN | USS820_DCI_INTR_ENDPT),
1786 .bmAttributes = UE_INTERRUPT,
1787 .wMaxPacketSize[0] = 8,
1792 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) }
1794 static const struct usb_hub_descriptor_min uss820dci_hubd = {
1795 .bDescLength = sizeof(uss820dci_hubd),
1796 .bDescriptorType = UDESC_HUB,
1798 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)),
1799 .bPwrOn2PwrGood = 50,
1800 .bHubContrCurrent = 0,
1801 .DeviceRemovable = {0}, /* port is removable */
1804 #define STRING_LANG \
1805 0x09, 0x04, /* American English */
1807 #define STRING_VENDOR \
1808 'A', 0, 'G', 0, 'E', 0, 'R', 0, 'E', 0
1810 #define STRING_PRODUCT \
1811 'D', 0, 'C', 0, 'I', 0, ' ', 0, 'R', 0, \
1812 'o', 0, 'o', 0, 't', 0, ' ', 0, 'H', 0, \
1815 USB_MAKE_STRING_DESC(STRING_LANG, uss820dci_langtab);
1816 USB_MAKE_STRING_DESC(STRING_VENDOR, uss820dci_vendor);
1817 USB_MAKE_STRING_DESC(STRING_PRODUCT, uss820dci_product);
1820 uss820dci_roothub_exec(struct usb_device *udev,
1821 struct usb_device_request *req, const void **pptr, uint16_t *plength)
1823 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
1830 USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1833 ptr = (const void *)&sc->sc_hub_temp;
1837 value = UGETW(req->wValue);
1838 index = UGETW(req->wIndex);
1840 /* demultiplex the control request */
1842 switch (req->bmRequestType) {
1843 case UT_READ_DEVICE:
1844 switch (req->bRequest) {
1845 case UR_GET_DESCRIPTOR:
1846 goto tr_handle_get_descriptor;
1848 goto tr_handle_get_config;
1850 goto tr_handle_get_status;
1856 case UT_WRITE_DEVICE:
1857 switch (req->bRequest) {
1858 case UR_SET_ADDRESS:
1859 goto tr_handle_set_address;
1861 goto tr_handle_set_config;
1862 case UR_CLEAR_FEATURE:
1863 goto tr_valid; /* nop */
1864 case UR_SET_DESCRIPTOR:
1865 goto tr_valid; /* nop */
1866 case UR_SET_FEATURE:
1872 case UT_WRITE_ENDPOINT:
1873 switch (req->bRequest) {
1874 case UR_CLEAR_FEATURE:
1875 switch (UGETW(req->wValue)) {
1876 case UF_ENDPOINT_HALT:
1877 goto tr_handle_clear_halt;
1878 case UF_DEVICE_REMOTE_WAKEUP:
1879 goto tr_handle_clear_wakeup;
1884 case UR_SET_FEATURE:
1885 switch (UGETW(req->wValue)) {
1886 case UF_ENDPOINT_HALT:
1887 goto tr_handle_set_halt;
1888 case UF_DEVICE_REMOTE_WAKEUP:
1889 goto tr_handle_set_wakeup;
1894 case UR_SYNCH_FRAME:
1895 goto tr_valid; /* nop */
1901 case UT_READ_ENDPOINT:
1902 switch (req->bRequest) {
1904 goto tr_handle_get_ep_status;
1910 case UT_WRITE_INTERFACE:
1911 switch (req->bRequest) {
1912 case UR_SET_INTERFACE:
1913 goto tr_handle_set_interface;
1914 case UR_CLEAR_FEATURE:
1915 goto tr_valid; /* nop */
1916 case UR_SET_FEATURE:
1922 case UT_READ_INTERFACE:
1923 switch (req->bRequest) {
1924 case UR_GET_INTERFACE:
1925 goto tr_handle_get_interface;
1927 goto tr_handle_get_iface_status;
1933 case UT_WRITE_CLASS_INTERFACE:
1934 case UT_WRITE_VENDOR_INTERFACE:
1938 case UT_READ_CLASS_INTERFACE:
1939 case UT_READ_VENDOR_INTERFACE:
1943 case UT_WRITE_CLASS_DEVICE:
1944 switch (req->bRequest) {
1945 case UR_CLEAR_FEATURE:
1947 case UR_SET_DESCRIPTOR:
1948 case UR_SET_FEATURE:
1955 case UT_WRITE_CLASS_OTHER:
1956 switch (req->bRequest) {
1957 case UR_CLEAR_FEATURE:
1958 goto tr_handle_clear_port_feature;
1959 case UR_SET_FEATURE:
1960 goto tr_handle_set_port_feature;
1961 case UR_CLEAR_TT_BUFFER:
1971 case UT_READ_CLASS_OTHER:
1972 switch (req->bRequest) {
1973 case UR_GET_TT_STATE:
1974 goto tr_handle_get_tt_state;
1976 goto tr_handle_get_port_status;
1982 case UT_READ_CLASS_DEVICE:
1983 switch (req->bRequest) {
1984 case UR_GET_DESCRIPTOR:
1985 goto tr_handle_get_class_descriptor;
1987 goto tr_handle_get_class_status;
1998 tr_handle_get_descriptor:
1999 switch (value >> 8) {
2004 len = sizeof(uss820dci_devd);
2005 ptr = (const void *)&uss820dci_devd;
2007 case UDESC_DEVICE_QUALIFIER:
2011 len = sizeof(uss820dci_odevd);
2012 ptr = (const void *)&uss820dci_odevd;
2018 len = sizeof(uss820dci_confd);
2019 ptr = (const void *)&uss820dci_confd;
2022 switch (value & 0xff) {
2023 case 0: /* Language table */
2024 len = sizeof(uss820dci_langtab);
2025 ptr = (const void *)&uss820dci_langtab;
2028 case 1: /* Vendor */
2029 len = sizeof(uss820dci_vendor);
2030 ptr = (const void *)&uss820dci_vendor;
2033 case 2: /* Product */
2034 len = sizeof(uss820dci_product);
2035 ptr = (const void *)&uss820dci_product;
2046 tr_handle_get_config:
2048 sc->sc_hub_temp.wValue[0] = sc->sc_conf;
2051 tr_handle_get_status:
2053 USETW(sc->sc_hub_temp.wValue, UDS_SELF_POWERED);
2056 tr_handle_set_address:
2057 if (value & 0xFF00) {
2060 sc->sc_rt_addr = value;
2063 tr_handle_set_config:
2067 sc->sc_conf = value;
2070 tr_handle_get_interface:
2072 sc->sc_hub_temp.wValue[0] = 0;
2075 tr_handle_get_tt_state:
2076 tr_handle_get_class_status:
2077 tr_handle_get_iface_status:
2078 tr_handle_get_ep_status:
2080 USETW(sc->sc_hub_temp.wValue, 0);
2084 tr_handle_set_interface:
2085 tr_handle_set_wakeup:
2086 tr_handle_clear_wakeup:
2087 tr_handle_clear_halt:
2090 tr_handle_clear_port_feature:
2094 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE on port %d\n", index);
2097 case UHF_PORT_SUSPEND:
2098 uss820dci_wakeup_peer(sc);
2101 case UHF_PORT_ENABLE:
2102 sc->sc_flags.port_enabled = 0;
2106 case UHF_PORT_INDICATOR:
2107 case UHF_C_PORT_ENABLE:
2108 case UHF_C_PORT_OVER_CURRENT:
2109 case UHF_C_PORT_RESET:
2112 case UHF_PORT_POWER:
2113 sc->sc_flags.port_powered = 0;
2114 uss820dci_pull_down(sc);
2116 case UHF_C_PORT_CONNECTION:
2117 sc->sc_flags.change_connect = 0;
2119 case UHF_C_PORT_SUSPEND:
2120 sc->sc_flags.change_suspend = 0;
2123 err = USB_ERR_IOERROR;
2128 tr_handle_set_port_feature:
2132 DPRINTFN(9, "UR_SET_PORT_FEATURE\n");
2135 case UHF_PORT_ENABLE:
2136 sc->sc_flags.port_enabled = 1;
2138 case UHF_PORT_SUSPEND:
2139 case UHF_PORT_RESET:
2141 case UHF_PORT_INDICATOR:
2144 case UHF_PORT_POWER:
2145 sc->sc_flags.port_powered = 1;
2148 err = USB_ERR_IOERROR;
2153 tr_handle_get_port_status:
2155 DPRINTFN(9, "UR_GET_PORT_STATUS\n");
2160 if (sc->sc_flags.status_vbus) {
2161 uss820dci_pull_up(sc);
2163 uss820dci_pull_down(sc);
2166 /* Select FULL-speed and Device Side Mode */
2168 value = UPS_PORT_MODE_DEVICE;
2170 if (sc->sc_flags.port_powered) {
2171 value |= UPS_PORT_POWER;
2173 if (sc->sc_flags.port_enabled) {
2174 value |= UPS_PORT_ENABLED;
2176 if (sc->sc_flags.status_vbus &&
2177 sc->sc_flags.status_bus_reset) {
2178 value |= UPS_CURRENT_CONNECT_STATUS;
2180 if (sc->sc_flags.status_suspend) {
2181 value |= UPS_SUSPEND;
2183 USETW(sc->sc_hub_temp.ps.wPortStatus, value);
2187 if (sc->sc_flags.change_connect) {
2188 value |= UPS_C_CONNECT_STATUS;
2190 if (sc->sc_flags.change_suspend) {
2191 value |= UPS_C_SUSPEND;
2193 USETW(sc->sc_hub_temp.ps.wPortChange, value);
2194 len = sizeof(sc->sc_hub_temp.ps);
2197 tr_handle_get_class_descriptor:
2201 ptr = (const void *)&uss820dci_hubd;
2202 len = sizeof(uss820dci_hubd);
2206 err = USB_ERR_STALLED;
2215 uss820dci_xfer_setup(struct usb_setup_params *parm)
2217 const struct usb_hw_ep_profile *pf;
2218 struct uss820dci_softc *sc;
2219 struct usb_xfer *xfer;
2225 sc = USS820_DCI_BUS2SC(parm->udev->bus);
2226 xfer = parm->curr_xfer;
2229 * NOTE: This driver does not use any of the parameters that
2230 * are computed from the following values. Just set some
2231 * reasonable dummies:
2233 parm->hc_max_packet_size = 0x500;
2234 parm->hc_max_packet_count = 1;
2235 parm->hc_max_frame_size = 0x500;
2237 usbd_transfer_setup_sub(parm);
2240 * compute maximum number of TDs
2242 if (parm->methods == &uss820dci_device_ctrl_methods) {
2244 ntd = xfer->nframes + 1 /* STATUS */ + 1 /* SYNC */ ;
2246 } else if (parm->methods == &uss820dci_device_bulk_methods) {
2248 ntd = xfer->nframes + 1 /* SYNC */ ;
2250 } else if (parm->methods == &uss820dci_device_intr_methods) {
2252 ntd = xfer->nframes + 1 /* SYNC */ ;
2254 } else if (parm->methods == &uss820dci_device_isoc_fs_methods) {
2256 ntd = xfer->nframes + 1 /* SYNC */ ;
2264 * check if "usbd_transfer_setup_sub" set an error
2270 * allocate transfer descriptors
2279 ep_no = xfer->endpointno & UE_ADDR;
2280 uss820dci_get_hw_ep_profile(parm->udev, &pf, ep_no);
2283 /* should not happen */
2284 parm->err = USB_ERR_INVAL;
2293 parm->size[0] += ((-parm->size[0]) & (USB_HOST_ALIGN - 1));
2295 for (n = 0; n != ntd; n++) {
2297 struct uss820dci_td *td;
2301 td = USB_ADD_BYTES(parm->buf, parm->size[0]);
2304 td->io_tag = sc->sc_io_tag;
2305 td->io_hdl = sc->sc_io_hdl;
2306 td->max_packet_size = xfer->max_packet_size;
2307 td->ep_index = ep_no;
2308 if (pf->support_multi_buffer &&
2309 (parm->methods != &uss820dci_device_ctrl_methods)) {
2310 td->support_multi_buffer = 1;
2312 td->obj_next = last_obj;
2316 parm->size[0] += sizeof(*td);
2319 xfer->td_start[0] = last_obj;
2323 uss820dci_xfer_unsetup(struct usb_xfer *xfer)
2329 uss820dci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2330 struct usb_endpoint *ep)
2332 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(udev->bus);
2334 DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2336 edesc->bEndpointAddress, udev->flags.usb_mode,
2339 if (udev->device_index != sc->sc_rt_addr) {
2341 if (udev->speed != USB_SPEED_FULL) {
2345 switch (edesc->bmAttributes & UE_XFERTYPE) {
2347 ep->methods = &uss820dci_device_ctrl_methods;
2350 ep->methods = &uss820dci_device_intr_methods;
2352 case UE_ISOCHRONOUS:
2353 ep->methods = &uss820dci_device_isoc_fs_methods;
2356 ep->methods = &uss820dci_device_bulk_methods;
2366 uss820dci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2368 struct uss820dci_softc *sc = USS820_DCI_BUS2SC(bus);
2371 case USB_HW_POWER_SUSPEND:
2372 uss820dci_suspend(sc);
2374 case USB_HW_POWER_SHUTDOWN:
2375 uss820dci_uninit(sc);
2377 case USB_HW_POWER_RESUME:
2378 uss820dci_resume(sc);
2385 struct usb_bus_methods uss820dci_bus_methods =
2387 .endpoint_init = &uss820dci_ep_init,
2388 .xfer_setup = &uss820dci_xfer_setup,
2389 .xfer_unsetup = &uss820dci_xfer_unsetup,
2390 .get_hw_ep_profile = &uss820dci_get_hw_ep_profile,
2391 .set_stall = &uss820dci_set_stall,
2392 .clear_stall = &uss820dci_clear_stall,
2393 .roothub_exec = &uss820dci_roothub_exec,
2394 .xfer_poll = &uss820dci_do_poll,
2395 .set_hw_power_sleep = uss820dci_set_hw_power_sleep,