2 * Copyright (c) 2010 Hans Petter Selasky. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
29 #include <sys/stdint.h>
30 #include <sys/stddef.h>
31 #include <sys/param.h>
32 #include <sys/queue.h>
33 #include <sys/types.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/mutex.h>
40 #include <sys/condvar.h>
41 #include <sys/sysctl.h>
43 #include <sys/unistd.h>
44 #include <sys/callout.h>
45 #include <sys/malloc.h>
48 #include <dev/usb/usb.h>
49 #include <dev/usb/usbdi.h>
51 #include <dev/usb/usb_core.h>
52 #include <dev/usb/usb_busdma.h>
53 #include <dev/usb/usb_process.h>
54 #include <dev/usb/usb_util.h>
56 #include <dev/usb/usb_controller.h>
57 #include <dev/usb/usb_bus.h>
58 #include <dev/usb/usb_pci.h>
59 #include <dev/usb/controller/xhci.h>
60 #include <dev/usb/controller/xhcireg.h>
63 static device_probe_t xhci_pci_probe;
64 static device_attach_t xhci_pci_attach;
65 static device_detach_t xhci_pci_detach;
66 static usb_take_controller_t xhci_pci_take_controller;
68 static device_method_t xhci_device_methods[] = {
69 /* device interface */
70 DEVMETHOD(device_probe, xhci_pci_probe),
71 DEVMETHOD(device_attach, xhci_pci_attach),
72 DEVMETHOD(device_detach, xhci_pci_detach),
73 DEVMETHOD(device_suspend, bus_generic_suspend),
74 DEVMETHOD(device_resume, bus_generic_resume),
75 DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 DEVMETHOD(usb_take_controller, xhci_pci_take_controller),
81 static driver_t xhci_driver = {
83 .methods = xhci_device_methods,
84 .size = sizeof(struct xhci_softc),
87 static devclass_t xhci_devclass;
89 DRIVER_MODULE(xhci, pci, xhci_driver, xhci_devclass, 0, 0);
90 MODULE_DEPEND(xhci, usb, 1, 1, 1);
94 xhci_pci_match(device_t self)
96 uint32_t device_id = pci_get_devid(self);
100 return ("NEC uPD720200 USB 3.0 controller");
103 return ("ASMedia ASM1042 USB 3.0 controller");
107 return ("Intel Panther Point USB 3.0 controller");
109 return ("Intel Lynx Point USB 3.0 controller");
115 if ((pci_get_class(self) == PCIC_SERIALBUS)
116 && (pci_get_subclass(self) == PCIS_SERIALBUS_USB)
117 && (pci_get_progif(self) == PCIP_SERIALBUS_USB_XHCI)) {
118 return ("XHCI (generic) USB 3.0 controller");
120 return (NULL); /* dunno */
124 xhci_pci_probe(device_t self)
126 const char *desc = xhci_pci_match(self);
129 device_set_desc(self, desc);
136 static int xhci_use_msi = 1;
137 TUNABLE_INT("hw.usb.xhci.msi", &xhci_use_msi);
140 xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
144 temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
145 pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
150 /* Don't set bits which the hardware doesn't support */
151 temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
153 pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
154 pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
156 device_printf(self, "Port routing mask set to 0x%08x\n", temp);
162 xhci_pci_attach(device_t self)
164 struct xhci_softc *sc = device_get_softc(self);
167 /* XXX check for 64-bit capability */
169 if (xhci_init(sc, self)) {
170 device_printf(self, "Could not initialize softc\n");
174 pci_enable_busmaster(self);
176 rid = PCI_XHCI_CBMEM;
177 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
179 if (!sc->sc_io_res) {
180 device_printf(self, "Could not map memory\n");
183 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
184 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
185 sc->sc_io_size = rman_get_size(sc->sc_io_res);
189 count = pci_msi_count(self);
192 if (pci_alloc_msi(self, &count) == 0) {
194 device_printf(self, "MSI enabled\n");
199 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ,
200 &sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE);
201 if (sc->sc_irq_res == NULL) {
202 device_printf(self, "Could not allocate IRQ\n");
205 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
206 if (sc->sc_bus.bdev == NULL) {
207 device_printf(self, "Could not add USB device\n");
210 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
212 sprintf(sc->sc_vendor, "0x%04x", pci_get_vendor(self));
214 #if (__FreeBSD_version >= 700031)
215 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
216 NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
218 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
219 (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
222 device_printf(self, "Could not setup IRQ, err=%d\n", err);
223 sc->sc_intr_hdl = NULL;
226 /* On Intel chipsets reroute ports from EHCI to XHCI controller. */
227 switch (pci_get_devid(self)) {
228 case 0x9c318086: /* Panther Point */
229 case 0x1e318086: /* Panther Point */
230 case 0x8c318086: /* Lynx Point */
231 sc->sc_port_route = &xhci_pci_port_route;
232 sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
238 xhci_pci_take_controller(self);
240 err = xhci_halt_controller(sc);
243 err = xhci_start_controller(sc);
246 err = device_probe_and_attach(sc->sc_bus.bdev);
249 device_printf(self, "XHCI halt/start/probe failed err=%d\n", err);
255 xhci_pci_detach(self);
260 xhci_pci_detach(device_t self)
262 struct xhci_softc *sc = device_get_softc(self);
265 if (sc->sc_bus.bdev != NULL) {
266 bdev = sc->sc_bus.bdev;
268 device_delete_child(self, bdev);
270 /* during module unload there are lots of children leftover */
271 device_delete_children(self);
273 pci_disable_busmaster(self);
275 if (sc->sc_irq_res && sc->sc_intr_hdl) {
277 xhci_halt_controller(sc);
279 bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
280 sc->sc_intr_hdl = NULL;
282 if (sc->sc_irq_res) {
283 if (sc->sc_irq_rid == 1)
284 pci_release_msi(self);
285 bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid,
287 sc->sc_irq_res = NULL;
290 bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,
292 sc->sc_io_res = NULL;
301 xhci_pci_take_controller(device_t self)
303 struct xhci_softc *sc = device_get_softc(self);
310 cparams = XREAD4(sc, capa, XHCI_HCSPARAMS0);
314 /* Synchronise with the BIOS if it owns the controller. */
315 for (eecp = XHCI_HCS0_XECP(cparams) << 2; eecp != 0 && XHCI_XECP_NEXT(eec);
316 eecp += XHCI_XECP_NEXT(eec) << 2) {
317 eec = XREAD4(sc, capa, eecp);
319 if (XHCI_XECP_ID(eec) != XHCI_ID_USB_LEGACY)
321 bios_sem = XREAD1(sc, capa, eecp +
325 device_printf(sc->sc_bus.bdev, "waiting for BIOS "
326 "to give up control\n");
327 XWRITE1(sc, capa, eecp +
328 XHCI_XECP_OS_SEM, 1);
331 bios_sem = XREAD1(sc, capa, eecp +
337 device_printf(sc->sc_bus.bdev,
338 "timed out waiting for BIOS\n");
341 usb_pause_mtx(NULL, hz / 100); /* wait 10ms */