2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * This driver supports several multiport USB-to-RS232 serial adapters driven
29 * by MosChip mos7820 and mos7840, bridge chips.
30 * The adapters are sold under many different brand names.
32 * Datasheets are available at MosChip www site at
33 * http://www.moschip.com. The datasheets don't contain full
34 * programming information for the chip.
36 * It is nornal to have only two enabled ports in devices, based on
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
43 #include <sys/stdint.h>
44 #include <sys/stddef.h>
45 #include <sys/param.h>
46 #include <sys/queue.h>
47 #include <sys/types.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
51 #include <sys/linker_set.h>
52 #include <sys/module.h>
54 #include <sys/mutex.h>
55 #include <sys/condvar.h>
56 #include <sys/sysctl.h>
58 #include <sys/unistd.h>
59 #include <sys/callout.h>
60 #include <sys/malloc.h>
63 #include <dev/usb/usb.h>
64 #include <dev/usb/usbdi.h>
65 #include <dev/usb/usbdi_util.h>
66 #include <dev/usb/usb_cdc.h>
69 #define USB_DEBUG_VAR umcs_debug
70 #include <dev/usb/usb_debug.h>
71 #include <dev/usb/usb_process.h>
73 #include <dev/usb/serial/usb_serial.h>
75 #include <dev/usb/serial/umcs.h>
77 #define UMCS7840_MODVER 1
80 static int umcs_debug = 0;
82 SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter");
83 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RW, &umcs_debug, 0, "Debug level");
84 #endif /* USB_DEBUG */
88 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port)
89 * have ports 0 and 2, with ports 1 and 3 omitted.
90 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2.
91 * This driver trys to use physical numbers as much as possible.
95 * Indexed by PHYSICAL port number.
96 * Pack non-regular registers to array to easier if-less access.
98 struct umcs7840_port_registers {
99 uint8_t reg_sp; /* SP register. */
100 uint8_t reg_control; /* CONTROL register. */
101 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be
105 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = {
106 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1},
107 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2},
108 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3},
109 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4},
118 struct umcs7840_softc_oneport {
119 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures
120 * for two transfers */
122 uint8_t sc_lcr; /* local line control register */
123 uint8_t sc_mcr; /* local modem control register */
126 struct umcs7840_softc {
127 struct ucom_super_softc sc_super_ucom;
128 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous
129 * array, so indexed by
131 * (subunit) number */
133 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */
135 device_t sc_dev; /* Device for error prints */
136 struct usb_device *sc_udev; /* USB Device for all operations */
137 struct mtx sc_mtx; /* ucom requires this */
139 uint8_t sc_driver_done; /* Flag when enumeration is finished */
141 uint8_t sc_numports; /* Number of ports (subunits) */
142 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL
147 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *);
148 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t);
149 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *);
150 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t);
152 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t);
153 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *);
155 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *);
156 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t);
157 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t);
158 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t);
159 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *);
160 static void umcs7840_cfg_open(struct ucom_softc *);
161 static void umcs7840_cfg_close(struct ucom_softc *);
163 static int umcs7840_pre_param(struct ucom_softc *, struct termios *);
165 static void umcs7840_start_read(struct ucom_softc *);
166 static void umcs7840_stop_read(struct ucom_softc *);
168 static void umcs7840_start_write(struct ucom_softc *);
169 static void umcs7840_stop_write(struct ucom_softc *);
171 static void umcs7840_poll(struct ucom_softc *ucom);
173 static device_probe_t umcs7840_probe;
174 static device_attach_t umcs7840_attach;
175 static device_detach_t umcs7840_detach;
177 static usb_callback_t umcs7840_intr_callback;
178 static usb_callback_t umcs7840_read_callback1;
179 static usb_callback_t umcs7840_read_callback2;
180 static usb_callback_t umcs7840_read_callback3;
181 static usb_callback_t umcs7840_read_callback4;
182 static usb_callback_t umcs7840_write_callback1;
183 static usb_callback_t umcs7840_write_callback2;
184 static usb_callback_t umcs7840_write_callback3;
185 static usb_callback_t umcs7840_write_callback4;
187 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
188 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t);
190 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */
191 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = {
192 {&umcs7840_read_callback1, &umcs7840_write_callback1},
193 {&umcs7840_read_callback2, &umcs7840_write_callback2},
194 {&umcs7840_read_callback3, &umcs7840_write_callback3},
195 {&umcs7840_read_callback4, &umcs7840_write_callback4},
198 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = {
199 [UMCS7840_BULK_RD_EP] = {
202 .direction = UE_DIR_IN,
203 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
204 .bufsize = 0, /* use wMaxPacketSize */
205 .callback = &umcs7840_read_callback1,
209 [UMCS7840_BULK_WR_EP] = {
212 .direction = UE_DIR_OUT,
213 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
214 .bufsize = 0, /* use wMaxPacketSize */
215 .callback = &umcs7840_write_callback1,
220 static const struct usb_config umcs7840_intr_config_data[1] = {
222 .type = UE_INTERRUPT,
224 .direction = UE_DIR_IN,
225 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
226 .bufsize = 0, /* use wMaxPacketSize */
227 .callback = &umcs7840_intr_callback,
232 static struct ucom_callback umcs7840_callback = {
233 .ucom_cfg_get_status = &umcs7840_cfg_get_status,
235 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr,
236 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts,
237 .ucom_cfg_set_break = &umcs7840_cfg_set_break,
239 .ucom_cfg_param = &umcs7840_cfg_param,
240 .ucom_cfg_open = &umcs7840_cfg_open,
241 .ucom_cfg_close = &umcs7840_cfg_close,
243 .ucom_pre_param = &umcs7840_pre_param,
245 .ucom_start_read = &umcs7840_start_read,
246 .ucom_stop_read = &umcs7840_stop_read,
248 .ucom_start_write = &umcs7840_start_write,
249 .ucom_stop_write = &umcs7840_stop_write,
251 .ucom_poll = &umcs7840_poll,
254 static const STRUCT_USB_HOST_ID umcs7840_devs[] = {
255 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)},
256 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)},
259 static device_method_t umcs7840_methods[] = {
260 DEVMETHOD(device_probe, umcs7840_probe),
261 DEVMETHOD(device_attach, umcs7840_attach),
262 DEVMETHOD(device_detach, umcs7840_detach),
266 static devclass_t umcs7840_devclass;
268 static driver_t umcs7840_driver = {
270 .methods = umcs7840_methods,
271 .size = sizeof(struct umcs7840_softc),
274 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0);
275 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1);
276 MODULE_DEPEND(umcs7840, usb, 1, 1, 1);
277 MODULE_VERSION(umcs7840, UMCS7840_MODVER);
280 umcs7840_probe(device_t dev)
282 struct usb_attach_arg *uaa = device_get_ivars(dev);
284 if (uaa->usb_mode != USB_MODE_HOST)
286 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX)
288 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX)
290 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa));
294 umcs7840_attach(device_t dev)
296 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS];
297 struct usb_attach_arg *uaa = device_get_ivars(dev);
298 struct umcs7840_softc *sc = device_get_softc(dev);
300 uint8_t iface_index = MCS7840_IFACE_INDEX;
306 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n)
307 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n];
309 device_set_usb_desc(dev);
310 mtx_init(&sc->sc_mtx, "umcs7840", NULL, MTX_DEF);
313 sc->sc_udev = uaa->device;
316 * Get number of ports
317 * Documentation (full datasheet) says, that number of ports is
318 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only
319 * register. But vendor driver uses these undocumented
322 * Experiments show, that MODE register can have `0'
323 * (4 ports) bit on 2-port device, so use vendor driver's way.
325 * Also, see notes in header file for these constants.
327 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data);
328 if (data & MCS7840_DEV_GPIO_4PORTS) {
330 /* Store physical port numbers in sc_portno */
331 sc->sc_ucom[0].sc_portno = 0;
332 sc->sc_ucom[1].sc_portno = 1;
333 sc->sc_ucom[2].sc_portno = 2;
334 sc->sc_ucom[3].sc_portno = 3;
337 /* Store physical port numbers in sc_portno */
338 sc->sc_ucom[0].sc_portno = 0;
339 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */
341 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports);
342 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) {
343 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n",
344 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high",
345 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no",
346 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail",
347 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail",
348 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4",
349 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled",
350 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not ");
352 /* Setup all transfers */
353 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
354 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) {
355 /* Set endpoint address */
356 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno;
357 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n];
359 error = usbd_transfer_setup(uaa->device,
360 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp,
361 UMCS7840_N_TRANSFERS, sc, &sc->sc_mtx);
363 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n",
364 subunit + 1, sc->sc_numports);
368 error = usbd_transfer_setup(uaa->device,
369 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data,
372 device_printf(dev, "allocating USB transfers failed for interrupt\n");
375 /* clear stall at first run */
376 mtx_lock(&sc->sc_mtx);
377 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
378 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]);
379 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]);
381 mtx_unlock(&sc->sc_mtx);
383 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc,
384 &umcs7840_callback, &sc->sc_mtx);
388 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev);
393 umcs7840_detach(dev);
398 umcs7840_detach(device_t dev)
400 struct umcs7840_softc *sc = device_get_softc(dev);
403 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom);
405 for (subunit = 0; subunit < sc->sc_numports; ++subunit)
406 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
407 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1);
409 mtx_destroy(&sc->sc_mtx);
414 umcs7840_cfg_open(struct ucom_softc *ucom)
416 struct umcs7840_softc *sc = ucom->sc_parent;
417 uint16_t pn = ucom->sc_portno;
420 /* If it very first open, finish global configuration */
421 if (!sc->sc_driver_done) {
423 * USB enumeration is finished, pass internal memory to FIFOs
424 * If it is done in the end of "attach", kernel panics.
426 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data))
428 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE;
429 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data))
431 sc->sc_driver_done = 1;
433 /* Toggle reset bit on-off */
434 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
436 data |= MCS7840_DEV_SPx_UART_RESET;
437 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
439 data &= ~MCS7840_DEV_SPx_UART_RESET;
440 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
443 /* Set RS-232 mode */
444 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232))
447 /* Disable RX on time of initialization */
448 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
450 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
451 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
454 /* Disable all interrupts */
455 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0))
458 /* Reset FIFO -- documented */
459 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0))
461 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR,
462 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR |
463 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14))
466 /* Set 8 bit, no parity, 1 stop bit -- documented */
467 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1;
468 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr))
472 * Enable DTR/RTS on modem control, enable modem interrupts --
475 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE;
476 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr))
479 /* Clearing Bulkin and Bulkout FIFO */
480 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data))
482 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO;
483 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
485 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO);
486 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data))
490 if (umcs7840_set_baudrate(sc, pn, 9600))
494 /* Finally enable all interrupts -- documented */
496 * Copied from vendor driver, I don't know why we should read LCR
499 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr))
501 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER,
502 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM))
506 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
508 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE;
509 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
512 DPRINTF("Port %d has been opened\n", pn);
516 umcs7840_cfg_close(struct ucom_softc *ucom)
518 struct umcs7840_softc *sc = ucom->sc_parent;
519 uint16_t pn = ucom->sc_portno;
522 umcs7840_stop_read(ucom);
523 umcs7840_stop_write(ucom);
525 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0);
526 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0);
529 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data))
531 data |= MCS7840_DEV_CONTROLx_RX_DISABLE;
532 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data))
534 DPRINTF("Port %d has been closed\n", pn);
538 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff)
540 struct umcs7840_softc *sc = ucom->sc_parent;
541 uint8_t pn = ucom->sc_portno;
544 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR;
546 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR;
548 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
549 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off");
553 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff)
555 struct umcs7840_softc *sc = ucom->sc_parent;
556 uint8_t pn = ucom->sc_portno;
559 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS;
561 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS;
563 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
564 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off");
568 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff)
570 struct umcs7840_softc *sc = ucom->sc_parent;
571 uint8_t pn = ucom->sc_portno;
574 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK;
576 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK;
578 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
579 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off");
584 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t)
586 struct umcs7840_softc *sc = ucom->sc_parent;
587 uint8_t pn = ucom->sc_portno;
588 uint8_t lcr = sc->sc_ports[pn].sc_lcr;
589 uint8_t mcr = sc->sc_ports[pn].sc_mcr;
591 DPRINTF("Port %d config:\n", pn);
592 if (t->c_cflag & CSTOPB) {
593 DPRINTF(" 2 stop bits\n");
594 lcr |= MCS7840_UART_LCR_STOPB2;
596 lcr |= MCS7840_UART_LCR_STOPB1;
597 DPRINTF(" 1 stop bit\n");
600 lcr &= ~MCS7840_UART_LCR_PARITYMASK;
601 if (t->c_cflag & PARENB) {
602 lcr |= MCS7840_UART_LCR_PARITYON;
603 if (t->c_cflag & PARODD) {
604 lcr = MCS7840_UART_LCR_PARITYODD;
605 DPRINTF(" parity on - odd\n");
607 lcr = MCS7840_UART_LCR_PARITYEVEN;
608 DPRINTF(" parity on - even\n");
611 lcr &= ~MCS7840_UART_LCR_PARITYON;
612 DPRINTF(" parity off\n");
615 lcr &= ~MCS7840_UART_LCR_DATALENMASK;
616 switch (t->c_cflag & CSIZE) {
618 lcr |= MCS7840_UART_LCR_DATALEN5;
622 lcr |= MCS7840_UART_LCR_DATALEN6;
626 lcr |= MCS7840_UART_LCR_DATALEN7;
630 lcr |= MCS7840_UART_LCR_DATALEN8;
635 if (t->c_cflag & CRTSCTS) {
636 mcr |= MCS7840_UART_MCR_CTSRTS;
637 DPRINTF(" CTS/RTS\n");
639 mcr &= ~MCS7840_UART_MCR_CTSRTS;
641 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) {
642 mcr |= MCS7840_UART_MCR_DTRDSR;
643 DPRINTF(" DTR/DSR\n");
645 mcr &= ~MCS7840_UART_MCR_DTRDSR;
647 sc->sc_ports[pn].sc_lcr = lcr;
648 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr);
649 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr);
651 sc->sc_ports[pn].sc_mcr = mcr;
652 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr);
653 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr);
655 umcs7840_set_baudrate(sc, pn, t->c_ospeed);
660 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t)
665 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor)
671 umcs7840_start_read(struct ucom_softc *ucom)
673 struct umcs7840_softc *sc = ucom->sc_parent;
674 uint8_t pn = ucom->sc_portno;
676 /* Start interrupt transfer */
677 usbd_transfer_start(sc->sc_intr_xfer);
679 /* Start read transfer */
680 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
684 umcs7840_stop_read(struct ucom_softc *ucom)
686 struct umcs7840_softc *sc = ucom->sc_parent;
687 uint8_t pn = ucom->sc_portno;
689 /* Stop read transfer */
690 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]);
694 umcs7840_start_write(struct ucom_softc *ucom)
696 struct umcs7840_softc *sc = ucom->sc_parent;
697 uint8_t pn = ucom->sc_portno;
699 /* Start interrupt transfer */
700 usbd_transfer_start(sc->sc_intr_xfer);
702 /* Start write transfer */
703 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
707 umcs7840_stop_write(struct ucom_softc *ucom)
709 struct umcs7840_softc *sc = ucom->sc_parent;
710 uint8_t pn = ucom->sc_portno;
712 /* Stop write transfer */
713 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]);
717 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr)
719 struct umcs7840_softc *sc = ucom->sc_parent;
720 uint8_t pn = ucom->sc_portno;
721 uint8_t hw_lsr = 0; /* local line status register */
722 uint8_t hw_msr = 0; /* local modem status register */
725 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &hw_lsr);
726 umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &hw_msr);
731 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr);
735 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error)
737 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
738 struct usb_page_cache *pc;
743 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
745 switch (USB_GET_STATE(xfer)) {
746 case USB_ST_TRANSFERRED:
747 if (actlen == 5 || actlen == 13) {
748 pc = usbd_xfer_get_frame(xfer, 0);
749 usbd_copy_out(pc, 0, buf, actlen);
750 /* Check status of all ports */
751 for (subunit = 0; subunit < sc->sc_numports; ++subunit) {
752 uint8_t pn = sc->sc_ucom[subunit].sc_portno;
754 if (buf[pn] & MCS7840_UART_ISR_NOPENDING)
756 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK));
757 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) {
758 case MCS7840_UART_ISR_RXERR:
759 case MCS7840_UART_ISR_RXHASDATA:
760 case MCS7840_UART_ISR_RXTIMEOUT:
761 case MCS7840_UART_ISR_MSCHANGE:
762 ucom_status_change(&sc->sc_ucom[subunit]);
770 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen);
774 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
775 usbd_transfer_submit(xfer);
779 if (error != USB_ERR_CANCELLED) {
780 /* try to clear stall first */
781 usbd_xfer_set_stall(xfer);
789 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error)
791 umcs7840_read_callbackN(xfer, error, 0);
795 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error)
797 umcs7840_read_callbackN(xfer, error, 1);
800 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error)
802 umcs7840_read_callbackN(xfer, error, 2);
806 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error)
808 umcs7840_read_callbackN(xfer, error, 3);
812 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
814 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
815 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
816 struct usb_page_cache *pc;
819 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
821 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen);
823 switch (USB_GET_STATE(xfer)) {
824 case USB_ST_TRANSFERRED:
825 pc = usbd_xfer_get_frame(xfer, 0);
826 ucom_put_data(ucom, pc, 0, actlen);
830 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
831 usbd_transfer_submit(xfer);
835 if (error != USB_ERR_CANCELLED) {
836 /* try to clear stall first */
837 usbd_xfer_set_stall(xfer);
845 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error)
847 umcs7840_write_callbackN(xfer, error, 0);
851 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error)
853 umcs7840_write_callbackN(xfer, error, 1);
857 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error)
859 umcs7840_write_callbackN(xfer, error, 2);
863 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error)
865 umcs7840_write_callbackN(xfer, error, 3);
869 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit)
871 struct umcs7840_softc *sc = usbd_xfer_softc(xfer);
872 struct ucom_softc *ucom = &sc->sc_ucom[subunit];
873 struct usb_page_cache *pc;
876 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer));
878 switch (USB_GET_STATE(xfer)) {
880 case USB_ST_TRANSFERRED:
882 pc = usbd_xfer_get_frame(xfer, 0);
883 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) {
884 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen);
885 usbd_xfer_set_frame_len(xfer, 0, actlen);
886 usbd_transfer_submit(xfer);
891 if (error != USB_ERR_CANCELLED) {
892 /* try to clear stall first */
893 usbd_xfer_set_stall(xfer);
901 umcs7840_poll(struct ucom_softc *ucom)
903 struct umcs7840_softc *sc = ucom->sc_parent;
905 DPRINTF("Port %d poll\n", ucom->sc_portno);
906 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS);
907 usbd_transfer_poll(&sc->sc_intr_xfer, 1);
911 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data)
913 struct usb_device_request req;
917 req.bmRequestType = UT_READ_VENDOR_DEVICE;
918 req.bRequest = MCS7840_RDREQ;
919 USETW(req.wValue, 0);
920 USETW(req.wIndex, reg);
921 USETW(req.wLength, UMCS7840_READ_LENGTH);
923 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
924 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
925 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len);
926 return (USB_ERR_INVAL);
928 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err));
933 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data)
935 struct usb_device_request req;
938 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
939 req.bRequest = MCS7840_WRREQ;
940 USETW(req.wValue, data);
941 USETW(req.wIndex, reg);
942 USETW(req.wLength, 0);
944 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
946 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err));
952 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data)
954 struct usb_device_request req;
959 /* portno is port number */
960 wVal = ((uint16_t)(portno + 1)) << 8;
962 req.bmRequestType = UT_READ_VENDOR_DEVICE;
963 req.bRequest = MCS7840_RDREQ;
964 USETW(req.wValue, wVal);
965 USETW(req.wIndex, reg);
966 USETW(req.wLength, UMCS7840_READ_LENGTH);
968 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT);
969 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) {
970 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len);
971 return (USB_ERR_INVAL);
973 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
978 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data)
980 struct usb_device_request req;
984 /* portno is port number */
985 wVal = ((uint16_t)(portno + 1)) << 8 | data;
987 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
988 req.bRequest = MCS7840_WRREQ;
989 USETW(req.wValue, wVal);
990 USETW(req.wIndex, reg);
991 USETW(req.wLength, 0);
993 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT);
995 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err));
1000 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate)
1007 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) {
1008 DPRINTF("Port %d bad speed: %d\n", portno, rate);
1011 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) {
1012 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate);
1015 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor);
1017 /* Set clock source for standard BAUD frequences */
1018 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data);
1021 data &= MCS7840_DEV_SPx_CLOCK_MASK;
1023 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data);
1028 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS;
1029 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1033 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff));
1036 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff));
1040 /* Turn off access to DLL/DLM registers of UART */
1041 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS;
1042 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr);
1048 /* Maximum speeds for standard frequences, when PLL is not used */
1049 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,};
1050 static const uint8_t umcs7840_baudrate_divisors_len = sizeof(umcs7840_baudrate_divisors) / sizeof(umcs7840_baudrate_divisors[0]);
1053 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk)
1057 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1])
1060 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 &&
1061 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i);
1062 *divisor = umcs7840_baudrate_divisors[i + 1] / rate;
1064 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT;