sys/dev/usb/wlan/if_ural.c

   1 /*      $FreeBSD$       */
   2
   3 /*-
   4  * Copyright (c) 2005, 2006
   5  *      Damien Bergamini <damien.bergamini@free.fr>
   6  *
   7  * Copyright (c) 2006, 2008
   8  *      Hans Petter Selasky <hselasky@FreeBSD.org>
   9  *
  10  * Permission to use, copy, modify, and distribute this software for any
  11  * purpose with or without fee is hereby granted, provided that the above
  12  * copyright notice and this permission notice appear in all copies.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  15  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  16  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  17  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  18  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  19  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  20  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  21  */
  22
  23 #include <sys/cdefs.h>
  24 __FBSDID("$FreeBSD$");
  25
  26 /*-
  27  * Ralink Technology RT2500USB chipset driver
  28  * http://www.ralinktech.com/
  29  */
  30
  31 #include <sys/param.h>
  32 #include <sys/sockio.h>
  33 #include <sys/sysctl.h>
  34 #include <sys/lock.h>
  35 #include <sys/mutex.h>
  36 #include <sys/mbuf.h>
  37 #include <sys/kernel.h>
  38 #include <sys/socket.h>
  39 #include <sys/systm.h>
  40 #include <sys/malloc.h>
  41 #include <sys/module.h>
  42 #include <sys/bus.h>
  43 #include <sys/endian.h>
  44 #include <sys/kdb.h>
  45
  46 #include <machine/bus.h>
  47 #include <machine/resource.h>
  48 #include <sys/rman.h>
  49
  50 #include <net/bpf.h>
  51 #include <net/if.h>
  52 #include <net/if_arp.h>
  53 #include <net/ethernet.h>
  54 #include <net/if_dl.h>
  55 #include <net/if_media.h>
  56 #include <net/if_types.h>
  57
  58 #ifdef INET
  59 #include <netinet/in.h>
  60 #include <netinet/in_systm.h>
  61 #include <netinet/in_var.h>
  62 #include <netinet/if_ether.h>
  63 #include <netinet/ip.h>
  64 #endif
  65
  66 #include <net80211/ieee80211_var.h>
  67 #include <net80211/ieee80211_regdomain.h>
  68 #include <net80211/ieee80211_radiotap.h>
  69 #include <net80211/ieee80211_ratectl.h>
  70
  71 #include <dev/usb/usb.h>
  72 #include <dev/usb/usbdi.h>
  73 #include "usbdevs.h"
  74
  75 #define USB_DEBUG_VAR ural_debug
  76 #include <dev/usb/usb_debug.h>
  77
  78 #include <dev/usb/wlan/if_uralreg.h>
  79 #include <dev/usb/wlan/if_uralvar.h>
  80
  81 #ifdef USB_DEBUG
  82 static int ural_debug = 0;
  83
  84 static SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
  85 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
  86     "Debug level");
  87 #endif
  88
  89 #define URAL_RSSI(rssi)                                 \
  90         ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?   \
  91          ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
  92
  93 /* various supported device vendors/products */
  94 static const STRUCT_USB_HOST_ID ural_devs[] = {
  95 #define URAL_DEV(v,p)  { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
  96         URAL_DEV(ASUS, WL167G),
  97         URAL_DEV(ASUS, RT2570),
  98         URAL_DEV(BELKIN, F5D7050),
  99         URAL_DEV(BELKIN, F5D7051),
 100         URAL_DEV(CISCOLINKSYS, HU200TS),
 101         URAL_DEV(CISCOLINKSYS, WUSB54G),
 102         URAL_DEV(CISCOLINKSYS, WUSB54GP),
 103         URAL_DEV(CONCEPTRONIC2, C54RU),
 104         URAL_DEV(DLINK, DWLG122),
 105         URAL_DEV(GIGABYTE, GN54G),
 106         URAL_DEV(GIGABYTE, GNWBKG),
 107         URAL_DEV(GUILLEMOT, HWGUSB254),
 108         URAL_DEV(MELCO, KG54),
 109         URAL_DEV(MELCO, KG54AI),
 110         URAL_DEV(MELCO, KG54YB),
 111         URAL_DEV(MELCO, NINWIFI),
 112         URAL_DEV(MSI, RT2570),
 113         URAL_DEV(MSI, RT2570_2),
 114         URAL_DEV(MSI, RT2570_3),
 115         URAL_DEV(NOVATECH, NV902),
 116         URAL_DEV(RALINK, RT2570),
 117         URAL_DEV(RALINK, RT2570_2),
 118         URAL_DEV(RALINK, RT2570_3),
 119         URAL_DEV(SIEMENS2, WL54G),
 120         URAL_DEV(SMC, 2862WG),
 121         URAL_DEV(SPHAIRON, UB801R),
 122         URAL_DEV(SURECOM, RT2570),
 123         URAL_DEV(VTECH, RT2570),
 124         URAL_DEV(ZINWELL, RT2570),
 125 #undef URAL_DEV
 126 };
 127
 128 static usb_callback_t ural_bulk_read_callback;
 129 static usb_callback_t ural_bulk_write_callback;
 130
 131 static usb_error_t      ural_do_request(struct ural_softc *sc,
 132                             struct usb_device_request *req, void *data);
 133 static struct ieee80211vap *ural_vap_create(struct ieee80211com *,
 134                             const char [IFNAMSIZ], int, enum ieee80211_opmode,
 135                             int, const uint8_t [IEEE80211_ADDR_LEN],
 136                             const uint8_t [IEEE80211_ADDR_LEN]);
 137 static void             ural_vap_delete(struct ieee80211vap *);
 138 static void             ural_tx_free(struct ural_tx_data *, int);
 139 static void             ural_setup_tx_list(struct ural_softc *);
 140 static void             ural_unsetup_tx_list(struct ural_softc *);
 141 static int              ural_newstate(struct ieee80211vap *,
 142                             enum ieee80211_state, int);
 143 static void             ural_setup_tx_desc(struct ural_softc *,
 144                             struct ural_tx_desc *, uint32_t, int, int);
 145 static int              ural_tx_bcn(struct ural_softc *, struct mbuf *,
 146                             struct ieee80211_node *);
 147 static int              ural_tx_mgt(struct ural_softc *, struct mbuf *,
 148                             struct ieee80211_node *);
 149 static int              ural_tx_data(struct ural_softc *, struct mbuf *,
 150                             struct ieee80211_node *);
 151 static void             ural_start(struct ifnet *);
 152 static int              ural_ioctl(struct ifnet *, u_long, caddr_t);
 153 static void             ural_set_testmode(struct ural_softc *);
 154 static void             ural_eeprom_read(struct ural_softc *, uint16_t, void *,
 155                             int);
 156 static uint16_t         ural_read(struct ural_softc *, uint16_t);
 157 static void             ural_read_multi(struct ural_softc *, uint16_t, void *,
 158                             int);
 159 static void             ural_write(struct ural_softc *, uint16_t, uint16_t);
 160 static void             ural_write_multi(struct ural_softc *, uint16_t, void *,
 161                             int) __unused;
 162 static void             ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
 163 static uint8_t          ural_bbp_read(struct ural_softc *, uint8_t);
 164 static void             ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
 165 static void             ural_scan_start(struct ieee80211com *);
 166 static void             ural_scan_end(struct ieee80211com *);
 167 static void             ural_set_channel(struct ieee80211com *);
 168 static void             ural_set_chan(struct ural_softc *,
 169                             struct ieee80211_channel *);
 170 static void             ural_disable_rf_tune(struct ural_softc *);
 171 static void             ural_enable_tsf_sync(struct ural_softc *);
 172 static void             ural_enable_tsf(struct ural_softc *);
 173 static void             ural_update_slot(struct ifnet *);
 174 static void             ural_set_txpreamble(struct ural_softc *);
 175 static void             ural_set_basicrates(struct ural_softc *,
 176                             const struct ieee80211_channel *);
 177 static void             ural_set_bssid(struct ural_softc *, const uint8_t *);
 178 static void             ural_set_macaddr(struct ural_softc *, uint8_t *);
 179 static void             ural_update_promisc(struct ifnet *);
 180 static void             ural_setpromisc(struct ural_softc *);
 181 static const char       *ural_get_rf(int);
 182 static void             ural_read_eeprom(struct ural_softc *);
 183 static int              ural_bbp_init(struct ural_softc *);
 184 static void             ural_set_txantenna(struct ural_softc *, int);
 185 static void             ural_set_rxantenna(struct ural_softc *, int);
 186 static void             ural_init_locked(struct ural_softc *);
 187 static void             ural_init(void *);
 188 static void             ural_stop(struct ural_softc *);
 189 static int              ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
 190                             const struct ieee80211_bpf_params *);
 191 static void             ural_ratectl_start(struct ural_softc *,
 192                             struct ieee80211_node *);
 193 static void             ural_ratectl_timeout(void *);
 194 static void             ural_ratectl_task(void *, int);
 195 static int              ural_pause(struct ural_softc *sc, int timeout);
 196
 197 /*
 198  * Default values for MAC registers; values taken from the reference driver.
 199  */
 200 static const struct {
 201         uint16_t        reg;
 202         uint16_t        val;
 203 } ural_def_mac[] = {
 204         { RAL_TXRX_CSR5,  0x8c8d },
 205         { RAL_TXRX_CSR6,  0x8b8a },
 206         { RAL_TXRX_CSR7,  0x8687 },
 207         { RAL_TXRX_CSR8,  0x0085 },
 208         { RAL_MAC_CSR13,  0x1111 },
 209         { RAL_MAC_CSR14,  0x1e11 },
 210         { RAL_TXRX_CSR21, 0xe78f },
 211         { RAL_MAC_CSR9,   0xff1d },
 212         { RAL_MAC_CSR11,  0x0002 },
 213         { RAL_MAC_CSR22,  0x0053 },
 214         { RAL_MAC_CSR15,  0x0000 },
 215         { RAL_MAC_CSR8,   RAL_FRAME_SIZE },
 216         { RAL_TXRX_CSR19, 0x0000 },
 217         { RAL_TXRX_CSR18, 0x005a },
 218         { RAL_PHY_CSR2,   0x0000 },
 219         { RAL_TXRX_CSR0,  0x1ec0 },
 220         { RAL_PHY_CSR4,   0x000f }
 221 };
 222
 223 /*
 224  * Default values for BBP registers; values taken from the reference driver.
 225  */
 226 static const struct {
 227         uint8_t reg;
 228         uint8_t val;
 229 } ural_def_bbp[] = {
 230         {  3, 0x02 },
 231         {  4, 0x19 },
 232         { 14, 0x1c },
 233         { 15, 0x30 },
 234         { 16, 0xac },
 235         { 17, 0x48 },
 236         { 18, 0x18 },
 237         { 19, 0xff },
 238         { 20, 0x1e },
 239         { 21, 0x08 },
 240         { 22, 0x08 },
 241         { 23, 0x08 },
 242         { 24, 0x80 },
 243         { 25, 0x50 },
 244         { 26, 0x08 },
 245         { 27, 0x23 },
 246         { 30, 0x10 },
 247         { 31, 0x2b },
 248         { 32, 0xb9 },
 249         { 34, 0x12 },
 250         { 35, 0x50 },
 251         { 39, 0xc4 },
 252         { 40, 0x02 },
 253         { 41, 0x60 },
 254         { 53, 0x10 },
 255         { 54, 0x18 },
 256         { 56, 0x08 },
 257         { 57, 0x10 },
 258         { 58, 0x08 },
 259         { 61, 0x60 },
 260         { 62, 0x10 },
 261         { 75, 0xff }
 262 };
 263
 264 /*
 265  * Default values for RF register R2 indexed by channel numbers.
 266  */
 267 static const uint32_t ural_rf2522_r2[] = {
 268         0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
 269         0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
 270 };
 271
 272 static const uint32_t ural_rf2523_r2[] = {
 273         0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
 274         0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
 275 };
 276
 277 static const uint32_t ural_rf2524_r2[] = {
 278         0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
 279         0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
 280 };
 281
 282 static const uint32_t ural_rf2525_r2[] = {
 283         0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
 284         0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
 285 };
 286
 287 static const uint32_t ural_rf2525_hi_r2[] = {
 288         0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
 289         0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
 290 };
 291
 292 static const uint32_t ural_rf2525e_r2[] = {
 293         0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
 294         0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
 295 };
 296
 297 static const uint32_t ural_rf2526_hi_r2[] = {
 298         0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
 299         0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
 300 };
 301
 302 static const uint32_t ural_rf2526_r2[] = {
 303         0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
 304         0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
 305 };
 306
 307 /*
 308  * For dual-band RF, RF registers R1 and R4 also depend on channel number;
 309  * values taken from the reference driver.
 310  */
 311 static const struct {
 312         uint8_t         chan;
 313         uint32_t        r1;
 314         uint32_t        r2;
 315         uint32_t        r4;
 316 } ural_rf5222[] = {
 317         {   1, 0x08808, 0x0044d, 0x00282 },
 318         {   2, 0x08808, 0x0044e, 0x00282 },
 319         {   3, 0x08808, 0x0044f, 0x00282 },
 320         {   4, 0x08808, 0x00460, 0x00282 },
 321         {   5, 0x08808, 0x00461, 0x00282 },
 322         {   6, 0x08808, 0x00462, 0x00282 },
 323         {   7, 0x08808, 0x00463, 0x00282 },
 324         {   8, 0x08808, 0x00464, 0x00282 },
 325         {   9, 0x08808, 0x00465, 0x00282 },
 326         {  10, 0x08808, 0x00466, 0x00282 },
 327         {  11, 0x08808, 0x00467, 0x00282 },
 328         {  12, 0x08808, 0x00468, 0x00282 },
 329         {  13, 0x08808, 0x00469, 0x00282 },
 330         {  14, 0x08808, 0x0046b, 0x00286 },
 331
 332         {  36, 0x08804, 0x06225, 0x00287 },
 333         {  40, 0x08804, 0x06226, 0x00287 },
 334         {  44, 0x08804, 0x06227, 0x00287 },
 335         {  48, 0x08804, 0x06228, 0x00287 },
 336         {  52, 0x08804, 0x06229, 0x00287 },
 337         {  56, 0x08804, 0x0622a, 0x00287 },
 338         {  60, 0x08804, 0x0622b, 0x00287 },
 339         {  64, 0x08804, 0x0622c, 0x00287 },
 340
 341         { 100, 0x08804, 0x02200, 0x00283 },
 342         { 104, 0x08804, 0x02201, 0x00283 },
 343         { 108, 0x08804, 0x02202, 0x00283 },
 344         { 112, 0x08804, 0x02203, 0x00283 },
 345         { 116, 0x08804, 0x02204, 0x00283 },
 346         { 120, 0x08804, 0x02205, 0x00283 },
 347         { 124, 0x08804, 0x02206, 0x00283 },
 348         { 128, 0x08804, 0x02207, 0x00283 },
 349         { 132, 0x08804, 0x02208, 0x00283 },
 350         { 136, 0x08804, 0x02209, 0x00283 },
 351         { 140, 0x08804, 0x0220a, 0x00283 },
 352
 353         { 149, 0x08808, 0x02429, 0x00281 },
 354         { 153, 0x08808, 0x0242b, 0x00281 },
 355         { 157, 0x08808, 0x0242d, 0x00281 },
 356         { 161, 0x08808, 0x0242f, 0x00281 }
 357 };
 358
 359 static const struct usb_config ural_config[URAL_N_TRANSFER] = {
 360         [URAL_BULK_WR] = {
 361                 .type = UE_BULK,
 362                 .endpoint = UE_ADDR_ANY,
 363                 .direction = UE_DIR_OUT,
 364                 .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
 365                 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
 366                 .callback = ural_bulk_write_callback,
 367                 .timeout = 5000,        /* ms */
 368         },
 369         [URAL_BULK_RD] = {
 370                 .type = UE_BULK,
 371                 .endpoint = UE_ADDR_ANY,
 372                 .direction = UE_DIR_IN,
 373                 .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
 374                 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
 375                 .callback = ural_bulk_read_callback,
 376         },
 377 };
 378
 379 static device_probe_t ural_match;
 380 static device_attach_t ural_attach;
 381 static device_detach_t ural_detach;
 382
 383 static device_method_t ural_methods[] = {
 384         /* Device interface */
 385         DEVMETHOD(device_probe,         ural_match),
 386         DEVMETHOD(device_attach,        ural_attach),
 387         DEVMETHOD(device_detach,        ural_detach),
 388         DEVMETHOD_END
 389 };
 390
 391 static driver_t ural_driver = {
 392         .name = "ural",
 393         .methods = ural_methods,
 394         .size = sizeof(struct ural_softc),
 395 };
 396
 397 static devclass_t ural_devclass;
 398
 399 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
 400 MODULE_DEPEND(ural, usb, 1, 1, 1);
 401 MODULE_DEPEND(ural, wlan, 1, 1, 1);
 402 MODULE_VERSION(ural, 1);
 403
 404 static int
 405 ural_match(device_t self)
 406 {
 407         struct usb_attach_arg *uaa = device_get_ivars(self);
 408
 409         if (uaa->usb_mode != USB_MODE_HOST)
 410                 return (ENXIO);
 411         if (uaa->info.bConfigIndex != 0)
 412                 return (ENXIO);
 413         if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
 414                 return (ENXIO);
 415
 416         return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
 417 }
 418
 419 static int
 420 ural_attach(device_t self)
 421 {
 422         struct usb_attach_arg *uaa = device_get_ivars(self);
 423         struct ural_softc *sc = device_get_softc(self);
 424         struct ifnet *ifp;
 425         struct ieee80211com *ic;
 426         uint8_t iface_index, bands;
 427         int error;
 428
 429         device_set_usb_desc(self);
 430         sc->sc_udev = uaa->device;
 431         sc->sc_dev = self;
 432
 433         mtx_init(&sc->sc_mtx, device_get_nameunit(self),
 434             MTX_NETWORK_LOCK, MTX_DEF);
 435
 436         iface_index = RAL_IFACE_INDEX;
 437         error = usbd_transfer_setup(uaa->device,
 438             &iface_index, sc->sc_xfer, ural_config,
 439             URAL_N_TRANSFER, sc, &sc->sc_mtx);
 440         if (error) {
 441                 device_printf(self, "could not allocate USB transfers, "
 442                     "err=%s\n", usbd_errstr(error));
 443                 goto detach;
 444         }
 445
 446         RAL_LOCK(sc);
 447         /* retrieve RT2570 rev. no */
 448         sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
 449
 450         /* retrieve MAC address and various other things from EEPROM */
 451         ural_read_eeprom(sc);
 452         RAL_UNLOCK(sc);
 453
 454         device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
 455             sc->asic_rev, ural_get_rf(sc->rf_rev));
 456
 457         ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
 458         if (ifp == NULL) {
 459                 device_printf(sc->sc_dev, "can not if_alloc()\n");
 460                 goto detach;
 461         }
 462         ic = ifp->if_l2com;
 463
 464         ifp->if_softc = sc;
 465         if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
 466         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 467         ifp->if_init = ural_init;
 468         ifp->if_ioctl = ural_ioctl;
 469         ifp->if_start = ural_start;
 470         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 471         ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
 472         IFQ_SET_READY(&ifp->if_snd);
 473
 474         ic->ic_ifp = ifp;
 475         ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
 476
 477         /* set device capabilities */
 478         ic->ic_caps =
 479               IEEE80211_C_STA           /* station mode supported */
 480             | IEEE80211_C_IBSS          /* IBSS mode supported */
 481             | IEEE80211_C_MONITOR       /* monitor mode supported */
 482             | IEEE80211_C_HOSTAP        /* HostAp mode supported */
 483             | IEEE80211_C_TXPMGT        /* tx power management */
 484             | IEEE80211_C_SHPREAMBLE    /* short preamble supported */
 485             | IEEE80211_C_SHSLOT        /* short slot time supported */
 486             | IEEE80211_C_BGSCAN        /* bg scanning supported */
 487             | IEEE80211_C_WPA           /* 802.11i */
 488             ;
 489
 490         bands = 0;
 491         setbit(&bands, IEEE80211_MODE_11B);
 492         setbit(&bands, IEEE80211_MODE_11G);
 493         if (sc->rf_rev == RAL_RF_5222)
 494                 setbit(&bands, IEEE80211_MODE_11A);
 495         ieee80211_init_channels(ic, NULL, &bands);
 496
 497         ieee80211_ifattach(ic, sc->sc_bssid);
 498         ic->ic_update_promisc = ural_update_promisc;
 499         ic->ic_raw_xmit = ural_raw_xmit;
 500         ic->ic_scan_start = ural_scan_start;
 501         ic->ic_scan_end = ural_scan_end;
 502         ic->ic_set_channel = ural_set_channel;
 503
 504         ic->ic_vap_create = ural_vap_create;
 505         ic->ic_vap_delete = ural_vap_delete;
 506
 507         ieee80211_radiotap_attach(ic,
 508             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
 509                 RAL_TX_RADIOTAP_PRESENT,
 510             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
 511                 RAL_RX_RADIOTAP_PRESENT);
 512
 513         if (bootverbose)
 514                 ieee80211_announce(ic);
 515
 516         return (0);
 517
 518 detach:
 519         ural_detach(self);
 520         return (ENXIO);                 /* failure */
 521 }
 522
 523 static int
 524 ural_detach(device_t self)
 525 {
 526         struct ural_softc *sc = device_get_softc(self);
 527         struct ifnet *ifp = sc->sc_ifp;
 528         struct ieee80211com *ic;
 529
 530         /* prevent further ioctls */
 531         RAL_LOCK(sc);
 532         sc->sc_detached = 1;
 533         RAL_UNLOCK(sc);
 534
 535         /* stop all USB transfers */
 536         usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
 537
 538         /* free TX list, if any */
 539         RAL_LOCK(sc);
 540         ural_unsetup_tx_list(sc);
 541         RAL_UNLOCK(sc);
 542
 543         if (ifp) {
 544                 ic = ifp->if_l2com;
 545                 ieee80211_ifdetach(ic);
 546                 if_free(ifp);
 547         }
 548         mtx_destroy(&sc->sc_mtx);
 549
 550         return (0);
 551 }
 552
 553 static usb_error_t
 554 ural_do_request(struct ural_softc *sc,
 555     struct usb_device_request *req, void *data)
 556 {
 557         usb_error_t err;
 558         int ntries = 10;
 559
 560         while (ntries--) {
 561                 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
 562                     req, data, 0, NULL, 250 /* ms */);
 563                 if (err == 0)
 564                         break;
 565
 566                 DPRINTFN(1, "Control request failed, %s (retrying)\n",
 567                     usbd_errstr(err));
 568                 if (ural_pause(sc, hz / 100))
 569                         break;
 570         }
 571         return (err);
 572 }
 573
 574 static struct ieee80211vap *
 575 ural_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
 576     enum ieee80211_opmode opmode, int flags,
 577     const uint8_t bssid[IEEE80211_ADDR_LEN],
 578     const uint8_t mac[IEEE80211_ADDR_LEN])
 579 {
 580         struct ural_softc *sc = ic->ic_ifp->if_softc;
 581         struct ural_vap *uvp;
 582         struct ieee80211vap *vap;
 583
 584         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
 585                 return NULL;
 586         uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
 587             M_80211_VAP, M_NOWAIT | M_ZERO);
 588         if (uvp == NULL)
 589                 return NULL;
 590         vap = &uvp->vap;
 591         /* enable s/w bmiss handling for sta mode */
 592
 593         if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
 594             flags | IEEE80211_CLONE_NOBEACONS, bssid, mac) != 0) {
 595                 /* out of memory */
 596                 free(uvp, M_80211_VAP);
 597                 return (NULL);
 598         }
 599
 600         /* override state transition machine */
 601         uvp->newstate = vap->iv_newstate;
 602         vap->iv_newstate = ural_newstate;
 603
 604         usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
 605         TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
 606         ieee80211_ratectl_init(vap);
 607         ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
 608
 609         /* complete setup */
 610         ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
 611         ic->ic_opmode = opmode;
 612         return vap;
 613 }
 614
 615 static void
 616 ural_vap_delete(struct ieee80211vap *vap)
 617 {
 618         struct ural_vap *uvp = URAL_VAP(vap);
 619         struct ieee80211com *ic = vap->iv_ic;
 620
 621         usb_callout_drain(&uvp->ratectl_ch);
 622         ieee80211_draintask(ic, &uvp->ratectl_task);
 623         ieee80211_ratectl_deinit(vap);
 624         ieee80211_vap_detach(vap);
 625         free(uvp, M_80211_VAP);
 626 }
 627
 628 static void
 629 ural_tx_free(struct ural_tx_data *data, int txerr)
 630 {
 631         struct ural_softc *sc = data->sc;
 632
 633         if (data->m != NULL) {
 634                 if (data->m->m_flags & M_TXCB)
 635                         ieee80211_process_callback(data->ni, data->m,
 636                             txerr ? ETIMEDOUT : 0);
 637                 m_freem(data->m);
 638                 data->m = NULL;
 639
 640                 ieee80211_free_node(data->ni);
 641                 data->ni = NULL;
 642         }
 643         STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
 644         sc->tx_nfree++;
 645 }
 646
 647 static void
 648 ural_setup_tx_list(struct ural_softc *sc)
 649 {
 650         struct ural_tx_data *data;
 651         int i;
 652
 653         sc->tx_nfree = 0;
 654         STAILQ_INIT(&sc->tx_q);
 655         STAILQ_INIT(&sc->tx_free);
 656
 657         for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
 658                 data = &sc->tx_data[i];
 659
 660                 data->sc = sc;
 661                 STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
 662                 sc->tx_nfree++;
 663         }
 664 }
 665
 666 static void
 667 ural_unsetup_tx_list(struct ural_softc *sc)
 668 {
 669         struct ural_tx_data *data;
 670         int i;
 671
 672         /* make sure any subsequent use of the queues will fail */
 673         sc->tx_nfree = 0;
 674         STAILQ_INIT(&sc->tx_q);
 675         STAILQ_INIT(&sc->tx_free);
 676
 677         /* free up all node references and mbufs */
 678         for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
 679                 data = &sc->tx_data[i];
 680
 681                 if (data->m != NULL) {
 682                         m_freem(data->m);
 683                         data->m = NULL;
 684                 }
 685                 if (data->ni != NULL) {
 686                         ieee80211_free_node(data->ni);
 687                         data->ni = NULL;
 688                 }
 689         }
 690 }
 691
 692 static int
 693 ural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 694 {
 695         struct ural_vap *uvp = URAL_VAP(vap);
 696         struct ieee80211com *ic = vap->iv_ic;
 697         struct ural_softc *sc = ic->ic_ifp->if_softc;
 698         const struct ieee80211_txparam *tp;
 699         struct ieee80211_node *ni;
 700         struct mbuf *m;
 701
 702         DPRINTF("%s -> %s\n",
 703                 ieee80211_state_name[vap->iv_state],
 704                 ieee80211_state_name[nstate]);
 705
 706         IEEE80211_UNLOCK(ic);
 707         RAL_LOCK(sc);
 708         usb_callout_stop(&uvp->ratectl_ch);
 709
 710         switch (nstate) {
 711         case IEEE80211_S_INIT:
 712                 if (vap->iv_state == IEEE80211_S_RUN) {
 713                         /* abort TSF synchronization */
 714                         ural_write(sc, RAL_TXRX_CSR19, 0);
 715
 716                         /* force tx led to stop blinking */
 717                         ural_write(sc, RAL_MAC_CSR20, 0);
 718                 }
 719                 break;
 720
 721         case IEEE80211_S_RUN:
 722                 ni = ieee80211_ref_node(vap->iv_bss);
 723
 724                 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
 725                         if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
 726                                 RAL_UNLOCK(sc);
 727                                 IEEE80211_LOCK(ic);
 728                                 ieee80211_free_node(ni);
 729                                 return (-1);
 730                         }
 731                         ural_update_slot(ic->ic_ifp);
 732                         ural_set_txpreamble(sc);
 733                         ural_set_basicrates(sc, ic->ic_bsschan);
 734                         IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
 735                         ural_set_bssid(sc, sc->sc_bssid);
 736                 }
 737
 738                 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
 739                     vap->iv_opmode == IEEE80211_M_IBSS) {
 740                         m = ieee80211_beacon_alloc(ni, &uvp->bo);
 741                         if (m == NULL) {
 742                                 device_printf(sc->sc_dev,
 743                                     "could not allocate beacon\n");
 744                                 RAL_UNLOCK(sc);
 745                                 IEEE80211_LOCK(ic);
 746                                 ieee80211_free_node(ni);
 747                                 return (-1);
 748                         }
 749                         ieee80211_ref_node(ni);
 750                         if (ural_tx_bcn(sc, m, ni) != 0) {
 751                                 device_printf(sc->sc_dev,
 752                                     "could not send beacon\n");
 753                                 RAL_UNLOCK(sc);
 754                                 IEEE80211_LOCK(ic);
 755                                 ieee80211_free_node(ni);
 756                                 return (-1);
 757                         }
 758                 }
 759
 760                 /* make tx led blink on tx (controlled by ASIC) */
 761                 ural_write(sc, RAL_MAC_CSR20, 1);
 762
 763                 if (vap->iv_opmode != IEEE80211_M_MONITOR)
 764                         ural_enable_tsf_sync(sc);
 765                 else
 766                         ural_enable_tsf(sc);
 767
 768                 /* enable automatic rate adaptation */
 769                 /* XXX should use ic_bsschan but not valid until after newstate call below */
 770                 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
 771                 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
 772                         ural_ratectl_start(sc, ni);
 773                 ieee80211_free_node(ni);
 774                 break;
 775
 776         default:
 777                 break;
 778         }
 779         RAL_UNLOCK(sc);
 780         IEEE80211_LOCK(ic);
 781         return (uvp->newstate(vap, nstate, arg));
 782 }
 783
 784
 785 static void
 786 ural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
 787 {
 788         struct ural_softc *sc = usbd_xfer_softc(xfer);
 789         struct ifnet *ifp = sc->sc_ifp;
 790         struct ieee80211vap *vap;
 791         struct ural_tx_data *data;
 792         struct mbuf *m;
 793         struct usb_page_cache *pc;
 794         int len;
 795
 796         usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
 797
 798         switch (USB_GET_STATE(xfer)) {
 799         case USB_ST_TRANSFERRED:
 800                 DPRINTFN(11, "transfer complete, %d bytes\n", len);
 801
 802                 /* free resources */
 803                 data = usbd_xfer_get_priv(xfer);
 804                 ural_tx_free(data, 0);
 805                 usbd_xfer_set_priv(xfer, NULL);
 806
 807                 ifp->if_opackets++;
 808                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 809
 810                 /* FALLTHROUGH */
 811         case USB_ST_SETUP:
 812 tr_setup:
 813                 data = STAILQ_FIRST(&sc->tx_q);
 814                 if (data) {
 815                         STAILQ_REMOVE_HEAD(&sc->tx_q, next);
 816                         m = data->m;
 817
 818                         if (m->m_pkthdr.len > (int)(RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
 819                                 DPRINTFN(0, "data overflow, %u bytes\n",
 820                                     m->m_pkthdr.len);
 821                                 m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
 822                         }
 823                         pc = usbd_xfer_get_frame(xfer, 0);
 824                         usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
 825                         usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
 826                             m->m_pkthdr.len);
 827
 828                         vap = data->ni->ni_vap;
 829                         if (ieee80211_radiotap_active_vap(vap)) {
 830                                 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
 831
 832                                 tap->wt_flags = 0;
 833                                 tap->wt_rate = data->rate;
 834                                 tap->wt_antenna = sc->tx_ant;
 835
 836                                 ieee80211_radiotap_tx(vap, m);
 837                         }
 838
 839                         /* xfer length needs to be a multiple of two! */
 840                         len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
 841                         if ((len % 64) == 0)
 842                                 len += 2;
 843
 844                         DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
 845                             m->m_pkthdr.len, len);
 846
 847                         usbd_xfer_set_frame_len(xfer, 0, len);
 848                         usbd_xfer_set_priv(xfer, data);
 849
 850                         usbd_transfer_submit(xfer);
 851                 }
 852                 RAL_UNLOCK(sc);
 853                 ural_start(ifp);
 854                 RAL_LOCK(sc);
 855                 break;
 856
 857         default:                        /* Error */
 858                 DPRINTFN(11, "transfer error, %s\n",
 859                     usbd_errstr(error));
 860
 861                 ifp->if_oerrors++;
 862                 data = usbd_xfer_get_priv(xfer);
 863                 if (data != NULL) {
 864                         ural_tx_free(data, error);
 865                         usbd_xfer_set_priv(xfer, NULL);
 866                 }
 867
 868                 if (error == USB_ERR_STALLED) {
 869                         /* try to clear stall first */
 870                         usbd_xfer_set_stall(xfer);
 871                         goto tr_setup;
 872                 }
 873                 if (error == USB_ERR_TIMEOUT)
 874                         device_printf(sc->sc_dev, "device timeout\n");
 875                 break;
 876         }
 877 }
 878
 879 static void
 880 ural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
 881 {
 882         struct ural_softc *sc = usbd_xfer_softc(xfer);
 883         struct ifnet *ifp = sc->sc_ifp;
 884         struct ieee80211com *ic = ifp->if_l2com;
 885         struct ieee80211_node *ni;
 886         struct mbuf *m = NULL;
 887         struct usb_page_cache *pc;
 888         uint32_t flags;
 889         int8_t rssi = 0, nf = 0;
 890         int len;
 891
 892         usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
 893
 894         switch (USB_GET_STATE(xfer)) {
 895         case USB_ST_TRANSFERRED:
 896
 897                 DPRINTFN(15, "rx done, actlen=%d\n", len);
 898
 899                 if (len < (int)(RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN)) {
 900                         DPRINTF("%s: xfer too short %d\n",
 901                             device_get_nameunit(sc->sc_dev), len);
 902                         ifp->if_ierrors++;
 903                         goto tr_setup;
 904                 }
 905
 906                 len -= RAL_RX_DESC_SIZE;
 907                 /* rx descriptor is located at the end */
 908                 pc = usbd_xfer_get_frame(xfer, 0);
 909                 usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
 910
 911                 rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
 912                 nf = RAL_NOISE_FLOOR;
 913                 flags = le32toh(sc->sc_rx_desc.flags);
 914                 if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
 915                         /*
 916                          * This should not happen since we did not
 917                          * request to receive those frames when we
 918                          * filled RAL_TXRX_CSR2:
 919                          */
 920                         DPRINTFN(5, "PHY or CRC error\n");
 921                         ifp->if_ierrors++;
 922                         goto tr_setup;
 923                 }
 924
 925                 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
 926                 if (m == NULL) {
 927                         DPRINTF("could not allocate mbuf\n");
 928                         ifp->if_ierrors++;
 929                         goto tr_setup;
 930                 }
 931                 usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
 932
 933                 /* finalize mbuf */
 934                 m->m_pkthdr.rcvif = ifp;
 935                 m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
 936
 937                 if (ieee80211_radiotap_active(ic)) {
 938                         struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
 939
 940                         /* XXX set once */
 941                         tap->wr_flags = 0;
 942                         tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
 943                             (flags & RAL_RX_OFDM) ?
 944                             IEEE80211_T_OFDM : IEEE80211_T_CCK);
 945                         tap->wr_antenna = sc->rx_ant;
 946                         tap->wr_antsignal = nf + rssi;
 947                         tap->wr_antnoise = nf;
 948                 }
 949                 /* Strip trailing 802.11 MAC FCS. */
 950                 m_adj(m, -IEEE80211_CRC_LEN);
 951
 952                 /* FALLTHROUGH */
 953         case USB_ST_SETUP:
 954 tr_setup:
 955                 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
 956                 usbd_transfer_submit(xfer);
 957
 958                 /*
 959                  * At the end of a USB callback it is always safe to unlock
 960                  * the private mutex of a device! That is why we do the
 961                  * "ieee80211_input" here, and not some lines up!
 962                  */
 963                 RAL_UNLOCK(sc);
 964                 if (m) {
 965                         ni = ieee80211_find_rxnode(ic,
 966                             mtod(m, struct ieee80211_frame_min *));
 967                         if (ni != NULL) {
 968                                 (void) ieee80211_input(ni, m, rssi, nf);
 969                                 ieee80211_free_node(ni);
 970                         } else
 971                                 (void) ieee80211_input_all(ic, m, rssi, nf);
 972                 }
 973                 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
 974                     !IFQ_IS_EMPTY(&ifp->if_snd))
 975                         ural_start(ifp);
 976                 RAL_LOCK(sc);
 977                 return;
 978
 979         default:                        /* Error */
 980                 if (error != USB_ERR_CANCELLED) {
 981                         /* try to clear stall first */
 982                         usbd_xfer_set_stall(xfer);
 983                         goto tr_setup;
 984                 }
 985                 return;
 986         }
 987 }
 988
 989 static uint8_t
 990 ural_plcp_signal(int rate)
 991 {
 992         switch (rate) {
 993         /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
 994         case 12:        return 0xb;
 995         case 18:        return 0xf;
 996         case 24:        return 0xa;
 997         case 36:        return 0xe;
 998         case 48:        return 0x9;
 999         case 72:        return 0xd;
1000         case 96:        return 0x8;
1001         case 108:       return 0xc;
1002
1003         /* CCK rates (NB: not IEEE std, device-specific) */
1004         case 2:         return 0x0;
1005         case 4:         return 0x1;
1006         case 11:        return 0x2;
1007         case 22:        return 0x3;
1008         }
1009         return 0xff;            /* XXX unsupported/unknown rate */
1010 }
1011
1012 static void
1013 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1014     uint32_t flags, int len, int rate)
1015 {
1016         struct ifnet *ifp = sc->sc_ifp;
1017         struct ieee80211com *ic = ifp->if_l2com;
1018         uint16_t plcp_length;
1019         int remainder;
1020
1021         desc->flags = htole32(flags);
1022         desc->flags |= htole32(RAL_TX_NEWSEQ);
1023         desc->flags |= htole32(len << 16);
1024
1025         desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1026         desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1027
1028         /* setup PLCP fields */
1029         desc->plcp_signal  = ural_plcp_signal(rate);
1030         desc->plcp_service = 4;
1031
1032         len += IEEE80211_CRC_LEN;
1033         if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1034                 desc->flags |= htole32(RAL_TX_OFDM);
1035
1036                 plcp_length = len & 0xfff;
1037                 desc->plcp_length_hi = plcp_length >> 6;
1038                 desc->plcp_length_lo = plcp_length & 0x3f;
1039         } else {
1040                 plcp_length = (16 * len + rate - 1) / rate;
1041                 if (rate == 22) {
1042                         remainder = (16 * len) % 22;
1043                         if (remainder != 0 && remainder < 7)
1044                                 desc->plcp_service |= RAL_PLCP_LENGEXT;
1045                 }
1046                 desc->plcp_length_hi = plcp_length >> 8;
1047                 desc->plcp_length_lo = plcp_length & 0xff;
1048
1049                 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1050                         desc->plcp_signal |= 0x08;
1051         }
1052
1053         desc->iv = 0;
1054         desc->eiv = 0;
1055 }
1056
1057 #define RAL_TX_TIMEOUT  5000
1058
1059 static int
1060 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1061 {
1062         struct ieee80211vap *vap = ni->ni_vap;
1063         struct ieee80211com *ic = ni->ni_ic;
1064         struct ifnet *ifp = sc->sc_ifp;
1065         const struct ieee80211_txparam *tp;
1066         struct ural_tx_data *data;
1067
1068         if (sc->tx_nfree == 0) {
1069                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1070                 m_freem(m0);
1071                 ieee80211_free_node(ni);
1072                 return (EIO);
1073         }
1074         if (ic->ic_bsschan == IEEE80211_CHAN_ANYC) {
1075                 m_freem(m0);
1076                 ieee80211_free_node(ni);
1077                 return (ENXIO);
1078         }
1079         data = STAILQ_FIRST(&sc->tx_free);
1080         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1081         sc->tx_nfree--;
1082         tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1083
1084         data->m = m0;
1085         data->ni = ni;
1086         data->rate = tp->mgmtrate;
1087
1088         ural_setup_tx_desc(sc, &data->desc,
1089             RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1090             tp->mgmtrate);
1091
1092         DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1093             m0->m_pkthdr.len, tp->mgmtrate);
1094
1095         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1096         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1097
1098         return (0);
1099 }
1100
1101 static int
1102 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1103 {
1104         struct ieee80211vap *vap = ni->ni_vap;
1105         struct ieee80211com *ic = ni->ni_ic;
1106         const struct ieee80211_txparam *tp;
1107         struct ural_tx_data *data;
1108         struct ieee80211_frame *wh;
1109         struct ieee80211_key *k;
1110         uint32_t flags;
1111         uint16_t dur;
1112
1113         RAL_LOCK_ASSERT(sc, MA_OWNED);
1114
1115         data = STAILQ_FIRST(&sc->tx_free);
1116         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1117         sc->tx_nfree--;
1118
1119         tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1120
1121         wh = mtod(m0, struct ieee80211_frame *);
1122         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1123                 k = ieee80211_crypto_encap(ni, m0);
1124                 if (k == NULL) {
1125                         m_freem(m0);
1126                         return ENOBUFS;
1127                 }
1128                 wh = mtod(m0, struct ieee80211_frame *);
1129         }
1130
1131         data->m = m0;
1132         data->ni = ni;
1133         data->rate = tp->mgmtrate;
1134
1135         flags = 0;
1136         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1137                 flags |= RAL_TX_ACK;
1138
1139                 dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1140                     ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1141                 USETW(wh->i_dur, dur);
1142
1143                 /* tell hardware to add timestamp for probe responses */
1144                 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1145                     IEEE80211_FC0_TYPE_MGT &&
1146                     (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1147                     IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1148                         flags |= RAL_TX_TIMESTAMP;
1149         }
1150
1151         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1152
1153         DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1154             m0->m_pkthdr.len, tp->mgmtrate);
1155
1156         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1157         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1158
1159         return 0;
1160 }
1161
1162 static int
1163 ural_sendprot(struct ural_softc *sc,
1164     const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1165 {
1166         struct ieee80211com *ic = ni->ni_ic;
1167         const struct ieee80211_frame *wh;
1168         struct ural_tx_data *data;
1169         struct mbuf *mprot;
1170         int protrate, ackrate, pktlen, flags, isshort;
1171         uint16_t dur;
1172
1173         KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1174             ("protection %d", prot));
1175
1176         wh = mtod(m, const struct ieee80211_frame *);
1177         pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1178
1179         protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1180         ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1181
1182         isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1183         dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1184             + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1185         flags = RAL_TX_RETRY(7);
1186         if (prot == IEEE80211_PROT_RTSCTS) {
1187                 /* NB: CTS is the same size as an ACK */
1188                 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1189                 flags |= RAL_TX_ACK;
1190                 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1191         } else {
1192                 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1193         }
1194         if (mprot == NULL) {
1195                 /* XXX stat + msg */
1196                 return ENOBUFS;
1197         }
1198         data = STAILQ_FIRST(&sc->tx_free);
1199         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1200         sc->tx_nfree--;
1201
1202         data->m = mprot;
1203         data->ni = ieee80211_ref_node(ni);
1204         data->rate = protrate;
1205         ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1206
1207         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1208         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1209
1210         return 0;
1211 }
1212
1213 static int
1214 ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1215     const struct ieee80211_bpf_params *params)
1216 {
1217         struct ieee80211com *ic = ni->ni_ic;
1218         struct ural_tx_data *data;
1219         uint32_t flags;
1220         int error;
1221         int rate;
1222
1223         RAL_LOCK_ASSERT(sc, MA_OWNED);
1224         KASSERT(params != NULL, ("no raw xmit params"));
1225
1226         rate = params->ibp_rate0;
1227         if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1228                 m_freem(m0);
1229                 return EINVAL;
1230         }
1231         flags = 0;
1232         if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1233                 flags |= RAL_TX_ACK;
1234         if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1235                 error = ural_sendprot(sc, m0, ni,
1236                     params->ibp_flags & IEEE80211_BPF_RTS ?
1237                          IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1238                     rate);
1239                 if (error || sc->tx_nfree == 0) {
1240                         m_freem(m0);
1241                         return ENOBUFS;
1242                 }
1243                 flags |= RAL_TX_IFS_SIFS;
1244         }
1245
1246         data = STAILQ_FIRST(&sc->tx_free);
1247         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1248         sc->tx_nfree--;
1249
1250         data->m = m0;
1251         data->ni = ni;
1252         data->rate = rate;
1253
1254         /* XXX need to setup descriptor ourself */
1255         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1256
1257         DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1258             m0->m_pkthdr.len, rate);
1259
1260         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1261         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1262
1263         return 0;
1264 }
1265
1266 static int
1267 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1268 {
1269         struct ieee80211vap *vap = ni->ni_vap;
1270         struct ieee80211com *ic = ni->ni_ic;
1271         struct ural_tx_data *data;
1272         struct ieee80211_frame *wh;
1273         const struct ieee80211_txparam *tp;
1274         struct ieee80211_key *k;
1275         uint32_t flags = 0;
1276         uint16_t dur;
1277         int error, rate;
1278
1279         RAL_LOCK_ASSERT(sc, MA_OWNED);
1280
1281         wh = mtod(m0, struct ieee80211_frame *);
1282
1283         tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1284         if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1285                 rate = tp->mcastrate;
1286         else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1287                 rate = tp->ucastrate;
1288         else
1289                 rate = ni->ni_txrate;
1290
1291         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1292                 k = ieee80211_crypto_encap(ni, m0);
1293                 if (k == NULL) {
1294                         m_freem(m0);
1295                         return ENOBUFS;
1296                 }
1297                 /* packet header may have moved, reset our local pointer */
1298                 wh = mtod(m0, struct ieee80211_frame *);
1299         }
1300
1301         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1302                 int prot = IEEE80211_PROT_NONE;
1303                 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1304                         prot = IEEE80211_PROT_RTSCTS;
1305                 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1306                     ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1307                         prot = ic->ic_protmode;
1308                 if (prot != IEEE80211_PROT_NONE) {
1309                         error = ural_sendprot(sc, m0, ni, prot, rate);
1310                         if (error || sc->tx_nfree == 0) {
1311                                 m_freem(m0);
1312                                 return ENOBUFS;
1313                         }
1314                         flags |= RAL_TX_IFS_SIFS;
1315                 }
1316         }
1317
1318         data = STAILQ_FIRST(&sc->tx_free);
1319         STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1320         sc->tx_nfree--;
1321
1322         data->m = m0;
1323         data->ni = ni;
1324         data->rate = rate;
1325
1326         if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1327                 flags |= RAL_TX_ACK;
1328                 flags |= RAL_TX_RETRY(7);
1329
1330                 dur = ieee80211_ack_duration(ic->ic_rt, rate,
1331                     ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1332                 USETW(wh->i_dur, dur);
1333         }
1334
1335         ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1336
1337         DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1338             m0->m_pkthdr.len, rate);
1339
1340         STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1341         usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1342
1343         return 0;
1344 }
1345
1346 static void
1347 ural_start(struct ifnet *ifp)
1348 {
1349         struct ural_softc *sc = ifp->if_softc;
1350         struct ieee80211_node *ni;
1351         struct mbuf *m;
1352
1353         RAL_LOCK(sc);
1354         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1355                 RAL_UNLOCK(sc);
1356                 return;
1357         }
1358         for (;;) {
1359                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1360                 if (m == NULL)
1361                         break;
1362                 if (sc->tx_nfree < RAL_TX_MINFREE) {
1363                         IFQ_DRV_PREPEND(&ifp->if_snd, m);
1364                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1365                         break;
1366                 }
1367                 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1368                 if (ural_tx_data(sc, m, ni) != 0) {
1369                         ieee80211_free_node(ni);
1370                         ifp->if_oerrors++;
1371                         break;
1372                 }
1373         }
1374         RAL_UNLOCK(sc);
1375 }
1376
1377 static int
1378 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1379 {
1380         struct ural_softc *sc = ifp->if_softc;
1381         struct ieee80211com *ic = ifp->if_l2com;
1382         struct ifreq *ifr = (struct ifreq *) data;
1383         int error;
1384         int startall = 0;
1385
1386         RAL_LOCK(sc);
1387         error = sc->sc_detached ? ENXIO : 0;
1388         RAL_UNLOCK(sc);
1389         if (error)
1390                 return (error);
1391
1392         switch (cmd) {
1393         case SIOCSIFFLAGS:
1394                 RAL_LOCK(sc);
1395                 if (ifp->if_flags & IFF_UP) {
1396                         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1397                                 ural_init_locked(sc);
1398                                 startall = 1;
1399                         } else
1400                                 ural_setpromisc(sc);
1401                 } else {
1402                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1403                                 ural_stop(sc);
1404                 }
1405                 RAL_UNLOCK(sc);
1406                 if (startall)
1407                         ieee80211_start_all(ic);
1408                 break;
1409         case SIOCGIFMEDIA:
1410         case SIOCSIFMEDIA:
1411                 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1412                 break;
1413         default:
1414                 error = ether_ioctl(ifp, cmd, data);
1415                 break;
1416         }
1417         return error;
1418 }
1419
1420 static void
1421 ural_set_testmode(struct ural_softc *sc)
1422 {
1423         struct usb_device_request req;
1424         usb_error_t error;
1425
1426         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1427         req.bRequest = RAL_VENDOR_REQUEST;
1428         USETW(req.wValue, 4);
1429         USETW(req.wIndex, 1);
1430         USETW(req.wLength, 0);
1431
1432         error = ural_do_request(sc, &req, NULL);
1433         if (error != 0) {
1434                 device_printf(sc->sc_dev, "could not set test mode: %s\n",
1435                     usbd_errstr(error));
1436         }
1437 }
1438
1439 static void
1440 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1441 {
1442         struct usb_device_request req;
1443         usb_error_t error;
1444
1445         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1446         req.bRequest = RAL_READ_EEPROM;
1447         USETW(req.wValue, 0);
1448         USETW(req.wIndex, addr);
1449         USETW(req.wLength, len);
1450
1451         error = ural_do_request(sc, &req, buf);
1452         if (error != 0) {
1453                 device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1454                     usbd_errstr(error));
1455         }
1456 }
1457
1458 static uint16_t
1459 ural_read(struct ural_softc *sc, uint16_t reg)
1460 {
1461         struct usb_device_request req;
1462         usb_error_t error;
1463         uint16_t val;
1464
1465         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1466         req.bRequest = RAL_READ_MAC;
1467         USETW(req.wValue, 0);
1468         USETW(req.wIndex, reg);
1469         USETW(req.wLength, sizeof (uint16_t));
1470
1471         error = ural_do_request(sc, &req, &val);
1472         if (error != 0) {
1473                 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1474                     usbd_errstr(error));
1475                 return 0;
1476         }
1477
1478         return le16toh(val);
1479 }
1480
1481 static void
1482 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1483 {
1484         struct usb_device_request req;
1485         usb_error_t error;
1486
1487         req.bmRequestType = UT_READ_VENDOR_DEVICE;
1488         req.bRequest = RAL_READ_MULTI_MAC;
1489         USETW(req.wValue, 0);
1490         USETW(req.wIndex, reg);
1491         USETW(req.wLength, len);
1492
1493         error = ural_do_request(sc, &req, buf);
1494         if (error != 0) {
1495                 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1496                     usbd_errstr(error));
1497         }
1498 }
1499
1500 static void
1501 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1502 {
1503         struct usb_device_request req;
1504         usb_error_t error;
1505
1506         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1507         req.bRequest = RAL_WRITE_MAC;
1508         USETW(req.wValue, val);
1509         USETW(req.wIndex, reg);
1510         USETW(req.wLength, 0);
1511
1512         error = ural_do_request(sc, &req, NULL);
1513         if (error != 0) {
1514                 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1515                     usbd_errstr(error));
1516         }
1517 }
1518
1519 static void
1520 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1521 {
1522         struct usb_device_request req;
1523         usb_error_t error;
1524
1525         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1526         req.bRequest = RAL_WRITE_MULTI_MAC;
1527         USETW(req.wValue, 0);
1528         USETW(req.wIndex, reg);
1529         USETW(req.wLength, len);
1530
1531         error = ural_do_request(sc, &req, buf);
1532         if (error != 0) {
1533                 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1534                     usbd_errstr(error));
1535         }
1536 }
1537
1538 static void
1539 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1540 {
1541         uint16_t tmp;
1542         int ntries;
1543
1544         for (ntries = 0; ntries < 100; ntries++) {
1545                 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1546                         break;
1547                 if (ural_pause(sc, hz / 100))
1548                         break;
1549         }
1550         if (ntries == 100) {
1551                 device_printf(sc->sc_dev, "could not write to BBP\n");
1552                 return;
1553         }
1554
1555         tmp = reg << 8 | val;
1556         ural_write(sc, RAL_PHY_CSR7, tmp);
1557 }
1558
1559 static uint8_t
1560 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1561 {
1562         uint16_t val;
1563         int ntries;
1564
1565         val = RAL_BBP_WRITE | reg << 8;
1566         ural_write(sc, RAL_PHY_CSR7, val);
1567
1568         for (ntries = 0; ntries < 100; ntries++) {
1569                 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1570                         break;
1571                 if (ural_pause(sc, hz / 100))
1572                         break;
1573         }
1574         if (ntries == 100) {
1575                 device_printf(sc->sc_dev, "could not read BBP\n");
1576                 return 0;
1577         }
1578
1579         return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1580 }
1581
1582 static void
1583 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1584 {
1585         uint32_t tmp;
1586         int ntries;
1587
1588         for (ntries = 0; ntries < 100; ntries++) {
1589                 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1590                         break;
1591                 if (ural_pause(sc, hz / 100))
1592                         break;
1593         }
1594         if (ntries == 100) {
1595                 device_printf(sc->sc_dev, "could not write to RF\n");
1596                 return;
1597         }
1598
1599         tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1600         ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1601         ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1602
1603         /* remember last written value in sc */
1604         sc->rf_regs[reg] = val;
1605
1606         DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1607 }
1608
1609 static void
1610 ural_scan_start(struct ieee80211com *ic)
1611 {
1612         struct ifnet *ifp = ic->ic_ifp;
1613         struct ural_softc *sc = ifp->if_softc;
1614
1615         RAL_LOCK(sc);
1616         ural_write(sc, RAL_TXRX_CSR19, 0);
1617         ural_set_bssid(sc, ifp->if_broadcastaddr);
1618         RAL_UNLOCK(sc);
1619 }
1620
1621 static void
1622 ural_scan_end(struct ieee80211com *ic)
1623 {
1624         struct ural_softc *sc = ic->ic_ifp->if_softc;
1625
1626         RAL_LOCK(sc);
1627         ural_enable_tsf_sync(sc);
1628         ural_set_bssid(sc, sc->sc_bssid);
1629         RAL_UNLOCK(sc);
1630
1631 }
1632
1633 static void
1634 ural_set_channel(struct ieee80211com *ic)
1635 {
1636         struct ural_softc *sc = ic->ic_ifp->if_softc;
1637
1638         RAL_LOCK(sc);
1639         ural_set_chan(sc, ic->ic_curchan);
1640         RAL_UNLOCK(sc);
1641 }
1642
1643 static void
1644 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1645 {
1646         struct ifnet *ifp = sc->sc_ifp;
1647         struct ieee80211com *ic = ifp->if_l2com;
1648         uint8_t power, tmp;
1649         int i, chan;
1650
1651         chan = ieee80211_chan2ieee(ic, c);
1652         if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1653                 return;
1654
1655         if (IEEE80211_IS_CHAN_2GHZ(c))
1656                 power = min(sc->txpow[chan - 1], 31);
1657         else
1658                 power = 31;
1659
1660         /* adjust txpower using ifconfig settings */
1661         power -= (100 - ic->ic_txpowlimit) / 8;
1662
1663         DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1664
1665         switch (sc->rf_rev) {
1666         case RAL_RF_2522:
1667                 ural_rf_write(sc, RAL_RF1, 0x00814);
1668                 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1669                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1670                 break;
1671
1672         case RAL_RF_2523:
1673                 ural_rf_write(sc, RAL_RF1, 0x08804);
1674                 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1675                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1676                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1677                 break;
1678
1679         case RAL_RF_2524:
1680                 ural_rf_write(sc, RAL_RF1, 0x0c808);
1681                 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1682                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1683                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1684                 break;
1685
1686         case RAL_RF_2525:
1687                 ural_rf_write(sc, RAL_RF1, 0x08808);
1688                 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1689                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1690                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1691
1692                 ural_rf_write(sc, RAL_RF1, 0x08808);
1693                 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1694                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1695                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1696                 break;
1697
1698         case RAL_RF_2525E:
1699                 ural_rf_write(sc, RAL_RF1, 0x08808);
1700                 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1701                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1702                 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1703                 break;
1704
1705         case RAL_RF_2526:
1706                 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1707                 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1708                 ural_rf_write(sc, RAL_RF1, 0x08804);
1709
1710                 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1711                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1712                 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1713                 break;
1714
1715         /* dual-band RF */
1716         case RAL_RF_5222:
1717                 for (i = 0; ural_rf5222[i].chan != chan; i++);
1718
1719                 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1720                 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1721                 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1722                 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1723                 break;
1724         }
1725
1726         if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1727             (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1728                 /* set Japan filter bit for channel 14 */
1729                 tmp = ural_bbp_read(sc, 70);
1730
1731                 tmp &= ~RAL_JAPAN_FILTER;
1732                 if (chan == 14)
1733                         tmp |= RAL_JAPAN_FILTER;
1734
1735                 ural_bbp_write(sc, 70, tmp);
1736
1737                 /* clear CRC errors */
1738                 ural_read(sc, RAL_STA_CSR0);
1739
1740                 ural_pause(sc, hz / 100);
1741                 ural_disable_rf_tune(sc);
1742         }
1743
1744         /* XXX doesn't belong here */
1745         /* update basic rate set */
1746         ural_set_basicrates(sc, c);
1747
1748         /* give the hardware some time to do the switchover */
1749         ural_pause(sc, hz / 100);
1750 }
1751
1752 /*
1753  * Disable RF auto-tuning.
1754  */
1755 static void
1756 ural_disable_rf_tune(struct ural_softc *sc)
1757 {
1758         uint32_t tmp;
1759
1760         if (sc->rf_rev != RAL_RF_2523) {
1761                 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1762                 ural_rf_write(sc, RAL_RF1, tmp);
1763         }
1764
1765         tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1766         ural_rf_write(sc, RAL_RF3, tmp);
1767
1768         DPRINTFN(2, "disabling RF autotune\n");
1769 }
1770
1771 /*
1772  * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1773  * synchronization.
1774  */
1775 static void
1776 ural_enable_tsf_sync(struct ural_softc *sc)
1777 {
1778         struct ifnet *ifp = sc->sc_ifp;
1779         struct ieee80211com *ic = ifp->if_l2com;
1780         struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1781         uint16_t logcwmin, preload, tmp;
1782
1783         /* first, disable TSF synchronization */
1784         ural_write(sc, RAL_TXRX_CSR19, 0);
1785
1786         tmp = (16 * vap->iv_bss->ni_intval) << 4;
1787         ural_write(sc, RAL_TXRX_CSR18, tmp);
1788
1789         logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1790         preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1791         tmp = logcwmin << 12 | preload;
1792         ural_write(sc, RAL_TXRX_CSR20, tmp);
1793
1794         /* finally, enable TSF synchronization */
1795         tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1796         if (ic->ic_opmode == IEEE80211_M_STA)
1797                 tmp |= RAL_ENABLE_TSF_SYNC(1);
1798         else
1799                 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1800         ural_write(sc, RAL_TXRX_CSR19, tmp);
1801
1802         DPRINTF("enabling TSF synchronization\n");
1803 }
1804
1805 static void
1806 ural_enable_tsf(struct ural_softc *sc)
1807 {
1808         /* first, disable TSF synchronization */
1809         ural_write(sc, RAL_TXRX_CSR19, 0);
1810         ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1811 }
1812
1813 #define RAL_RXTX_TURNAROUND     5       /* us */
1814 static void
1815 ural_update_slot(struct ifnet *ifp)
1816 {
1817         struct ural_softc *sc = ifp->if_softc;
1818         struct ieee80211com *ic = ifp->if_l2com;
1819         uint16_t slottime, sifs, eifs;
1820
1821         slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1822
1823         /*
1824          * These settings may sound a bit inconsistent but this is what the
1825          * reference driver does.
1826          */
1827         if (ic->ic_curmode == IEEE80211_MODE_11B) {
1828                 sifs = 16 - RAL_RXTX_TURNAROUND;
1829                 eifs = 364;
1830         } else {
1831                 sifs = 10 - RAL_RXTX_TURNAROUND;
1832                 eifs = 64;
1833         }
1834
1835         ural_write(sc, RAL_MAC_CSR10, slottime);
1836         ural_write(sc, RAL_MAC_CSR11, sifs);
1837         ural_write(sc, RAL_MAC_CSR12, eifs);
1838 }
1839
1840 static void
1841 ural_set_txpreamble(struct ural_softc *sc)
1842 {
1843         struct ifnet *ifp = sc->sc_ifp;
1844         struct ieee80211com *ic = ifp->if_l2com;
1845         uint16_t tmp;
1846
1847         tmp = ural_read(sc, RAL_TXRX_CSR10);
1848
1849         tmp &= ~RAL_SHORT_PREAMBLE;
1850         if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1851                 tmp |= RAL_SHORT_PREAMBLE;
1852
1853         ural_write(sc, RAL_TXRX_CSR10, tmp);
1854 }
1855
1856 static void
1857 ural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1858 {
1859         /* XXX wrong, take from rate set */
1860         /* update basic rate set */
1861         if (IEEE80211_IS_CHAN_5GHZ(c)) {
1862                 /* 11a basic rates: 6, 12, 24Mbps */
1863                 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1864         } else if (IEEE80211_IS_CHAN_ANYG(c)) {
1865                 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1866                 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1867         } else {
1868                 /* 11b basic rates: 1, 2Mbps */
1869                 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1870         }
1871 }
1872
1873 static void
1874 ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1875 {
1876         uint16_t tmp;
1877
1878         tmp = bssid[0] | bssid[1] << 8;
1879         ural_write(sc, RAL_MAC_CSR5, tmp);
1880
1881         tmp = bssid[2] | bssid[3] << 8;
1882         ural_write(sc, RAL_MAC_CSR6, tmp);
1883
1884         tmp = bssid[4] | bssid[5] << 8;
1885         ural_write(sc, RAL_MAC_CSR7, tmp);
1886
1887         DPRINTF("setting BSSID to %6D\n", bssid, ":");
1888 }
1889
1890 static void
1891 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1892 {
1893         uint16_t tmp;
1894
1895         tmp = addr[0] | addr[1] << 8;
1896         ural_write(sc, RAL_MAC_CSR2, tmp);
1897
1898         tmp = addr[2] | addr[3] << 8;
1899         ural_write(sc, RAL_MAC_CSR3, tmp);
1900
1901         tmp = addr[4] | addr[5] << 8;
1902         ural_write(sc, RAL_MAC_CSR4, tmp);
1903
1904         DPRINTF("setting MAC address to %6D\n", addr, ":");
1905 }
1906
1907 static void
1908 ural_setpromisc(struct ural_softc *sc)
1909 {
1910         struct ifnet *ifp = sc->sc_ifp;
1911         uint32_t tmp;
1912
1913         tmp = ural_read(sc, RAL_TXRX_CSR2);
1914
1915         tmp &= ~RAL_DROP_NOT_TO_ME;
1916         if (!(ifp->if_flags & IFF_PROMISC))
1917                 tmp |= RAL_DROP_NOT_TO_ME;
1918
1919         ural_write(sc, RAL_TXRX_CSR2, tmp);
1920
1921         DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1922             "entering" : "leaving");
1923 }
1924
1925 static void
1926 ural_update_promisc(struct ifnet *ifp)
1927 {
1928         struct ural_softc *sc = ifp->if_softc;
1929
1930         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1931                 return;
1932
1933         RAL_LOCK(sc);
1934         ural_setpromisc(sc);
1935         RAL_UNLOCK(sc);
1936 }
1937
1938 static const char *
1939 ural_get_rf(int rev)
1940 {
1941         switch (rev) {
1942         case RAL_RF_2522:       return "RT2522";
1943         case RAL_RF_2523:       return "RT2523";
1944         case RAL_RF_2524:       return "RT2524";
1945         case RAL_RF_2525:       return "RT2525";
1946         case RAL_RF_2525E:      return "RT2525e";
1947         case RAL_RF_2526:       return "RT2526";
1948         case RAL_RF_5222:       return "RT5222";
1949         default:                return "unknown";
1950         }
1951 }
1952
1953 static void
1954 ural_read_eeprom(struct ural_softc *sc)
1955 {
1956         uint16_t val;
1957
1958         ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1959         val = le16toh(val);
1960         sc->rf_rev =   (val >> 11) & 0x7;
1961         sc->hw_radio = (val >> 10) & 0x1;
1962         sc->led_mode = (val >> 6)  & 0x7;
1963         sc->rx_ant =   (val >> 4)  & 0x3;
1964         sc->tx_ant =   (val >> 2)  & 0x3;
1965         sc->nb_ant =   val & 0x3;
1966
1967         /* read MAC address */
1968         ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1969
1970         /* read default values for BBP registers */
1971         ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1972
1973         /* read Tx power for all b/g channels */
1974         ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1975 }
1976
1977 static int
1978 ural_bbp_init(struct ural_softc *sc)
1979 {
1980 #define N(a)    ((int)(sizeof (a) / sizeof ((a)[0])))
1981         int i, ntries;
1982
1983         /* wait for BBP to be ready */
1984         for (ntries = 0; ntries < 100; ntries++) {
1985                 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1986                         break;
1987                 if (ural_pause(sc, hz / 100))
1988                         break;
1989         }
1990         if (ntries == 100) {
1991                 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1992                 return EIO;
1993         }
1994
1995         /* initialize BBP registers to default values */
1996         for (i = 0; i < N(ural_def_bbp); i++)
1997                 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1998
1999 #if 0
2000         /* initialize BBP registers to values stored in EEPROM */
2001         for (i = 0; i < 16; i++) {
2002                 if (sc->bbp_prom[i].reg == 0xff)
2003                         continue;
2004                 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2005         }
2006 #endif
2007
2008         return 0;
2009 #undef N
2010 }
2011
2012 static void
2013 ural_set_txantenna(struct ural_softc *sc, int antenna)
2014 {
2015         uint16_t tmp;
2016         uint8_t tx;
2017
2018         tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2019         if (antenna == 1)
2020                 tx |= RAL_BBP_ANTA;
2021         else if (antenna == 2)
2022                 tx |= RAL_BBP_ANTB;
2023         else
2024                 tx |= RAL_BBP_DIVERSITY;
2025
2026         /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2027         if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2028             sc->rf_rev == RAL_RF_5222)
2029                 tx |= RAL_BBP_FLIPIQ;
2030
2031         ural_bbp_write(sc, RAL_BBP_TX, tx);
2032
2033         /* update values in PHY_CSR5 and PHY_CSR6 */
2034         tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2035         ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2036
2037         tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2038         ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2039 }
2040
2041 static void
2042 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2043 {
2044         uint8_t rx;
2045
2046         rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2047         if (antenna == 1)
2048                 rx |= RAL_BBP_ANTA;
2049         else if (antenna == 2)
2050                 rx |= RAL_BBP_ANTB;
2051         else
2052                 rx |= RAL_BBP_DIVERSITY;
2053
2054         /* need to force no I/Q flip for RF 2525e and 2526 */
2055         if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2056                 rx &= ~RAL_BBP_FLIPIQ;
2057
2058         ural_bbp_write(sc, RAL_BBP_RX, rx);
2059 }
2060
2061 static void
2062 ural_init_locked(struct ural_softc *sc)
2063 {
2064 #define N(a)    ((int)(sizeof (a) / sizeof ((a)[0])))
2065         struct ifnet *ifp = sc->sc_ifp;
2066         struct ieee80211com *ic = ifp->if_l2com;
2067         uint16_t tmp;
2068         int i, ntries;
2069
2070         RAL_LOCK_ASSERT(sc, MA_OWNED);
2071
2072         ural_set_testmode(sc);
2073         ural_write(sc, 0x308, 0x00f0);  /* XXX magic */
2074
2075         ural_stop(sc);
2076
2077         /* initialize MAC registers to default values */
2078         for (i = 0; i < N(ural_def_mac); i++)
2079                 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2080
2081         /* wait for BBP and RF to wake up (this can take a long time!) */
2082         for (ntries = 0; ntries < 100; ntries++) {
2083                 tmp = ural_read(sc, RAL_MAC_CSR17);
2084                 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2085                     (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2086                         break;
2087                 if (ural_pause(sc, hz / 100))
2088                         break;
2089         }
2090         if (ntries == 100) {
2091                 device_printf(sc->sc_dev,
2092                     "timeout waiting for BBP/RF to wakeup\n");
2093                 goto fail;
2094         }
2095
2096         /* we're ready! */
2097         ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2098
2099         /* set basic rate set (will be updated later) */
2100         ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2101
2102         if (ural_bbp_init(sc) != 0)
2103                 goto fail;
2104
2105         ural_set_chan(sc, ic->ic_curchan);
2106
2107         /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2108         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2109
2110         ural_set_txantenna(sc, sc->tx_ant);
2111         ural_set_rxantenna(sc, sc->rx_ant);
2112
2113         ural_set_macaddr(sc, IF_LLADDR(ifp));
2114
2115         /*
2116          * Allocate Tx and Rx xfer queues.
2117          */
2118         ural_setup_tx_list(sc);
2119
2120         /* kick Rx */
2121         tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2122         if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2123                 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2124                 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2125                         tmp |= RAL_DROP_TODS;
2126                 if (!(ifp->if_flags & IFF_PROMISC))
2127                         tmp |= RAL_DROP_NOT_TO_ME;
2128         }
2129         ural_write(sc, RAL_TXRX_CSR2, tmp);
2130
2131         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2132         ifp->if_drv_flags |= IFF_DRV_RUNNING;
2133         usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2134         usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2135         return;
2136
2137 fail:   ural_stop(sc);
2138 #undef N
2139 }
2140
2141 static void
2142 ural_init(void *priv)
2143 {
2144         struct ural_softc *sc = priv;
2145         struct ifnet *ifp = sc->sc_ifp;
2146         struct ieee80211com *ic = ifp->if_l2com;
2147
2148         RAL_LOCK(sc);
2149         ural_init_locked(sc);
2150         RAL_UNLOCK(sc);
2151
2152         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2153                 ieee80211_start_all(ic);                /* start all vap's */
2154 }
2155
2156 static void
2157 ural_stop(struct ural_softc *sc)
2158 {
2159         struct ifnet *ifp = sc->sc_ifp;
2160
2161         RAL_LOCK_ASSERT(sc, MA_OWNED);
2162
2163         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2164
2165         /*
2166          * Drain all the transfers, if not already drained:
2167          */
2168         RAL_UNLOCK(sc);
2169         usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2170         usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2171         RAL_LOCK(sc);
2172
2173         ural_unsetup_tx_list(sc);
2174
2175         /* disable Rx */
2176         ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2177         /* reset ASIC and BBP (but won't reset MAC registers!) */
2178         ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2179         /* wait a little */
2180         ural_pause(sc, hz / 10);
2181         ural_write(sc, RAL_MAC_CSR1, 0);
2182         /* wait a little */
2183         ural_pause(sc, hz / 10);
2184 }
2185
2186 static int
2187 ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2188         const struct ieee80211_bpf_params *params)
2189 {
2190         struct ieee80211com *ic = ni->ni_ic;
2191         struct ifnet *ifp = ic->ic_ifp;
2192         struct ural_softc *sc = ifp->if_softc;
2193
2194         RAL_LOCK(sc);
2195         /* prevent management frames from being sent if we're not ready */
2196         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2197                 RAL_UNLOCK(sc);
2198                 m_freem(m);
2199                 ieee80211_free_node(ni);
2200                 return ENETDOWN;
2201         }
2202         if (sc->tx_nfree < RAL_TX_MINFREE) {
2203                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2204                 RAL_UNLOCK(sc);
2205                 m_freem(m);
2206                 ieee80211_free_node(ni);
2207                 return EIO;
2208         }
2209
2210         ifp->if_opackets++;
2211
2212         if (params == NULL) {
2213                 /*
2214                  * Legacy path; interpret frame contents to decide
2215                  * precisely how to send the frame.
2216                  */
2217                 if (ural_tx_mgt(sc, m, ni) != 0)
2218                         goto bad;
2219         } else {
2220                 /*
2221                  * Caller supplied explicit parameters to use in
2222                  * sending the frame.
2223                  */
2224                 if (ural_tx_raw(sc, m, ni, params) != 0)
2225                         goto bad;
2226         }
2227         RAL_UNLOCK(sc);
2228         return 0;
2229 bad:
2230         ifp->if_oerrors++;
2231         RAL_UNLOCK(sc);
2232         ieee80211_free_node(ni);
2233         return EIO;             /* XXX */
2234 }
2235
2236 static void
2237 ural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2238 {
2239         struct ieee80211vap *vap = ni->ni_vap;
2240         struct ural_vap *uvp = URAL_VAP(vap);
2241
2242         /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2243         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2244
2245         usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2246 }
2247
2248 static void
2249 ural_ratectl_timeout(void *arg)
2250 {
2251         struct ural_vap *uvp = arg;
2252         struct ieee80211vap *vap = &uvp->vap;
2253         struct ieee80211com *ic = vap->iv_ic;
2254
2255         ieee80211_runtask(ic, &uvp->ratectl_task);
2256 }
2257
2258 static void
2259 ural_ratectl_task(void *arg, int pending)
2260 {
2261         struct ural_vap *uvp = arg;
2262         struct ieee80211vap *vap = &uvp->vap;
2263         struct ieee80211com *ic = vap->iv_ic;
2264         struct ifnet *ifp = ic->ic_ifp;
2265         struct ural_softc *sc = ifp->if_softc;
2266         struct ieee80211_node *ni;
2267         int ok, fail;
2268         int sum, retrycnt;
2269
2270         ni = ieee80211_ref_node(vap->iv_bss);
2271         RAL_LOCK(sc);
2272         /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2273         ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2274
2275         ok = sc->sta[7] +               /* TX ok w/o retry */
2276              sc->sta[8];                /* TX ok w/ retry */
2277         fail = sc->sta[9];              /* TX retry-fail count */
2278         sum = ok+fail;
2279         retrycnt = sc->sta[8] + fail;
2280
2281         ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2282         (void) ieee80211_ratectl_rate(ni, NULL, 0);
2283
2284         ifp->if_oerrors += fail;        /* count TX retry-fail as Tx errors */
2285
2286         usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2287         RAL_UNLOCK(sc);
2288         ieee80211_free_node(ni);
2289 }
2290
2291 static int
2292 ural_pause(struct ural_softc *sc, int timeout)
2293 {
2294
2295         usb_pause_mtx(&sc->sc_mtx, timeout);
2296         return (0);
2297 }