4 * Copyright (c) 2005, 2006
5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Copyright (c) 2006, 2008
8 * Hans Petter Selasky <hselasky@FreeBSD.org>
10 * Permission to use, copy, modify, and distribute this software for any
11 * purpose with or without fee is hereby granted, provided that the above
12 * copyright notice and this permission notice appear in all copies.
14 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
23 #include <sys/cdefs.h>
24 __FBSDID("$FreeBSD$");
27 * Ralink Technology RT2500USB chipset driver
28 * http://www.ralinktech.com/
31 #include <sys/param.h>
32 #include <sys/sockio.h>
33 #include <sys/sysctl.h>
35 #include <sys/mutex.h>
37 #include <sys/kernel.h>
38 #include <sys/socket.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
41 #include <sys/module.h>
43 #include <sys/endian.h>
46 #include <machine/bus.h>
47 #include <machine/resource.h>
52 #include <net/if_arp.h>
53 #include <net/ethernet.h>
54 #include <net/if_dl.h>
55 #include <net/if_media.h>
56 #include <net/if_types.h>
59 #include <netinet/in.h>
60 #include <netinet/in_systm.h>
61 #include <netinet/in_var.h>
62 #include <netinet/if_ether.h>
63 #include <netinet/ip.h>
66 #include <net80211/ieee80211_var.h>
67 #include <net80211/ieee80211_regdomain.h>
68 #include <net80211/ieee80211_radiotap.h>
69 #include <net80211/ieee80211_ratectl.h>
71 #include <dev/usb/usb.h>
72 #include <dev/usb/usbdi.h>
75 #define USB_DEBUG_VAR ural_debug
76 #include <dev/usb/usb_debug.h>
78 #include <dev/usb/wlan/if_uralreg.h>
79 #include <dev/usb/wlan/if_uralvar.h>
82 static int ural_debug = 0;
84 SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
85 SYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
89 #define URAL_RSSI(rssi) \
90 ((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ? \
91 ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
93 /* various supported device vendors/products */
94 static const struct usb_device_id ural_devs[] = {
95 #define URAL_DEV(v,p) { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
96 URAL_DEV(ASUS, WL167G),
97 URAL_DEV(ASUS, RT2570),
98 URAL_DEV(BELKIN, F5D7050),
99 URAL_DEV(BELKIN, F5D7051),
100 URAL_DEV(CISCOLINKSYS, HU200TS),
101 URAL_DEV(CISCOLINKSYS, WUSB54G),
102 URAL_DEV(CISCOLINKSYS, WUSB54GP),
103 URAL_DEV(CONCEPTRONIC2, C54RU),
104 URAL_DEV(DLINK, DWLG122),
105 URAL_DEV(GIGABYTE, GN54G),
106 URAL_DEV(GIGABYTE, GNWBKG),
107 URAL_DEV(GUILLEMOT, HWGUSB254),
108 URAL_DEV(MELCO, KG54),
109 URAL_DEV(MELCO, KG54AI),
110 URAL_DEV(MELCO, KG54YB),
111 URAL_DEV(MELCO, NINWIFI),
112 URAL_DEV(MSI, RT2570),
113 URAL_DEV(MSI, RT2570_2),
114 URAL_DEV(MSI, RT2570_3),
115 URAL_DEV(NOVATECH, NV902),
116 URAL_DEV(RALINK, RT2570),
117 URAL_DEV(RALINK, RT2570_2),
118 URAL_DEV(RALINK, RT2570_3),
119 URAL_DEV(SIEMENS2, WL54G),
120 URAL_DEV(SMC, 2862WG),
121 URAL_DEV(SPHAIRON, UB801R),
122 URAL_DEV(SURECOM, RT2570),
123 URAL_DEV(VTECH, RT2570),
124 URAL_DEV(ZINWELL, RT2570),
128 static usb_callback_t ural_bulk_read_callback;
129 static usb_callback_t ural_bulk_write_callback;
131 static usb_error_t ural_do_request(struct ural_softc *sc,
132 struct usb_device_request *req, void *data);
133 static struct ieee80211vap *ural_vap_create(struct ieee80211com *,
134 const char name[IFNAMSIZ], int unit, int opmode,
135 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
136 const uint8_t mac[IEEE80211_ADDR_LEN]);
137 static void ural_vap_delete(struct ieee80211vap *);
138 static void ural_tx_free(struct ural_tx_data *, int);
139 static void ural_setup_tx_list(struct ural_softc *);
140 static void ural_unsetup_tx_list(struct ural_softc *);
141 static int ural_newstate(struct ieee80211vap *,
142 enum ieee80211_state, int);
143 static void ural_setup_tx_desc(struct ural_softc *,
144 struct ural_tx_desc *, uint32_t, int, int);
145 static int ural_tx_bcn(struct ural_softc *, struct mbuf *,
146 struct ieee80211_node *);
147 static int ural_tx_mgt(struct ural_softc *, struct mbuf *,
148 struct ieee80211_node *);
149 static int ural_tx_data(struct ural_softc *, struct mbuf *,
150 struct ieee80211_node *);
151 static void ural_start(struct ifnet *);
152 static int ural_ioctl(struct ifnet *, u_long, caddr_t);
153 static void ural_set_testmode(struct ural_softc *);
154 static void ural_eeprom_read(struct ural_softc *, uint16_t, void *,
156 static uint16_t ural_read(struct ural_softc *, uint16_t);
157 static void ural_read_multi(struct ural_softc *, uint16_t, void *,
159 static void ural_write(struct ural_softc *, uint16_t, uint16_t);
160 static void ural_write_multi(struct ural_softc *, uint16_t, void *,
162 static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
163 static uint8_t ural_bbp_read(struct ural_softc *, uint8_t);
164 static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
165 static void ural_scan_start(struct ieee80211com *);
166 static void ural_scan_end(struct ieee80211com *);
167 static void ural_set_channel(struct ieee80211com *);
168 static void ural_set_chan(struct ural_softc *,
169 struct ieee80211_channel *);
170 static void ural_disable_rf_tune(struct ural_softc *);
171 static void ural_enable_tsf_sync(struct ural_softc *);
172 static void ural_enable_tsf(struct ural_softc *);
173 static void ural_update_slot(struct ifnet *);
174 static void ural_set_txpreamble(struct ural_softc *);
175 static void ural_set_basicrates(struct ural_softc *,
176 const struct ieee80211_channel *);
177 static void ural_set_bssid(struct ural_softc *, const uint8_t *);
178 static void ural_set_macaddr(struct ural_softc *, uint8_t *);
179 static void ural_update_promisc(struct ifnet *);
180 static void ural_setpromisc(struct ural_softc *);
181 static const char *ural_get_rf(int);
182 static void ural_read_eeprom(struct ural_softc *);
183 static int ural_bbp_init(struct ural_softc *);
184 static void ural_set_txantenna(struct ural_softc *, int);
185 static void ural_set_rxantenna(struct ural_softc *, int);
186 static void ural_init_locked(struct ural_softc *);
187 static void ural_init(void *);
188 static void ural_stop(struct ural_softc *);
189 static int ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
190 const struct ieee80211_bpf_params *);
191 static void ural_ratectl_start(struct ural_softc *,
192 struct ieee80211_node *);
193 static void ural_ratectl_timeout(void *);
194 static void ural_ratectl_task(void *, int);
195 static int ural_pause(struct ural_softc *sc, int timeout);
198 * Default values for MAC registers; values taken from the reference driver.
200 static const struct {
204 { RAL_TXRX_CSR5, 0x8c8d },
205 { RAL_TXRX_CSR6, 0x8b8a },
206 { RAL_TXRX_CSR7, 0x8687 },
207 { RAL_TXRX_CSR8, 0x0085 },
208 { RAL_MAC_CSR13, 0x1111 },
209 { RAL_MAC_CSR14, 0x1e11 },
210 { RAL_TXRX_CSR21, 0xe78f },
211 { RAL_MAC_CSR9, 0xff1d },
212 { RAL_MAC_CSR11, 0x0002 },
213 { RAL_MAC_CSR22, 0x0053 },
214 { RAL_MAC_CSR15, 0x0000 },
215 { RAL_MAC_CSR8, RAL_FRAME_SIZE },
216 { RAL_TXRX_CSR19, 0x0000 },
217 { RAL_TXRX_CSR18, 0x005a },
218 { RAL_PHY_CSR2, 0x0000 },
219 { RAL_TXRX_CSR0, 0x1ec0 },
220 { RAL_PHY_CSR4, 0x000f }
224 * Default values for BBP registers; values taken from the reference driver.
226 static const struct {
265 * Default values for RF register R2 indexed by channel numbers.
267 static const uint32_t ural_rf2522_r2[] = {
268 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
269 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
272 static const uint32_t ural_rf2523_r2[] = {
273 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
274 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
277 static const uint32_t ural_rf2524_r2[] = {
278 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
279 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
282 static const uint32_t ural_rf2525_r2[] = {
283 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
284 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
287 static const uint32_t ural_rf2525_hi_r2[] = {
288 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
289 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
292 static const uint32_t ural_rf2525e_r2[] = {
293 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
294 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
297 static const uint32_t ural_rf2526_hi_r2[] = {
298 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
299 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
302 static const uint32_t ural_rf2526_r2[] = {
303 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
304 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
308 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
309 * values taken from the reference driver.
311 static const struct {
317 { 1, 0x08808, 0x0044d, 0x00282 },
318 { 2, 0x08808, 0x0044e, 0x00282 },
319 { 3, 0x08808, 0x0044f, 0x00282 },
320 { 4, 0x08808, 0x00460, 0x00282 },
321 { 5, 0x08808, 0x00461, 0x00282 },
322 { 6, 0x08808, 0x00462, 0x00282 },
323 { 7, 0x08808, 0x00463, 0x00282 },
324 { 8, 0x08808, 0x00464, 0x00282 },
325 { 9, 0x08808, 0x00465, 0x00282 },
326 { 10, 0x08808, 0x00466, 0x00282 },
327 { 11, 0x08808, 0x00467, 0x00282 },
328 { 12, 0x08808, 0x00468, 0x00282 },
329 { 13, 0x08808, 0x00469, 0x00282 },
330 { 14, 0x08808, 0x0046b, 0x00286 },
332 { 36, 0x08804, 0x06225, 0x00287 },
333 { 40, 0x08804, 0x06226, 0x00287 },
334 { 44, 0x08804, 0x06227, 0x00287 },
335 { 48, 0x08804, 0x06228, 0x00287 },
336 { 52, 0x08804, 0x06229, 0x00287 },
337 { 56, 0x08804, 0x0622a, 0x00287 },
338 { 60, 0x08804, 0x0622b, 0x00287 },
339 { 64, 0x08804, 0x0622c, 0x00287 },
341 { 100, 0x08804, 0x02200, 0x00283 },
342 { 104, 0x08804, 0x02201, 0x00283 },
343 { 108, 0x08804, 0x02202, 0x00283 },
344 { 112, 0x08804, 0x02203, 0x00283 },
345 { 116, 0x08804, 0x02204, 0x00283 },
346 { 120, 0x08804, 0x02205, 0x00283 },
347 { 124, 0x08804, 0x02206, 0x00283 },
348 { 128, 0x08804, 0x02207, 0x00283 },
349 { 132, 0x08804, 0x02208, 0x00283 },
350 { 136, 0x08804, 0x02209, 0x00283 },
351 { 140, 0x08804, 0x0220a, 0x00283 },
353 { 149, 0x08808, 0x02429, 0x00281 },
354 { 153, 0x08808, 0x0242b, 0x00281 },
355 { 157, 0x08808, 0x0242d, 0x00281 },
356 { 161, 0x08808, 0x0242f, 0x00281 }
359 static const struct usb_config ural_config[URAL_N_TRANSFER] = {
362 .endpoint = UE_ADDR_ANY,
363 .direction = UE_DIR_OUT,
364 .bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
365 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
366 .callback = ural_bulk_write_callback,
367 .timeout = 5000, /* ms */
371 .endpoint = UE_ADDR_ANY,
372 .direction = UE_DIR_IN,
373 .bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
374 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
375 .callback = ural_bulk_read_callback,
379 static device_probe_t ural_match;
380 static device_attach_t ural_attach;
381 static device_detach_t ural_detach;
383 static device_method_t ural_methods[] = {
384 /* Device interface */
385 DEVMETHOD(device_probe, ural_match),
386 DEVMETHOD(device_attach, ural_attach),
387 DEVMETHOD(device_detach, ural_detach),
392 static driver_t ural_driver = {
394 .methods = ural_methods,
395 .size = sizeof(struct ural_softc),
398 static devclass_t ural_devclass;
400 DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
401 MODULE_DEPEND(ural, usb, 1, 1, 1);
402 MODULE_DEPEND(ural, wlan, 1, 1, 1);
405 ural_match(device_t self)
407 struct usb_attach_arg *uaa = device_get_ivars(self);
409 if (uaa->usb_mode != USB_MODE_HOST)
411 if (uaa->info.bConfigIndex != 0)
413 if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
416 return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
420 ural_attach(device_t self)
422 struct usb_attach_arg *uaa = device_get_ivars(self);
423 struct ural_softc *sc = device_get_softc(self);
425 struct ieee80211com *ic;
426 uint8_t iface_index, bands;
429 device_set_usb_desc(self);
430 sc->sc_udev = uaa->device;
433 mtx_init(&sc->sc_mtx, device_get_nameunit(self),
434 MTX_NETWORK_LOCK, MTX_DEF);
436 iface_index = RAL_IFACE_INDEX;
437 error = usbd_transfer_setup(uaa->device,
438 &iface_index, sc->sc_xfer, ural_config,
439 URAL_N_TRANSFER, sc, &sc->sc_mtx);
441 device_printf(self, "could not allocate USB transfers, "
442 "err=%s\n", usbd_errstr(error));
447 /* retrieve RT2570 rev. no */
448 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
450 /* retrieve MAC address and various other things from EEPROM */
451 ural_read_eeprom(sc);
454 device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
455 sc->asic_rev, ural_get_rf(sc->rf_rev));
457 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
459 device_printf(sc->sc_dev, "can not if_alloc()\n");
465 if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
466 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
467 ifp->if_init = ural_init;
468 ifp->if_ioctl = ural_ioctl;
469 ifp->if_start = ural_start;
470 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
471 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
472 IFQ_SET_READY(&ifp->if_snd);
475 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
477 /* set device capabilities */
479 IEEE80211_C_STA /* station mode supported */
480 | IEEE80211_C_IBSS /* IBSS mode supported */
481 | IEEE80211_C_MONITOR /* monitor mode supported */
482 | IEEE80211_C_HOSTAP /* HostAp mode supported */
483 | IEEE80211_C_TXPMGT /* tx power management */
484 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
485 | IEEE80211_C_SHSLOT /* short slot time supported */
486 | IEEE80211_C_BGSCAN /* bg scanning supported */
487 | IEEE80211_C_WPA /* 802.11i */
488 | IEEE80211_C_RATECTL /* use ratectl */
492 setbit(&bands, IEEE80211_MODE_11B);
493 setbit(&bands, IEEE80211_MODE_11G);
494 if (sc->rf_rev == RAL_RF_5222)
495 setbit(&bands, IEEE80211_MODE_11A);
496 ieee80211_init_channels(ic, NULL, &bands);
498 ieee80211_ifattach(ic, sc->sc_bssid);
499 ic->ic_update_promisc = ural_update_promisc;
500 ic->ic_raw_xmit = ural_raw_xmit;
501 ic->ic_scan_start = ural_scan_start;
502 ic->ic_scan_end = ural_scan_end;
503 ic->ic_set_channel = ural_set_channel;
505 ic->ic_vap_create = ural_vap_create;
506 ic->ic_vap_delete = ural_vap_delete;
508 ieee80211_radiotap_attach(ic,
509 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
510 RAL_TX_RADIOTAP_PRESENT,
511 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
512 RAL_RX_RADIOTAP_PRESENT);
515 ieee80211_announce(ic);
521 return (ENXIO); /* failure */
525 ural_detach(device_t self)
527 struct ural_softc *sc = device_get_softc(self);
528 struct ifnet *ifp = sc->sc_ifp;
529 struct ieee80211com *ic;
531 /* stop all USB transfers */
532 usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
534 /* free TX list, if any */
536 ural_unsetup_tx_list(sc);
541 ieee80211_ifdetach(ic);
544 mtx_destroy(&sc->sc_mtx);
550 ural_do_request(struct ural_softc *sc,
551 struct usb_device_request *req, void *data)
557 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
558 req, data, 0, NULL, 250 /* ms */);
562 DPRINTFN(1, "Control request failed, %s (retrying)\n",
564 if (ural_pause(sc, hz / 100))
570 static struct ieee80211vap *
571 ural_vap_create(struct ieee80211com *ic,
572 const char name[IFNAMSIZ], int unit, int opmode, int flags,
573 const uint8_t bssid[IEEE80211_ADDR_LEN],
574 const uint8_t mac[IEEE80211_ADDR_LEN])
576 struct ural_softc *sc = ic->ic_ifp->if_softc;
577 struct ural_vap *uvp;
578 struct ieee80211vap *vap;
580 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
582 uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
583 M_80211_VAP, M_NOWAIT | M_ZERO);
587 /* enable s/w bmiss handling for sta mode */
588 ieee80211_vap_setup(ic, vap, name, unit, opmode,
589 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
591 /* override state transition machine */
592 uvp->newstate = vap->iv_newstate;
593 vap->iv_newstate = ural_newstate;
595 usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
596 TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
597 ieee80211_ratectl_init(vap);
598 ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
601 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
602 ic->ic_opmode = opmode;
607 ural_vap_delete(struct ieee80211vap *vap)
609 struct ural_vap *uvp = URAL_VAP(vap);
610 struct ieee80211com *ic = vap->iv_ic;
612 usb_callout_drain(&uvp->ratectl_ch);
613 ieee80211_draintask(ic, &uvp->ratectl_task);
614 ieee80211_ratectl_deinit(vap);
615 ieee80211_vap_detach(vap);
616 free(uvp, M_80211_VAP);
620 ural_tx_free(struct ural_tx_data *data, int txerr)
622 struct ural_softc *sc = data->sc;
624 if (data->m != NULL) {
625 if (data->m->m_flags & M_TXCB)
626 ieee80211_process_callback(data->ni, data->m,
627 txerr ? ETIMEDOUT : 0);
631 ieee80211_free_node(data->ni);
634 STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
639 ural_setup_tx_list(struct ural_softc *sc)
641 struct ural_tx_data *data;
645 STAILQ_INIT(&sc->tx_q);
646 STAILQ_INIT(&sc->tx_free);
648 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
649 data = &sc->tx_data[i];
652 STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
658 ural_unsetup_tx_list(struct ural_softc *sc)
660 struct ural_tx_data *data;
663 /* make sure any subsequent use of the queues will fail */
665 STAILQ_INIT(&sc->tx_q);
666 STAILQ_INIT(&sc->tx_free);
668 /* free up all node references and mbufs */
669 for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
670 data = &sc->tx_data[i];
672 if (data->m != NULL) {
676 if (data->ni != NULL) {
677 ieee80211_free_node(data->ni);
684 ural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
686 struct ural_vap *uvp = URAL_VAP(vap);
687 struct ieee80211com *ic = vap->iv_ic;
688 struct ural_softc *sc = ic->ic_ifp->if_softc;
689 const struct ieee80211_txparam *tp;
690 struct ieee80211_node *ni;
693 DPRINTF("%s -> %s\n",
694 ieee80211_state_name[vap->iv_state],
695 ieee80211_state_name[nstate]);
697 IEEE80211_UNLOCK(ic);
699 usb_callout_stop(&uvp->ratectl_ch);
702 case IEEE80211_S_INIT:
703 if (vap->iv_state == IEEE80211_S_RUN) {
704 /* abort TSF synchronization */
705 ural_write(sc, RAL_TXRX_CSR19, 0);
707 /* force tx led to stop blinking */
708 ural_write(sc, RAL_MAC_CSR20, 0);
712 case IEEE80211_S_RUN:
715 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
716 ural_update_slot(ic->ic_ifp);
717 ural_set_txpreamble(sc);
718 ural_set_basicrates(sc, ic->ic_bsschan);
719 IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
720 ural_set_bssid(sc, sc->sc_bssid);
723 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
724 vap->iv_opmode == IEEE80211_M_IBSS) {
725 m = ieee80211_beacon_alloc(ni, &uvp->bo);
727 device_printf(sc->sc_dev,
728 "could not allocate beacon\n");
733 ieee80211_ref_node(ni);
734 if (ural_tx_bcn(sc, m, ni) != 0) {
735 device_printf(sc->sc_dev,
736 "could not send beacon\n");
743 /* make tx led blink on tx (controlled by ASIC) */
744 ural_write(sc, RAL_MAC_CSR20, 1);
746 if (vap->iv_opmode != IEEE80211_M_MONITOR)
747 ural_enable_tsf_sync(sc);
751 /* enable automatic rate adaptation */
752 /* XXX should use ic_bsschan but not valid until after newstate call below */
753 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
754 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
755 ural_ratectl_start(sc, ni);
764 return (uvp->newstate(vap, nstate, arg));
769 ural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
771 struct ural_softc *sc = usbd_xfer_softc(xfer);
772 struct ifnet *ifp = sc->sc_ifp;
773 struct ieee80211vap *vap;
774 struct ural_tx_data *data;
776 struct usb_page_cache *pc;
779 usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
781 switch (USB_GET_STATE(xfer)) {
782 case USB_ST_TRANSFERRED:
783 DPRINTFN(11, "transfer complete, %d bytes\n", len);
786 data = usbd_xfer_get_priv(xfer);
787 ural_tx_free(data, 0);
788 usbd_xfer_set_priv(xfer, NULL);
791 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
796 data = STAILQ_FIRST(&sc->tx_q);
798 STAILQ_REMOVE_HEAD(&sc->tx_q, next);
801 if (m->m_pkthdr.len > (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
802 DPRINTFN(0, "data overflow, %u bytes\n",
804 m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
806 pc = usbd_xfer_get_frame(xfer, 0);
807 usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
808 usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
811 vap = data->ni->ni_vap;
812 if (ieee80211_radiotap_active_vap(vap)) {
813 struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
816 tap->wt_rate = data->rate;
817 tap->wt_antenna = sc->tx_ant;
819 ieee80211_radiotap_tx(vap, m);
822 /* xfer length needs to be a multiple of two! */
823 len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
827 DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
828 m->m_pkthdr.len, len);
830 usbd_xfer_set_frame_len(xfer, 0, len);
831 usbd_xfer_set_priv(xfer, data);
833 usbd_transfer_submit(xfer);
841 DPRINTFN(11, "transfer error, %s\n",
845 data = usbd_xfer_get_priv(xfer);
847 ural_tx_free(data, error);
848 usbd_xfer_set_priv(xfer, NULL);
851 if (error == USB_ERR_STALLED) {
852 /* try to clear stall first */
853 usbd_xfer_set_stall(xfer);
856 if (error == USB_ERR_TIMEOUT)
857 device_printf(sc->sc_dev, "device timeout\n");
863 ural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
865 struct ural_softc *sc = usbd_xfer_softc(xfer);
866 struct ifnet *ifp = sc->sc_ifp;
867 struct ieee80211com *ic = ifp->if_l2com;
868 struct ieee80211_node *ni;
869 struct mbuf *m = NULL;
870 struct usb_page_cache *pc;
872 int8_t rssi = 0, nf = 0;
875 usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
877 switch (USB_GET_STATE(xfer)) {
878 case USB_ST_TRANSFERRED:
880 DPRINTFN(15, "rx done, actlen=%d\n", len);
882 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
883 DPRINTF("%s: xfer too short %d\n",
884 device_get_nameunit(sc->sc_dev), len);
889 len -= RAL_RX_DESC_SIZE;
890 /* rx descriptor is located at the end */
891 pc = usbd_xfer_get_frame(xfer, 0);
892 usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
894 rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
895 nf = RAL_NOISE_FLOOR;
896 flags = le32toh(sc->sc_rx_desc.flags);
897 if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
899 * This should not happen since we did not
900 * request to receive those frames when we
901 * filled RAL_TXRX_CSR2:
903 DPRINTFN(5, "PHY or CRC error\n");
908 m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
910 DPRINTF("could not allocate mbuf\n");
914 usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
917 m->m_pkthdr.rcvif = ifp;
918 m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
920 if (ieee80211_radiotap_active(ic)) {
921 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
925 tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
926 (flags & RAL_RX_OFDM) ?
927 IEEE80211_T_OFDM : IEEE80211_T_CCK);
928 tap->wr_antenna = sc->rx_ant;
929 tap->wr_antsignal = nf + rssi;
930 tap->wr_antnoise = nf;
932 /* Strip trailing 802.11 MAC FCS. */
933 m_adj(m, -IEEE80211_CRC_LEN);
938 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
939 usbd_transfer_submit(xfer);
942 * At the end of a USB callback it is always safe to unlock
943 * the private mutex of a device! That is why we do the
944 * "ieee80211_input" here, and not some lines up!
948 ni = ieee80211_find_rxnode(ic,
949 mtod(m, struct ieee80211_frame_min *));
951 (void) ieee80211_input(ni, m, rssi, nf);
952 ieee80211_free_node(ni);
954 (void) ieee80211_input_all(ic, m, rssi, nf);
956 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
957 !IFQ_IS_EMPTY(&ifp->if_snd))
963 if (error != USB_ERR_CANCELLED) {
964 /* try to clear stall first */
965 usbd_xfer_set_stall(xfer);
973 ural_plcp_signal(int rate)
976 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
984 case 108: return 0xc;
986 /* CCK rates (NB: not IEEE std, device-specific) */
992 return 0xff; /* XXX unsupported/unknown rate */
996 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
997 uint32_t flags, int len, int rate)
999 struct ifnet *ifp = sc->sc_ifp;
1000 struct ieee80211com *ic = ifp->if_l2com;
1001 uint16_t plcp_length;
1004 desc->flags = htole32(flags);
1005 desc->flags |= htole32(RAL_TX_NEWSEQ);
1006 desc->flags |= htole32(len << 16);
1008 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1009 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1011 /* setup PLCP fields */
1012 desc->plcp_signal = ural_plcp_signal(rate);
1013 desc->plcp_service = 4;
1015 len += IEEE80211_CRC_LEN;
1016 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1017 desc->flags |= htole32(RAL_TX_OFDM);
1019 plcp_length = len & 0xfff;
1020 desc->plcp_length_hi = plcp_length >> 6;
1021 desc->plcp_length_lo = plcp_length & 0x3f;
1023 plcp_length = (16 * len + rate - 1) / rate;
1025 remainder = (16 * len) % 22;
1026 if (remainder != 0 && remainder < 7)
1027 desc->plcp_service |= RAL_PLCP_LENGEXT;
1029 desc->plcp_length_hi = plcp_length >> 8;
1030 desc->plcp_length_lo = plcp_length & 0xff;
1032 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1033 desc->plcp_signal |= 0x08;
1040 #define RAL_TX_TIMEOUT 5000
1043 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1045 struct ieee80211vap *vap = ni->ni_vap;
1046 struct ieee80211com *ic = ni->ni_ic;
1047 struct ifnet *ifp = sc->sc_ifp;
1048 const struct ieee80211_txparam *tp;
1049 struct ural_tx_data *data;
1051 if (sc->tx_nfree == 0) {
1052 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1054 ieee80211_free_node(ni);
1057 data = STAILQ_FIRST(&sc->tx_free);
1058 STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1060 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1064 data->rate = tp->mgmtrate;
1066 ural_setup_tx_desc(sc, &data->desc,
1067 RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1070 DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1071 m0->m_pkthdr.len, tp->mgmtrate);
1073 STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1074 usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1080 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1082 struct ieee80211vap *vap = ni->ni_vap;
1083 struct ieee80211com *ic = ni->ni_ic;
1084 const struct ieee80211_txparam *tp;
1085 struct ural_tx_data *data;
1086 struct ieee80211_frame *wh;
1087 struct ieee80211_key *k;
1091 RAL_LOCK_ASSERT(sc, MA_OWNED);
1093 data = STAILQ_FIRST(&sc->tx_free);
1094 STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1097 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1099 wh = mtod(m0, struct ieee80211_frame *);
1100 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1101 k = ieee80211_crypto_encap(ni, m0);
1106 wh = mtod(m0, struct ieee80211_frame *);
1111 data->rate = tp->mgmtrate;
1114 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1115 flags |= RAL_TX_ACK;
1117 dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1118 ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1119 *(uint16_t *)wh->i_dur = htole16(dur);
1121 /* tell hardware to add timestamp for probe responses */
1122 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1123 IEEE80211_FC0_TYPE_MGT &&
1124 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1125 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1126 flags |= RAL_TX_TIMESTAMP;
1129 ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1131 DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1132 m0->m_pkthdr.len, tp->mgmtrate);
1134 STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1135 usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1141 ural_sendprot(struct ural_softc *sc,
1142 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1144 struct ieee80211com *ic = ni->ni_ic;
1145 const struct ieee80211_frame *wh;
1146 struct ural_tx_data *data;
1148 int protrate, ackrate, pktlen, flags, isshort;
1151 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1152 ("protection %d", prot));
1154 wh = mtod(m, const struct ieee80211_frame *);
1155 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1157 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1158 ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1160 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1161 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1162 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1163 flags = RAL_TX_RETRY(7);
1164 if (prot == IEEE80211_PROT_RTSCTS) {
1165 /* NB: CTS is the same size as an ACK */
1166 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1167 flags |= RAL_TX_ACK;
1168 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1170 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1172 if (mprot == NULL) {
1173 /* XXX stat + msg */
1176 data = STAILQ_FIRST(&sc->tx_free);
1177 STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1181 data->ni = ieee80211_ref_node(ni);
1182 data->rate = protrate;
1183 ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1185 STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1186 usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1192 ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1193 const struct ieee80211_bpf_params *params)
1195 struct ieee80211com *ic = ni->ni_ic;
1196 struct ural_tx_data *data;
1201 RAL_LOCK_ASSERT(sc, MA_OWNED);
1202 KASSERT(params != NULL, ("no raw xmit params"));
1204 rate = params->ibp_rate0;
1205 if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1210 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1211 flags |= RAL_TX_ACK;
1212 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1213 error = ural_sendprot(sc, m0, ni,
1214 params->ibp_flags & IEEE80211_BPF_RTS ?
1215 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1217 if (error || sc->tx_nfree == 0) {
1221 flags |= RAL_TX_IFS_SIFS;
1224 data = STAILQ_FIRST(&sc->tx_free);
1225 STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1232 /* XXX need to setup descriptor ourself */
1233 ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1235 DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1236 m0->m_pkthdr.len, rate);
1238 STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1239 usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1245 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1247 struct ieee80211vap *vap = ni->ni_vap;
1248 struct ieee80211com *ic = ni->ni_ic;
1249 struct ural_tx_data *data;
1250 struct ieee80211_frame *wh;
1251 const struct ieee80211_txparam *tp;
1252 struct ieee80211_key *k;
1257 RAL_LOCK_ASSERT(sc, MA_OWNED);
1259 wh = mtod(m0, struct ieee80211_frame *);
1261 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1262 if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1263 rate = tp->mcastrate;
1264 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1265 rate = tp->ucastrate;
1267 rate = ni->ni_txrate;
1269 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1270 k = ieee80211_crypto_encap(ni, m0);
1275 /* packet header may have moved, reset our local pointer */
1276 wh = mtod(m0, struct ieee80211_frame *);
1279 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1280 int prot = IEEE80211_PROT_NONE;
1281 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1282 prot = IEEE80211_PROT_RTSCTS;
1283 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1284 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1285 prot = ic->ic_protmode;
1286 if (prot != IEEE80211_PROT_NONE) {
1287 error = ural_sendprot(sc, m0, ni, prot, rate);
1288 if (error || sc->tx_nfree == 0) {
1292 flags |= RAL_TX_IFS_SIFS;
1296 data = STAILQ_FIRST(&sc->tx_free);
1297 STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1304 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1305 flags |= RAL_TX_ACK;
1306 flags |= RAL_TX_RETRY(7);
1308 dur = ieee80211_ack_duration(ic->ic_rt, rate,
1309 ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1310 *(uint16_t *)wh->i_dur = htole16(dur);
1313 ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1315 DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1316 m0->m_pkthdr.len, rate);
1318 STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1319 usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1325 ural_start(struct ifnet *ifp)
1327 struct ural_softc *sc = ifp->if_softc;
1328 struct ieee80211_node *ni;
1332 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1337 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1340 if (sc->tx_nfree < RAL_TX_MINFREE) {
1341 IFQ_DRV_PREPEND(&ifp->if_snd, m);
1342 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1345 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1346 if (ural_tx_data(sc, m, ni) != 0) {
1347 ieee80211_free_node(ni);
1356 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1358 struct ural_softc *sc = ifp->if_softc;
1359 struct ieee80211com *ic = ifp->if_l2com;
1360 struct ifreq *ifr = (struct ifreq *) data;
1361 int error = 0, startall = 0;
1366 if (ifp->if_flags & IFF_UP) {
1367 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1368 ural_init_locked(sc);
1371 ural_setpromisc(sc);
1373 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1378 ieee80211_start_all(ic);
1382 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1385 error = ether_ioctl(ifp, cmd, data);
1392 ural_set_testmode(struct ural_softc *sc)
1394 struct usb_device_request req;
1397 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1398 req.bRequest = RAL_VENDOR_REQUEST;
1399 USETW(req.wValue, 4);
1400 USETW(req.wIndex, 1);
1401 USETW(req.wLength, 0);
1403 error = ural_do_request(sc, &req, NULL);
1405 device_printf(sc->sc_dev, "could not set test mode: %s\n",
1406 usbd_errstr(error));
1411 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1413 struct usb_device_request req;
1416 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1417 req.bRequest = RAL_READ_EEPROM;
1418 USETW(req.wValue, 0);
1419 USETW(req.wIndex, addr);
1420 USETW(req.wLength, len);
1422 error = ural_do_request(sc, &req, buf);
1424 device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1425 usbd_errstr(error));
1430 ural_read(struct ural_softc *sc, uint16_t reg)
1432 struct usb_device_request req;
1436 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1437 req.bRequest = RAL_READ_MAC;
1438 USETW(req.wValue, 0);
1439 USETW(req.wIndex, reg);
1440 USETW(req.wLength, sizeof (uint16_t));
1442 error = ural_do_request(sc, &req, &val);
1444 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1445 usbd_errstr(error));
1449 return le16toh(val);
1453 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1455 struct usb_device_request req;
1458 req.bmRequestType = UT_READ_VENDOR_DEVICE;
1459 req.bRequest = RAL_READ_MULTI_MAC;
1460 USETW(req.wValue, 0);
1461 USETW(req.wIndex, reg);
1462 USETW(req.wLength, len);
1464 error = ural_do_request(sc, &req, buf);
1466 device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1467 usbd_errstr(error));
1472 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1474 struct usb_device_request req;
1477 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1478 req.bRequest = RAL_WRITE_MAC;
1479 USETW(req.wValue, val);
1480 USETW(req.wIndex, reg);
1481 USETW(req.wLength, 0);
1483 error = ural_do_request(sc, &req, NULL);
1485 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1486 usbd_errstr(error));
1491 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1493 struct usb_device_request req;
1496 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1497 req.bRequest = RAL_WRITE_MULTI_MAC;
1498 USETW(req.wValue, 0);
1499 USETW(req.wIndex, reg);
1500 USETW(req.wLength, len);
1502 error = ural_do_request(sc, &req, buf);
1504 device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1505 usbd_errstr(error));
1510 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1515 for (ntries = 0; ntries < 100; ntries++) {
1516 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1518 if (ural_pause(sc, hz / 100))
1521 if (ntries == 100) {
1522 device_printf(sc->sc_dev, "could not write to BBP\n");
1526 tmp = reg << 8 | val;
1527 ural_write(sc, RAL_PHY_CSR7, tmp);
1531 ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1536 val = RAL_BBP_WRITE | reg << 8;
1537 ural_write(sc, RAL_PHY_CSR7, val);
1539 for (ntries = 0; ntries < 100; ntries++) {
1540 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1542 if (ural_pause(sc, hz / 100))
1545 if (ntries == 100) {
1546 device_printf(sc->sc_dev, "could not read BBP\n");
1550 return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1554 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1559 for (ntries = 0; ntries < 100; ntries++) {
1560 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1562 if (ural_pause(sc, hz / 100))
1565 if (ntries == 100) {
1566 device_printf(sc->sc_dev, "could not write to RF\n");
1570 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1571 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff);
1572 ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1574 /* remember last written value in sc */
1575 sc->rf_regs[reg] = val;
1577 DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1581 ural_scan_start(struct ieee80211com *ic)
1583 struct ifnet *ifp = ic->ic_ifp;
1584 struct ural_softc *sc = ifp->if_softc;
1587 ural_write(sc, RAL_TXRX_CSR19, 0);
1588 ural_set_bssid(sc, ifp->if_broadcastaddr);
1593 ural_scan_end(struct ieee80211com *ic)
1595 struct ural_softc *sc = ic->ic_ifp->if_softc;
1598 ural_enable_tsf_sync(sc);
1599 ural_set_bssid(sc, sc->sc_bssid);
1605 ural_set_channel(struct ieee80211com *ic)
1607 struct ural_softc *sc = ic->ic_ifp->if_softc;
1610 ural_set_chan(sc, ic->ic_curchan);
1615 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1617 struct ifnet *ifp = sc->sc_ifp;
1618 struct ieee80211com *ic = ifp->if_l2com;
1622 chan = ieee80211_chan2ieee(ic, c);
1623 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1626 if (IEEE80211_IS_CHAN_2GHZ(c))
1627 power = min(sc->txpow[chan - 1], 31);
1631 /* adjust txpower using ifconfig settings */
1632 power -= (100 - ic->ic_txpowlimit) / 8;
1634 DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1636 switch (sc->rf_rev) {
1638 ural_rf_write(sc, RAL_RF1, 0x00814);
1639 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1640 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1644 ural_rf_write(sc, RAL_RF1, 0x08804);
1645 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1646 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1647 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1651 ural_rf_write(sc, RAL_RF1, 0x0c808);
1652 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1653 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1654 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1658 ural_rf_write(sc, RAL_RF1, 0x08808);
1659 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1660 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1661 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1663 ural_rf_write(sc, RAL_RF1, 0x08808);
1664 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1665 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1666 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1670 ural_rf_write(sc, RAL_RF1, 0x08808);
1671 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1672 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1673 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1677 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1678 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1679 ural_rf_write(sc, RAL_RF1, 0x08804);
1681 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1682 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1683 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1688 for (i = 0; ural_rf5222[i].chan != chan; i++);
1690 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1691 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1692 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1693 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1697 if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1698 (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1699 /* set Japan filter bit for channel 14 */
1700 tmp = ural_bbp_read(sc, 70);
1702 tmp &= ~RAL_JAPAN_FILTER;
1704 tmp |= RAL_JAPAN_FILTER;
1706 ural_bbp_write(sc, 70, tmp);
1708 /* clear CRC errors */
1709 ural_read(sc, RAL_STA_CSR0);
1711 ural_pause(sc, hz / 100);
1712 ural_disable_rf_tune(sc);
1715 /* XXX doesn't belong here */
1716 /* update basic rate set */
1717 ural_set_basicrates(sc, c);
1719 /* give the hardware some time to do the switchover */
1720 ural_pause(sc, hz / 100);
1724 * Disable RF auto-tuning.
1727 ural_disable_rf_tune(struct ural_softc *sc)
1731 if (sc->rf_rev != RAL_RF_2523) {
1732 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1733 ural_rf_write(sc, RAL_RF1, tmp);
1736 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1737 ural_rf_write(sc, RAL_RF3, tmp);
1739 DPRINTFN(2, "disabling RF autotune\n");
1743 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1747 ural_enable_tsf_sync(struct ural_softc *sc)
1749 struct ifnet *ifp = sc->sc_ifp;
1750 struct ieee80211com *ic = ifp->if_l2com;
1751 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1752 uint16_t logcwmin, preload, tmp;
1754 /* first, disable TSF synchronization */
1755 ural_write(sc, RAL_TXRX_CSR19, 0);
1757 tmp = (16 * vap->iv_bss->ni_intval) << 4;
1758 ural_write(sc, RAL_TXRX_CSR18, tmp);
1760 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1761 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1762 tmp = logcwmin << 12 | preload;
1763 ural_write(sc, RAL_TXRX_CSR20, tmp);
1765 /* finally, enable TSF synchronization */
1766 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1767 if (ic->ic_opmode == IEEE80211_M_STA)
1768 tmp |= RAL_ENABLE_TSF_SYNC(1);
1770 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1771 ural_write(sc, RAL_TXRX_CSR19, tmp);
1773 DPRINTF("enabling TSF synchronization\n");
1777 ural_enable_tsf(struct ural_softc *sc)
1779 /* first, disable TSF synchronization */
1780 ural_write(sc, RAL_TXRX_CSR19, 0);
1781 ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1784 #define RAL_RXTX_TURNAROUND 5 /* us */
1786 ural_update_slot(struct ifnet *ifp)
1788 struct ural_softc *sc = ifp->if_softc;
1789 struct ieee80211com *ic = ifp->if_l2com;
1790 uint16_t slottime, sifs, eifs;
1792 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1795 * These settings may sound a bit inconsistent but this is what the
1796 * reference driver does.
1798 if (ic->ic_curmode == IEEE80211_MODE_11B) {
1799 sifs = 16 - RAL_RXTX_TURNAROUND;
1802 sifs = 10 - RAL_RXTX_TURNAROUND;
1806 ural_write(sc, RAL_MAC_CSR10, slottime);
1807 ural_write(sc, RAL_MAC_CSR11, sifs);
1808 ural_write(sc, RAL_MAC_CSR12, eifs);
1812 ural_set_txpreamble(struct ural_softc *sc)
1814 struct ifnet *ifp = sc->sc_ifp;
1815 struct ieee80211com *ic = ifp->if_l2com;
1818 tmp = ural_read(sc, RAL_TXRX_CSR10);
1820 tmp &= ~RAL_SHORT_PREAMBLE;
1821 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1822 tmp |= RAL_SHORT_PREAMBLE;
1824 ural_write(sc, RAL_TXRX_CSR10, tmp);
1828 ural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1830 /* XXX wrong, take from rate set */
1831 /* update basic rate set */
1832 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1833 /* 11a basic rates: 6, 12, 24Mbps */
1834 ural_write(sc, RAL_TXRX_CSR11, 0x150);
1835 } else if (IEEE80211_IS_CHAN_ANYG(c)) {
1836 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1837 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1839 /* 11b basic rates: 1, 2Mbps */
1840 ural_write(sc, RAL_TXRX_CSR11, 0x3);
1845 ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1849 tmp = bssid[0] | bssid[1] << 8;
1850 ural_write(sc, RAL_MAC_CSR5, tmp);
1852 tmp = bssid[2] | bssid[3] << 8;
1853 ural_write(sc, RAL_MAC_CSR6, tmp);
1855 tmp = bssid[4] | bssid[5] << 8;
1856 ural_write(sc, RAL_MAC_CSR7, tmp);
1858 DPRINTF("setting BSSID to %6D\n", bssid, ":");
1862 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1866 tmp = addr[0] | addr[1] << 8;
1867 ural_write(sc, RAL_MAC_CSR2, tmp);
1869 tmp = addr[2] | addr[3] << 8;
1870 ural_write(sc, RAL_MAC_CSR3, tmp);
1872 tmp = addr[4] | addr[5] << 8;
1873 ural_write(sc, RAL_MAC_CSR4, tmp);
1875 DPRINTF("setting MAC address to %6D\n", addr, ":");
1879 ural_setpromisc(struct ural_softc *sc)
1881 struct ifnet *ifp = sc->sc_ifp;
1884 tmp = ural_read(sc, RAL_TXRX_CSR2);
1886 tmp &= ~RAL_DROP_NOT_TO_ME;
1887 if (!(ifp->if_flags & IFF_PROMISC))
1888 tmp |= RAL_DROP_NOT_TO_ME;
1890 ural_write(sc, RAL_TXRX_CSR2, tmp);
1892 DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1893 "entering" : "leaving");
1897 ural_update_promisc(struct ifnet *ifp)
1899 struct ural_softc *sc = ifp->if_softc;
1901 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1905 ural_setpromisc(sc);
1910 ural_get_rf(int rev)
1913 case RAL_RF_2522: return "RT2522";
1914 case RAL_RF_2523: return "RT2523";
1915 case RAL_RF_2524: return "RT2524";
1916 case RAL_RF_2525: return "RT2525";
1917 case RAL_RF_2525E: return "RT2525e";
1918 case RAL_RF_2526: return "RT2526";
1919 case RAL_RF_5222: return "RT5222";
1920 default: return "unknown";
1925 ural_read_eeprom(struct ural_softc *sc)
1929 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1931 sc->rf_rev = (val >> 11) & 0x7;
1932 sc->hw_radio = (val >> 10) & 0x1;
1933 sc->led_mode = (val >> 6) & 0x7;
1934 sc->rx_ant = (val >> 4) & 0x3;
1935 sc->tx_ant = (val >> 2) & 0x3;
1936 sc->nb_ant = val & 0x3;
1938 /* read MAC address */
1939 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1941 /* read default values for BBP registers */
1942 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1944 /* read Tx power for all b/g channels */
1945 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1949 ural_bbp_init(struct ural_softc *sc)
1951 #define N(a) (sizeof (a) / sizeof ((a)[0]))
1954 /* wait for BBP to be ready */
1955 for (ntries = 0; ntries < 100; ntries++) {
1956 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1958 if (ural_pause(sc, hz / 100))
1961 if (ntries == 100) {
1962 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1966 /* initialize BBP registers to default values */
1967 for (i = 0; i < N(ural_def_bbp); i++)
1968 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1971 /* initialize BBP registers to values stored in EEPROM */
1972 for (i = 0; i < 16; i++) {
1973 if (sc->bbp_prom[i].reg == 0xff)
1975 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1984 ural_set_txantenna(struct ural_softc *sc, int antenna)
1989 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
1992 else if (antenna == 2)
1995 tx |= RAL_BBP_DIVERSITY;
1997 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
1998 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
1999 sc->rf_rev == RAL_RF_5222)
2000 tx |= RAL_BBP_FLIPIQ;
2002 ural_bbp_write(sc, RAL_BBP_TX, tx);
2004 /* update values in PHY_CSR5 and PHY_CSR6 */
2005 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2006 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2008 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2009 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2013 ural_set_rxantenna(struct ural_softc *sc, int antenna)
2017 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2020 else if (antenna == 2)
2023 rx |= RAL_BBP_DIVERSITY;
2025 /* need to force no I/Q flip for RF 2525e and 2526 */
2026 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2027 rx &= ~RAL_BBP_FLIPIQ;
2029 ural_bbp_write(sc, RAL_BBP_RX, rx);
2033 ural_init_locked(struct ural_softc *sc)
2035 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2036 struct ifnet *ifp = sc->sc_ifp;
2037 struct ieee80211com *ic = ifp->if_l2com;
2041 RAL_LOCK_ASSERT(sc, MA_OWNED);
2043 ural_set_testmode(sc);
2044 ural_write(sc, 0x308, 0x00f0); /* XXX magic */
2048 /* initialize MAC registers to default values */
2049 for (i = 0; i < N(ural_def_mac); i++)
2050 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2052 /* wait for BBP and RF to wake up (this can take a long time!) */
2053 for (ntries = 0; ntries < 100; ntries++) {
2054 tmp = ural_read(sc, RAL_MAC_CSR17);
2055 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2056 (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2058 if (ural_pause(sc, hz / 100))
2061 if (ntries == 100) {
2062 device_printf(sc->sc_dev,
2063 "timeout waiting for BBP/RF to wakeup\n");
2068 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2070 /* set basic rate set (will be updated later) */
2071 ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2073 if (ural_bbp_init(sc) != 0)
2076 ural_set_chan(sc, ic->ic_curchan);
2078 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2079 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2081 ural_set_txantenna(sc, sc->tx_ant);
2082 ural_set_rxantenna(sc, sc->rx_ant);
2084 ural_set_macaddr(sc, IF_LLADDR(ifp));
2087 * Allocate Tx and Rx xfer queues.
2089 ural_setup_tx_list(sc);
2092 tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2093 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2094 tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2095 if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2096 tmp |= RAL_DROP_TODS;
2097 if (!(ifp->if_flags & IFF_PROMISC))
2098 tmp |= RAL_DROP_NOT_TO_ME;
2100 ural_write(sc, RAL_TXRX_CSR2, tmp);
2102 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2103 ifp->if_drv_flags |= IFF_DRV_RUNNING;
2104 usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2105 usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2108 fail: ural_stop(sc);
2113 ural_init(void *priv)
2115 struct ural_softc *sc = priv;
2116 struct ifnet *ifp = sc->sc_ifp;
2117 struct ieee80211com *ic = ifp->if_l2com;
2120 ural_init_locked(sc);
2123 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2124 ieee80211_start_all(ic); /* start all vap's */
2128 ural_stop(struct ural_softc *sc)
2130 struct ifnet *ifp = sc->sc_ifp;
2132 RAL_LOCK_ASSERT(sc, MA_OWNED);
2134 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2137 * Drain all the transfers, if not already drained:
2140 usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2141 usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2144 ural_unsetup_tx_list(sc);
2147 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2148 /* reset ASIC and BBP (but won't reset MAC registers!) */
2149 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2151 ural_pause(sc, hz / 10);
2152 ural_write(sc, RAL_MAC_CSR1, 0);
2154 ural_pause(sc, hz / 10);
2158 ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2159 const struct ieee80211_bpf_params *params)
2161 struct ieee80211com *ic = ni->ni_ic;
2162 struct ifnet *ifp = ic->ic_ifp;
2163 struct ural_softc *sc = ifp->if_softc;
2166 /* prevent management frames from being sent if we're not ready */
2167 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2170 ieee80211_free_node(ni);
2173 if (sc->tx_nfree < RAL_TX_MINFREE) {
2174 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2177 ieee80211_free_node(ni);
2183 if (params == NULL) {
2185 * Legacy path; interpret frame contents to decide
2186 * precisely how to send the frame.
2188 if (ural_tx_mgt(sc, m, ni) != 0)
2192 * Caller supplied explicit parameters to use in
2193 * sending the frame.
2195 if (ural_tx_raw(sc, m, ni, params) != 0)
2203 ieee80211_free_node(ni);
2204 return EIO; /* XXX */
2208 ural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2210 struct ieee80211vap *vap = ni->ni_vap;
2211 struct ural_vap *uvp = URAL_VAP(vap);
2213 /* clear statistic registers (STA_CSR0 to STA_CSR10) */
2214 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2216 ieee80211_ratectl_node_init(ni);
2218 usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2222 ural_ratectl_timeout(void *arg)
2224 struct ural_vap *uvp = arg;
2225 struct ieee80211vap *vap = &uvp->vap;
2226 struct ieee80211com *ic = vap->iv_ic;
2228 ieee80211_runtask(ic, &uvp->ratectl_task);
2232 ural_ratectl_task(void *arg, int pending)
2234 struct ural_vap *uvp = arg;
2235 struct ieee80211vap *vap = &uvp->vap;
2236 struct ieee80211com *ic = vap->iv_ic;
2237 struct ifnet *ifp = ic->ic_ifp;
2238 struct ural_softc *sc = ifp->if_softc;
2239 struct ieee80211_node *ni = vap->iv_bss;
2244 /* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2245 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2247 ok = sc->sta[7] + /* TX ok w/o retry */
2248 sc->sta[8]; /* TX ok w/ retry */
2249 fail = sc->sta[9]; /* TX retry-fail count */
2251 retrycnt = sc->sta[8] + fail;
2253 ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2254 (void) ieee80211_ratectl_rate(ni, NULL, 0);
2256 ifp->if_oerrors += fail; /* count TX retry-fail as Tx errors */
2258 usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2263 ural_pause(struct ural_softc *sc, int timeout)
2266 usb_pause_mtx(&sc->sc_mtx, timeout);