sys/dev/usb/wlan/if_urtw.c

   1 /*-
   2  * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org>
   3  *
   4  * Permission to use, copy, modify, and distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <sys/cdefs.h>
  18 __FBSDID("$FreeBSD$");
  19 #include <sys/param.h>
  20 #include <sys/sockio.h>
  21 #include <sys/sysctl.h>
  22 #include <sys/lock.h>
  23 #include <sys/mutex.h>
  24 #include <sys/mbuf.h>
  25 #include <sys/kernel.h>
  26 #include <sys/socket.h>
  27 #include <sys/systm.h>
  28 #include <sys/malloc.h>
  29 #include <sys/module.h>
  30 #include <sys/bus.h>
  31 #include <sys/endian.h>
  32 #include <sys/kdb.h>
  33
  34 #include <machine/bus.h>
  35 #include <machine/resource.h>
  36 #include <sys/rman.h>
  37
  38 #include <net/if.h>
  39 #include <net/if_arp.h>
  40 #include <net/ethernet.h>
  41 #include <net/if_dl.h>
  42 #include <net/if_media.h>
  43 #include <net/if_types.h>
  44
  45 #ifdef INET
  46 #include <netinet/in.h>
  47 #include <netinet/in_systm.h>
  48 #include <netinet/in_var.h>
  49 #include <netinet/if_ether.h>
  50 #include <netinet/ip.h>
  51 #endif
  52
  53 #include <net80211/ieee80211_var.h>
  54 #include <net80211/ieee80211_regdomain.h>
  55 #include <net80211/ieee80211_radiotap.h>
  56
  57 #include <dev/usb/usb.h>
  58 #include <dev/usb/usbdi.h>
  59 #include "usbdevs.h"
  60
  61 #include <dev/usb/wlan/if_urtwreg.h>
  62 #include <dev/usb/wlan/if_urtwvar.h>
  63
  64 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L");
  65 #ifdef URTW_DEBUG
  66 int urtw_debug = 0;
  67 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN, &urtw_debug, 0,
  68     "control debugging printfs");
  69 TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug);
  70 enum {
  71         URTW_DEBUG_XMIT         = 0x00000001,   /* basic xmit operation */
  72         URTW_DEBUG_RECV         = 0x00000002,   /* basic recv operation */
  73         URTW_DEBUG_RESET        = 0x00000004,   /* reset processing */
  74         URTW_DEBUG_TX_PROC      = 0x00000008,   /* tx ISR proc */
  75         URTW_DEBUG_RX_PROC      = 0x00000010,   /* rx ISR proc */
  76         URTW_DEBUG_STATE        = 0x00000020,   /* 802.11 state transitions */
  77         URTW_DEBUG_STAT         = 0x00000040,   /* statistic */
  78         URTW_DEBUG_INIT         = 0x00000080,   /* initialization of dev */
  79         URTW_DEBUG_TXSTATUS     = 0x00000100,   /* tx status */
  80         URTW_DEBUG_ANY          = 0xffffffff
  81 };
  82 #define DPRINTF(sc, m, fmt, ...) do {                           \
  83         if (sc->sc_debug & (m))                                 \
  84                 printf(fmt, __VA_ARGS__);                       \
  85 } while (0)
  86 #else
  87 #define DPRINTF(sc, m, fmt, ...) do {                           \
  88         (void) sc;                                              \
  89 } while (0)
  90 #endif
  91 static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG;
  92 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW | CTLFLAG_TUN,
  93     &urtw_preamble_mode, 0, "set the preable mode (long or short)");
  94 TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode);
  95
  96 /* recognized device vendors/products */
  97 #define urtw_lookup(v, p)                                               \
  98         ((const struct urtw_type *)usb_lookup(urtw_devs, v, p))
  99 #define URTW_DEV_B(v,p)                                                 \
 100         { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) }
 101 #define URTW_DEV_L(v,p)                                                 \
 102         { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) }
 103 #define URTW_REV_RTL8187B       0
 104 #define URTW_REV_RTL8187L       1
 105 static const STRUCT_USB_HOST_ID urtw_devs[] = {
 106         URTW_DEV_B(NETGEAR, WG111V3),
 107         URTW_DEV_B(REALTEK, RTL8187B_0),
 108         URTW_DEV_B(REALTEK, RTL8187B_1),
 109         URTW_DEV_B(REALTEK, RTL8187B_2),
 110         URTW_DEV_B(SITECOMEU, WL168V4),
 111         URTW_DEV_L(ASUS, P5B_WIFI),
 112         URTW_DEV_L(BELKIN, F5D7050E),
 113         URTW_DEV_L(LINKSYS4, WUSB54GCV2),
 114         URTW_DEV_L(NETGEAR, WG111V2),
 115         URTW_DEV_L(REALTEK, RTL8187),
 116         URTW_DEV_L(SITECOMEU, WL168V1),
 117         URTW_DEV_L(SURECOM, EP9001G2A),
 118         { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) },
 119         { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) },
 120         { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) },
 121         { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) },
 122         { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) },
 123         { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) },
 124         { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) },
 125 #undef URTW_DEV_L
 126 #undef URTW_DEV_B
 127 };
 128
 129 #define urtw_read8_m(sc, val, data)     do {                    \
 130         error = urtw_read8_c(sc, val, data);                    \
 131         if (error != 0)                                         \
 132                 goto fail;                                      \
 133 } while (0)
 134 #define urtw_write8_m(sc, val, data)    do {                    \
 135         error = urtw_write8_c(sc, val, data);                   \
 136         if (error != 0)                                         \
 137                 goto fail;                                      \
 138 } while (0)
 139 #define urtw_read16_m(sc, val, data)    do {                    \
 140         error = urtw_read16_c(sc, val, data);                   \
 141         if (error != 0)                                         \
 142                 goto fail;                                      \
 143 } while (0)
 144 #define urtw_write16_m(sc, val, data)   do {                    \
 145         error = urtw_write16_c(sc, val, data);                  \
 146         if (error != 0)                                         \
 147                 goto fail;                                      \
 148 } while (0)
 149 #define urtw_read32_m(sc, val, data)    do {                    \
 150         error = urtw_read32_c(sc, val, data);                   \
 151         if (error != 0)                                         \
 152                 goto fail;                                      \
 153 } while (0)
 154 #define urtw_write32_m(sc, val, data)   do {                    \
 155         error = urtw_write32_c(sc, val, data);                  \
 156         if (error != 0)                                         \
 157                 goto fail;                                      \
 158 } while (0)
 159 #define urtw_8187_write_phy_ofdm(sc, val, data) do {            \
 160         error = urtw_8187_write_phy_ofdm_c(sc, val, data);      \
 161         if (error != 0)                                         \
 162                 goto fail;                                      \
 163 } while (0)
 164 #define urtw_8187_write_phy_cck(sc, val, data)  do {            \
 165         error = urtw_8187_write_phy_cck_c(sc, val, data);       \
 166         if (error != 0)                                         \
 167                 goto fail;                                      \
 168 } while (0)
 169 #define urtw_8225_write(sc, val, data)  do {                    \
 170         error = urtw_8225_write_c(sc, val, data);               \
 171         if (error != 0)                                         \
 172                 goto fail;                                      \
 173 } while (0)
 174
 175 struct urtw_pair {
 176         uint32_t        reg;
 177         uint32_t        val;
 178 };
 179
 180 static uint8_t urtw_8225_agc[] = {
 181         0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b,
 182         0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90,
 183         0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85,
 184         0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a,
 185         0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f,
 186         0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24,
 187         0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19,
 188         0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e,
 189         0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03,
 190         0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
 191         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
 192         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
 193 };
 194
 195 static uint8_t urtw_8225z2_agc[] = {
 196         0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51,
 197         0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b,
 198         0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25,
 199         0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f,
 200         0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01,
 201         0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19,
 202         0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23,
 203         0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a,
 204         0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d,
 205         0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31,
 206         0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
 207         0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31
 208 };
 209
 210 static uint32_t urtw_8225_channel[] = {
 211         0x0000,         /* dummy channel 0  */
 212         0x085c,         /* 1  */
 213         0x08dc,         /* 2  */
 214         0x095c,         /* 3  */
 215         0x09dc,         /* 4  */
 216         0x0a5c,         /* 5  */
 217         0x0adc,         /* 6  */
 218         0x0b5c,         /* 7  */
 219         0x0bdc,         /* 8  */
 220         0x0c5c,         /* 9  */
 221         0x0cdc,         /* 10  */
 222         0x0d5c,         /* 11  */
 223         0x0ddc,         /* 12  */
 224         0x0e5c,         /* 13  */
 225         0x0f72,         /* 14  */
 226 };
 227
 228 static uint8_t urtw_8225_gain[] = {
 229         0x23, 0x88, 0x7c, 0xa5,         /* -82dbm  */
 230         0x23, 0x88, 0x7c, 0xb5,         /* -82dbm  */
 231         0x23, 0x88, 0x7c, 0xc5,         /* -82dbm  */
 232         0x33, 0x80, 0x79, 0xc5,         /* -78dbm  */
 233         0x43, 0x78, 0x76, 0xc5,         /* -74dbm  */
 234         0x53, 0x60, 0x73, 0xc5,         /* -70dbm  */
 235         0x63, 0x58, 0x70, 0xc5,         /* -66dbm  */
 236 };
 237
 238 static struct urtw_pair urtw_8225_rf_part1[] = {
 239         { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
 240         { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a },
 241         { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 },
 242         { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 },
 243 };
 244
 245 static struct urtw_pair urtw_8225_rf_part2[] = {
 246         { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
 247         { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
 248         { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 },
 249         { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 },
 250         { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 },
 251         { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef },
 252         { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 },
 253         { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 },
 254         { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 },
 255         { 0x27, 0x88 }
 256 };
 257
 258 static struct urtw_pair urtw_8225_rf_part3[] = {
 259         { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
 260         { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b },
 261         { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 },
 262         { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d },
 263         { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e },
 264         { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a },
 265         { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 }
 266 };
 267
 268 static uint16_t urtw_8225_rxgain[] = {
 269         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
 270         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
 271         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
 272         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
 273         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
 274         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
 275         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
 276         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
 277         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
 278         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
 279         0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3,
 280         0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb
 281 };
 282
 283 static uint8_t urtw_8225_threshold[] = {
 284         0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd,
 285 };
 286
 287 static uint8_t urtw_8225_tx_gain_cck_ofdm[] = {
 288         0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e
 289 };
 290
 291 static uint8_t urtw_8225_txpwr_cck[] = {
 292         0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02,
 293         0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02,
 294         0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02,
 295         0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02,
 296         0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03,
 297         0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03
 298 };
 299
 300 static uint8_t urtw_8225_txpwr_cck_ch14[] = {
 301         0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00,
 302         0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00,
 303         0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00,
 304         0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00,
 305         0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00,
 306         0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00
 307 };
 308
 309 static uint8_t urtw_8225_txpwr_ofdm[]={
 310         0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4
 311 };
 312
 313 static uint8_t urtw_8225v2_gain_bg[]={
 314         0x23, 0x15, 0xa5,               /* -82-1dbm  */
 315         0x23, 0x15, 0xb5,               /* -82-2dbm  */
 316         0x23, 0x15, 0xc5,               /* -82-3dbm  */
 317         0x33, 0x15, 0xc5,               /* -78dbm  */
 318         0x43, 0x15, 0xc5,               /* -74dbm  */
 319         0x53, 0x15, 0xc5,               /* -70dbm  */
 320         0x63, 0x15, 0xc5,               /* -66dbm  */
 321 };
 322
 323 static struct urtw_pair urtw_8225v2_rf_part1[] = {
 324         { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
 325         { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
 326         { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
 327         { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
 328 };
 329
 330 static struct urtw_pair urtw_8225v2b_rf_part0[] = {
 331         { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 },
 332         { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a },
 333         { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb },
 334         { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 }
 335 };
 336
 337 static struct urtw_pair urtw_8225v2b_rf_part1[] = {
 338         {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00},
 339         {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43},
 340         {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46},
 341         {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00},
 342         {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00},
 343         {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00},
 344         {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b},
 345         {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09},
 346         {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff},
 347         {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e},
 348         {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03},
 349         {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06},
 350         {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00},
 351         {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68},
 352         {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d},
 353         {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08},
 354         {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04},
 355         {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23},
 356         {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08},
 357         {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08},
 358         {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08},
 359         {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56},
 360         {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f},
 361         {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24},
 362         {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07},
 363         {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12},
 364         {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a},
 365         {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80},
 366         {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03},
 367         {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01},
 368         {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00}
 369 };
 370
 371 static struct urtw_pair urtw_8225v2_rf_part2[] = {
 372         { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 },
 373         { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 },
 374         { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 },
 375         { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 },
 376         { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 },
 377         { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 },
 378         { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 },
 379         { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 },
 380         { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 },
 381         { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 }
 382 };
 383
 384 static struct urtw_pair urtw_8225v2b_rf_part2[] = {
 385         { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 },
 386         { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 },
 387         { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 },
 388         { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 },
 389         { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 },
 390         { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 },
 391         { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 },
 392         { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 },
 393         { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a },
 394         { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f },
 395         { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 },
 396         { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 },
 397         { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 },
 398         { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e },
 399         { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 }
 400 };
 401
 402 static struct urtw_pair urtw_8225v2_rf_part3[] = {
 403         { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 },
 404         { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 },
 405         { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 },
 406         { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 },
 407         { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d },
 408         { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 },
 409         { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 },
 410         { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 }
 411 };
 412
 413 static uint16_t urtw_8225v2_rxgain[] = {
 414         0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009,
 415         0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141,
 416         0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183,
 417         0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244,
 418         0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288,
 419         0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345,
 420         0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389,
 421         0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393,
 422         0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d,
 423         0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9,
 424         0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
 425         0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
 426 };
 427
 428 static uint16_t urtw_8225v2b_rxgain[] = {
 429         0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409,
 430         0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541,
 431         0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583,
 432         0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644,
 433         0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688,
 434         0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745,
 435         0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789,
 436         0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793,
 437         0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d,
 438         0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9,
 439         0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3,
 440         0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb
 441 };
 442
 443 static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = {
 444         0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
 445         0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
 446         0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
 447         0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
 448         0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
 449         0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
 450 };
 451
 452 static uint8_t urtw_8225v2_txpwr_cck[] = {
 453         0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04
 454 };
 455
 456 static uint8_t urtw_8225v2_txpwr_cck_ch14[] = {
 457         0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00
 458 };
 459
 460 static uint8_t urtw_8225v2b_txpwr_cck[] = {
 461         0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04,
 462         0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03,
 463         0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03,
 464         0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03
 465 };
 466
 467 static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = {
 468         0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00,
 469         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
 470         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00,
 471         0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00
 472 };
 473
 474 static struct urtw_pair urtw_ratetable[] = {
 475         {  2,  0 }, {   4,  1 }, { 11, 2 }, { 12, 4 }, { 18, 5 },
 476         { 22,  3 }, {  24,  6 }, { 36, 7 }, { 48, 8 }, { 72, 9 },
 477         { 96, 10 }, { 108, 11 }
 478 };
 479
 480 static const uint8_t urtw_8187b_reg_table[][3] = {
 481         { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 },
 482         { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 },
 483         { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 },
 484         { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 },
 485         { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 },
 486         { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 },
 487         { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 },
 488         { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 },
 489         { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 },
 490         { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 },
 491         { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 },
 492         { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 },
 493         { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 },
 494         { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 },
 495         { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 },
 496         { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 },
 497         { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 },
 498         { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 },
 499         { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 },
 500         { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 },
 501         { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 },
 502         { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 },
 503         { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 },
 504         { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 },
 505         { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 },
 506         { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 },
 507         { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 },
 508         { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 },
 509         { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 },
 510         { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 },
 511         { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 }
 512 };
 513
 514 static usb_callback_t urtw_bulk_rx_callback;
 515 static usb_callback_t urtw_bulk_tx_callback;
 516 static usb_callback_t urtw_bulk_tx_status_callback;
 517
 518 static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = {
 519         [URTW_8187B_BULK_RX] = {
 520                 .type = UE_BULK,
 521                 .endpoint = 0x83,
 522                 .direction = UE_DIR_IN,
 523                 .bufsize = MCLBYTES,
 524                 .flags = {
 525                         .ext_buffer = 1,
 526                         .pipe_bof = 1,
 527                         .short_xfer_ok = 1
 528                 },
 529                 .callback = urtw_bulk_rx_callback
 530         },
 531         [URTW_8187B_BULK_TX_STATUS] = {
 532                 .type = UE_BULK,
 533                 .endpoint = 0x89,
 534                 .direction = UE_DIR_IN,
 535                 .bufsize = sizeof(uint64_t),
 536                 .flags = {
 537                         .pipe_bof = 1,
 538                         .short_xfer_ok = 1
 539                 },
 540                 .callback = urtw_bulk_tx_status_callback
 541         },
 542         [URTW_8187B_BULK_TX_BE] = {
 543                 .type = UE_BULK,
 544                 .endpoint = URTW_8187B_TXPIPE_BE,
 545                 .direction = UE_DIR_OUT,
 546                 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
 547                 .flags = {
 548                         .force_short_xfer = 1,
 549                         .pipe_bof = 1,
 550                 },
 551                 .callback = urtw_bulk_tx_callback,
 552                 .timeout = URTW_DATA_TIMEOUT
 553         },
 554         [URTW_8187B_BULK_TX_BK] = {
 555                 .type = UE_BULK,
 556                 .endpoint = URTW_8187B_TXPIPE_BK,
 557                 .direction = UE_DIR_OUT,
 558                 .bufsize = URTW_TX_MAXSIZE,
 559                 .flags = {
 560                         .ext_buffer = 1,
 561                         .force_short_xfer = 1,
 562                         .pipe_bof = 1,
 563                 },
 564                 .callback = urtw_bulk_tx_callback,
 565                 .timeout = URTW_DATA_TIMEOUT
 566         },
 567         [URTW_8187B_BULK_TX_VI] = {
 568                 .type = UE_BULK,
 569                 .endpoint = URTW_8187B_TXPIPE_VI,
 570                 .direction = UE_DIR_OUT,
 571                 .bufsize = URTW_TX_MAXSIZE,
 572                 .flags = {
 573                         .ext_buffer = 1,
 574                         .force_short_xfer = 1,
 575                         .pipe_bof = 1,
 576                 },
 577                 .callback = urtw_bulk_tx_callback,
 578                 .timeout = URTW_DATA_TIMEOUT
 579         },
 580         [URTW_8187B_BULK_TX_VO] = {
 581                 .type = UE_BULK,
 582                 .endpoint = URTW_8187B_TXPIPE_VO,
 583                 .direction = UE_DIR_OUT,
 584                 .bufsize = URTW_TX_MAXSIZE,
 585                 .flags = {
 586                         .ext_buffer = 1,
 587                         .force_short_xfer = 1,
 588                         .pipe_bof = 1,
 589                 },
 590                 .callback = urtw_bulk_tx_callback,
 591                 .timeout = URTW_DATA_TIMEOUT
 592         },
 593         [URTW_8187B_BULK_TX_EP12] = {
 594                 .type = UE_BULK,
 595                 .endpoint = 0xc,
 596                 .direction = UE_DIR_OUT,
 597                 .bufsize = URTW_TX_MAXSIZE,
 598                 .flags = {
 599                         .ext_buffer = 1,
 600                         .force_short_xfer = 1,
 601                         .pipe_bof = 1,
 602                 },
 603                 .callback = urtw_bulk_tx_callback,
 604                 .timeout = URTW_DATA_TIMEOUT
 605         }
 606 };
 607
 608 static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = {
 609         [URTW_8187L_BULK_RX] = {
 610                 .type = UE_BULK,
 611                 .endpoint = 0x81,
 612                 .direction = UE_DIR_IN,
 613                 .bufsize = MCLBYTES,
 614                 .flags = {
 615                         .ext_buffer = 1,
 616                         .pipe_bof = 1,
 617                         .short_xfer_ok = 1
 618                 },
 619                 .callback = urtw_bulk_rx_callback
 620         },
 621         [URTW_8187L_BULK_TX_LOW] = {
 622                 .type = UE_BULK,
 623                 .endpoint = 0x2,
 624                 .direction = UE_DIR_OUT,
 625                 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT,
 626                 .flags = {
 627                         .force_short_xfer = 1,
 628                         .pipe_bof = 1,
 629                 },
 630                 .callback = urtw_bulk_tx_callback,
 631                 .timeout = URTW_DATA_TIMEOUT
 632         },
 633         [URTW_8187L_BULK_TX_NORMAL] = {
 634                 .type = UE_BULK,
 635                 .endpoint = 0x3,
 636                 .direction = UE_DIR_OUT,
 637                 .bufsize = URTW_TX_MAXSIZE,
 638                 .flags = {
 639                         .ext_buffer = 1,
 640                         .force_short_xfer = 1,
 641                         .pipe_bof = 1,
 642                 },
 643                 .callback = urtw_bulk_tx_callback,
 644                 .timeout = URTW_DATA_TIMEOUT
 645         },
 646 };
 647
 648 static struct ieee80211vap *urtw_vap_create(struct ieee80211com *,
 649                             const char [IFNAMSIZ], int, enum ieee80211_opmode,
 650                             int, const uint8_t [IEEE80211_ADDR_LEN],
 651                             const uint8_t [IEEE80211_ADDR_LEN]);
 652 static void             urtw_vap_delete(struct ieee80211vap *);
 653 static void             urtw_init(void *);
 654 static void             urtw_stop(struct ifnet *);
 655 static void             urtw_stop_locked(struct ifnet *);
 656 static int              urtw_ioctl(struct ifnet *, u_long, caddr_t);
 657 static void             urtw_start(struct ifnet *);
 658 static int              urtw_alloc_rx_data_list(struct urtw_softc *);
 659 static int              urtw_alloc_tx_data_list(struct urtw_softc *);
 660 static int              urtw_raw_xmit(struct ieee80211_node *, struct mbuf *,
 661                             const struct ieee80211_bpf_params *);
 662 static void             urtw_scan_start(struct ieee80211com *);
 663 static void             urtw_scan_end(struct ieee80211com *);
 664 static void             urtw_set_channel(struct ieee80211com *);
 665 static void             urtw_update_mcast(struct ifnet *);
 666 static int              urtw_tx_start(struct urtw_softc *,
 667                             struct ieee80211_node *, struct mbuf *,
 668                             struct urtw_data *, int);
 669 static int              urtw_newstate(struct ieee80211vap *,
 670                             enum ieee80211_state, int);
 671 static void             urtw_led_ch(void *);
 672 static void             urtw_ledtask(void *, int);
 673 static void             urtw_watchdog(void *);
 674 static void             urtw_set_multi(void *);
 675 static int              urtw_isbmode(uint16_t);
 676 static uint16_t         urtw_rate2rtl(uint32_t);
 677 static uint16_t         urtw_rtl2rate(uint32_t);
 678 static usb_error_t      urtw_set_rate(struct urtw_softc *);
 679 static usb_error_t      urtw_update_msr(struct urtw_softc *);
 680 static usb_error_t      urtw_read8_c(struct urtw_softc *, int, uint8_t *);
 681 static usb_error_t      urtw_read16_c(struct urtw_softc *, int, uint16_t *);
 682 static usb_error_t      urtw_read32_c(struct urtw_softc *, int, uint32_t *);
 683 static usb_error_t      urtw_write8_c(struct urtw_softc *, int, uint8_t);
 684 static usb_error_t      urtw_write16_c(struct urtw_softc *, int, uint16_t);
 685 static usb_error_t      urtw_write32_c(struct urtw_softc *, int, uint32_t);
 686 static usb_error_t      urtw_eprom_cs(struct urtw_softc *, int);
 687 static usb_error_t      urtw_eprom_ck(struct urtw_softc *);
 688 static usb_error_t      urtw_eprom_sendbits(struct urtw_softc *, int16_t *,
 689                             int);
 690 static usb_error_t      urtw_eprom_read32(struct urtw_softc *, uint32_t,
 691                             uint32_t *);
 692 static usb_error_t      urtw_eprom_readbit(struct urtw_softc *, int16_t *);
 693 static usb_error_t      urtw_eprom_writebit(struct urtw_softc *, int16_t);
 694 static usb_error_t      urtw_get_macaddr(struct urtw_softc *);
 695 static usb_error_t      urtw_get_txpwr(struct urtw_softc *);
 696 static usb_error_t      urtw_get_rfchip(struct urtw_softc *);
 697 static usb_error_t      urtw_led_init(struct urtw_softc *);
 698 static usb_error_t      urtw_8185_rf_pins_enable(struct urtw_softc *);
 699 static usb_error_t      urtw_8185_tx_antenna(struct urtw_softc *, uint8_t);
 700 static usb_error_t      urtw_8187_write_phy(struct urtw_softc *, uint8_t,
 701                             uint32_t);
 702 static usb_error_t      urtw_8187_write_phy_ofdm_c(struct urtw_softc *,
 703                             uint8_t, uint32_t);
 704 static usb_error_t      urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t,
 705                             uint32_t);
 706 static usb_error_t      urtw_8225_setgain(struct urtw_softc *, int16_t);
 707 static usb_error_t      urtw_8225_usb_init(struct urtw_softc *);
 708 static usb_error_t      urtw_8225_write_c(struct urtw_softc *, uint8_t,
 709                             uint16_t);
 710 static usb_error_t      urtw_8225_write_s16(struct urtw_softc *, uint8_t, int,
 711                             uint16_t *);
 712 static usb_error_t      urtw_8225_read(struct urtw_softc *, uint8_t,
 713                             uint32_t *);
 714 static usb_error_t      urtw_8225_rf_init(struct urtw_softc *);
 715 static usb_error_t      urtw_8225_rf_set_chan(struct urtw_softc *, int);
 716 static usb_error_t      urtw_8225_rf_set_sens(struct urtw_softc *, int);
 717 static usb_error_t      urtw_8225_set_txpwrlvl(struct urtw_softc *, int);
 718 static usb_error_t      urtw_8225_rf_stop(struct urtw_softc *);
 719 static usb_error_t      urtw_8225v2_rf_init(struct urtw_softc *);
 720 static usb_error_t      urtw_8225v2_rf_set_chan(struct urtw_softc *, int);
 721 static usb_error_t      urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int);
 722 static usb_error_t      urtw_8225v2_setgain(struct urtw_softc *, int16_t);
 723 static usb_error_t      urtw_8225_isv2(struct urtw_softc *, int *);
 724 static usb_error_t      urtw_8225v2b_rf_init(struct urtw_softc *);
 725 static usb_error_t      urtw_8225v2b_rf_set_chan(struct urtw_softc *, int);
 726 static usb_error_t      urtw_read8e(struct urtw_softc *, int, uint8_t *);
 727 static usb_error_t      urtw_write8e(struct urtw_softc *, int, uint8_t);
 728 static usb_error_t      urtw_8180_set_anaparam(struct urtw_softc *, uint32_t);
 729 static usb_error_t      urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t);
 730 static usb_error_t      urtw_intr_enable(struct urtw_softc *);
 731 static usb_error_t      urtw_intr_disable(struct urtw_softc *);
 732 static usb_error_t      urtw_reset(struct urtw_softc *);
 733 static usb_error_t      urtw_led_on(struct urtw_softc *, int);
 734 static usb_error_t      urtw_led_ctl(struct urtw_softc *, int);
 735 static usb_error_t      urtw_led_blink(struct urtw_softc *);
 736 static usb_error_t      urtw_led_mode0(struct urtw_softc *, int);
 737 static usb_error_t      urtw_led_mode1(struct urtw_softc *, int);
 738 static usb_error_t      urtw_led_mode2(struct urtw_softc *, int);
 739 static usb_error_t      urtw_led_mode3(struct urtw_softc *, int);
 740 static usb_error_t      urtw_rx_setconf(struct urtw_softc *);
 741 static usb_error_t      urtw_rx_enable(struct urtw_softc *);
 742 static usb_error_t      urtw_tx_enable(struct urtw_softc *sc);
 743 static void             urtw_free_tx_data_list(struct urtw_softc *);
 744 static void             urtw_free_rx_data_list(struct urtw_softc *);
 745 static void             urtw_free_data_list(struct urtw_softc *,
 746                             struct urtw_data data[], int, int);
 747 static usb_error_t      urtw_adapter_start(struct urtw_softc *);
 748 static usb_error_t      urtw_adapter_start_b(struct urtw_softc *);
 749 static usb_error_t      urtw_set_mode(struct urtw_softc *, uint32_t);
 750 static usb_error_t      urtw_8187b_cmd_reset(struct urtw_softc *);
 751 static usb_error_t      urtw_do_request(struct urtw_softc *,
 752                             struct usb_device_request *, void *);
 753 static usb_error_t      urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int);
 754 static usb_error_t      urtw_led_off(struct urtw_softc *, int);
 755 static void             urtw_abort_xfers(struct urtw_softc *);
 756 static struct urtw_data *
 757                         urtw_getbuf(struct urtw_softc *sc);
 758 static int              urtw_compute_txtime(uint16_t, uint16_t, uint8_t,
 759                             uint8_t);
 760 static void             urtw_updateslot(struct ifnet *);
 761 static void             urtw_updateslottask(void *, int);
 762 static void             urtw_sysctl_node(struct urtw_softc *);
 763
 764 static int
 765 urtw_match(device_t dev)
 766 {
 767         struct usb_attach_arg *uaa = device_get_ivars(dev);
 768
 769         if (uaa->usb_mode != USB_MODE_HOST)
 770                 return (ENXIO);
 771         if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX)
 772                 return (ENXIO);
 773         if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX)
 774                 return (ENXIO);
 775
 776         return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa));
 777 }
 778
 779 static int
 780 urtw_attach(device_t dev)
 781 {
 782         const struct usb_config *setup_start;
 783         int ret = ENXIO;
 784         struct urtw_softc *sc = device_get_softc(dev);
 785         struct usb_attach_arg *uaa = device_get_ivars(dev);
 786         struct ieee80211com *ic;
 787         struct ifnet *ifp;
 788         uint8_t bands, iface_index = URTW_IFACE_INDEX;          /* XXX */
 789         uint16_t n_setup;
 790         uint32_t data;
 791         usb_error_t error;
 792
 793         device_set_usb_desc(dev);
 794
 795         sc->sc_dev = dev;
 796         sc->sc_udev = uaa->device;
 797         if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B)
 798                 sc->sc_flags |= URTW_RTL8187B;
 799 #ifdef URTW_DEBUG
 800         sc->sc_debug = urtw_debug;
 801 #endif
 802
 803         mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK,
 804             MTX_DEF);
 805         usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0);
 806         TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc);
 807         TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc);
 808         callout_init(&sc->sc_watchdog_ch, 0);
 809
 810         if (sc->sc_flags & URTW_RTL8187B) {
 811                 setup_start = urtw_8187b_usbconfig;
 812                 n_setup = URTW_8187B_N_XFERS;
 813         } else {
 814                 setup_start = urtw_8187l_usbconfig;
 815                 n_setup = URTW_8187L_N_XFERS;
 816         }
 817
 818         error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
 819             setup_start, n_setup, sc, &sc->sc_mtx);
 820         if (error) {
 821                 device_printf(dev, "could not allocate USB transfers, "
 822                     "err=%s\n", usbd_errstr(error));
 823                 ret = ENXIO;
 824                 goto fail0;
 825         }
 826
 827         if (sc->sc_flags & URTW_RTL8187B) {
 828                 sc->sc_tx_dma_buf =
 829                     usbd_xfer_get_frame_buffer(sc->sc_xfer[
 830                     URTW_8187B_BULK_TX_BE], 0);
 831         } else {
 832                 sc->sc_tx_dma_buf =
 833                     usbd_xfer_get_frame_buffer(sc->sc_xfer[
 834                     URTW_8187L_BULK_TX_LOW], 0);
 835         }
 836
 837         URTW_LOCK(sc);
 838
 839         urtw_read32_m(sc, URTW_RX, &data);
 840         sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 :
 841             URTW_EEPROM_93C46;
 842
 843         error = urtw_get_rfchip(sc);
 844         if (error != 0)
 845                 goto fail;
 846         error = urtw_get_macaddr(sc);
 847         if (error != 0)
 848                 goto fail;
 849         error = urtw_get_txpwr(sc);
 850         if (error != 0)
 851                 goto fail;
 852         error = urtw_led_init(sc);
 853         if (error != 0)
 854                 goto fail;
 855
 856         URTW_UNLOCK(sc);
 857
 858         sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY;
 859         sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY;
 860         sc->sc_currate = 3;
 861         sc->sc_preamble_mode = urtw_preamble_mode;
 862
 863         ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
 864         if (ifp == NULL) {
 865                 device_printf(sc->sc_dev, "can not allocate ifnet\n");
 866                 ret = ENOMEM;
 867                 goto fail1;
 868         }
 869
 870         ifp->if_softc = sc;
 871         if_initname(ifp, "urtw", device_get_unit(sc->sc_dev));
 872         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 873         ifp->if_init = urtw_init;
 874         ifp->if_ioctl = urtw_ioctl;
 875         ifp->if_start = urtw_start;
 876         /* XXX URTW_TX_DATA_LIST_COUNT */
 877         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 878         ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
 879         IFQ_SET_READY(&ifp->if_snd);
 880
 881         ic = ifp->if_l2com;
 882         ic->ic_ifp = ifp;
 883         ic->ic_phytype = IEEE80211_T_OFDM;      /* not only, but not used */
 884         ic->ic_opmode = IEEE80211_M_STA;        /* default to BSS mode */
 885
 886         /* set device capabilities */
 887         ic->ic_caps =
 888             IEEE80211_C_STA |           /* station mode */
 889             IEEE80211_C_MONITOR |       /* monitor mode supported */
 890             IEEE80211_C_TXPMGT |        /* tx power management */
 891             IEEE80211_C_SHPREAMBLE |    /* short preamble supported */
 892             IEEE80211_C_SHSLOT |        /* short slot time supported */
 893             IEEE80211_C_BGSCAN |        /* capable of bg scanning */
 894             IEEE80211_C_WPA;            /* 802.11i */
 895
 896         bands = 0;
 897         setbit(&bands, IEEE80211_MODE_11B);
 898         setbit(&bands, IEEE80211_MODE_11G);
 899         ieee80211_init_channels(ic, NULL, &bands);
 900
 901         ieee80211_ifattach(ic, sc->sc_bssid);
 902         ic->ic_raw_xmit = urtw_raw_xmit;
 903         ic->ic_scan_start = urtw_scan_start;
 904         ic->ic_scan_end = urtw_scan_end;
 905         ic->ic_set_channel = urtw_set_channel;
 906         ic->ic_updateslot = urtw_updateslot;
 907         ic->ic_vap_create = urtw_vap_create;
 908         ic->ic_vap_delete = urtw_vap_delete;
 909         ic->ic_update_mcast = urtw_update_mcast;
 910
 911         ieee80211_radiotap_attach(ic,
 912             &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
 913             URTW_TX_RADIOTAP_PRESENT,
 914             &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
 915             URTW_RX_RADIOTAP_PRESENT);
 916
 917         urtw_sysctl_node(sc);
 918
 919         if (bootverbose)
 920                 ieee80211_announce(ic);
 921         return (0);
 922
 923 fail:   URTW_UNLOCK(sc);
 924 fail1:  usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ?
 925             URTW_8187B_N_XFERS : URTW_8187L_N_XFERS);
 926 fail0:
 927         return (ret);
 928 }
 929
 930 static int
 931 urtw_detach(device_t dev)
 932 {
 933         struct urtw_softc *sc = device_get_softc(dev);
 934         struct ifnet *ifp = sc->sc_ifp;
 935         struct ieee80211com *ic = ifp->if_l2com;
 936         unsigned int x;
 937         unsigned int n_xfers;
 938
 939         /* Prevent further ioctls */
 940         URTW_LOCK(sc);
 941         sc->sc_flags |= URTW_DETACHED;
 942         URTW_UNLOCK(sc);
 943
 944         urtw_stop(ifp);
 945
 946         ieee80211_draintask(ic, &sc->sc_updateslot_task);
 947         ieee80211_draintask(ic, &sc->sc_led_task);
 948
 949         usb_callout_drain(&sc->sc_led_ch);
 950         callout_drain(&sc->sc_watchdog_ch);
 951
 952         n_xfers = (sc->sc_flags & URTW_RTL8187B) ?
 953             URTW_8187B_N_XFERS : URTW_8187L_N_XFERS;
 954
 955         /* prevent further allocations from RX/TX data lists */
 956         URTW_LOCK(sc);
 957         STAILQ_INIT(&sc->sc_tx_active);
 958         STAILQ_INIT(&sc->sc_tx_inactive);
 959         STAILQ_INIT(&sc->sc_tx_pending);
 960
 961         STAILQ_INIT(&sc->sc_rx_active);
 962         STAILQ_INIT(&sc->sc_rx_inactive);
 963         URTW_UNLOCK(sc);
 964
 965         /* drain USB transfers */
 966         for (x = 0; x != n_xfers; x++)
 967                 usbd_transfer_drain(sc->sc_xfer[x]);
 968
 969         /* free data buffers */
 970         URTW_LOCK(sc);
 971         urtw_free_tx_data_list(sc);
 972         urtw_free_rx_data_list(sc);
 973         URTW_UNLOCK(sc);
 974
 975         /* free USB transfers and some data buffers */
 976         usbd_transfer_unsetup(sc->sc_xfer, n_xfers);
 977
 978         ieee80211_ifdetach(ic);
 979         if_free(ifp);
 980         mtx_destroy(&sc->sc_mtx);
 981         return (0);
 982 }
 983
 984 static void
 985 urtw_free_tx_data_list(struct urtw_softc *sc)
 986 {
 987         urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0);
 988 }
 989
 990 static void
 991 urtw_free_rx_data_list(struct urtw_softc *sc)
 992 {
 993         urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1);
 994 }
 995
 996 static void
 997 urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata,
 998     int fillmbuf)
 999 {
1000         int i;
1001
1002         for (i = 0; i < ndata; i++) {
1003                 struct urtw_data *dp = &data[i];
1004
1005                 if (fillmbuf == 1) {
1006                         if (dp->m != NULL) {
1007                                 m_freem(dp->m);
1008                                 dp->m = NULL;
1009                                 dp->buf = NULL;
1010                         }
1011                 } else {
1012                         dp->buf = NULL;
1013                 }
1014                 if (dp->ni != NULL) {
1015                         ieee80211_free_node(dp->ni);
1016                         dp->ni = NULL;
1017                 }
1018         }
1019 }
1020
1021 static struct ieee80211vap *
1022 urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
1023     enum ieee80211_opmode opmode, int flags,
1024     const uint8_t bssid[IEEE80211_ADDR_LEN],
1025     const uint8_t mac[IEEE80211_ADDR_LEN])
1026 {
1027         struct urtw_vap *uvp;
1028         struct ieee80211vap *vap;
1029
1030         if (!TAILQ_EMPTY(&ic->ic_vaps))         /* only one at a time */
1031                 return (NULL);
1032         uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap),
1033             M_80211_VAP, M_NOWAIT | M_ZERO);
1034         if (uvp == NULL)
1035                 return (NULL);
1036         vap = &uvp->vap;
1037         /* enable s/w bmiss handling for sta mode */
1038
1039         if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
1040             flags | IEEE80211_CLONE_NOBEACONS, bssid, mac) != 0) {
1041                 /* out of memory */
1042                 free(uvp, M_80211_VAP);
1043                 return (NULL);
1044         }
1045
1046         /* override state transition machine */
1047         uvp->newstate = vap->iv_newstate;
1048         vap->iv_newstate = urtw_newstate;
1049
1050         /* complete setup */
1051         ieee80211_vap_attach(vap, ieee80211_media_change,
1052             ieee80211_media_status);
1053         ic->ic_opmode = opmode;
1054         return (vap);
1055 }
1056
1057 static void
1058 urtw_vap_delete(struct ieee80211vap *vap)
1059 {
1060         struct urtw_vap *uvp = URTW_VAP(vap);
1061
1062         ieee80211_vap_detach(vap);
1063         free(uvp, M_80211_VAP);
1064 }
1065
1066 static void
1067 urtw_init_locked(void *arg)
1068 {
1069         int ret;
1070         struct urtw_softc *sc = arg;
1071         struct ifnet *ifp = sc->sc_ifp;
1072         usb_error_t error;
1073
1074         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1075                 urtw_stop_locked(ifp);
1076
1077         error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) :
1078             urtw_adapter_start(sc);
1079         if (error != 0)
1080                 goto fail;
1081
1082         /* reset softc variables  */
1083         sc->sc_txtimer = 0;
1084
1085         if (!(sc->sc_flags & URTW_INIT_ONCE)) {
1086                 ret = urtw_alloc_rx_data_list(sc);
1087                 if (ret != 0)
1088                         goto fail;
1089                 ret = urtw_alloc_tx_data_list(sc);
1090                 if (ret != 0)
1091                         goto fail;
1092                 sc->sc_flags |= URTW_INIT_ONCE;
1093         }
1094
1095         error = urtw_rx_enable(sc);
1096         if (error != 0)
1097                 goto fail;
1098         error = urtw_tx_enable(sc);
1099         if (error != 0)
1100                 goto fail;
1101
1102         if (sc->sc_flags & URTW_RTL8187B)
1103                 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]);
1104
1105         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1106         ifp->if_drv_flags |= IFF_DRV_RUNNING;
1107
1108         callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1109 fail:
1110         return;
1111 }
1112
1113 static void
1114 urtw_init(void *arg)
1115 {
1116         struct urtw_softc *sc = arg;
1117
1118         URTW_LOCK(sc);
1119         urtw_init_locked(arg);
1120         URTW_UNLOCK(sc);
1121 }
1122
1123 static usb_error_t
1124 urtw_adapter_start_b(struct urtw_softc *sc)
1125 {
1126 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
1127         uint8_t data8;
1128         usb_error_t error;
1129
1130         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1131         if (error)
1132                 goto fail;
1133
1134         urtw_read8_m(sc, URTW_CONFIG3, &data8);
1135         urtw_write8_m(sc, URTW_CONFIG3,
1136             data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT);
1137         urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON);
1138         urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON);
1139         urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON);
1140
1141         urtw_write8_m(sc, 0x61, 0x10);
1142         urtw_read8_m(sc, 0x62, &data8);
1143         urtw_write8_m(sc, 0x62, data8 & ~(1 << 5));
1144         urtw_write8_m(sc, 0x62, data8 | (1 << 5));
1145
1146         urtw_read8_m(sc, URTW_CONFIG3, &data8);
1147         data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE;
1148         urtw_write8_m(sc, URTW_CONFIG3, data8);
1149
1150         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1151         if (error)
1152                 goto fail;
1153
1154         error = urtw_8187b_cmd_reset(sc);
1155         if (error)
1156                 goto fail;
1157
1158         error = sc->sc_rf_init(sc);
1159         if (error != 0)
1160                 goto fail;
1161         urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1162
1163         /* fix RTL8187B RX stall */
1164         error = urtw_intr_enable(sc);
1165         if (error)
1166                 goto fail;
1167
1168         error = urtw_write8e(sc, 0x41, 0xf4);
1169         if (error)
1170                 goto fail;
1171         error = urtw_write8e(sc, 0x40, 0x00);
1172         if (error)
1173                 goto fail;
1174         error = urtw_write8e(sc, 0x42, 0x00);
1175         if (error)
1176                 goto fail;
1177         error = urtw_write8e(sc, 0x42, 0x01);
1178         if (error)
1179                 goto fail;
1180         error = urtw_write8e(sc, 0x40, 0x0f);
1181         if (error)
1182                 goto fail;
1183         error = urtw_write8e(sc, 0x42, 0x00);
1184         if (error)
1185                 goto fail;
1186         error = urtw_write8e(sc, 0x42, 0x01);
1187         if (error)
1188                 goto fail;
1189
1190         urtw_read8_m(sc, 0xdb, &data8);
1191         urtw_write8_m(sc, 0xdb, data8 | (1 << 2));
1192         urtw_write16_m(sc, 0x372, 0x59fa);
1193         urtw_write16_m(sc, 0x374, 0x59d2);
1194         urtw_write16_m(sc, 0x376, 0x59d2);
1195         urtw_write16_m(sc, 0x378, 0x19fa);
1196         urtw_write16_m(sc, 0x37a, 0x19fa);
1197         urtw_write16_m(sc, 0x37c, 0x00d0);
1198         urtw_write8_m(sc, 0x61, 0);
1199
1200         urtw_write8_m(sc, 0x180, 0x0f);
1201         urtw_write8_m(sc, 0x183, 0x03);
1202         urtw_write8_m(sc, 0xda, 0x10);
1203         urtw_write8_m(sc, 0x24d, 0x08);
1204         urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b);
1205
1206         urtw_write16_m(sc, 0x1ec, 0x800);       /* RX MAX SIZE */
1207 fail:
1208         return (error);
1209 #undef N
1210 }
1211
1212 static usb_error_t
1213 urtw_adapter_start(struct urtw_softc *sc)
1214 {
1215         usb_error_t error;
1216
1217         error = urtw_reset(sc);
1218         if (error)
1219                 goto fail;
1220
1221         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0);
1222         urtw_write8_m(sc, URTW_GPIO, 0);
1223
1224         /* for led  */
1225         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1226         error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON);
1227         if (error != 0)
1228                 goto fail;
1229
1230         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1231         if (error)
1232                 goto fail;
1233         /* applying MAC address again.  */
1234         urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]);
1235         urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff);
1236         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1237         if (error)
1238                 goto fail;
1239
1240         error = urtw_update_msr(sc);
1241         if (error)
1242                 goto fail;
1243
1244         urtw_write32_m(sc, URTW_INT_TIMEOUT, 0);
1245         urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
1246         urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1);
1247         error = urtw_set_rate(sc);
1248         if (error != 0)
1249                 goto fail;
1250
1251         error = sc->sc_rf_init(sc);
1252         if (error != 0)
1253                 goto fail;
1254         if (sc->sc_rf_set_sens != NULL)
1255                 sc->sc_rf_set_sens(sc, sc->sc_sens);
1256
1257         /* XXX correct? to call write16  */
1258         urtw_write16_m(sc, URTW_PSR, 1);
1259         urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10);
1260         urtw_write8_m(sc, URTW_TALLY_SEL, 0x80);
1261         urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60);
1262         /* XXX correct? to call write16  */
1263         urtw_write16_m(sc, URTW_PSR, 0);
1264         urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4);
1265
1266         error = urtw_intr_enable(sc);
1267         if (error != 0)
1268                 goto fail;
1269
1270 fail:
1271         return (error);
1272 }
1273
1274 static usb_error_t
1275 urtw_set_mode(struct urtw_softc *sc, uint32_t mode)
1276 {
1277         uint8_t data;
1278         usb_error_t error;
1279
1280         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
1281         data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT);
1282         data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK);
1283         urtw_write8_m(sc, URTW_EPROM_CMD, data);
1284 fail:
1285         return (error);
1286 }
1287
1288 static usb_error_t
1289 urtw_8187b_cmd_reset(struct urtw_softc *sc)
1290 {
1291         int i;
1292         uint8_t data8;
1293         usb_error_t error;
1294
1295         /* XXX the code can be duplicate with urtw_reset().  */
1296         urtw_read8_m(sc, URTW_CMD, &data8);
1297         data8 = (data8 & 0x2) | URTW_CMD_RST;
1298         urtw_write8_m(sc, URTW_CMD, data8);
1299
1300         for (i = 0; i < 20; i++) {
1301                 usb_pause_mtx(&sc->sc_mtx, 2);
1302                 urtw_read8_m(sc, URTW_CMD, &data8);
1303                 if (!(data8 & URTW_CMD_RST))
1304                         break;
1305         }
1306         if (i >= 20) {
1307                 device_printf(sc->sc_dev, "reset timeout\n");
1308                 goto fail;
1309         }
1310 fail:
1311         return (error);
1312 }
1313
1314 static usb_error_t
1315 urtw_do_request(struct urtw_softc *sc,
1316     struct usb_device_request *req, void *data)
1317 {
1318         usb_error_t err;
1319         int ntries = 10;
1320
1321         URTW_ASSERT_LOCKED(sc);
1322
1323         while (ntries--) {
1324                 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
1325                     req, data, 0, NULL, 250 /* ms */);
1326                 if (err == 0)
1327                         break;
1328
1329                 DPRINTF(sc, URTW_DEBUG_INIT,
1330                     "Control request failed, %s (retrying)\n",
1331                     usbd_errstr(err));
1332                 usb_pause_mtx(&sc->sc_mtx, hz / 100);
1333         }
1334         return (err);
1335 }
1336
1337 static void
1338 urtw_stop_locked(struct ifnet *ifp)
1339 {
1340         struct urtw_softc *sc = ifp->if_softc;
1341         uint8_t data8;
1342         usb_error_t error;
1343
1344         ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1345
1346         error = urtw_intr_disable(sc);
1347         if (error)
1348                 goto fail;
1349         urtw_read8_m(sc, URTW_CMD, &data8);
1350         data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE);
1351         urtw_write8_m(sc, URTW_CMD, data8);
1352
1353         error = sc->sc_rf_stop(sc);
1354         if (error != 0)
1355                 goto fail;
1356
1357         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
1358         if (error)
1359                 goto fail;
1360         urtw_read8_m(sc, URTW_CONFIG4, &data8);
1361         urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF);
1362         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
1363         if (error)
1364                 goto fail;
1365 fail:
1366         if (error)
1367                 device_printf(sc->sc_dev, "failed to stop (%s)\n",
1368                     usbd_errstr(error));
1369
1370         usb_callout_stop(&sc->sc_led_ch);
1371         callout_stop(&sc->sc_watchdog_ch);
1372
1373         urtw_abort_xfers(sc);
1374 }
1375
1376 static void
1377 urtw_stop(struct ifnet *ifp)
1378 {
1379         struct urtw_softc *sc = ifp->if_softc;
1380
1381         URTW_LOCK(sc);
1382         urtw_stop_locked(ifp);
1383         URTW_UNLOCK(sc);
1384 }
1385
1386 static void
1387 urtw_abort_xfers(struct urtw_softc *sc)
1388 {
1389         int i, max;
1390
1391         URTW_ASSERT_LOCKED(sc);
1392
1393         max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS :
1394             URTW_8187L_N_XFERS;
1395
1396         /* abort any pending transfers */
1397         for (i = 0; i < max; i++)
1398                 usbd_transfer_stop(sc->sc_xfer[i]);
1399 }
1400
1401 static int
1402 urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1403 {
1404         struct urtw_softc *sc = ifp->if_softc;
1405         struct ieee80211com *ic = ifp->if_l2com;
1406         struct ifreq *ifr = (struct ifreq *) data;
1407         int error;
1408         int startall = 0;
1409
1410         URTW_LOCK(sc);
1411         error = (sc->sc_flags & URTW_DETACHED) ? ENXIO : 0;
1412         URTW_UNLOCK(sc);
1413         if (error)
1414                 return (error);
1415
1416         switch (cmd) {
1417         case SIOCSIFFLAGS:
1418                 if (ifp->if_flags & IFF_UP) {
1419                         if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1420                                 if ((ifp->if_flags ^ sc->sc_if_flags) &
1421                                     (IFF_ALLMULTI | IFF_PROMISC))
1422                                         urtw_set_multi(sc);
1423                         } else {
1424                                 urtw_init(ifp->if_softc);
1425                                 startall = 1;
1426                         }
1427                 } else {
1428                         if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1429                                 urtw_stop(ifp);
1430                 }
1431                 sc->sc_if_flags = ifp->if_flags;
1432                 if (startall)
1433                         ieee80211_start_all(ic);
1434                 break;
1435         case SIOCGIFMEDIA:
1436                 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1437                 break;
1438         case SIOCGIFADDR:
1439                 error = ether_ioctl(ifp, cmd, data);
1440                 break;
1441         default:
1442                 error = EINVAL;
1443                 break;
1444         }
1445         return (error);
1446 }
1447
1448 static void
1449 urtw_start(struct ifnet *ifp)
1450 {
1451         struct urtw_data *bf;
1452         struct urtw_softc *sc = ifp->if_softc;
1453         struct ieee80211_node *ni;
1454         struct mbuf *m;
1455
1456         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1457                 return;
1458
1459         URTW_LOCK(sc);
1460         for (;;) {
1461                 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1462                 if (m == NULL)
1463                         break;
1464                 bf = urtw_getbuf(sc);
1465                 if (bf == NULL) {
1466                         IFQ_DRV_PREPEND(&ifp->if_snd, m);
1467                         break;
1468                 }
1469
1470                 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1471                 m->m_pkthdr.rcvif = NULL;
1472
1473                 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) {
1474                         ifp->if_oerrors++;
1475                         STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1476                         ieee80211_free_node(ni);
1477                         break;
1478                 }
1479
1480                 sc->sc_txtimer = 5;
1481                 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1482         }
1483         URTW_UNLOCK(sc);
1484 }
1485
1486 static int
1487 urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[],
1488     int ndata, int maxsz, void *dma_buf)
1489 {
1490         int i, error;
1491
1492         for (i = 0; i < ndata; i++) {
1493                 struct urtw_data *dp = &data[i];
1494
1495                 dp->sc = sc;
1496                 if (dma_buf == NULL) {
1497                         dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1498                         if (dp->m == NULL) {
1499                                 device_printf(sc->sc_dev,
1500                                     "could not allocate rx mbuf\n");
1501                                 error = ENOMEM;
1502                                 goto fail;
1503                         }
1504                         dp->buf = mtod(dp->m, uint8_t *);
1505                 } else {
1506                         dp->m = NULL;
1507                         dp->buf = ((uint8_t *)dma_buf) +
1508                             (i * maxsz);
1509                 }
1510                 dp->ni = NULL;
1511         }
1512         return (0);
1513
1514 fail:   urtw_free_data_list(sc, data, ndata, 1);
1515         return (error);
1516 }
1517
1518 static int
1519 urtw_alloc_rx_data_list(struct urtw_softc *sc)
1520 {
1521         int error, i;
1522
1523         error = urtw_alloc_data_list(sc,
1524             sc->sc_rx, URTW_RX_DATA_LIST_COUNT,
1525             MCLBYTES, NULL /* mbufs */);
1526         if (error != 0)
1527                 return (error);
1528
1529         STAILQ_INIT(&sc->sc_rx_active);
1530         STAILQ_INIT(&sc->sc_rx_inactive);
1531
1532         for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++)
1533                 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1534
1535         return (0);
1536 }
1537
1538 static int
1539 urtw_alloc_tx_data_list(struct urtw_softc *sc)
1540 {
1541         int error, i;
1542
1543         error = urtw_alloc_data_list(sc,
1544             sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE,
1545             sc->sc_tx_dma_buf /* no mbufs */);
1546         if (error != 0)
1547                 return (error);
1548
1549         STAILQ_INIT(&sc->sc_tx_active);
1550         STAILQ_INIT(&sc->sc_tx_inactive);
1551         STAILQ_INIT(&sc->sc_tx_pending);
1552
1553         for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++)
1554                 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i],
1555                     next);
1556
1557         return (0);
1558 }
1559
1560 static int
1561 urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1562     const struct ieee80211_bpf_params *params)
1563 {
1564         struct ieee80211com *ic = ni->ni_ic;
1565         struct ifnet *ifp = ic->ic_ifp;
1566         struct urtw_data *bf;
1567         struct urtw_softc *sc = ifp->if_softc;
1568
1569         /* prevent management frames from being sent if we're not ready */
1570         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1571                 m_freem(m);
1572                 ieee80211_free_node(ni);
1573                 return ENETDOWN;
1574         }
1575         URTW_LOCK(sc);
1576         bf = urtw_getbuf(sc);
1577         if (bf == NULL) {
1578                 ieee80211_free_node(ni);
1579                 m_freem(m);
1580                 URTW_UNLOCK(sc);
1581                 return (ENOBUFS);               /* XXX */
1582         }
1583
1584         ifp->if_opackets++;
1585         if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) {
1586                 ieee80211_free_node(ni);
1587                 ifp->if_oerrors++;
1588                 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next);
1589                 URTW_UNLOCK(sc);
1590                 return (EIO);
1591         }
1592         URTW_UNLOCK(sc);
1593
1594         sc->sc_txtimer = 5;
1595         return (0);
1596 }
1597
1598 static void
1599 urtw_scan_start(struct ieee80211com *ic)
1600 {
1601
1602         /* XXX do nothing?  */
1603 }
1604
1605 static void
1606 urtw_scan_end(struct ieee80211com *ic)
1607 {
1608
1609         /* XXX do nothing?  */
1610 }
1611
1612 static void
1613 urtw_set_channel(struct ieee80211com *ic)
1614 {
1615         struct urtw_softc *sc  = ic->ic_ifp->if_softc;
1616         struct ifnet *ifp = sc->sc_ifp;
1617         uint32_t data, orig;
1618         usb_error_t error;
1619
1620         /*
1621          * if the user set a channel explicitly using ifconfig(8) this function
1622          * can be called earlier than we're expected that in some cases the
1623          * initialization would be failed if setting a channel is called before
1624          * the init have done.
1625          */
1626         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1627                 return;
1628
1629         if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan)
1630                 return;
1631
1632         URTW_LOCK(sc);
1633
1634         /*
1635          * during changing th channel we need to temporarily be disable
1636          * TX.
1637          */
1638         urtw_read32_m(sc, URTW_TX_CONF, &orig);
1639         data = orig & ~URTW_TX_LOOPBACK_MASK;
1640         urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC);
1641
1642         error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan));
1643         if (error != 0)
1644                 goto fail;
1645         usb_pause_mtx(&sc->sc_mtx, 10);
1646         urtw_write32_m(sc, URTW_TX_CONF, orig);
1647
1648         urtw_write16_m(sc, URTW_ATIM_WND, 2);
1649         urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1650         urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
1651         urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1652
1653 fail:
1654         URTW_UNLOCK(sc);
1655
1656         sc->sc_curchan = ic->ic_curchan;
1657
1658         if (error != 0)
1659                 device_printf(sc->sc_dev, "could not change the channel\n");
1660 }
1661
1662 static void
1663 urtw_update_mcast(struct ifnet *ifp)
1664 {
1665
1666         /* XXX do nothing?  */
1667 }
1668
1669 static int
1670 urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0,
1671     struct urtw_data *data, int prior)
1672 {
1673         struct ifnet *ifp = sc->sc_ifp;
1674         struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
1675         struct ieee80211_key *k;
1676         const struct ieee80211_txparam *tp;
1677         struct ieee80211com *ic = ifp->if_l2com;
1678         struct ieee80211vap *vap = ni->ni_vap;
1679         struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = {
1680                 sc->sc_xfer[URTW_8187B_BULK_TX_BE],
1681                 sc->sc_xfer[URTW_8187B_BULK_TX_BK],
1682                 sc->sc_xfer[URTW_8187B_BULK_TX_VI],
1683                 sc->sc_xfer[URTW_8187B_BULK_TX_VO]
1684         };
1685         struct usb_xfer *xfer;
1686         int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate,
1687             pkttime = 0, txdur = 0, isshort = 0, xferlen;
1688         uint16_t acktime, rtstime, ctstime;
1689         uint32_t flags;
1690         usb_error_t error;
1691
1692         URTW_ASSERT_LOCKED(sc);
1693
1694         /*
1695          * Software crypto.
1696          */
1697         if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1698                 k = ieee80211_crypto_encap(ni, m0);
1699                 if (k == NULL) {
1700                         device_printf(sc->sc_dev,
1701                             "ieee80211_crypto_encap returns NULL.\n");
1702                         /* XXX we don't expect the fragmented frames  */
1703                         m_freem(m0);
1704                         return (ENOBUFS);
1705                 }
1706
1707                 /* in case packet header moved, reset pointer */
1708                 wh = mtod(m0, struct ieee80211_frame *);
1709         }
1710
1711         if (ieee80211_radiotap_active_vap(vap)) {
1712                 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap;
1713
1714                 /* XXX Are variables correct?  */
1715                 tap->wt_flags = 0;
1716                 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq);
1717                 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags);
1718
1719                 ieee80211_radiotap_tx(vap, m0);
1720         }
1721
1722         if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT ||
1723             (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) {
1724                 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1725                 rate = tp->mgmtrate;
1726         } else {
1727                 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1728                 /* for data frames */
1729                 if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1730                         rate = tp->mcastrate;
1731                 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1732                         rate = tp->ucastrate;
1733                 else
1734                         rate = urtw_rtl2rate(sc->sc_currate);
1735         }
1736
1737         sc->sc_stats.txrates[sc->sc_currate]++;
1738
1739         if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1740                 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1741                     IEEE80211_CRC_LEN, rate, 0, 0);
1742         else {
1743                 acktime = urtw_compute_txtime(14, 2,0, 0);
1744                 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) {
1745                         rtsenable = 1;
1746                         ctsenable = 0;
1747                         rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0);
1748                         ctstime = urtw_compute_txtime(14, 2, 0, 0);
1749                         pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1750                             IEEE80211_CRC_LEN, rate, 0, isshort);
1751                         rtsdur = ctstime + pkttime + acktime +
1752                             3 * URTW_ASIFS_TIME;
1753                         txdur = rtstime + rtsdur;
1754                 } else {
1755                         rtsenable = ctsenable = rtsdur = 0;
1756                         pkttime = urtw_compute_txtime(m0->m_pkthdr.len +
1757                             IEEE80211_CRC_LEN, rate, 0, isshort);
1758                         txdur = pkttime + URTW_ASIFS_TIME + acktime;
1759                 }
1760
1761                 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1762                         dur = urtw_compute_txtime(m0->m_pkthdr.len +
1763                             IEEE80211_CRC_LEN, rate, 0, isshort) +
1764                             3 * URTW_ASIFS_TIME +
1765                             2 * acktime;
1766                 else
1767                         dur = URTW_ASIFS_TIME + acktime;
1768         }
1769         USETW(wh->i_dur, dur);
1770
1771         xferlen = m0->m_pkthdr.len;
1772         xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3);
1773         if ((0 == xferlen % 64) || (0 == xferlen % 512))
1774                 xferlen += 1;
1775
1776         memset(data->buf, 0, URTW_TX_MAXSIZE);
1777         flags = m0->m_pkthdr.len & 0xfff;
1778         flags |= URTW_TX_FLAG_NO_ENC;
1779         if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1780             (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) &&
1781             (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) &&
1782             (sc->sc_currate != 0))
1783                 flags |= URTW_TX_FLAG_SPLCP;
1784         if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
1785                 flags |= URTW_TX_FLAG_MOREFRAG;
1786
1787         flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT;
1788
1789         if (sc->sc_flags & URTW_RTL8187B) {
1790                 struct urtw_8187b_txhdr *tx;
1791
1792                 tx = (struct urtw_8187b_txhdr *)data->buf;
1793                 if (ctsenable)
1794                         flags |= URTW_TX_FLAG_CTS;
1795                 if (rtsenable) {
1796                         flags |= URTW_TX_FLAG_RTS;
1797                         flags |= (urtw_rate2rtl(11) & 0xf) <<
1798                             URTW_TX_FLAG_RTSRATE_SHIFT;
1799                         tx->rtsdur = rtsdur;
1800                 }
1801                 tx->flag = htole32(flags);
1802                 tx->txdur = txdur;
1803                 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1804                     IEEE80211_FC0_TYPE_MGT &&
1805                     (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1806                     IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1807                         tx->retry = 1;
1808                 else
1809                         tx->retry = URTW_TX_MAXRETRY;
1810                 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1811         } else {
1812                 struct urtw_8187l_txhdr *tx;
1813
1814                 tx = (struct urtw_8187l_txhdr *)data->buf;
1815                 if (rtsenable) {
1816                         flags |= URTW_TX_FLAG_RTS;
1817                         tx->rtsdur = rtsdur;
1818                 }
1819                 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT;
1820                 tx->flag = htole32(flags);
1821                 tx->retry = 3;          /* CW minimum  */
1822                 tx->retry = 7 << 4;     /* CW maximum  */
1823                 tx->retry = URTW_TX_MAXRETRY << 8;      /* retry limitation  */
1824                 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1));
1825         }
1826
1827         data->buflen = xferlen;
1828         data->ni = ni;
1829         data->m = m0;
1830
1831         if (sc->sc_flags & URTW_RTL8187B) {
1832                 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1833                 case IEEE80211_FC0_TYPE_CTL:
1834                 case IEEE80211_FC0_TYPE_MGT:
1835                         xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12];
1836                         break;
1837                 default:
1838                         KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX,
1839                             ("unsupported WME pipe %d", M_WME_GETAC(m0)));
1840                         xfer = rtl8187b_pipes[M_WME_GETAC(m0)];
1841                         break;
1842                 }
1843         } else
1844                 xfer = (prior == URTW_PRIORITY_LOW) ?
1845                     sc->sc_xfer[URTW_8187L_BULK_TX_LOW] :
1846                     sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL];
1847
1848         STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next);
1849         usbd_transfer_start(xfer);
1850
1851         error = urtw_led_ctl(sc, URTW_LED_CTL_TX);
1852         if (error != 0)
1853                 device_printf(sc->sc_dev, "could not control LED (%d)\n",
1854                     error);
1855         return (0);
1856 }
1857
1858 static int
1859 urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1860 {
1861         struct ieee80211com *ic = vap->iv_ic;
1862         struct urtw_softc *sc = ic->ic_ifp->if_softc;
1863         struct urtw_vap *uvp = URTW_VAP(vap);
1864         struct ieee80211_node *ni;
1865         usb_error_t error = 0;
1866
1867         DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1868             ieee80211_state_name[vap->iv_state],
1869             ieee80211_state_name[nstate]);
1870
1871         sc->sc_state = nstate;
1872
1873         IEEE80211_UNLOCK(ic);
1874         URTW_LOCK(sc);
1875         usb_callout_stop(&sc->sc_led_ch);
1876         callout_stop(&sc->sc_watchdog_ch);
1877
1878         switch (nstate) {
1879         case IEEE80211_S_INIT:
1880         case IEEE80211_S_SCAN:
1881         case IEEE80211_S_AUTH:
1882         case IEEE80211_S_ASSOC:
1883                 break;
1884         case IEEE80211_S_RUN:
1885                 ni = ieee80211_ref_node(vap->iv_bss);
1886                 /* setting bssid.  */
1887                 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]);
1888                 urtw_write16_m(sc, URTW_BSSID + 4,
1889                     ((uint16_t *)ni->ni_bssid)[2]);
1890                 urtw_update_msr(sc);
1891                 /* XXX maybe the below would be incorrect.  */
1892                 urtw_write16_m(sc, URTW_ATIM_WND, 2);
1893                 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100);
1894                 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64);
1895                 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100);
1896                 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK);
1897                 if (error != 0)
1898                         device_printf(sc->sc_dev,
1899                             "could not control LED (%d)\n", error);
1900                 ieee80211_free_node(ni);
1901                 break;
1902         default:
1903                 break;
1904         }
1905 fail:
1906         URTW_UNLOCK(sc);
1907         IEEE80211_LOCK(ic);
1908         return (uvp->newstate(vap, nstate, arg));
1909 }
1910
1911 static void
1912 urtw_watchdog(void *arg)
1913 {
1914         struct urtw_softc *sc = arg;
1915         struct ifnet *ifp = sc->sc_ifp;
1916
1917         if (sc->sc_txtimer > 0) {
1918                 if (--sc->sc_txtimer == 0) {
1919                         device_printf(sc->sc_dev, "device timeout\n");
1920                         ifp->if_oerrors++;
1921                         return;
1922                 }
1923                 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc);
1924         }
1925 }
1926
1927 static void
1928 urtw_set_multi(void *arg)
1929 {
1930         struct urtw_softc *sc = arg;
1931         struct ifnet *ifp = sc->sc_ifp;
1932
1933         if (!(ifp->if_flags & IFF_UP))
1934                 return;
1935
1936         /*
1937          * XXX don't know how to set a device.  Lack of docs.  Just try to set
1938          * IFF_ALLMULTI flag here.
1939          */
1940         ifp->if_flags |= IFF_ALLMULTI;
1941 }
1942
1943 static usb_error_t
1944 urtw_set_rate(struct urtw_softc *sc)
1945 {
1946         int i, basic_rate, min_rr_rate, max_rr_rate;
1947         uint16_t data;
1948         usb_error_t error;
1949
1950         basic_rate = urtw_rate2rtl(48);
1951         min_rr_rate = urtw_rate2rtl(12);
1952         max_rr_rate = urtw_rate2rtl(48);
1953
1954         urtw_write8_m(sc, URTW_RESP_RATE,
1955             max_rr_rate << URTW_RESP_MAX_RATE_SHIFT |
1956             min_rr_rate << URTW_RESP_MIN_RATE_SHIFT);
1957
1958         urtw_read16_m(sc, URTW_BRSR, &data);
1959         data &= ~URTW_BRSR_MBR_8185;
1960
1961         for (i = 0; i <= basic_rate; i++)
1962                 data |= (1 << i);
1963
1964         urtw_write16_m(sc, URTW_BRSR, data);
1965 fail:
1966         return (error);
1967 }
1968
1969 static uint16_t
1970 urtw_rate2rtl(uint32_t rate)
1971 {
1972 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
1973         int i;
1974
1975         for (i = 0; i < N(urtw_ratetable); i++) {
1976                 if (rate == urtw_ratetable[i].reg)
1977                         return urtw_ratetable[i].val;
1978         }
1979
1980         return (3);
1981 #undef N
1982 }
1983
1984 static uint16_t
1985 urtw_rtl2rate(uint32_t rate)
1986 {
1987 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
1988         int i;
1989
1990         for (i = 0; i < N(urtw_ratetable); i++) {
1991                 if (rate == urtw_ratetable[i].val)
1992                         return urtw_ratetable[i].reg;
1993         }
1994
1995         return (0);
1996 #undef N
1997 }
1998
1999 static usb_error_t
2000 urtw_update_msr(struct urtw_softc *sc)
2001 {
2002         struct ifnet *ifp = sc->sc_ifp;
2003         struct ieee80211com *ic = ifp->if_l2com;
2004         uint8_t data;
2005         usb_error_t error;
2006
2007         urtw_read8_m(sc, URTW_MSR, &data);
2008         data &= ~URTW_MSR_LINK_MASK;
2009
2010         if (sc->sc_state == IEEE80211_S_RUN) {
2011                 switch (ic->ic_opmode) {
2012                 case IEEE80211_M_STA:
2013                 case IEEE80211_M_MONITOR:
2014                         data |= URTW_MSR_LINK_STA;
2015                         if (sc->sc_flags & URTW_RTL8187B)
2016                                 data |= URTW_MSR_LINK_ENEDCA;
2017                         break;
2018                 case IEEE80211_M_IBSS:
2019                         data |= URTW_MSR_LINK_ADHOC;
2020                         break;
2021                 case IEEE80211_M_HOSTAP:
2022                         data |= URTW_MSR_LINK_HOSTAP;
2023                         break;
2024                 default:
2025                         DPRINTF(sc, URTW_DEBUG_STATE,
2026                             "unsupported operation mode 0x%x\n",
2027                             ic->ic_opmode);
2028                         error = USB_ERR_INVAL;
2029                         goto fail;
2030                 }
2031         } else
2032                 data |= URTW_MSR_LINK_NONE;
2033
2034         urtw_write8_m(sc, URTW_MSR, data);
2035 fail:
2036         return (error);
2037 }
2038
2039 static usb_error_t
2040 urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data)
2041 {
2042         struct usb_device_request req;
2043         usb_error_t error;
2044
2045         URTW_ASSERT_LOCKED(sc);
2046
2047         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2048         req.bRequest = URTW_8187_GETREGS_REQ;
2049         USETW(req.wValue, (val & 0xff) | 0xff00);
2050         USETW(req.wIndex, (val >> 8) & 0x3);
2051         USETW(req.wLength, sizeof(uint8_t));
2052
2053         error = urtw_do_request(sc, &req, data);
2054         return (error);
2055 }
2056
2057 static usb_error_t
2058 urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data)
2059 {
2060         struct usb_device_request req;
2061         usb_error_t error;
2062
2063         URTW_ASSERT_LOCKED(sc);
2064
2065         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2066         req.bRequest = URTW_8187_GETREGS_REQ;
2067         USETW(req.wValue, (val & 0xff) | 0xff00);
2068         USETW(req.wIndex, (val >> 8) & 0x3);
2069         USETW(req.wLength, sizeof(uint16_t));
2070
2071         error = urtw_do_request(sc, &req, data);
2072         return (error);
2073 }
2074
2075 static usb_error_t
2076 urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data)
2077 {
2078         struct usb_device_request req;
2079         usb_error_t error;
2080
2081         URTW_ASSERT_LOCKED(sc);
2082
2083         req.bmRequestType = UT_READ_VENDOR_DEVICE;
2084         req.bRequest = URTW_8187_GETREGS_REQ;
2085         USETW(req.wValue, (val & 0xff) | 0xff00);
2086         USETW(req.wIndex, (val >> 8) & 0x3);
2087         USETW(req.wLength, sizeof(uint32_t));
2088
2089         error = urtw_do_request(sc, &req, data);
2090         return (error);
2091 }
2092
2093 static usb_error_t
2094 urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data)
2095 {
2096         struct usb_device_request req;
2097
2098         URTW_ASSERT_LOCKED(sc);
2099
2100         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2101         req.bRequest = URTW_8187_SETREGS_REQ;
2102         USETW(req.wValue, (val & 0xff) | 0xff00);
2103         USETW(req.wIndex, (val >> 8) & 0x3);
2104         USETW(req.wLength, sizeof(uint8_t));
2105
2106         return (urtw_do_request(sc, &req, &data));
2107 }
2108
2109 static usb_error_t
2110 urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data)
2111 {
2112         struct usb_device_request req;
2113
2114         URTW_ASSERT_LOCKED(sc);
2115
2116         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2117         req.bRequest = URTW_8187_SETREGS_REQ;
2118         USETW(req.wValue, (val & 0xff) | 0xff00);
2119         USETW(req.wIndex, (val >> 8) & 0x3);
2120         USETW(req.wLength, sizeof(uint16_t));
2121
2122         return (urtw_do_request(sc, &req, &data));
2123 }
2124
2125 static usb_error_t
2126 urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data)
2127 {
2128         struct usb_device_request req;
2129
2130         URTW_ASSERT_LOCKED(sc);
2131
2132         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2133         req.bRequest = URTW_8187_SETREGS_REQ;
2134         USETW(req.wValue, (val & 0xff) | 0xff00);
2135         USETW(req.wIndex, (val >> 8) & 0x3);
2136         USETW(req.wLength, sizeof(uint32_t));
2137
2138         return (urtw_do_request(sc, &req, &data));
2139 }
2140
2141 static usb_error_t
2142 urtw_get_macaddr(struct urtw_softc *sc)
2143 {
2144         uint32_t data;
2145         usb_error_t error;
2146
2147         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data);
2148         if (error != 0)
2149                 goto fail;
2150         sc->sc_bssid[0] = data & 0xff;
2151         sc->sc_bssid[1] = (data & 0xff00) >> 8;
2152         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data);
2153         if (error != 0)
2154                 goto fail;
2155         sc->sc_bssid[2] = data & 0xff;
2156         sc->sc_bssid[3] = (data & 0xff00) >> 8;
2157         error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data);
2158         if (error != 0)
2159                 goto fail;
2160         sc->sc_bssid[4] = data & 0xff;
2161         sc->sc_bssid[5] = (data & 0xff00) >> 8;
2162 fail:
2163         return (error);
2164 }
2165
2166 static usb_error_t
2167 urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data)
2168 {
2169 #define URTW_READCMD_LEN                3
2170         int addrlen, i;
2171         int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 };
2172         usb_error_t error;
2173
2174         /* NB: make sure the buffer is initialized  */
2175         *data = 0;
2176
2177         /* enable EPROM programming */
2178         urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE);
2179         DELAY(URTW_EPROM_DELAY);
2180
2181         error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE);
2182         if (error != 0)
2183                 goto fail;
2184         error = urtw_eprom_ck(sc);
2185         if (error != 0)
2186                 goto fail;
2187         error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN);
2188         if (error != 0)
2189                 goto fail;
2190         if (sc->sc_epromtype == URTW_EEPROM_93C56) {
2191                 addrlen = 8;
2192                 addrstr[0] = addr & (1 << 7);
2193                 addrstr[1] = addr & (1 << 6);
2194                 addrstr[2] = addr & (1 << 5);
2195                 addrstr[3] = addr & (1 << 4);
2196                 addrstr[4] = addr & (1 << 3);
2197                 addrstr[5] = addr & (1 << 2);
2198                 addrstr[6] = addr & (1 << 1);
2199                 addrstr[7] = addr & (1 << 0);
2200         } else {
2201                 addrlen=6;
2202                 addrstr[0] = addr & (1 << 5);
2203                 addrstr[1] = addr & (1 << 4);
2204                 addrstr[2] = addr & (1 << 3);
2205                 addrstr[3] = addr & (1 << 2);
2206                 addrstr[4] = addr & (1 << 1);
2207                 addrstr[5] = addr & (1 << 0);
2208         }
2209         error = urtw_eprom_sendbits(sc, addrstr, addrlen);
2210         if (error != 0)
2211                 goto fail;
2212
2213         error = urtw_eprom_writebit(sc, 0);
2214         if (error != 0)
2215                 goto fail;
2216
2217         for (i = 0; i < 16; i++) {
2218                 error = urtw_eprom_ck(sc);
2219                 if (error != 0)
2220                         goto fail;
2221                 error = urtw_eprom_readbit(sc, &data16);
2222                 if (error != 0)
2223                         goto fail;
2224
2225                 (*data) |= (data16 << (15 - i));
2226         }
2227
2228         error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE);
2229         if (error != 0)
2230                 goto fail;
2231         error = urtw_eprom_ck(sc);
2232         if (error != 0)
2233                 goto fail;
2234
2235         /* now disable EPROM programming */
2236         urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE);
2237 fail:
2238         return (error);
2239 #undef URTW_READCMD_LEN
2240 }
2241
2242 static usb_error_t
2243 urtw_eprom_cs(struct urtw_softc *sc, int able)
2244 {
2245         uint8_t data;
2246         usb_error_t error;
2247
2248         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2249         if (able == URTW_EPROM_ENABLE)
2250                 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS);
2251         else
2252                 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS);
2253         DELAY(URTW_EPROM_DELAY);
2254 fail:
2255         return (error);
2256 }
2257
2258 static usb_error_t
2259 urtw_eprom_ck(struct urtw_softc *sc)
2260 {
2261         uint8_t data;
2262         usb_error_t error;
2263
2264         /* masking  */
2265         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2266         urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK);
2267         DELAY(URTW_EPROM_DELAY);
2268         /* unmasking  */
2269         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2270         urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK);
2271         DELAY(URTW_EPROM_DELAY);
2272 fail:
2273         return (error);
2274 }
2275
2276 static usb_error_t
2277 urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data)
2278 {
2279         uint8_t data8;
2280         usb_error_t error;
2281
2282         urtw_read8_m(sc, URTW_EPROM_CMD, &data8);
2283         *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0;
2284         DELAY(URTW_EPROM_DELAY);
2285
2286 fail:
2287         return (error);
2288 }
2289
2290 static usb_error_t
2291 urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit)
2292 {
2293         uint8_t data;
2294         usb_error_t error;
2295
2296         urtw_read8_m(sc, URTW_EPROM_CMD, &data);
2297         if (bit != 0)
2298                 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT);
2299         else
2300                 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT);
2301         DELAY(URTW_EPROM_DELAY);
2302 fail:
2303         return (error);
2304 }
2305
2306 static usb_error_t
2307 urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen)
2308 {
2309         int i = 0;
2310         usb_error_t error = 0;
2311
2312         for (i = 0; i < buflen; i++) {
2313                 error = urtw_eprom_writebit(sc, buf[i]);
2314                 if (error != 0)
2315                         goto fail;
2316                 error = urtw_eprom_ck(sc);
2317                 if (error != 0)
2318                         goto fail;
2319         }
2320 fail:
2321         return (error);
2322 }
2323
2324
2325 static usb_error_t
2326 urtw_get_txpwr(struct urtw_softc *sc)
2327 {
2328         int i, j;
2329         uint32_t data;
2330         usb_error_t error;
2331
2332         error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data);
2333         if (error != 0)
2334                 goto fail;
2335         sc->sc_txpwr_cck_base = data & 0xf;
2336         sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf;
2337
2338         for (i = 1, j = 0; i < 6; i += 2, j++) {
2339                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data);
2340                 if (error != 0)
2341                         goto fail;
2342                 sc->sc_txpwr_cck[i] = data & 0xf;
2343                 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8;
2344                 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4;
2345                 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12;
2346         }
2347         for (i = 1, j = 0; i < 4; i += 2, j++) {
2348                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data);
2349                 if (error != 0)
2350                         goto fail;
2351                 sc->sc_txpwr_cck[i + 6] = data & 0xf;
2352                 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8;
2353                 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4;
2354                 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12;
2355         }
2356         if (sc->sc_flags & URTW_RTL8187B) {
2357                 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data);
2358                 if (error != 0)
2359                         goto fail;
2360                 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf;
2361                 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4;
2362                 error = urtw_eprom_read32(sc, 0x0a, &data);
2363                 if (error != 0)
2364                         goto fail;
2365                 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf;
2366                 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4;
2367                 error = urtw_eprom_read32(sc, 0x1c, &data);
2368                 if (error != 0)
2369                         goto fail;
2370                 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf;
2371                 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8;
2372                 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4;
2373                 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12;
2374         } else {
2375                 for (i = 1, j = 0; i < 4; i += 2, j++) {
2376                         error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j,
2377                             &data);
2378                         if (error != 0)
2379                                 goto fail;
2380                         sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf;
2381                         sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8;
2382                         sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4;
2383                         sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12;
2384                 }
2385         }
2386 fail:
2387         return (error);
2388 }
2389
2390
2391 static usb_error_t
2392 urtw_get_rfchip(struct urtw_softc *sc)
2393 {
2394         int ret;
2395         uint8_t data8;
2396         uint32_t data;
2397         usb_error_t error;
2398
2399         if (sc->sc_flags & URTW_RTL8187B) {
2400                 urtw_read8_m(sc, 0xe1, &data8);
2401                 switch (data8) {
2402                 case 0:
2403                         sc->sc_flags |= URTW_RTL8187B_REV_B;
2404                         break;
2405                 case 1:
2406                         sc->sc_flags |= URTW_RTL8187B_REV_D;
2407                         break;
2408                 case 2:
2409                         sc->sc_flags |= URTW_RTL8187B_REV_E;
2410                         break;
2411                 default:
2412                         device_printf(sc->sc_dev, "unknown type: %#x\n", data8);
2413                         sc->sc_flags |= URTW_RTL8187B_REV_B;
2414                         break;
2415                 }
2416         } else {
2417                 urtw_read32_m(sc, URTW_TX_CONF, &data);
2418                 switch (data & URTW_TX_HWMASK) {
2419                 case URTW_TX_R8187vD_B:
2420                         sc->sc_flags |= URTW_RTL8187B;
2421                         break;
2422                 case URTW_TX_R8187vD:
2423                         break;
2424                 default:
2425                         device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n",
2426                             data & URTW_TX_HWMASK);
2427                         break;
2428                 }
2429         }
2430
2431         error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data);
2432         if (error != 0)
2433                 goto fail;
2434         switch (data & 0xff) {
2435         case URTW_EPROM_RFCHIPID_RTL8225U:
2436                 error = urtw_8225_isv2(sc, &ret);
2437                 if (error != 0)
2438                         goto fail;
2439                 if (ret == 0) {
2440                         sc->sc_rf_init = urtw_8225_rf_init;
2441                         sc->sc_rf_set_sens = urtw_8225_rf_set_sens;
2442                         sc->sc_rf_set_chan = urtw_8225_rf_set_chan;
2443                         sc->sc_rf_stop = urtw_8225_rf_stop;
2444                 } else {
2445                         sc->sc_rf_init = urtw_8225v2_rf_init;
2446                         sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan;
2447                         sc->sc_rf_stop = urtw_8225_rf_stop;
2448                 }
2449                 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2450                 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2451                 break;
2452         case URTW_EPROM_RFCHIPID_RTL8225Z2:
2453                 sc->sc_rf_init = urtw_8225v2b_rf_init;
2454                 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan;
2455                 sc->sc_max_sens = URTW_8225_RF_MAX_SENS;
2456                 sc->sc_sens = URTW_8225_RF_DEF_SENS;
2457                 sc->sc_rf_stop = urtw_8225_rf_stop;
2458                 break;
2459         default:
2460                 DPRINTF(sc, URTW_DEBUG_STATE,
2461                     "unsupported RF chip %d\n", data & 0xff);
2462                 error = USB_ERR_INVAL;
2463                 goto fail;
2464         }
2465
2466         device_printf(sc->sc_dev, "%s rf %s hwrev %s\n",
2467             (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l",
2468             ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" :
2469             "rtl8225z2",
2470             (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" :
2471                 (data8 == 1) ? "d" : "e") : "none");
2472
2473 fail:
2474         return (error);
2475 }
2476
2477
2478 static usb_error_t
2479 urtw_led_init(struct urtw_softc *sc)
2480 {
2481         uint32_t rev;
2482         usb_error_t error;
2483
2484         urtw_read8_m(sc, URTW_PSR, &sc->sc_psr);
2485         error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev);
2486         if (error != 0)
2487                 goto fail;
2488
2489         switch (rev & URTW_EPROM_CID_MASK) {
2490         case URTW_EPROM_CID_ALPHA0:
2491                 sc->sc_strategy = URTW_SW_LED_MODE1;
2492                 break;
2493         case URTW_EPROM_CID_SERCOMM_PS:
2494                 sc->sc_strategy = URTW_SW_LED_MODE3;
2495                 break;
2496         case URTW_EPROM_CID_HW_LED:
2497                 sc->sc_strategy = URTW_HW_LED;
2498                 break;
2499         case URTW_EPROM_CID_RSVD0:
2500         case URTW_EPROM_CID_RSVD1:
2501         default:
2502                 sc->sc_strategy = URTW_SW_LED_MODE0;
2503                 break;
2504         }
2505
2506         sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0;
2507
2508 fail:
2509         return (error);
2510 }
2511
2512
2513 static usb_error_t
2514 urtw_8225_rf_init(struct urtw_softc *sc)
2515 {
2516 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
2517         int i;
2518         uint16_t data;
2519         usb_error_t error;
2520
2521         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2522         if (error)
2523                 goto fail;
2524
2525         error = urtw_8225_usb_init(sc);
2526         if (error)
2527                 goto fail;
2528
2529         urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2530         urtw_read16_m(sc, URTW_BRSR, &data);            /* XXX ??? */
2531         urtw_write16_m(sc, URTW_BRSR, 0xffff);
2532         urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2533
2534         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2535         if (error)
2536                 goto fail;
2537         urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2538         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2539         if (error)
2540                 goto fail;
2541
2542         error = urtw_8185_rf_pins_enable(sc);
2543         if (error)
2544                 goto fail;
2545         usb_pause_mtx(&sc->sc_mtx, 1000);
2546
2547         for (i = 0; i < N(urtw_8225_rf_part1); i++) {
2548                 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg,
2549                     urtw_8225_rf_part1[i].val);
2550                 usb_pause_mtx(&sc->sc_mtx, 1);
2551         }
2552         usb_pause_mtx(&sc->sc_mtx, 100);
2553         urtw_8225_write(sc,
2554             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2555         usb_pause_mtx(&sc->sc_mtx, 200);
2556         urtw_8225_write(sc,
2557             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2558         usb_pause_mtx(&sc->sc_mtx, 200);
2559         urtw_8225_write(sc,
2560             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3);
2561
2562         for (i = 0; i < 95; i++) {
2563                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2564                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]);
2565         }
2566
2567         urtw_8225_write(sc,
2568             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4);
2569         urtw_8225_write(sc,
2570             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5);
2571
2572         for (i = 0; i < 128; i++) {
2573                 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2574                 usb_pause_mtx(&sc->sc_mtx, 1);
2575                 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2576                 usb_pause_mtx(&sc->sc_mtx, 1);
2577         }
2578
2579         for (i = 0; i < N(urtw_8225_rf_part2); i++) {
2580                 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg,
2581                     urtw_8225_rf_part2[i].val);
2582                 usb_pause_mtx(&sc->sc_mtx, 1);
2583         }
2584
2585         error = urtw_8225_setgain(sc, 4);
2586         if (error)
2587                 goto fail;
2588
2589         for (i = 0; i < N(urtw_8225_rf_part3); i++) {
2590                 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg,
2591                     urtw_8225_rf_part3[i].val);
2592                 usb_pause_mtx(&sc->sc_mtx, 1);
2593         }
2594
2595         urtw_write8_m(sc, URTW_TESTR, 0x0d);
2596
2597         error = urtw_8225_set_txpwrlvl(sc, 1);
2598         if (error)
2599                 goto fail;
2600
2601         urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
2602         usb_pause_mtx(&sc->sc_mtx, 1);
2603         urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
2604         usb_pause_mtx(&sc->sc_mtx, 1);
2605
2606         /* TX ant A, 0x0 for B */
2607         error = urtw_8185_tx_antenna(sc, 0x3);
2608         if (error)
2609                 goto fail;
2610         urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
2611
2612         error = urtw_8225_rf_set_chan(sc, 1);
2613 fail:
2614         return (error);
2615 #undef N
2616 }
2617
2618 static usb_error_t
2619 urtw_8185_rf_pins_enable(struct urtw_softc *sc)
2620 {
2621         usb_error_t error = 0;
2622
2623         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7);
2624 fail:
2625         return (error);
2626 }
2627
2628 static usb_error_t
2629 urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant)
2630 {
2631         usb_error_t error;
2632
2633         urtw_write8_m(sc, URTW_TX_ANTENNA, ant);
2634         usb_pause_mtx(&sc->sc_mtx, 1);
2635 fail:
2636         return (error);
2637 }
2638
2639 static usb_error_t
2640 urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2641 {
2642
2643         data = data & 0xff;
2644         return urtw_8187_write_phy(sc, addr, data);
2645 }
2646
2647 static usb_error_t
2648 urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2649 {
2650
2651         data = data & 0xff;
2652         return urtw_8187_write_phy(sc, addr, data | 0x10000);
2653 }
2654
2655 static usb_error_t
2656 urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data)
2657 {
2658         uint32_t phyw;
2659         usb_error_t error;
2660
2661         phyw = ((data << 8) | (addr | 0x80));
2662         urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24));
2663         urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16));
2664         urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8));
2665         urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff)));
2666         usb_pause_mtx(&sc->sc_mtx, 1);
2667 fail:
2668         return (error);
2669 }
2670
2671 static usb_error_t
2672 urtw_8225_setgain(struct urtw_softc *sc, int16_t gain)
2673 {
2674         usb_error_t error;
2675
2676         urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]);
2677         urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]);
2678         urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]);
2679         urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]);
2680 fail:
2681         return (error);
2682 }
2683
2684 static usb_error_t
2685 urtw_8225_usb_init(struct urtw_softc *sc)
2686 {
2687         uint8_t data;
2688         usb_error_t error;
2689
2690         urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0);
2691         urtw_write8_m(sc, URTW_GPIO, 0);
2692         error = urtw_read8e(sc, 0x53, &data);
2693         if (error)
2694                 goto fail;
2695         error = urtw_write8e(sc, 0x53, data | (1 << 7));
2696         if (error)
2697                 goto fail;
2698         urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4);
2699         urtw_write8_m(sc, URTW_GPIO, 0x20);
2700         urtw_write8_m(sc, URTW_GP_ENABLE, 0);
2701
2702         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80);
2703         urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80);
2704         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80);
2705
2706         usb_pause_mtx(&sc->sc_mtx, 500);
2707 fail:
2708         return (error);
2709 }
2710
2711 static usb_error_t
2712 urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data)
2713 {
2714         uint16_t d80, d82, d84;
2715         usb_error_t error;
2716
2717         urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80);
2718         d80 &= URTW_RF_PINS_MAGIC1;
2719         urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82);
2720         urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84);
2721         d84 &= URTW_RF_PINS_MAGIC2;
2722         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3);
2723         urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3);
2724         DELAY(10);
2725
2726         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2727         DELAY(2);
2728         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80);
2729         DELAY(10);
2730
2731         error = urtw_8225_write_s16(sc, addr, 0x8225, &data);
2732         if (error != 0)
2733                 goto fail;
2734
2735         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2736         DELAY(10);
2737         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN);
2738         urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84);
2739         usb_pause_mtx(&sc->sc_mtx, 2);
2740 fail:
2741         return (error);
2742 }
2743
2744 static usb_error_t
2745 urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index,
2746     uint16_t *data)
2747 {
2748         uint8_t buf[2];
2749         uint16_t data16;
2750         struct usb_device_request req;
2751         usb_error_t error = 0;
2752
2753         data16 = *data;
2754
2755         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
2756         req.bRequest = URTW_8187_SETREGS_REQ;
2757         USETW(req.wValue, addr);
2758         USETW(req.wIndex, index);
2759         USETW(req.wLength, sizeof(uint16_t));
2760         buf[0] = (data16 & 0x00ff);
2761         buf[1] = (data16 & 0xff00) >> 8;
2762
2763         error = urtw_do_request(sc, &req, buf);
2764
2765         return (error);
2766 }
2767
2768 static usb_error_t
2769 urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan)
2770 {
2771         usb_error_t error;
2772
2773         error = urtw_8225_set_txpwrlvl(sc, chan);
2774         if (error)
2775                 goto fail;
2776         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
2777         usb_pause_mtx(&sc->sc_mtx, 10);
2778 fail:
2779         return (error);
2780 }
2781
2782 static usb_error_t
2783 urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens)
2784 {
2785         usb_error_t error;
2786
2787         if (sens < 0 || sens > 6)
2788                 return -1;
2789
2790         if (sens > 4)
2791                 urtw_8225_write(sc,
2792                     URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1);
2793         else
2794                 urtw_8225_write(sc,
2795                     URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2);
2796
2797         sens = 6 - sens;
2798         error = urtw_8225_setgain(sc, sens);
2799         if (error)
2800                 goto fail;
2801
2802         urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]);
2803
2804 fail:
2805         return (error);
2806 }
2807
2808 static usb_error_t
2809 urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan)
2810 {
2811         int i, idx, set;
2812         uint8_t *cck_pwltable;
2813         uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max;
2814         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
2815         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
2816         usb_error_t error;
2817
2818         cck_pwrlvl_max = 11;
2819         ofdm_pwrlvl_max = 25;   /* 12 -> 25  */
2820         ofdm_pwrlvl_min = 10;
2821
2822         /* CCK power setting */
2823         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
2824         idx = cck_pwrlvl % 6;
2825         set = cck_pwrlvl / 6;
2826         cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 :
2827             urtw_8225_txpwr_cck;
2828
2829         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
2830             urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2831         for (i = 0; i < 8; i++) {
2832                 urtw_8187_write_phy_cck(sc, 0x44 + i,
2833                     cck_pwltable[idx * 8 + i]);
2834         }
2835         usb_pause_mtx(&sc->sc_mtx, 1);
2836
2837         /* OFDM power setting */
2838         ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
2839             ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
2840         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
2841
2842         idx = ofdm_pwrlvl % 6;
2843         set = ofdm_pwrlvl / 6;
2844
2845         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
2846         if (error)
2847                 goto fail;
2848         urtw_8187_write_phy_ofdm(sc, 2, 0x42);
2849         urtw_8187_write_phy_ofdm(sc, 6, 0);
2850         urtw_8187_write_phy_ofdm(sc, 8, 0);
2851
2852         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
2853             urtw_8225_tx_gain_cck_ofdm[set] >> 1);
2854         urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]);
2855         urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]);
2856         usb_pause_mtx(&sc->sc_mtx, 1);
2857 fail:
2858         return (error);
2859 }
2860
2861
2862 static usb_error_t
2863 urtw_8225_rf_stop(struct urtw_softc *sc)
2864 {
2865         uint8_t data;
2866         usb_error_t error;
2867
2868         urtw_8225_write(sc, 0x4, 0x1f);
2869
2870         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2871         if (error)
2872                 goto fail;
2873
2874         urtw_read8_m(sc, URTW_CONFIG3, &data);
2875         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
2876         if (sc->sc_flags & URTW_RTL8187B) {
2877                 urtw_write32_m(sc, URTW_ANAPARAM2,
2878                     URTW_8187B_8225_ANAPARAM2_OFF);
2879                 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF);
2880                 urtw_write32_m(sc, URTW_ANAPARAM3,
2881                     URTW_8187B_8225_ANAPARAM3_OFF);
2882         } else {
2883                 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF);
2884                 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF);
2885         }
2886
2887         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
2888         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2889         if (error)
2890                 goto fail;
2891
2892 fail:
2893         return (error);
2894 }
2895
2896 static usb_error_t
2897 urtw_8225v2_rf_init(struct urtw_softc *sc)
2898 {
2899 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
2900         int i;
2901         uint16_t data;
2902         uint32_t data32;
2903         usb_error_t error;
2904
2905         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
2906         if (error)
2907                 goto fail;
2908
2909         error = urtw_8225_usb_init(sc);
2910         if (error)
2911                 goto fail;
2912
2913         urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008);
2914         urtw_read16_m(sc, URTW_BRSR, &data);            /* XXX ??? */
2915         urtw_write16_m(sc, URTW_BRSR, 0xffff);
2916         urtw_write32_m(sc, URTW_RF_PARA, 0x100044);
2917
2918         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
2919         if (error)
2920                 goto fail;
2921         urtw_write8_m(sc, URTW_CONFIG3, 0x44);
2922         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
2923         if (error)
2924                 goto fail;
2925
2926         error = urtw_8185_rf_pins_enable(sc);
2927         if (error)
2928                 goto fail;
2929
2930         usb_pause_mtx(&sc->sc_mtx, 500);
2931
2932         for (i = 0; i < N(urtw_8225v2_rf_part1); i++) {
2933                 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg,
2934                     urtw_8225v2_rf_part1[i].val);
2935         }
2936         usb_pause_mtx(&sc->sc_mtx, 50);
2937
2938         urtw_8225_write(sc,
2939             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1);
2940
2941         for (i = 0; i < 95; i++) {
2942                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
2943                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
2944                     urtw_8225v2_rxgain[i]);
2945         }
2946
2947         urtw_8225_write(sc,
2948             URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1);
2949         urtw_8225_write(sc,
2950             URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1);
2951         urtw_8225_write(sc,
2952             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2);
2953         urtw_8225_write(sc,
2954             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2955         usb_pause_mtx(&sc->sc_mtx, 100);
2956         urtw_8225_write(sc,
2957             URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2958         usb_pause_mtx(&sc->sc_mtx, 100);
2959
2960         error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2961         if (error != 0)
2962                 goto fail;
2963         if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1)
2964                 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32);
2965         if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) {
2966                 urtw_8225_write(sc,
2967                     URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1);
2968                 usb_pause_mtx(&sc->sc_mtx, 100);
2969                 urtw_8225_write(sc,
2970                     URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2);
2971                 usb_pause_mtx(&sc->sc_mtx, 50);
2972                 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32);
2973                 if (error != 0)
2974                         goto fail;
2975                 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2))
2976                         device_printf(sc->sc_dev, "RF calibration failed\n");
2977         }
2978         usb_pause_mtx(&sc->sc_mtx, 100);
2979
2980         urtw_8225_write(sc,
2981             URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6);
2982         for (i = 0; i < 128; i++) {
2983                 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]);
2984                 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80);
2985         }
2986
2987         for (i = 0; i < N(urtw_8225v2_rf_part2); i++) {
2988                 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg,
2989                     urtw_8225v2_rf_part2[i].val);
2990         }
2991
2992         error = urtw_8225v2_setgain(sc, 4);
2993         if (error)
2994                 goto fail;
2995
2996         for (i = 0; i < N(urtw_8225v2_rf_part3); i++) {
2997                 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg,
2998                     urtw_8225v2_rf_part3[i].val);
2999         }
3000
3001         urtw_write8_m(sc, URTW_TESTR, 0x0d);
3002
3003         error = urtw_8225v2_set_txpwrlvl(sc, 1);
3004         if (error)
3005                 goto fail;
3006
3007         urtw_8187_write_phy_cck(sc, 0x10, 0x9b);
3008         urtw_8187_write_phy_ofdm(sc, 0x26, 0x90);
3009
3010         /* TX ant A, 0x0 for B */
3011         error = urtw_8185_tx_antenna(sc, 0x3);
3012         if (error)
3013                 goto fail;
3014         urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002);
3015
3016         error = urtw_8225_rf_set_chan(sc, 1);
3017 fail:
3018         return (error);
3019 #undef N
3020 }
3021
3022 static usb_error_t
3023 urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan)
3024 {
3025         usb_error_t error;
3026
3027         error = urtw_8225v2_set_txpwrlvl(sc, chan);
3028         if (error)
3029                 goto fail;
3030
3031         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3032         usb_pause_mtx(&sc->sc_mtx, 10);
3033 fail:
3034         return (error);
3035 }
3036
3037 static usb_error_t
3038 urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data)
3039 {
3040         int i;
3041         int16_t bit;
3042         uint8_t rlen = 12, wlen = 6;
3043         uint16_t o1, o2, o3, tmp;
3044         uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27;
3045         uint32_t mask = 0x80000000, value = 0;
3046         usb_error_t error;
3047
3048         urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1);
3049         urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2);
3050         urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3);
3051         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4);
3052         urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4);
3053         o1 &= ~URTW_RF_PINS_MAGIC4;
3054         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN);
3055         DELAY(5);
3056         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1);
3057         DELAY(5);
3058
3059         for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) {
3060                 bit = ((d2w & mask) != 0) ? 1 : 0;
3061
3062                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3063                 DELAY(2);
3064                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3065                     URTW_BB_HOST_BANG_CLK);
3066                 DELAY(2);
3067                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3068                     URTW_BB_HOST_BANG_CLK);
3069                 DELAY(2);
3070                 mask = mask >> 1;
3071                 if (i == 2)
3072                         break;
3073                 bit = ((d2w & mask) != 0) ? 1 : 0;
3074                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3075                     URTW_BB_HOST_BANG_CLK);
3076                 DELAY(2);
3077                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 |
3078                     URTW_BB_HOST_BANG_CLK);
3079                 DELAY(2);
3080                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1);
3081                 DELAY(1);
3082         }
3083         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW |
3084             URTW_BB_HOST_BANG_CLK);
3085         DELAY(2);
3086         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW);
3087         DELAY(2);
3088         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW);
3089         DELAY(2);
3090
3091         mask = 0x800;
3092         for (i = 0; i < rlen; i++, mask = mask >> 1) {
3093                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3094                     o1 | URTW_BB_HOST_BANG_RW);
3095                 DELAY(2);
3096                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3097                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3098                 DELAY(2);
3099                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3100                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3101                 DELAY(2);
3102                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3103                     o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK);
3104                 DELAY(2);
3105
3106                 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp);
3107                 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0);
3108                 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT,
3109                     o1 | URTW_BB_HOST_BANG_RW);
3110                 DELAY(2);
3111         }
3112
3113         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN |
3114             URTW_BB_HOST_BANG_RW);
3115         DELAY(2);
3116
3117         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2);
3118         urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3);
3119         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1);
3120
3121         if (data != NULL)
3122                 *data = value;
3123 fail:
3124         return (error);
3125 }
3126
3127
3128 static usb_error_t
3129 urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan)
3130 {
3131         int i;
3132         uint8_t *cck_pwrtable;
3133         uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10;
3134         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3135         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3136         usb_error_t error;
3137
3138         /* CCK power setting */
3139         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl;
3140         cck_pwrlvl += sc->sc_txpwr_cck_base;
3141         cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3142         cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 :
3143             urtw_8225v2_txpwr_cck;
3144
3145         for (i = 0; i < 8; i++)
3146                 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3147
3148         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3149             urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]);
3150         usb_pause_mtx(&sc->sc_mtx, 1);
3151
3152         /* OFDM power setting */
3153         ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ?
3154                 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min;
3155         ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3156         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3157
3158         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3159         if (error)
3160                 goto fail;
3161
3162         urtw_8187_write_phy_ofdm(sc, 2, 0x42);
3163         urtw_8187_write_phy_ofdm(sc, 5, 0x0);
3164         urtw_8187_write_phy_ofdm(sc, 6, 0x40);
3165         urtw_8187_write_phy_ofdm(sc, 7, 0x0);
3166         urtw_8187_write_phy_ofdm(sc, 8, 0x40);
3167
3168         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3169             urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]);
3170         usb_pause_mtx(&sc->sc_mtx, 1);
3171 fail:
3172         return (error);
3173 }
3174
3175 static usb_error_t
3176 urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain)
3177 {
3178         uint8_t *gainp;
3179         usb_error_t error;
3180
3181         /* XXX for A?  */
3182         gainp = urtw_8225v2_gain_bg;
3183         urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]);
3184         usb_pause_mtx(&sc->sc_mtx, 1);
3185         urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]);
3186         usb_pause_mtx(&sc->sc_mtx, 1);
3187         urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]);
3188         usb_pause_mtx(&sc->sc_mtx, 1);
3189         urtw_8187_write_phy_ofdm(sc, 0x21, 0x17);
3190         usb_pause_mtx(&sc->sc_mtx, 1);
3191 fail:
3192         return (error);
3193 }
3194
3195 static usb_error_t
3196 urtw_8225_isv2(struct urtw_softc *sc, int *ret)
3197 {
3198         uint32_t data;
3199         usb_error_t error;
3200
3201         *ret = 1;
3202
3203         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5);
3204         urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5);
3205         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5);
3206         usb_pause_mtx(&sc->sc_mtx, 500);
3207
3208         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3209             URTW_8225_ADDR_0_DATA_MAGIC1);
3210
3211         error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data);
3212         if (error != 0)
3213                 goto fail;
3214         if (data != URTW_8225_ADDR_8_DATA_MAGIC1)
3215                 *ret = 0;
3216         else {
3217                 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data);
3218                 if (error != 0)
3219                         goto fail;
3220                 if (data != URTW_8225_ADDR_9_DATA_MAGIC1)
3221                         *ret = 0;
3222         }
3223
3224         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC,
3225             URTW_8225_ADDR_0_DATA_MAGIC2);
3226 fail:
3227         return (error);
3228 }
3229
3230 static usb_error_t
3231 urtw_8225v2b_rf_init(struct urtw_softc *sc)
3232 {
3233 #define N(a)    ((int)(sizeof(a) / sizeof((a)[0])))
3234         int i;
3235         uint8_t data8;
3236         usb_error_t error;
3237
3238         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3239         if (error)
3240                 goto fail;
3241
3242         /*
3243          * initialize extra registers on 8187
3244          */
3245         urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff);
3246
3247         /* retry limit */
3248         urtw_read8_m(sc, URTW_CW_CONF, &data8);
3249         data8 |= URTW_CW_CONF_PERPACKET_RETRY;
3250         urtw_write8_m(sc, URTW_CW_CONF, data8);
3251
3252         /* TX AGC */
3253         urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3254         data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN;
3255         urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3256
3257         /* Auto Rate Fallback Control */
3258 #define URTW_ARFR       0x1e0
3259         urtw_write16_m(sc, URTW_ARFR, 0xfff);
3260         urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8);
3261         urtw_write8_m(sc, URTW_RATE_FALLBACK,
3262             data8 | URTW_RATE_FALLBACK_ENABLE);
3263
3264         urtw_read8_m(sc, URTW_MSR, &data8);
3265         urtw_write8_m(sc, URTW_MSR, data8 & 0xf3);
3266         urtw_read8_m(sc, URTW_MSR, &data8);
3267         urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA);
3268         urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl);
3269
3270         urtw_write16_m(sc, URTW_ATIM_WND, 2);
3271         urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100);
3272 #define URTW_FEMR_FOR_8187B     0x1d4
3273         urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff);
3274
3275         /* led type */
3276         urtw_read8_m(sc, URTW_CONFIG1, &data8);
3277         data8 = (data8 & 0x3f) | 0x80;
3278         urtw_write8_m(sc, URTW_CONFIG1, data8);
3279
3280         /* applying MAC address again.  */
3281         urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]);
3282         urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff);
3283
3284         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3285         if (error)
3286                 goto fail;
3287
3288         urtw_write8_m(sc, URTW_WPA_CONFIG, 0);
3289
3290         /*
3291          * MAC configuration
3292          */
3293         for (i = 0; i < N(urtw_8225v2b_rf_part1); i++)
3294                 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg,
3295                     urtw_8225v2b_rf_part1[i].val);
3296         urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50);
3297         urtw_write16_m(sc, URTW_INT_MIG, 0x0000);
3298         urtw_write32_m(sc, 0x1f0, 0);
3299         urtw_write32_m(sc, 0x1f4, 0);
3300         urtw_write8_m(sc, 0x1f8, 0);
3301         urtw_write32_m(sc, URTW_RF_TIMING, 0x4001);
3302
3303 #define URTW_RFSW_CTRL  0x272
3304         urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a);
3305
3306         /*
3307          * initialize PHY
3308          */
3309         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3310         if (error)
3311                 goto fail;
3312         urtw_read8_m(sc, URTW_CONFIG3, &data8);
3313         urtw_write8_m(sc, URTW_CONFIG3,
3314             data8 | URTW_CONFIG3_ANAPARAM_WRITE);
3315
3316         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3317         if (error)
3318                 goto fail;
3319
3320         /* setup RFE initial timing */
3321         urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480);
3322         urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488);
3323         urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff);
3324         usb_pause_mtx(&sc->sc_mtx, 1100);
3325
3326         for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) {
3327                 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg,
3328                     urtw_8225v2b_rf_part0[i].val);
3329                 usb_pause_mtx(&sc->sc_mtx, 1);
3330         }
3331         urtw_8225_write(sc, 0x00, 0x01b7);
3332
3333         for (i = 0; i < 95; i++) {
3334                 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1));
3335                 usb_pause_mtx(&sc->sc_mtx, 1);
3336                 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC,
3337                     urtw_8225v2b_rxgain[i]);
3338                 usb_pause_mtx(&sc->sc_mtx, 1);
3339         }
3340
3341         urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080);
3342         usb_pause_mtx(&sc->sc_mtx, 1);
3343         urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004);
3344         usb_pause_mtx(&sc->sc_mtx, 1);
3345         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7);
3346         usb_pause_mtx(&sc->sc_mtx, 1);
3347         usb_pause_mtx(&sc->sc_mtx, 3000);
3348         urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d);
3349         usb_pause_mtx(&sc->sc_mtx, 2000);
3350         urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d);
3351         usb_pause_mtx(&sc->sc_mtx, 1);
3352         urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf);
3353         usb_pause_mtx(&sc->sc_mtx, 1);
3354
3355         urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03);
3356         urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07);
3357         urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03);
3358
3359         urtw_8187_write_phy_ofdm(sc, 0x80, 0x12);
3360         for (i = 0; i < 128; i++) {
3361                 uint32_t addr, data;
3362
3363                 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f;
3364                 addr = ((i + 0x80) << 8) | 0x0000008e;
3365
3366                 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff);
3367                 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff);
3368                 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00);
3369         }
3370         urtw_8187_write_phy_ofdm(sc, 0x80, 0x10);
3371
3372         for (i = 0; i < N(urtw_8225v2b_rf_part2); i++)
3373                 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val);
3374
3375         urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c);
3376         urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c);
3377         urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c);
3378         urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c);
3379
3380         urtw_8187_write_phy_ofdm(sc, 0x97, 0x46);
3381         urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6);
3382         urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc);
3383         urtw_8187_write_phy_cck(sc, 0xc1, 0x88);
3384
3385 fail:
3386         return (error);
3387 #undef N
3388 }
3389
3390 static usb_error_t
3391 urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan)
3392 {
3393         usb_error_t error;
3394
3395         error = urtw_8225v2b_set_txpwrlvl(sc, chan);
3396         if (error)
3397                 goto fail;
3398
3399         urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]);
3400         usb_pause_mtx(&sc->sc_mtx, 10);
3401 fail:
3402         return (error);
3403 }
3404
3405 static usb_error_t
3406 urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan)
3407 {
3408         int i;
3409         uint8_t *cck_pwrtable;
3410         uint8_t cck_pwrlvl_max = 15;
3411         uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff;
3412         uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff;
3413         usb_error_t error;
3414
3415         /* CCK power setting */
3416         cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ?
3417             ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) :
3418             (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7));
3419         cck_pwrlvl += sc->sc_txpwr_cck_base;
3420         cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl;
3421         cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 :
3422             urtw_8225v2b_txpwr_cck;
3423
3424         if (sc->sc_flags & URTW_RTL8187B_REV_B)
3425                 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 :
3426                     ((cck_pwrlvl <= 11) ? 8 : 16);
3427         else
3428                 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 :
3429                     ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24));
3430
3431         for (i = 0; i < 8; i++)
3432                 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]);
3433
3434         urtw_write8_m(sc, URTW_TX_GAIN_CCK,
3435             urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1);
3436         usb_pause_mtx(&sc->sc_mtx, 1);
3437
3438         /* OFDM power setting */
3439         ofdm_pwrlvl = (ofdm_pwrlvl > 15) ?
3440             ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) :
3441             (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10));
3442         ofdm_pwrlvl += sc->sc_txpwr_ofdm_base;
3443         ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl;
3444
3445         urtw_write8_m(sc, URTW_TX_GAIN_OFDM,
3446             urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1);
3447
3448         if (sc->sc_flags & URTW_RTL8187B_REV_B) {
3449                 if (ofdm_pwrlvl <= 11) {
3450                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x60);
3451                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x60);
3452                 } else {
3453                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3454                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3455                 }
3456         } else {
3457                 if (ofdm_pwrlvl <= 11) {
3458                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c);
3459                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c);
3460                 } else if (ofdm_pwrlvl <= 17) {
3461                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x54);
3462                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x54);
3463                 } else {
3464                         urtw_8187_write_phy_ofdm(sc, 0x87, 0x50);
3465                         urtw_8187_write_phy_ofdm(sc, 0x89, 0x50);
3466                 }
3467         }
3468         usb_pause_mtx(&sc->sc_mtx, 1);
3469 fail:
3470         return (error);
3471 }
3472
3473 static usb_error_t
3474 urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data)
3475 {
3476         struct usb_device_request req;
3477         usb_error_t error;
3478
3479         req.bmRequestType = UT_READ_VENDOR_DEVICE;
3480         req.bRequest = URTW_8187_GETREGS_REQ;
3481         USETW(req.wValue, val | 0xfe00);
3482         USETW(req.wIndex, 0);
3483         USETW(req.wLength, sizeof(uint8_t));
3484
3485         error = urtw_do_request(sc, &req, data);
3486         return (error);
3487 }
3488
3489 static usb_error_t
3490 urtw_write8e(struct urtw_softc *sc, int val, uint8_t data)
3491 {
3492         struct usb_device_request req;
3493
3494         req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
3495         req.bRequest = URTW_8187_SETREGS_REQ;
3496         USETW(req.wValue, val | 0xfe00);
3497         USETW(req.wIndex, 0);
3498         USETW(req.wLength, sizeof(uint8_t));
3499
3500         return (urtw_do_request(sc, &req, &data));
3501 }
3502
3503 static usb_error_t
3504 urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val)
3505 {
3506         uint8_t data;
3507         usb_error_t error;
3508
3509         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3510         if (error)
3511                 goto fail;
3512
3513         urtw_read8_m(sc, URTW_CONFIG3, &data);
3514         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3515         urtw_write32_m(sc, URTW_ANAPARAM, val);
3516         urtw_read8_m(sc, URTW_CONFIG3, &data);
3517         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3518
3519         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3520         if (error)
3521                 goto fail;
3522 fail:
3523         return (error);
3524 }
3525
3526 static usb_error_t
3527 urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val)
3528 {
3529         uint8_t data;
3530         usb_error_t error;
3531
3532         error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG);
3533         if (error)
3534                 goto fail;
3535
3536         urtw_read8_m(sc, URTW_CONFIG3, &data);
3537         urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE);
3538         urtw_write32_m(sc, URTW_ANAPARAM2, val);
3539         urtw_read8_m(sc, URTW_CONFIG3, &data);
3540         urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE);
3541
3542         error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL);
3543         if (error)
3544                 goto fail;
3545 fail:
3546         return (error);
3547 }
3548
3549 static usb_error_t
3550 urtw_intr_enable(struct urtw_softc *sc)
3551 {
3552         usb_error_t error;
3553
3554         urtw_write16_m(sc, URTW_INTR_MASK, 0xffff);
3555 fail:
3556         return (error);
3557 }
3558
3559 static usb_error_t
3560 urtw_intr_disable(struct urtw_softc *sc)
3561 {
3562         usb_error_t error;
3563
3564         urtw_write16_m(sc, URTW_INTR_MASK, 0);
3565 fail:
3566         return (error);
3567 }
3568
3569 static usb_error_t
3570 urtw_reset(struct urtw_softc *sc)
3571 {
3572         uint8_t data;
3573         usb_error_t error;
3574
3575         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3576         if (error)
3577                 goto fail;
3578         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3579         if (error)
3580                 goto fail;
3581
3582         error = urtw_intr_disable(sc);
3583         if (error)
3584                 goto fail;
3585         usb_pause_mtx(&sc->sc_mtx, 100);
3586
3587         error = urtw_write8e(sc, 0x18, 0x10);
3588         if (error != 0)
3589                 goto fail;
3590         error = urtw_write8e(sc, 0x18, 0x11);
3591         if (error != 0)
3592                 goto fail;
3593         error = urtw_write8e(sc, 0x18, 0x00);
3594         if (error != 0)
3595                 goto fail;
3596         usb_pause_mtx(&sc->sc_mtx, 100);
3597
3598         urtw_read8_m(sc, URTW_CMD, &data);
3599         data = (data & 0x2) | URTW_CMD_RST;
3600         urtw_write8_m(sc, URTW_CMD, data);
3601         usb_pause_mtx(&sc->sc_mtx, 100);
3602
3603         urtw_read8_m(sc, URTW_CMD, &data);
3604         if (data & URTW_CMD_RST) {
3605                 device_printf(sc->sc_dev, "reset timeout\n");
3606                 goto fail;
3607         }
3608
3609         error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD);
3610         if (error)
3611                 goto fail;
3612         usb_pause_mtx(&sc->sc_mtx, 100);
3613
3614         error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON);
3615         if (error)
3616                 goto fail;
3617         error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON);
3618         if (error)
3619                 goto fail;
3620 fail:
3621         return (error);
3622 }
3623
3624 static usb_error_t
3625 urtw_led_ctl(struct urtw_softc *sc, int mode)
3626 {
3627         usb_error_t error = 0;
3628
3629         switch (sc->sc_strategy) {
3630         case URTW_SW_LED_MODE0:
3631                 error = urtw_led_mode0(sc, mode);
3632                 break;
3633         case URTW_SW_LED_MODE1:
3634                 error = urtw_led_mode1(sc, mode);
3635                 break;
3636         case URTW_SW_LED_MODE2:
3637                 error = urtw_led_mode2(sc, mode);
3638                 break;
3639         case URTW_SW_LED_MODE3:
3640                 error = urtw_led_mode3(sc, mode);
3641                 break;
3642         default:
3643                 DPRINTF(sc, URTW_DEBUG_STATE,
3644                     "unsupported LED mode %d\n", sc->sc_strategy);
3645                 error = USB_ERR_INVAL;
3646                 break;
3647         }
3648
3649         return (error);
3650 }
3651
3652 static usb_error_t
3653 urtw_led_mode0(struct urtw_softc *sc, int mode)
3654 {
3655
3656         switch (mode) {
3657         case URTW_LED_CTL_POWER_ON:
3658                 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK;
3659                 break;
3660         case URTW_LED_CTL_TX:
3661                 if (sc->sc_gpio_ledinprogress == 1)
3662                         return (0);
3663
3664                 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL;
3665                 sc->sc_gpio_blinktime = 2;
3666                 break;
3667         case URTW_LED_CTL_LINK:
3668                 sc->sc_gpio_ledstate = URTW_LED_ON;
3669                 break;
3670         default:
3671                 DPRINTF(sc, URTW_DEBUG_STATE,
3672                     "unsupported LED mode 0x%x", mode);
3673                 return (USB_ERR_INVAL);
3674         }
3675
3676         switch (sc->sc_gpio_ledstate) {
3677         case URTW_LED_ON:
3678                 if (sc->sc_gpio_ledinprogress != 0)
3679                         break;
3680                 urtw_led_on(sc, URTW_LED_GPIO);
3681                 break;
3682         case URTW_LED_BLINK_NORMAL:
3683                 if (sc->sc_gpio_ledinprogress != 0)
3684                         break;
3685                 sc->sc_gpio_ledinprogress = 1;
3686                 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ?
3687                         URTW_LED_OFF : URTW_LED_ON;
3688                 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3689                 break;
3690         case URTW_LED_POWER_ON_BLINK:
3691                 urtw_led_on(sc, URTW_LED_GPIO);
3692                 usb_pause_mtx(&sc->sc_mtx, 100);
3693                 urtw_led_off(sc, URTW_LED_GPIO);
3694                 break;
3695         default:
3696                 DPRINTF(sc, URTW_DEBUG_STATE,
3697                     "unknown LED status 0x%x", sc->sc_gpio_ledstate);
3698                 return (USB_ERR_INVAL);
3699         }
3700         return (0);
3701 }
3702
3703 static usb_error_t
3704 urtw_led_mode1(struct urtw_softc *sc, int mode)
3705 {
3706         return (USB_ERR_INVAL);
3707 }
3708
3709 static usb_error_t
3710 urtw_led_mode2(struct urtw_softc *sc, int mode)
3711 {
3712         return (USB_ERR_INVAL);
3713 }
3714
3715 static usb_error_t
3716 urtw_led_mode3(struct urtw_softc *sc, int mode)
3717 {
3718         return (USB_ERR_INVAL);
3719 }
3720
3721 static usb_error_t
3722 urtw_led_on(struct urtw_softc *sc, int type)
3723 {
3724         usb_error_t error;
3725
3726         if (type == URTW_LED_GPIO) {
3727                 switch (sc->sc_gpio_ledpin) {
3728                 case URTW_LED_PIN_GPIO0:
3729                         urtw_write8_m(sc, URTW_GPIO, 0x01);
3730                         urtw_write8_m(sc, URTW_GP_ENABLE, 0x00);
3731                         break;
3732                 default:
3733                         DPRINTF(sc, URTW_DEBUG_STATE,
3734                             "unsupported LED PIN type 0x%x",
3735                             sc->sc_gpio_ledpin);
3736                         error = USB_ERR_INVAL;
3737                         goto fail;
3738                 }
3739         } else {
3740                 DPRINTF(sc, URTW_DEBUG_STATE,
3741                     "unsupported LED type 0x%x", type);
3742                 error = USB_ERR_INVAL;
3743                 goto fail;
3744         }
3745
3746         sc->sc_gpio_ledon = 1;
3747 fail:
3748         return (error);
3749 }
3750
3751 static usb_error_t
3752 urtw_led_off(struct urtw_softc *sc, int type)
3753 {
3754         usb_error_t error;
3755
3756         if (type == URTW_LED_GPIO) {
3757                 switch (sc->sc_gpio_ledpin) {
3758                 case URTW_LED_PIN_GPIO0:
3759                         urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1);
3760                         urtw_write8_m(sc,
3761                             URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1);
3762                         break;
3763                 default:
3764                         DPRINTF(sc, URTW_DEBUG_STATE,
3765                             "unsupported LED PIN type 0x%x",
3766                             sc->sc_gpio_ledpin);
3767                         error = USB_ERR_INVAL;
3768                         goto fail;
3769                 }
3770         } else {
3771                 DPRINTF(sc, URTW_DEBUG_STATE,
3772                     "unsupported LED type 0x%x", type);
3773                 error = USB_ERR_INVAL;
3774                 goto fail;
3775         }
3776
3777         sc->sc_gpio_ledon = 0;
3778
3779 fail:
3780         return (error);
3781 }
3782
3783 static void
3784 urtw_led_ch(void *arg)
3785 {
3786         struct urtw_softc *sc = arg;
3787         struct ifnet *ifp = sc->sc_ifp;
3788         struct ieee80211com *ic = ifp->if_l2com;
3789
3790         ieee80211_runtask(ic, &sc->sc_led_task);
3791 }
3792
3793 static void
3794 urtw_ledtask(void *arg, int pending)
3795 {
3796         struct urtw_softc *sc = arg;
3797
3798         if (sc->sc_strategy != URTW_SW_LED_MODE0) {
3799                 DPRINTF(sc, URTW_DEBUG_STATE,
3800                     "could not process a LED strategy 0x%x",
3801                     sc->sc_strategy);
3802                 return;
3803         }
3804
3805         URTW_LOCK(sc);
3806         urtw_led_blink(sc);
3807         URTW_UNLOCK(sc);
3808 }
3809
3810 static usb_error_t
3811 urtw_led_blink(struct urtw_softc *sc)
3812 {
3813         uint8_t ing = 0;
3814         usb_error_t error;
3815
3816         if (sc->sc_gpio_blinkstate == URTW_LED_ON)
3817                 error = urtw_led_on(sc, URTW_LED_GPIO);
3818         else
3819                 error = urtw_led_off(sc, URTW_LED_GPIO);
3820         sc->sc_gpio_blinktime--;
3821         if (sc->sc_gpio_blinktime == 0)
3822                 ing = 1;
3823         else {
3824                 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL &&
3825                     sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY &&
3826                     sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3)
3827                         ing = 1;
3828         }
3829         if (ing == 1) {
3830                 if (sc->sc_gpio_ledstate == URTW_LED_ON &&
3831                     sc->sc_gpio_ledon == 0)
3832                         error = urtw_led_on(sc, URTW_LED_GPIO);
3833                 else if (sc->sc_gpio_ledstate == URTW_LED_OFF &&
3834                     sc->sc_gpio_ledon == 1)
3835                         error = urtw_led_off(sc, URTW_LED_GPIO);
3836
3837                 sc->sc_gpio_blinktime = 0;
3838                 sc->sc_gpio_ledinprogress = 0;
3839                 return (0);
3840         }
3841
3842         sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ?
3843             URTW_LED_ON : URTW_LED_OFF;
3844
3845         switch (sc->sc_gpio_ledstate) {
3846         case URTW_LED_BLINK_NORMAL:
3847                 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc);
3848                 break;
3849         default:
3850                 DPRINTF(sc, URTW_DEBUG_STATE,
3851                     "unknown LED status 0x%x",
3852                     sc->sc_gpio_ledstate);
3853                 return (USB_ERR_INVAL);
3854         }
3855         return (0);
3856 }
3857
3858 static usb_error_t
3859 urtw_rx_enable(struct urtw_softc *sc)
3860 {
3861         uint8_t data;
3862         usb_error_t error;
3863
3864         usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ?
3865             sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]);
3866
3867         error = urtw_rx_setconf(sc);
3868         if (error != 0)
3869                 goto fail;
3870
3871         if ((sc->sc_flags & URTW_RTL8187B) == 0) {
3872                 urtw_read8_m(sc, URTW_CMD, &data);
3873                 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE);
3874         }
3875 fail:
3876         return (error);
3877 }
3878
3879 static usb_error_t
3880 urtw_tx_enable(struct urtw_softc *sc)
3881 {
3882         uint8_t data8;
3883         uint32_t data;
3884         usb_error_t error;
3885
3886         if (sc->sc_flags & URTW_RTL8187B) {
3887                 urtw_read32_m(sc, URTW_TX_CONF, &data);
3888                 data &= ~URTW_TX_LOOPBACK_MASK;
3889                 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3890                 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3891                 data &= ~URTW_TX_SWPLCPLEN;
3892                 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE |
3893                     (7 << 8) |  /* short retry limit */
3894                     (7 << 0) |  /* long retry limit */
3895                     (7 << 21);  /* MAX TX DMA */
3896                 urtw_write32_m(sc, URTW_TX_CONF, data);
3897
3898                 urtw_read8_m(sc, URTW_MSR, &data8);
3899                 data8 |= URTW_MSR_LINK_ENEDCA;
3900                 urtw_write8_m(sc, URTW_MSR, data8);
3901                 return (error);
3902         }
3903
3904         urtw_read8_m(sc, URTW_CW_CONF, &data8);
3905         data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY);
3906         urtw_write8_m(sc, URTW_CW_CONF, data8);
3907
3908         urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8);
3909         data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN;
3910         data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL;
3911         data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT;
3912         urtw_write8_m(sc, URTW_TX_AGC_CTL, data8);
3913
3914         urtw_read32_m(sc, URTW_TX_CONF, &data);
3915         data &= ~URTW_TX_LOOPBACK_MASK;
3916         data |= URTW_TX_LOOPBACK_NONE;
3917         data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK);
3918         data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT;
3919         data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT;
3920         data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK);
3921         data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW;
3922         data &= ~URTW_TX_SWPLCPLEN;
3923         data |= URTW_TX_NOICV;
3924         urtw_write32_m(sc, URTW_TX_CONF, data);
3925
3926         urtw_read8_m(sc, URTW_CMD, &data8);
3927         urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE);
3928 fail:
3929         return (error);
3930 }
3931
3932 static usb_error_t
3933 urtw_rx_setconf(struct urtw_softc *sc)
3934 {
3935         struct ifnet *ifp = sc->sc_ifp;
3936         struct ieee80211com *ic = ifp->if_l2com;
3937         uint32_t data;
3938         usb_error_t error;
3939
3940         urtw_read32_m(sc, URTW_RX, &data);
3941         data = data &~ URTW_RX_FILTER_MASK;
3942         if (sc->sc_flags & URTW_RTL8187B) {
3943                 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA |
3944                     URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST |
3945                     URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID |
3946                     URTW_RX_FIFO_THRESHOLD_NONE |
3947                     URTW_MAX_RX_DMA_2048 |
3948                     URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT;
3949         } else {
3950                 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA;
3951                 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST;
3952
3953                 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
3954                         data = data | URTW_RX_FILTER_ICVERR;
3955                         data = data | URTW_RX_FILTER_PWR;
3956                 }
3957                 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR)
3958                         data = data | URTW_RX_FILTER_CRCERR;
3959
3960                 if (ic->ic_opmode == IEEE80211_M_MONITOR ||
3961                     (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) {
3962                         data = data | URTW_RX_FILTER_ALLMAC;
3963                 } else {
3964                         data = data | URTW_RX_FILTER_NICMAC;
3965                         data = data | URTW_RX_CHECK_BSSID;
3966                 }
3967
3968                 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK;
3969                 data = data | URTW_RX_FIFO_THRESHOLD_NONE |
3970                     URTW_RX_AUTORESETPHY;
3971                 data = data &~ URTW_MAX_RX_DMA_MASK;
3972                 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT;
3973         }
3974
3975         urtw_write32_m(sc, URTW_RX, data);
3976 fail:
3977         return (error);
3978 }
3979
3980 static struct mbuf *
3981 urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p,
3982     int8_t *nf_p)
3983 {
3984         int actlen, flen, rssi;
3985         struct ieee80211_frame *wh;
3986         struct mbuf *m, *mnew;
3987         struct urtw_softc *sc = data->sc;
3988         struct ifnet *ifp = sc->sc_ifp;
3989         struct ieee80211com *ic = ifp->if_l2com;
3990         uint8_t noise = 0, rate;
3991
3992         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
3993
3994         if (actlen < (int)URTW_MIN_RXBUFSZ) {
3995                 ifp->if_ierrors++;
3996                 return (NULL);
3997         }
3998
3999         if (sc->sc_flags & URTW_RTL8187B) {
4000                 struct urtw_8187b_rxhdr *rx;
4001
4002                 rx = (struct urtw_8187b_rxhdr *)(data->buf +
4003                     (actlen - (sizeof(struct urtw_8187b_rxhdr))));
4004                 flen = le32toh(rx->flag) & 0xfff;
4005                 if (flen > actlen) {
4006                         ifp->if_ierrors++;
4007                         return (NULL);
4008                 }
4009                 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
4010                 /* XXX correct? */
4011                 rssi = rx->rssi & URTW_RX_RSSI_MASK;
4012                 noise = rx->noise;
4013         } else {
4014                 struct urtw_8187l_rxhdr *rx;
4015
4016                 rx = (struct urtw_8187l_rxhdr *)(data->buf +
4017                     (actlen - (sizeof(struct urtw_8187l_rxhdr))));
4018                 flen = le32toh(rx->flag) & 0xfff;
4019                 if (flen > actlen) {
4020                         ifp->if_ierrors++;
4021                         return (NULL);
4022                 }
4023
4024                 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf;
4025                 /* XXX correct? */
4026                 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK;
4027                 noise = rx->noise;
4028         }
4029
4030         mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
4031         if (mnew == NULL) {
4032                 ifp->if_ierrors++;
4033                 return (NULL);
4034         }
4035
4036         m = data->m;
4037         data->m = mnew;
4038         data->buf = mtod(mnew, uint8_t *);
4039
4040         /* finalize mbuf */
4041         m->m_pkthdr.rcvif = ifp;
4042         m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN;
4043
4044         if (ieee80211_radiotap_active(ic)) {
4045                 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap;
4046
4047                 /* XXX Are variables correct?  */
4048                 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
4049                 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
4050                 tap->wr_dbm_antsignal = (int8_t)rssi;
4051         }
4052
4053         wh = mtod(m, struct ieee80211_frame *);
4054         if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA)
4055                 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate;
4056
4057         *rssi_p = rssi;
4058         *nf_p = noise;          /* XXX correct? */
4059
4060         return (m);
4061 }
4062
4063 static void
4064 urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
4065 {
4066         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4067         struct ifnet *ifp = sc->sc_ifp;
4068         struct ieee80211com *ic = ifp->if_l2com;
4069         struct ieee80211_frame *wh;
4070         struct ieee80211_node *ni;
4071         struct mbuf *m = NULL;
4072         struct urtw_data *data;
4073         int8_t nf = -95;
4074         int rssi = 1;
4075
4076         URTW_ASSERT_LOCKED(sc);
4077
4078         switch (USB_GET_STATE(xfer)) {
4079         case USB_ST_TRANSFERRED:
4080                 data = STAILQ_FIRST(&sc->sc_rx_active);
4081                 if (data == NULL)
4082                         goto setup;
4083                 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4084                 m = urtw_rxeof(xfer, data, &rssi, &nf);
4085                 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4086                 /* FALLTHROUGH */
4087         case USB_ST_SETUP:
4088 setup:
4089                 data = STAILQ_FIRST(&sc->sc_rx_inactive);
4090                 if (data == NULL) {
4091                         KASSERT(m == NULL, ("mbuf isn't NULL"));
4092                         return;
4093                 }
4094                 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
4095                 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
4096                 usbd_xfer_set_frame_data(xfer, 0, data->buf,
4097                     usbd_xfer_max_len(xfer));
4098                 usbd_transfer_submit(xfer);
4099
4100                 /*
4101                  * To avoid LOR we should unlock our private mutex here to call
4102                  * ieee80211_input() because here is at the end of a USB
4103                  * callback and safe to unlock.
4104                  */
4105                 URTW_UNLOCK(sc);
4106                 if (m != NULL) {
4107                         wh = mtod(m, struct ieee80211_frame *);
4108                         ni = ieee80211_find_rxnode(ic,
4109                             (struct ieee80211_frame_min *)wh);
4110                         if (ni != NULL) {
4111                                 (void) ieee80211_input(ni, m, rssi, nf);
4112                                 /* node is no longer needed */
4113                                 ieee80211_free_node(ni);
4114                         } else
4115                                 (void) ieee80211_input_all(ic, m, rssi, nf);
4116                         m = NULL;
4117                 }
4118                 URTW_LOCK(sc);
4119                 break;
4120         default:
4121                 /* needs it to the inactive queue due to a error.  */
4122                 data = STAILQ_FIRST(&sc->sc_rx_active);
4123                 if (data != NULL) {
4124                         STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
4125                         STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
4126                 }
4127                 if (error != USB_ERR_CANCELLED) {
4128                         usbd_xfer_set_stall(xfer);
4129                         ifp->if_ierrors++;
4130                         goto setup;
4131                 }
4132                 break;
4133         }
4134 }
4135
4136 #define URTW_STATUS_TYPE_TXCLOSE        1
4137 #define URTW_STATUS_TYPE_BEACON_INTR    0
4138
4139 static void
4140 urtw_txstatus_eof(struct usb_xfer *xfer)
4141 {
4142         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4143         struct ifnet *ifp = sc->sc_ifp;
4144         int actlen, type, pktretry, seq;
4145         uint64_t val;
4146
4147         usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
4148
4149         if (actlen != sizeof(uint64_t))
4150                 return;
4151
4152         val = le64toh(sc->sc_txstatus);
4153         type = (val >> 30) & 0x3;
4154         if (type == URTW_STATUS_TYPE_TXCLOSE) {
4155                 pktretry = val & 0xff;
4156                 seq = (val >> 16) & 0xff;
4157                 if (pktretry == URTW_TX_MAXRETRY)
4158                         ifp->if_oerrors++;
4159                 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n",
4160                     pktretry, seq);
4161         }
4162 }
4163
4164 static void
4165 urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error)
4166 {
4167         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4168         struct ifnet *ifp = sc->sc_ifp;
4169         void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0);
4170
4171         URTW_ASSERT_LOCKED(sc);
4172
4173         switch (USB_GET_STATE(xfer)) {
4174         case USB_ST_TRANSFERRED:
4175                 urtw_txstatus_eof(xfer);
4176                 /* FALLTHROUGH */
4177         case USB_ST_SETUP:
4178 setup:
4179                 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t));
4180                 usbd_transfer_submit(xfer);
4181                 break;
4182         default:
4183                 if (error != USB_ERR_CANCELLED) {
4184                         usbd_xfer_set_stall(xfer);
4185                         ifp->if_ierrors++;
4186                         goto setup;
4187                 }
4188                 break;
4189         }
4190 }
4191
4192 static void
4193 urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data)
4194 {
4195         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4196         struct ifnet *ifp = sc->sc_ifp;
4197         struct mbuf *m;
4198
4199         URTW_ASSERT_LOCKED(sc);
4200
4201         /*
4202          * Do any tx complete callback.  Note this must be done before releasing
4203          * the node reference.
4204          */
4205         if (data->m) {
4206                 m = data->m;
4207                 if (m->m_flags & M_TXCB) {
4208                         /* XXX status? */
4209                         ieee80211_process_callback(data->ni, m, 0);
4210                 }
4211                 m_freem(m);
4212                 data->m = NULL;
4213         }
4214         if (data->ni) {
4215                 ieee80211_free_node(data->ni);
4216                 data->ni = NULL;
4217         }
4218         sc->sc_txtimer = 0;
4219         ifp->if_opackets++;
4220         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
4221 }
4222
4223 static void
4224 urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
4225 {
4226         struct urtw_softc *sc = usbd_xfer_softc(xfer);
4227         struct ifnet *ifp = sc->sc_ifp;
4228         struct urtw_data *data;
4229
4230         URTW_ASSERT_LOCKED(sc);
4231
4232         switch (USB_GET_STATE(xfer)) {
4233         case USB_ST_TRANSFERRED:
4234                 data = STAILQ_FIRST(&sc->sc_tx_active);
4235                 if (data == NULL)
4236                         goto setup;
4237                 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next);
4238                 urtw_txeof(xfer, data);
4239                 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next);
4240                 /* FALLTHROUGH */
4241         case USB_ST_SETUP:
4242 setup:
4243                 data = STAILQ_FIRST(&sc->sc_tx_pending);
4244                 if (data == NULL) {
4245                         DPRINTF(sc, URTW_DEBUG_XMIT,
4246                             "%s: empty pending queue\n", __func__);
4247                         return;
4248                 }
4249                 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next);
4250                 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next);
4251
4252                 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
4253                 usbd_transfer_submit(xfer);
4254
4255                 URTW_UNLOCK(sc);
4256                 urtw_start(ifp);
4257                 URTW_LOCK(sc);
4258                 break;
4259         default:
4260                 data = STAILQ_FIRST(&sc->sc_tx_active);
4261                 if (data == NULL)
4262                         goto setup;
4263                 if (data->ni != NULL) {
4264                         ieee80211_free_node(data->ni);
4265                         data->ni = NULL;
4266                         ifp->if_oerrors++;
4267                 }
4268                 if (error != USB_ERR_CANCELLED) {
4269                         usbd_xfer_set_stall(xfer);
4270                         goto setup;
4271                 }
4272                 break;
4273         }
4274 }
4275
4276 static struct urtw_data *
4277 _urtw_getbuf(struct urtw_softc *sc)
4278 {
4279         struct urtw_data *bf;
4280
4281         bf = STAILQ_FIRST(&sc->sc_tx_inactive);
4282         if (bf != NULL)
4283                 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
4284         else
4285                 bf = NULL;
4286         if (bf == NULL)
4287                 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__,
4288                     "out of xmit buffers");
4289         return (bf);
4290 }
4291
4292 static struct urtw_data *
4293 urtw_getbuf(struct urtw_softc *sc)
4294 {
4295         struct urtw_data *bf;
4296
4297         URTW_ASSERT_LOCKED(sc);
4298
4299         bf = _urtw_getbuf(sc);
4300         if (bf == NULL) {
4301                 struct ifnet *ifp = sc->sc_ifp;
4302
4303                 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__);
4304                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
4305         }
4306         return (bf);
4307 }
4308
4309 static int
4310 urtw_isbmode(uint16_t rate)
4311 {
4312
4313         return ((rate <= 22 && rate != 12 && rate != 18) ||
4314             rate == 44) ? (1) : (0);
4315 }
4316
4317 static uint16_t
4318 urtw_rate2dbps(uint16_t rate)
4319 {
4320
4321         switch(rate) {
4322         case 12:
4323         case 18:
4324         case 24:
4325         case 36:
4326         case 48:
4327         case 72:
4328         case 96:
4329         case 108:
4330                 return (rate * 2);
4331         default:
4332                 break;
4333         }
4334         return (24);
4335 }
4336
4337 static int
4338 urtw_compute_txtime(uint16_t framelen, uint16_t rate,
4339     uint8_t ismgt, uint8_t isshort)
4340 {
4341         uint16_t     ceiling, frametime, n_dbps;
4342
4343         if (urtw_isbmode(rate)) {
4344                 if (ismgt || !isshort || rate == 2)
4345                         frametime = (uint16_t)(144 + 48 +
4346                             (framelen * 8 / (rate / 2)));
4347                 else
4348                         frametime = (uint16_t)(72 + 24 +
4349                             (framelen * 8 / (rate / 2)));
4350                 if ((framelen * 8 % (rate / 2)) != 0)
4351                         frametime++;
4352         } else {
4353                 n_dbps = urtw_rate2dbps(rate);
4354                 ceiling = (16 + 8 * framelen + 6) / n_dbps
4355                     + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0);
4356                 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6);
4357         }
4358         return (frametime);
4359 }
4360
4361 /*
4362  * Callback from the 802.11 layer to update the
4363  * slot time based on the current setting.
4364  */
4365 static void
4366 urtw_updateslot(struct ifnet *ifp)
4367 {
4368         struct urtw_softc *sc = ifp->if_softc;
4369         struct ieee80211com *ic = ifp->if_l2com;
4370
4371         ieee80211_runtask(ic, &sc->sc_updateslot_task);
4372 }
4373
4374 static void
4375 urtw_updateslottask(void *arg, int pending)
4376 {
4377         struct urtw_softc *sc = arg;
4378         struct ifnet *ifp = sc->sc_ifp;
4379         struct ieee80211com *ic = ifp->if_l2com;
4380         int error;
4381
4382         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
4383                 return;
4384
4385         URTW_LOCK(sc);
4386         if (sc->sc_flags & URTW_RTL8187B) {
4387                 urtw_write8_m(sc, URTW_SIFS, 0x22);
4388                 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan))
4389                         urtw_write8_m(sc, URTW_SLOT, 0x9);
4390                 else
4391                         urtw_write8_m(sc, URTW_SLOT, 0x14);
4392                 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b);
4393                 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b);
4394         } else {
4395                 urtw_write8_m(sc, URTW_SIFS, 0x22);
4396                 if (sc->sc_state == IEEE80211_S_ASSOC &&
4397                     ic->ic_flags & IEEE80211_F_SHSLOT)
4398                         urtw_write8_m(sc, URTW_SLOT, 0x9);
4399                 else
4400                         urtw_write8_m(sc, URTW_SLOT, 0x14);
4401                 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) {
4402                         urtw_write8_m(sc, URTW_DIFS, 0x14);
4403                         urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14);
4404                         urtw_write8_m(sc, URTW_CW_VAL, 0x73);
4405                 } else {
4406                         urtw_write8_m(sc, URTW_DIFS, 0x24);
4407                         urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24);
4408                         urtw_write8_m(sc, URTW_CW_VAL, 0xa5);
4409                 }
4410         }
4411 fail:
4412         URTW_UNLOCK(sc);
4413 }
4414
4415 static void
4416 urtw_sysctl_node(struct urtw_softc *sc)
4417 {
4418 #define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d)   \
4419         SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
4420         struct sysctl_ctx_list *ctx;
4421         struct sysctl_oid_list *child, *parent;
4422         struct sysctl_oid *tree;
4423         struct urtw_stats *stats = &sc->sc_stats;
4424
4425         ctx = device_get_sysctl_ctx(sc->sc_dev);
4426         child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev));
4427
4428         tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
4429             NULL, "URTW statistics");
4430         parent = SYSCTL_CHILDREN(tree);
4431
4432         /* Tx statistics. */
4433         tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD,
4434             NULL, "Tx MAC statistics");
4435         child = SYSCTL_CHILDREN(tree);
4436         URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0],
4437             "1 Mbit/s");
4438         URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1],
4439             "2 Mbit/s");
4440         URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2],
4441             "5.5 Mbit/s");
4442         URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4],
4443             "6 Mbit/s");
4444         URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5],
4445             "9 Mbit/s");
4446         URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3],
4447             "11 Mbit/s");
4448         URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6],
4449             "12 Mbit/s");
4450         URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7],
4451             "18 Mbit/s");
4452         URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8],
4453             "24 Mbit/s");
4454         URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9],
4455             "36 Mbit/s");
4456         URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10],
4457             "48 Mbit/s");
4458         URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11],
4459             "54 Mbit/s");
4460 #undef URTW_SYSCTL_STAT_ADD32
4461 }
4462
4463 static device_method_t urtw_methods[] = {
4464         DEVMETHOD(device_probe, urtw_match),
4465         DEVMETHOD(device_attach, urtw_attach),
4466         DEVMETHOD(device_detach, urtw_detach),
4467         DEVMETHOD_END
4468 };
4469 static driver_t urtw_driver = {
4470         .name = "urtw",
4471         .methods = urtw_methods,
4472         .size = sizeof(struct urtw_softc)
4473 };
4474 static devclass_t urtw_devclass;
4475
4476 DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0);
4477 MODULE_DEPEND(urtw, wlan, 1, 1, 1);
4478 MODULE_DEPEND(urtw, usb, 1, 1, 1);
4479 MODULE_VERSION(urtw, 1);