2 * Copyright(c) 2002-2011 Exar Corp.
5 * Redistribution and use in source and binary forms, with or without
6 * modification are permitted provided the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of the Exar Corporation nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
35 #ifndef _VXGE_OSDEP_H_
36 #define _VXGE_OSDEP_H_
38 #include <sys/param.h>
39 #include <sys/systm.h>
41 #if __FreeBSD_version >= 800000
42 #include <sys/buf_ring.h>
46 #include <sys/protosw.h>
47 #include <sys/socket.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/module.h>
52 #include <sys/sockio.h>
54 #include <sys/mutex.h>
56 #include <sys/stddef.h>
58 #include <sys/endian.h>
59 #include <sys/sysctl.h>
64 #include <net/if_arp.h>
66 #include <net/ethernet.h>
67 #include <net/if_dl.h>
68 #include <net/if_media.h>
69 #include <net/if_types.h>
70 #include <net/if_var.h>
71 #include <net/if_vlan_var.h>
73 #include <netinet/in_systm.h>
74 #include <netinet/in.h>
75 #include <netinet/if_ether.h>
76 #include <netinet/ip.h>
77 #include <netinet/ip6.h>
78 #include <netinet/tcp.h>
79 #include <netinet/tcp_lro.h>
80 #include <netinet/udp.h>
82 #include <machine/bus.h>
83 #include <machine/resource.h>
84 #include <machine/clock.h>
85 #include <machine/stdarg.h>
86 #include <machine/in_cksum.h>
91 #include <dev/pci/pcivar.h>
92 #include <dev/pci/pcireg.h>
93 #include <dev/pci/pci_private.h>
95 #include <dev/vxge/include/vxge-defs.h>
98 * ------------------------- includes and defines -------------------------
101 #if BYTE_ORDER == BIG_ENDIAN
102 #define VXGE_OS_HOST_BIG_ENDIAN
104 #define VXGE_OS_HOST_LITTLE_ENDIAN
108 #define VXGE_OS_PLATFORM_64BIT
110 #define VXGE_OS_PLATFORM_32BIT
113 #define VXGE_OS_PCI_CONFIG_SIZE 256
114 #define VXGE_OS_HOST_PAGE_SIZE 4096
115 #define VXGE_LL_IP_FAST_CSUM(hdr, len) 0
118 #define __DECONST(type, var) ((type)(uintrptr_t)(const void *)(var))
121 typedef struct ifnet *ifnet_t;
122 typedef struct mbuf *mbuf_t;
123 typedef struct mbuf *OS_NETSTACK_BUF;
125 typedef struct _vxge_bus_res_t {
128 bus_space_tag_t bus_space_tag; /* DMA Tag */
129 bus_space_handle_t bus_space_handle; /* Bus handle */
130 struct resource *bar_start_addr; /* BAR address */
134 typedef struct _vxge_dma_alloc_t {
136 bus_addr_t dma_paddr; /* Physical Address */
137 caddr_t dma_vaddr; /* Virtual Address */
138 bus_dma_tag_t dma_tag; /* DMA Tag */
139 bus_dmamap_t dma_map; /* DMA Map */
140 bus_dma_segment_t dma_segment; /* DMA Segment */
141 bus_size_t dma_size; /* Size */
142 int dma_nseg; /* scatter-gather */
146 typedef struct _vxge_pci_info {
148 device_t ndev; /* Device */
149 void *reg_map[3]; /* BAR Resource */
150 struct resource *bar_info[3]; /* BAR tag and handle */
155 * ---------------------- fixed size primitive types -----------------------
157 typedef size_t ptr_t;
160 typedef uint16_t u16;
162 typedef uint32_t u32;
163 typedef unsigned long long int u64;
164 #ifndef __bool_true_false_are_defined
165 typedef boolean_t bool;
167 typedef bus_addr_t dma_addr_t;
168 typedef struct mtx spinlock_t;
169 typedef struct resource *pci_irq_h;
170 typedef vxge_pci_info_t *pci_dev_h;
171 typedef vxge_pci_info_t *pci_cfg_h;
172 typedef vxge_bus_res_t *pci_reg_h;
173 typedef vxge_dma_alloc_t pci_dma_h;
174 typedef vxge_dma_alloc_t pci_dma_acc_h;
177 * -------------------------- "libc" functionality -------------------------
179 #define vxge_os_curr_time systime
180 #define vxge_os_strcpy strcpy
181 #define vxge_os_strlcpy strlcpy
182 #define vxge_os_strlen strlen
183 #define vxge_os_sprintf sprintf
184 #define vxge_os_snprintf snprintf
185 #define vxge_os_println(buf) printf("%s\n", buf)
186 #define vxge_os_memzero bzero
187 #define vxge_os_memcmp memcmp
188 #define vxge_os_memcpy(dst, src, size) bcopy(src, dst, size)
190 #define vxge_os_timestamp(buff) { \
191 struct timeval cur_time; \
192 gettimeofday(&cur_time, 0); \
193 snprintf(buff, sizeof(buff), "%08li.%08li: ", \
194 cur_time.tv_sec, cur_time.tv_usec); \
197 #define vxge_os_printf(fmt...) { \
202 #define vxge_os_vaprintf(fmt...) \
205 #define vxge_os_vasprintf(fmt...) { \
206 vxge_os_printf(fmt); \
209 #define vxge_trace(trace, fmt, args...) \
210 vxge_debug_uld(VXGE_COMPONENT_ULD, \
211 trace, hldev, vpid, fmt, ## args)
214 * -------------------- synchronization primitives -------------------------
216 /* Initialize the spin lock */
217 #define vxge_os_spin_lock_init(lockp, ctxh) { \
218 if (mtx_initialized(lockp) == 0) \
219 mtx_init((lockp), "vxge", NULL, MTX_DEF); \
222 /* Initialize the spin lock (IRQ version) */
223 #define vxge_os_spin_lock_init_irq(lockp, ctxh) { \
224 if (mtx_initialized(lockp) == 0) \
225 mtx_init((lockp), "vxge", NULL, MTX_DEF); \
228 /* Destroy the lock */
229 #define vxge_os_spin_lock_destroy(lockp, ctxh) { \
230 if (mtx_initialized(lockp) != 0) \
231 mtx_destroy(lockp); \
234 /* Destroy the lock (IRQ version) */
235 #define vxge_os_spin_lock_destroy_irq(lockp, ctxh) { \
236 if (mtx_initialized(lockp) != 0) \
237 mtx_destroy(lockp); \
240 /* Acquire the lock */
241 #define vxge_os_spin_lock(lockp) { \
242 if (mtx_owned(lockp) == 0) \
246 /* Release the lock */
247 #define vxge_os_spin_unlock(lockp) mtx_unlock(lockp)
249 /* Acquire the lock (IRQ version) */
250 #define vxge_os_spin_lock_irq(lockp, flags) { \
252 if (mtx_owned(lockp) == 0) \
253 mtx_lock_flags(lockp, flags); \
256 /* Release the lock (IRQ version) */
257 #define vxge_os_spin_unlock_irq(lockp, flags) { \
259 mtx_unlock_flags(lockp, flags); \
262 /* Write memory barrier */
263 #if __FreeBSD_version < 800000
264 #if defined(__i386__) || defined(__amd64__)
265 #define mb() __asm volatile("mfence" ::: "memory")
266 #define wmb() __asm volatile("sfence" ::: "memory")
267 #define rmb() __asm volatile("lfence" ::: "memory")
275 #define vxge_os_wmb() wmb()
276 #define vxge_os_udelay(x) DELAY(x)
277 #define vxge_os_stall(x) DELAY(x)
278 #define vxge_os_mdelay(x) DELAY(x * 1000)
279 #define vxge_os_xchg (targetp, newval)
282 * ------------------------- misc primitives -------------------------------
284 #define vxge_os_be32 u32
285 #define vxge_os_unlikely(x) (x)
286 #define vxge_os_prefetch(x) (x = x)
287 #define vxge_os_prefetchw(x) (x = x)
288 #define vxge_os_bug vxge_os_printf
290 #define vxge_os_ntohs ntohs
291 #define vxge_os_ntohl ntohl
292 #define vxge_os_ntohll be64toh
294 #define vxge_os_htons htons
295 #define vxge_os_htonl htonl
296 #define vxge_os_htonll htobe64
298 #define vxge_os_in_multicast IN_MULTICAST
299 #define VXGE_OS_INADDR_BROADCAST INADDR_BROADCAST
301 * -------------------------- compiler stuff ------------------------------
303 #define __vxge_os_cacheline_size CACHE_LINE_SIZE
304 #define __vxge_os_attr_cacheline_aligned __aligned(__vxge_os_cacheline_size)
307 * ---------------------- memory primitives --------------------------------
309 #if defined(VXGE_OS_MEMORY_CHECK)
311 typedef struct _vxge_os_malloc_t {
320 #define VXGE_OS_MALLOC_CNT_MAX 64*1024
322 extern u32 g_malloc_cnt;
323 extern vxge_os_malloc_t g_malloc_arr[VXGE_OS_MALLOC_CNT_MAX];
325 #define VXGE_OS_MEMORY_CHECK_MALLOC(_vaddr, _size, _file, _line) { \
328 for (i = 0; i < g_malloc_cnt; i++) { \
329 if (g_malloc_arr[i].ptr == NULL) \
332 if (i == g_malloc_cnt) { \
334 if (g_malloc_cnt >= VXGE_OS_MALLOC_CNT_MAX) { \
335 vxge_os_bug("g_malloc_cnt exceed %d\n", \
336 VXGE_OS_MALLOC_CNT_MAX); \
338 g_malloc_arr[i].ptr = _vaddr; \
339 g_malloc_arr[i].size = _size; \
340 g_malloc_arr[i].file = _file; \
341 g_malloc_arr[i].line = _line; \
347 #define VXGE_OS_MEMORY_CHECK_FREE(_vaddr, _size, _file, _line) { \
349 for (i = 0; i < VXGE_OS_MALLOC_CNT_MAX; i++) { \
350 if (g_malloc_arr[i].ptr == _vaddr) { \
351 g_malloc_arr[i].ptr = NULL; \
352 if (_size && g_malloc_arr[i].size != _size) { \
353 vxge_os_printf("freeing wrong size " \
354 "%lu allocated %s:%lu:" \
355 VXGE_OS_LLXFMT":%lu\n", \
357 g_malloc_arr[i].file, \
358 g_malloc_arr[i].line, \
359 (u64)(u_long) g_malloc_arr[i].ptr, \
360 g_malloc_arr[i].size); \
368 #define VXGE_OS_MEMORY_CHECK_MALLOC(prt, size, file, line)
369 #define VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line)
373 vxge_mem_alloc_ex(u_long size, const char *file, int line)
376 vaddr = malloc(size, M_DEVBUF, M_ZERO | M_NOWAIT);
378 VXGE_OS_MEMORY_CHECK_MALLOC((void *)vaddr, size, file, line)
379 vxge_os_memzero(vaddr, size);
386 vxge_mem_free_ex(const void *vaddr, u_long size, const char *file, int line)
389 VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line)
390 free(__DECONST(void *, vaddr), M_DEVBUF);
394 #define vxge_os_malloc(pdev, size) \
395 vxge_mem_alloc_ex(size, __FILE__, __LINE__)
397 #define vxge_os_free(pdev, vaddr, size) \
398 vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__)
400 #define vxge_mem_alloc(size) \
401 vxge_mem_alloc_ex(size, __FILE__, __LINE__)
403 #define vxge_mem_free(vaddr, size) \
404 vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__)
406 #define vxge_free_packet(x) \
407 if (NULL != x) { m_freem(x); x = NULL; }
410 * --------------------------- pci primitives ------------------------------
412 #define vxge_os_pci_read8(pdev, cfgh, where, val) \
413 (*(val) = pci_read_config(pdev->ndev, where, 1))
415 #define vxge_os_pci_write8(pdev, cfgh, where, val) \
416 pci_write_config(pdev->ndev, where, val, 1)
418 #define vxge_os_pci_read16(pdev, cfgh, where, val) \
419 (*(val) = pci_read_config(pdev->ndev, where, 2))
421 #define vxge_os_pci_write16(pdev, cfgh, where, val) \
422 pci_write_config(pdev->ndev, where, val, 2)
424 #define vxge_os_pci_read32(pdev, cfgh, where, val) \
425 (*(val) = pci_read_config(pdev->ndev, where, 4))
427 #define vxge_os_pci_write32(pdev, cfgh, where, val) \
428 pci_write_config(pdev->ndev, where, val, 4)
431 vxge_os_pci_res_len(pci_dev_h pdev, pci_reg_h regh)
433 return (((vxge_bus_res_t *) regh)->bus_res_len);
437 vxge_os_pio_mem_read8(pci_dev_h pdev, pci_reg_h regh, void *addr)
440 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr);
442 return bus_space_read_1(((vxge_bus_res_t *) regh)->bus_space_tag,
443 ((vxge_bus_res_t *) regh)->bus_space_handle,
444 (bus_size_t) ((caddr_t) (addr) - vaddr));
448 vxge_os_pio_mem_read16(pci_dev_h pdev, pci_reg_h regh, void *addr)
451 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr);
453 return bus_space_read_2(((vxge_bus_res_t *) regh)->bus_space_tag,
454 ((vxge_bus_res_t *) regh)->bus_space_handle,
455 (bus_size_t) ((caddr_t) (addr) - vaddr));
459 vxge_os_pio_mem_read32(pci_dev_h pdev, pci_reg_h regh, void *addr)
462 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr);
464 return bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag,
465 ((vxge_bus_res_t *) regh)->bus_space_handle,
466 (bus_size_t) ((caddr_t) (addr) - vaddr));
470 vxge_os_pio_mem_read64(pci_dev_h pdev, pci_reg_h regh, void *addr)
472 u64 val, val_l, val_u;
475 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr);
477 val_l = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag,
478 ((vxge_bus_res_t *) regh)->bus_space_handle,
479 (bus_size_t) (((caddr_t) addr) + 4 - vaddr));
481 val_u = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag,
482 ((vxge_bus_res_t *) regh)->bus_space_handle,
483 (bus_size_t) ((caddr_t) (addr) - vaddr));
485 val = ((val_l << 32) | val_u);
490 vxge_os_pio_mem_write8(pci_dev_h pdev, pci_reg_h regh, u8 val, void *addr)
493 (caddr_t) (((vxge_bus_res_t *) regh)->bar_start_addr);
495 bus_space_write_1(((vxge_bus_res_t *) regh)->bus_space_tag,
496 ((vxge_bus_res_t *) regh)->bus_space_handle,
497 (bus_size_t) ((caddr_t) (addr) - vaddr), val);
501 vxge_os_pio_mem_write16(pci_dev_h pdev, pci_reg_h regh, u16 val, void *addr)
504 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr);
506 bus_space_write_2(((vxge_bus_res_t *) regh)->bus_space_tag,
507 ((vxge_bus_res_t *) regh)->bus_space_handle,
508 (bus_size_t) ((caddr_t) (addr) - vaddr), val);
512 vxge_os_pio_mem_write32(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr)
515 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr);
517 bus_space_write_4(((vxge_bus_res_t *) regh)->bus_space_tag,
518 ((vxge_bus_res_t *) regh)->bus_space_handle,
519 (bus_size_t) ((caddr_t) (addr) - vaddr), val);
523 vxge_os_pio_mem_write64(pci_dev_h pdev, pci_reg_h regh, u64 val, void *addr)
525 u32 val_l = (u32) (val & 0xffffffff);
526 u32 val_u = (u32) (val >> 32);
528 vxge_os_pio_mem_write32(pdev, regh, val_l, addr);
529 vxge_os_pio_mem_write32(pdev, regh, val_u, (caddr_t) addr + 4);
532 #define vxge_os_flush_bridge vxge_os_pio_mem_read64
535 * --------------------------- dma primitives -----------------------------
537 #define VXGE_OS_DMA_DIR_TODEVICE 0
538 #define VXGE_OS_DMA_DIR_FROMDEVICE 1
539 #define VXGE_OS_DMA_DIR_BIDIRECTIONAL 2
540 #define VXGE_OS_INVALID_DMA_ADDR ((bus_addr_t)0)
543 vxge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
548 *(bus_addr_t *) arg = segs->ds_addr;
552 vxge_os_dma_malloc(pci_dev_h pdev, u_long bytes, int dma_flags,
553 pci_dma_h * p_dmah, pci_dma_acc_h * p_dma_acch)
556 bus_addr_t bus_addr = BUS_SPACE_MAXADDR;
557 bus_size_t boundary, max_size, alignment = PAGE_SIZE;
559 if (bytes > PAGE_SIZE) {
563 boundary = PAGE_SIZE;
564 max_size = PAGE_SIZE;
567 error = bus_dma_tag_create(
568 bus_get_dma_tag(pdev->ndev), /* Parent */
569 alignment, /* Alignment */
570 boundary, /* Bounds */
571 bus_addr, /* Low Address */
572 bus_addr, /* High Address */
573 NULL, /* Filter Func */
574 NULL, /* Filter Func Argument */
575 bytes, /* Maximum Size */
576 1, /* Number of Segments */
577 max_size, /* Maximum Segment Size */
578 BUS_DMA_ALLOCNOW, /* Flags */
579 NULL, /* Lock Func */
580 NULL, /* Lock Func Arguments */
581 &(p_dmah->dma_tag)); /* DMA Tag */
584 device_printf(pdev->ndev, "bus_dma_tag_create failed\n");
588 p_dmah->dma_size = bytes;
589 error = bus_dmamem_alloc(p_dmah->dma_tag, (void **)&p_dmah->dma_vaddr,
590 (BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT),
593 device_printf(pdev->ndev, "bus_dmamem_alloc failed\n");
597 VXGE_OS_MEMORY_CHECK_MALLOC(p_dmah->dma_vaddr, p_dmah->dma_size,
600 return (p_dmah->dma_vaddr);
603 bus_dma_tag_destroy(p_dmah->dma_tag);
609 vxge_dma_free(pci_dev_h pdev, const void *vaddr, u_long size,
610 pci_dma_h *p_dmah, pci_dma_acc_h *p_dma_acch,
611 const char *file, int line)
613 VXGE_OS_MEMORY_CHECK_FREE(p_dmah->dma_vaddr, size, file, line)
615 bus_dmamem_free(p_dmah->dma_tag, p_dmah->dma_vaddr, p_dmah->dma_map);
616 bus_dma_tag_destroy(p_dmah->dma_tag);
618 p_dmah->dma_map = NULL;
619 p_dmah->dma_tag = NULL;
620 p_dmah->dma_vaddr = NULL;
624 vxge_hal_blockpool_block_add(void *, void *, u32, pci_dma_h *, pci_dma_acc_h *);
627 vxge_os_dma_malloc_async(pci_dev_h pdev, void *devh,
628 u_long size, int dma_flags)
631 pci_dma_acc_h acc_handle;
633 void *block_addr = NULL;
635 block_addr = vxge_os_dma_malloc(pdev, size, dma_flags,
636 &dma_h, &acc_handle);
638 vxge_hal_blockpool_block_add(devh, block_addr, size,
639 &dma_h, &acc_handle);
643 vxge_os_dma_sync(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr,
644 u64 dma_offset, size_t length, int dir)
646 bus_dmasync_op_t dmasync_op;
649 case VXGE_OS_DMA_DIR_TODEVICE:
650 dmasync_op = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTWRITE;
653 case VXGE_OS_DMA_DIR_FROMDEVICE:
654 dmasync_op = BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD;
658 case VXGE_OS_DMA_DIR_BIDIRECTIONAL:
659 dmasync_op = BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE;
663 bus_dmamap_sync(dmah.dma_tag, dmah.dma_map, dmasync_op);
666 static inline dma_addr_t
667 vxge_os_dma_map(pci_dev_h pdev, pci_dma_h dmah, void *vaddr, u_long size,
668 int dir, int dma_flags)
672 error = bus_dmamap_load(dmah.dma_tag, dmah.dma_map, dmah.dma_vaddr,
673 dmah.dma_size, vxge_dmamap_cb, &(dmah.dma_paddr), BUS_DMA_NOWAIT);
676 return (VXGE_OS_INVALID_DMA_ADDR);
678 dmah.dma_size = size;
679 return (dmah.dma_paddr);
683 vxge_os_dma_unmap(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr,
686 bus_dmamap_unload(dmah.dma_tag, dmah.dma_map);
689 #define vxge_os_dma_free(pdev, vaddr, size, dma_flags, p_dma_acch, p_dmah) \
690 vxge_dma_free(pdev, vaddr, size, p_dma_acch, p_dmah, \
694 vxge_os_is_my_packet(void *pdev, unsigned long addr)
699 #endif /* _VXGE_OSDEP_H_ */