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33 #include <dev/vxge/vxgehal/vxgehal.h>
36 * __hal_srpcim_alarm_process - Process Alarms.
38 * @srpcim_id: srpcim index
39 * @skip_alarms: Flag to indicate if not to clear the alarms
41 * Process srpcim alarms.
45 __hal_srpcim_alarm_process(
46 __hal_device_t * hldev,
54 vxge_hal_srpcim_reg_t *srpcim_reg;
56 vxge_assert(hldev != NULL);
58 vxge_hal_trace_log_srpcim_irq("==> %s:%s:%d",
59 __FILE__, __func__, __LINE__);
61 vxge_hal_trace_log_srpcim_irq("hldev = 0x"VXGE_OS_STXFMT,
64 srpcim_reg = hldev->srpcim_reg[srpcim_id];
66 alarm_status = vxge_os_pio_mem_read64(hldev->header.pdev,
68 &srpcim_reg->srpcim_general_int_status);
70 vxge_hal_info_log_srpcim_irq("alarm_status = 0x"VXGE_OS_STXFMT,
71 (ptr_t) alarm_status);
73 if (alarm_status & VXGE_HAL_SRPCIM_GENERAL_INT_STATUS_XMAC_INT) {
75 xgmac_status = vxge_os_pio_mem_read64(hldev->header.pdev,
77 &srpcim_reg->xgmac_sr_int_status);
79 vxge_hal_info_log_srpcim_irq("xgmac_status = 0x"VXGE_OS_STXFMT,
80 (ptr_t) xgmac_status);
83 VXGE_HAL_XGMAC_SR_INT_STATUS_ASIC_NTWK_SR_ERR_INT) {
85 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
87 &srpcim_reg->asic_ntwk_sr_err_reg);
89 vxge_hal_info_log_srpcim_irq("asic_ntwk_sr_err_reg = \
90 0x"VXGE_OS_STXFMT, (ptr_t) val64);
93 vxge_os_pio_mem_write64(hldev->header.pdev,
95 VXGE_HAL_INTR_MASK_ALL,
96 &srpcim_reg->asic_ntwk_sr_err_reg);
101 if (alarm_status & VXGE_HAL_SRPCIM_GENERAL_INT_STATUS_PIC_INT) {
103 pic_status = vxge_os_pio_mem_read64(hldev->header.pdev,
105 &srpcim_reg->srpcim_ppif_int_status);
107 vxge_hal_info_log_srpcim_irq("pic_status = 0x"VXGE_OS_STXFMT,
111 VXGE_HAL_SRPCIM_PPIF_INT_STATUS_SRPCIM_GEN_ERRORS_INT) {
113 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
115 &srpcim_reg->srpcim_gen_errors_reg);
117 vxge_hal_info_log_srpcim_irq("srpcim_gen_errors_reg = \
118 0x"VXGE_OS_STXFMT, (ptr_t) val64);
121 vxge_os_pio_mem_write64(hldev->header.pdev,
123 VXGE_HAL_INTR_MASK_ALL,
124 &srpcim_reg->srpcim_gen_errors_reg);
128 VXGE_HAL_SRPCIM_PPIF_INT_STATUS_MRPCIM_TO_SRPCIM_ALARM) {
130 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
132 &srpcim_reg->mrpcim_to_srpcim_alarm_reg);
134 vxge_hal_info_log_srpcim_irq("mrpcim_to_srpcim_alarm_reg = \
135 0x"VXGE_OS_STXFMT, (ptr_t) val64);
138 vxge_os_pio_mem_write64(hldev->header.pdev,
140 VXGE_HAL_INTR_MASK_ALL,
141 &srpcim_reg->mrpcim_to_srpcim_alarm_reg);
146 if (alarm_status & ~(
147 VXGE_HAL_SRPCIM_GENERAL_INT_STATUS_PIC_INT |
148 VXGE_HAL_SRPCIM_GENERAL_INT_STATUS_XMAC_INT)) {
149 vxge_hal_trace_log_srpcim_irq("%s:%s:%d Unknown Alarm",
150 __FILE__, __func__, __LINE__);
153 vxge_hal_trace_log_srpcim_irq("<== %s:%s:%d Result = 0",
154 __FILE__, __func__, __LINE__);
156 return (VXGE_HAL_OK);
160 * vxge_hal_srpcim_alarm_process - Process srpcim Alarms.
161 * @devh: Device Handle.
162 * @skip_alarms: Flag to indicate if not to clear the alarms
164 * Process srpcim alarms.
168 vxge_hal_srpcim_alarm_process(
169 vxge_hal_device_h devh,
174 vxge_hal_status_e status = VXGE_HAL_OK;
175 __hal_device_t *hldev = (__hal_device_t *) devh;
177 vxge_assert(devh != NULL);
179 vxge_hal_trace_log_srpcim_irq("==> %s:%s:%d",
180 __FILE__, __func__, __LINE__);
182 vxge_hal_trace_log_srpcim_irq("devh = 0x"VXGE_OS_STXFMT,
185 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
186 vxge_hal_trace_log_srpcim_irq("<== %s:%s:%d Result = %d",
187 __FILE__, __func__, __LINE__,
188 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
190 return (VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
194 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
196 val64 = vxge_os_pio_mem_read64(hldev->header.pdev,
198 &hldev->mrpcim_reg->srpcim_to_mrpcim_alarm_reg);
200 vxge_hal_trace_log_srpcim_irq("srpcim_to_mrpcim_alarm_reg = \
201 0x"VXGE_OS_STXFMT, (ptr_t) val64);
203 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
205 if (val64 & mBIT(i)) {
206 status = __hal_srpcim_alarm_process(hldev,
212 vxge_os_pio_mem_write64(hldev->header.pdev,
214 VXGE_HAL_INTR_MASK_ALL,
215 &hldev->mrpcim_reg->srpcim_to_mrpcim_alarm_reg);
217 status = __hal_srpcim_alarm_process(hldev,
218 hldev->srpcim_id, skip_alarms);
221 vxge_hal_trace_log_srpcim_irq("<== %s:%s:%d Result = %d",
222 __FILE__, __func__, __LINE__, status);
228 * __hal_srpcim_intr_enable - Enable srpcim interrupts.
229 * @hldev: Hal Device.
230 * @srpcim_id: SRPCIM Id
232 * Enable srpcim interrupts.
234 * See also: __hal_srpcim_intr_disable()
237 __hal_srpcim_intr_enable(
238 __hal_device_t * hldev,
241 vxge_hal_srpcim_reg_t *srpcim_reg;
243 vxge_assert(hldev != NULL);
245 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
246 __FILE__, __func__, __LINE__);
248 vxge_hal_trace_log_srpcim("hldev = 0x"VXGE_OS_STXFMT,
251 srpcim_reg = hldev->srpcim_reg[srpcim_id];
253 vxge_os_pio_mem_write64(hldev->header.pdev,
255 VXGE_HAL_INTR_MASK_ALL,
256 &srpcim_reg->srpcim_gen_errors_reg);
258 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
260 (u32) VXGE_HAL_INTR_MASK_ALL,
261 &srpcim_reg->mrpcim_to_srpcim_alarm_reg);
263 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
265 (u32) VXGE_HAL_INTR_MASK_ALL,
266 &srpcim_reg->vpath_to_srpcim_alarm_reg);
268 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
270 (u32) VXGE_HAL_INTR_MASK_ALL,
271 &srpcim_reg->srpcim_ppif_int_status);
273 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
275 (u32) VXGE_HAL_INTR_MASK_ALL,
276 &srpcim_reg->mrpcim_msg_reg);
278 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
280 (u32) VXGE_HAL_INTR_MASK_ALL,
281 &srpcim_reg->vpath_msg_reg);
283 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
285 (u32) VXGE_HAL_INTR_MASK_ALL,
286 &srpcim_reg->srpcim_pcipif_int_status);
288 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
290 (u32) VXGE_HAL_INTR_MASK_ALL,
291 &srpcim_reg->asic_ntwk_sr_err_reg);
293 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
295 (u32) VXGE_HAL_INTR_MASK_ALL,
296 &srpcim_reg->xgmac_sr_int_status);
298 vxge_os_pio_mem_read64(hldev->header.pdev,
300 &srpcim_reg->srpcim_general_int_status);
302 /* Unmask the individual interrupts. */
303 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
306 &srpcim_reg->vpath_msg_mask);
308 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
311 &srpcim_reg->srpcim_pcipif_int_mask);
313 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
315 (u32) bVAL32(~VXGE_HAL_SRPCIM_GENERAL_INT_MASK_PCI_INT, 0),
316 &srpcim_reg->srpcim_general_int_mask);
318 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
319 __FILE__, __func__, __LINE__);
321 return (VXGE_HAL_OK);
325 * vxge_hal_srpcim_intr_enable - Enable srpcim interrupts.
328 * Enable srpcim interrupts.
330 * See also: vxge_hal_srpcim_intr_disable()
333 vxge_hal_srpcim_intr_enable(
334 vxge_hal_device_h devh)
337 vxge_hal_status_e status;
338 __hal_device_t *hldev = (__hal_device_t *) devh;
340 vxge_assert(devh != NULL);
342 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
343 __FILE__, __func__, __LINE__);
345 vxge_hal_trace_log_srpcim("devh = 0x"VXGE_OS_STXFMT,
348 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
349 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
350 __FILE__, __func__, __LINE__,
351 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
353 return (VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
357 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
359 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
361 status = __hal_srpcim_intr_enable(hldev, i);
366 status = __hal_srpcim_intr_enable(hldev, hldev->srpcim_id);
369 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
370 __FILE__, __func__, __LINE__, status);
376 * __hal_srpcim_intr_disable - Disable srpcim interrupts.
377 * @hldev: Hal Device.
378 * @srpcim_id: SRPCIM Id
380 * Disable srpcim interrupts.
382 * See also: __hal_srpcim_intr_enable()
385 __hal_srpcim_intr_disable(
386 __hal_device_t * hldev,
389 vxge_hal_srpcim_reg_t *srpcim_reg;
391 vxge_assert(hldev != NULL);
393 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
394 __FILE__, __func__, __LINE__);
396 vxge_hal_trace_log_srpcim("hldev = 0x"VXGE_OS_STXFMT,
399 srpcim_reg = hldev->srpcim_reg[srpcim_id];
401 /* Mask the individual interrupts. */
402 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
404 (u32) VXGE_HAL_INTR_MASK_ALL,
405 &srpcim_reg->vpath_msg_mask);
407 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
409 (u32) VXGE_HAL_INTR_MASK_ALL,
410 &srpcim_reg->srpcim_pcipif_int_mask);
412 vxge_hal_pio_mem_write32_upper(
415 (u32) VXGE_HAL_INTR_MASK_ALL,
416 &srpcim_reg->srpcim_general_int_mask);
418 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
419 __FILE__, __func__, __LINE__);
421 return (VXGE_HAL_OK);
426 * vxge_hal_srpcim_intr_disable - Disable srpcim interrupts.
429 * Disable srpcim interrupts.
431 * See also: vxge_hal_srpcim_intr_enable()
434 vxge_hal_srpcim_intr_disable(
435 vxge_hal_device_h devh)
438 vxge_hal_status_e status;
439 __hal_device_t *hldev = (__hal_device_t *) devh;
441 vxge_assert(devh != NULL);
443 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
444 __FILE__, __func__, __LINE__);
446 vxge_hal_trace_log_srpcim("devh = 0x"VXGE_OS_STXFMT,
449 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
450 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
451 __FILE__, __func__, __LINE__,
452 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
454 return (VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
458 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
460 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
462 status = __hal_srpcim_intr_disable(hldev, i);
467 status = __hal_srpcim_intr_disable(hldev, hldev->srpcim_id);
470 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
471 __FILE__, __func__, __LINE__, status);
477 * vxge_hal_srpcim_msix_set - Associate MSIX vector with srpcim alarm
478 * @hldev: HAL device.
479 * @alarm_msix_id: MSIX vector for alarm.
481 * This API will associate a given MSIX vector numbers with srpcim alarm
484 vxge_hal_srpcim_msix_set(vxge_hal_device_h devh, int alarm_msix_id)
487 vxge_hal_status_e status = VXGE_HAL_OK;
488 __hal_device_t *hldev = (__hal_device_t *) devh;
490 vxge_assert(devh != NULL);
492 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
493 __FILE__, __func__, __LINE__);
495 vxge_hal_trace_log_srpcim("devh = 0x"VXGE_OS_STXFMT,
498 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
499 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
500 __FILE__, __func__, __LINE__,
501 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
503 return (VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
507 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
509 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
511 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
514 VXGE_HAL_SRPCIM_INTERRUPT_CFG1_ALARM_MAP_TO_MSG(
517 &hldev->srpcim_reg[i]->srpcim_interrupt_cfg1);
522 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
525 VXGE_HAL_SRPCIM_INTERRUPT_CFG1_ALARM_MAP_TO_MSG(
528 &hldev->srpcim_reg[hldev->srpcim_id]->
529 srpcim_interrupt_cfg1);
532 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
533 __FILE__, __func__, __LINE__, status);
539 * vxge_hal_srpcim_msix_mask - Mask MSIX Vector.
540 * @hldev: HAL device.
542 * The function masks the srpcim msix interrupt
546 vxge_hal_srpcim_msix_mask(vxge_hal_device_h devh)
549 __hal_device_t *hldev = (__hal_device_t *) devh;
551 vxge_assert(devh != NULL);
553 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
554 __FILE__, __func__, __LINE__);
556 vxge_hal_trace_log_srpcim("devh = 0x"VXGE_OS_STXFMT,
559 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
560 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
561 __FILE__, __func__, __LINE__,
562 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
568 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
570 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
572 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
575 VXGE_HAL_SRPCIM_SET_MSIX_MASK_SRPCIM_SET_MSIX_MASK,
577 &hldev->srpcim_reg[i]->srpcim_set_msix_mask);
582 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
585 VXGE_HAL_SRPCIM_SET_MSIX_MASK_SRPCIM_SET_MSIX_MASK,
587 &hldev->srpcim_reg[hldev->srpcim_id]->srpcim_set_msix_mask);
590 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
591 __FILE__, __func__, __LINE__);
595 * vxge_hal_srpcim_msix_clear - Clear MSIX Vector.
596 * @hldev: HAL device.
598 * The function clears the srpcim msix interrupt
602 vxge_hal_srpcim_msix_clear(vxge_hal_device_h devh)
605 __hal_device_t *hldev = (__hal_device_t *) devh;
607 vxge_assert(devh != NULL);
609 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
610 __FILE__, __func__, __LINE__);
612 vxge_hal_trace_log_srpcim("devh = 0x"VXGE_OS_STXFMT,
615 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
616 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
617 __FILE__, __func__, __LINE__,
618 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
624 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
626 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
628 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
631 VXGE_HAL_SRPCIM_CLEAR_MSIX_MASK_SRPCIM_CLEAR_MSIX_MASK,
633 &hldev->srpcim_reg[i]->srpcim_clear_msix_mask);
638 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
641 VXGE_HAL_SRPCIM_CLEAR_MSIX_MASK_SRPCIM_CLEAR_MSIX_MASK,
643 &hldev->srpcim_reg[hldev->srpcim_id]->
644 srpcim_clear_msix_mask);
647 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
648 __FILE__, __func__, __LINE__);
652 * vxge_hal_srpcim_msix_unmask - Unmask MSIX Vector.
653 * @hldev: HAL device.
655 * The function unmasks the srpcim msix interrupt
659 vxge_hal_srpcim_msix_unmask(vxge_hal_device_h devh)
662 __hal_device_t *hldev = (__hal_device_t *) devh;
664 vxge_assert(devh != NULL);
666 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
667 __FILE__, __func__, __LINE__);
669 vxge_hal_trace_log_srpcim("devh = 0x"VXGE_OS_STXFMT,
672 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
673 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
674 __FILE__, __func__, __LINE__,
675 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
681 if (hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_MRPCIM) {
683 for (i = 0; i < VXGE_HAL_TITAN_SRPCIM_REG_SPACES; i++) {
685 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
688 VXGE_HAL_SRPCIM_CLR_MSIX_ONE_SHOT_SRPCIM_CLR_MSIX_ONE_SHOT,
690 &hldev->srpcim_reg[i]->srpcim_clr_msix_one_shot);
695 vxge_hal_pio_mem_write32_upper(hldev->header.pdev,
698 VXGE_HAL_SRPCIM_CLR_MSIX_ONE_SHOT_SRPCIM_CLR_MSIX_ONE_SHOT,
700 &hldev->srpcim_reg[hldev->srpcim_id]->
701 srpcim_clr_msix_one_shot);
704 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
705 __FILE__, __func__, __LINE__);
709 * __hal_srpcim_initialize - Initialize srpcim.
716 __hal_srpcim_initialize(
717 __hal_device_t * hldev)
719 vxge_assert(hldev != NULL);
721 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
722 __FILE__, __func__, __LINE__);
724 vxge_hal_trace_log_srpcim("hldev = 0x"VXGE_OS_STXFMT,
727 if (!(hldev->access_rights & VXGE_HAL_DEVICE_ACCESS_RIGHT_SRPCIM)) {
728 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
729 __FILE__, __func__, __LINE__,
730 VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
731 return (VXGE_HAL_ERR_PRIVILAGED_OPEARATION);
734 hldev->srpcim = (__hal_srpcim_t *)
735 vxge_os_malloc(hldev->header.pdev, sizeof(__hal_srpcim_t));
737 if (hldev->srpcim == NULL) {
738 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
739 __FILE__, __func__, __LINE__, VXGE_HAL_ERR_OUT_OF_MEMORY);
740 return (VXGE_HAL_ERR_OUT_OF_MEMORY);
743 vxge_os_memzero(hldev->srpcim, sizeof(__hal_srpcim_t));
745 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
746 __FILE__, __func__, __LINE__);
748 return (VXGE_HAL_OK);
752 * __hal_srpcim_terminate - Terminate srpcim.
759 __hal_srpcim_terminate(
760 __hal_device_t * hldev)
762 vxge_hal_status_e status = VXGE_HAL_OK;
764 vxge_assert(hldev != NULL);
766 vxge_hal_trace_log_srpcim("==> %s:%s:%d",
767 __FILE__, __func__, __LINE__);
769 vxge_hal_trace_log_srpcim("hldev = 0x"VXGE_OS_STXFMT,
772 if (hldev->srpcim == NULL) {
773 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = %d",
774 __FILE__, __func__, __LINE__, status);
778 vxge_os_free(hldev->header.pdev,
779 hldev->srpcim, sizeof(__hal_srpcim_t));
781 hldev->srpcim = NULL;
783 vxge_hal_trace_log_srpcim("<== %s:%s:%d Result = 0",
784 __FILE__, __func__, __LINE__);
786 return (VXGE_HAL_OK);