2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
54 #include "opt_perfmon.h"
56 #include "opt_kdtrace.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/msgbuf.h>
77 #include <sys/mutex.h>
79 #include <sys/ptrace.h>
80 #include <sys/reboot.h>
81 #include <sys/sched.h>
82 #include <sys/signalvar.h>
83 #include <sys/syscallsubr.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
101 #error KDB must be enabled in order for DDB to work!
104 #include <ddb/db_sym.h>
109 #include <net/netisr.h>
111 #include <machine/bootinfo.h>
112 #include <machine/clock.h>
113 #include <machine/cpu.h>
114 #include <machine/cputypes.h>
115 #include <machine/intr_machdep.h>
116 #include <machine/mca.h>
117 #include <machine/md_var.h>
118 #include <machine/metadata.h>
119 #include <machine/pc/bios.h>
120 #include <machine/pcb.h>
121 #include <machine/pcb_ext.h>
122 #include <machine/proc.h>
123 #include <machine/reg.h>
124 #include <machine/sigframe.h>
125 #include <machine/specialreg.h>
126 #include <machine/vm86.h>
128 #include <machine/perfmon.h>
131 #include <machine/smp.h>
135 #include <i386/isa/icu.h>
139 #include <machine/xbox.h>
141 int arch_i386_is_xbox = 0;
142 uint32_t arch_i386_xbox_memsize = 0;
147 #include <machine/xen/xen-os.h>
148 #include <xen/hypervisor.h>
149 #include <machine/xen/xen-os.h>
150 #include <machine/xen/xenvar.h>
151 #include <machine/xen/xenfunc.h>
152 #include <xen/xen_intr.h>
154 void Xhypervisor_callback(void);
155 void failsafe_callback(void);
157 extern trap_info_t trap_table[];
158 struct proc_ldt default_proc_ldt;
159 extern int init_first;
161 extern unsigned long physfree;
164 /* Sanity check for __curthread() */
165 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
167 extern void init386(int first);
168 extern void dblfault_handler(void);
170 extern void printcpuinfo(void); /* XXX header file */
171 extern void finishidentcpu(void);
172 extern void panicifcpuunsupported(void);
173 extern void initializecpu(void);
175 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
176 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
178 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
179 #define CPU_ENABLE_SSE
182 static void cpu_startup(void *);
183 static void fpstate_drop(struct thread *td);
184 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
185 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
186 #ifdef CPU_ENABLE_SSE
187 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
188 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
189 #endif /* CPU_ENABLE_SSE */
190 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
193 extern vm_offset_t ksym_start, ksym_end;
196 /* Intel ICH registers */
197 #define ICH_PMBASE 0x400
198 #define ICH_SMI_EN ICH_PMBASE + 0x30
200 int _udatasel, _ucodesel;
206 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
208 #ifdef COMPAT_FREEBSD4
209 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
216 FEATURE(pae, "Physical Address Extensions");
220 * The number of PHYSMAP entries must be one less than the number of
221 * PHYSSEG entries because the PHYSMAP entry that spans the largest
222 * physical address that is accessible by ISA DMA is split into two
225 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
227 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
228 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
230 /* must be 2 less so 0 0 can signal end of chunks */
231 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
232 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
234 struct kva_md_info kmi;
236 static struct trapframe proc0_tf;
237 struct pcpu __pcpu[MAXCPU];
249 * On MacBooks, we need to disallow the legacy USB circuit to
250 * generate an SMI# because this can cause several problems,
251 * namely: incorrect CPU frequency detection and failure to
253 * We do this by disabling a bit in the SMI_EN (SMI Control and
254 * Enable register) of the Intel ICH LPC Interface Bridge.
256 sysenv = getenv("smbios.system.product");
257 if (sysenv != NULL) {
258 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
259 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
260 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
261 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
262 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
263 strncmp(sysenv, "Macmini1,1", 10) == 0) {
265 printf("Disabling LEGACY_USB_EN bit on "
267 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
273 * Good {morning,afternoon,evening,night}.
277 panicifcpuunsupported();
284 * Display physical memory if SMBIOS reports reasonable amount.
287 sysenv = getenv("smbios.memory.enabled");
288 if (sysenv != NULL) {
289 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
292 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
293 memsize = ptoa((uintmax_t)Maxmem);
294 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
297 * Display any holes after the first chunk of extended memory.
302 printf("Physical memory chunk(s):\n");
303 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
306 size = phys_avail[indx + 1] - phys_avail[indx];
308 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
309 (uintmax_t)phys_avail[indx],
310 (uintmax_t)phys_avail[indx + 1] - 1,
311 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
315 vm_ksubmap_init(&kmi);
317 printf("avail memory = %ju (%ju MB)\n",
318 ptoa((uintmax_t)cnt.v_free_count),
319 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
322 * Set up buffers, so they can be used to read disk labels.
325 vm_pager_bufferinit();
332 * Send an interrupt to process.
334 * Stack is set up to allow sigcode stored
335 * at top to call routine, followed by kcall
336 * to sigreturn routine below. After sigreturn
337 * resets the signal mask, the stack, and the
338 * frame pointer, it returns to the user
343 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
345 struct osigframe sf, *fp;
349 struct trapframe *regs;
355 PROC_LOCK_ASSERT(p, MA_OWNED);
356 sig = ksi->ksi_signo;
358 mtx_assert(&psp->ps_mtx, MA_OWNED);
360 oonstack = sigonstack(regs->tf_esp);
362 /* Allocate space for the signal handler context. */
363 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
364 SIGISMEMBER(psp->ps_sigonstack, sig)) {
365 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
366 td->td_sigstk.ss_size - sizeof(struct osigframe));
367 #if defined(COMPAT_43)
368 td->td_sigstk.ss_flags |= SS_ONSTACK;
371 fp = (struct osigframe *)regs->tf_esp - 1;
373 /* Translate the signal if appropriate. */
374 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
375 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
377 /* Build the argument list for the signal handler. */
379 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
380 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
381 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
382 /* Signal handler installed with SA_SIGINFO. */
383 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
384 sf.sf_siginfo.si_signo = sig;
385 sf.sf_siginfo.si_code = ksi->ksi_code;
386 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
389 /* Old FreeBSD-style arguments. */
390 sf.sf_arg2 = ksi->ksi_code;
391 sf.sf_addr = (register_t)ksi->ksi_addr;
392 sf.sf_ahu.sf_handler = catcher;
394 mtx_unlock(&psp->ps_mtx);
397 /* Save most if not all of trap frame. */
398 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
399 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
400 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
401 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
402 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
403 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
404 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
405 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
406 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
407 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
408 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
409 sf.sf_siginfo.si_sc.sc_gs = rgs();
410 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
412 /* Build the signal context to be used by osigreturn(). */
413 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
414 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
415 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
416 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
417 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
418 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
419 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
420 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
423 * If we're a vm86 process, we want to save the segment registers.
424 * We also change eflags to be our emulated eflags, not the actual
427 if (regs->tf_eflags & PSL_VM) {
428 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
429 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
430 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
432 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
433 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
434 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
435 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
437 if (vm86->vm86_has_vme == 0)
438 sf.sf_siginfo.si_sc.sc_ps =
439 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
440 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
442 /* See sendsig() for comments. */
443 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
447 * Copy the sigframe out to the user's stack.
449 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
451 printf("process %ld has trashed its stack\n", (long)p->p_pid);
457 regs->tf_esp = (int)fp;
458 regs->tf_eip = PS_STRINGS - szosigcode;
459 regs->tf_eflags &= ~(PSL_T | PSL_D);
460 regs->tf_cs = _ucodesel;
461 regs->tf_ds = _udatasel;
462 regs->tf_es = _udatasel;
463 regs->tf_fs = _udatasel;
465 regs->tf_ss = _udatasel;
467 mtx_lock(&psp->ps_mtx);
469 #endif /* COMPAT_43 */
471 #ifdef COMPAT_FREEBSD4
473 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
475 struct sigframe4 sf, *sfp;
479 struct trapframe *regs;
485 PROC_LOCK_ASSERT(p, MA_OWNED);
486 sig = ksi->ksi_signo;
488 mtx_assert(&psp->ps_mtx, MA_OWNED);
490 oonstack = sigonstack(regs->tf_esp);
492 /* Save user context. */
493 bzero(&sf, sizeof(sf));
494 sf.sf_uc.uc_sigmask = *mask;
495 sf.sf_uc.uc_stack = td->td_sigstk;
496 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
497 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
498 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
499 sf.sf_uc.uc_mcontext.mc_gs = rgs();
500 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
501 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
502 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
503 bzero(sf.sf_uc.uc_mcontext.__spare__,
504 sizeof(sf.sf_uc.uc_mcontext.__spare__));
505 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
507 /* Allocate space for the signal handler context. */
508 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
509 SIGISMEMBER(psp->ps_sigonstack, sig)) {
510 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
511 td->td_sigstk.ss_size - sizeof(struct sigframe4));
512 #if defined(COMPAT_43)
513 td->td_sigstk.ss_flags |= SS_ONSTACK;
516 sfp = (struct sigframe4 *)regs->tf_esp - 1;
518 /* Translate the signal if appropriate. */
519 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
520 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
522 /* Build the argument list for the signal handler. */
524 sf.sf_ucontext = (register_t)&sfp->sf_uc;
525 bzero(&sf.sf_si, sizeof(sf.sf_si));
526 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
527 /* Signal handler installed with SA_SIGINFO. */
528 sf.sf_siginfo = (register_t)&sfp->sf_si;
529 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
531 /* Fill in POSIX parts */
532 sf.sf_si.si_signo = sig;
533 sf.sf_si.si_code = ksi->ksi_code;
534 sf.sf_si.si_addr = ksi->ksi_addr;
536 /* Old FreeBSD-style arguments. */
537 sf.sf_siginfo = ksi->ksi_code;
538 sf.sf_addr = (register_t)ksi->ksi_addr;
539 sf.sf_ahu.sf_handler = catcher;
541 mtx_unlock(&psp->ps_mtx);
545 * If we're a vm86 process, we want to save the segment registers.
546 * We also change eflags to be our emulated eflags, not the actual
549 if (regs->tf_eflags & PSL_VM) {
550 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
551 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
553 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
554 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
555 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
556 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
558 if (vm86->vm86_has_vme == 0)
559 sf.sf_uc.uc_mcontext.mc_eflags =
560 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
561 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
564 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
565 * syscalls made by the signal handler. This just avoids
566 * wasting time for our lazy fixup of such faults. PSL_NT
567 * does nothing in vm86 mode, but vm86 programs can set it
568 * almost legitimately in probes for old cpu types.
570 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
574 * Copy the sigframe out to the user's stack.
576 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
578 printf("process %ld has trashed its stack\n", (long)p->p_pid);
584 regs->tf_esp = (int)sfp;
585 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
586 regs->tf_eflags &= ~(PSL_T | PSL_D);
587 regs->tf_cs = _ucodesel;
588 regs->tf_ds = _udatasel;
589 regs->tf_es = _udatasel;
590 regs->tf_fs = _udatasel;
591 regs->tf_ss = _udatasel;
593 mtx_lock(&psp->ps_mtx);
595 #endif /* COMPAT_FREEBSD4 */
598 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
600 struct sigframe sf, *sfp;
605 struct trapframe *regs;
606 struct segment_descriptor *sdp;
612 PROC_LOCK_ASSERT(p, MA_OWNED);
613 sig = ksi->ksi_signo;
615 mtx_assert(&psp->ps_mtx, MA_OWNED);
616 #ifdef COMPAT_FREEBSD4
617 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
618 freebsd4_sendsig(catcher, ksi, mask);
623 if (SIGISMEMBER(psp->ps_osigset, sig)) {
624 osendsig(catcher, ksi, mask);
629 oonstack = sigonstack(regs->tf_esp);
631 /* Save user context. */
632 bzero(&sf, sizeof(sf));
633 sf.sf_uc.uc_sigmask = *mask;
634 sf.sf_uc.uc_stack = td->td_sigstk;
635 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
636 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
637 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
638 sf.sf_uc.uc_mcontext.mc_gs = rgs();
639 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
640 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
641 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
644 * Unconditionally fill the fsbase and gsbase into the mcontext.
646 sdp = &td->td_pcb->pcb_fsd;
647 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
649 sdp = &td->td_pcb->pcb_gsd;
650 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
652 bzero(sf.sf_uc.uc_mcontext.mc_spare1,
653 sizeof(sf.sf_uc.uc_mcontext.mc_spare1));
654 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
655 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
656 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
658 /* Allocate space for the signal handler context. */
659 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
660 SIGISMEMBER(psp->ps_sigonstack, sig)) {
661 sp = td->td_sigstk.ss_sp +
662 td->td_sigstk.ss_size - sizeof(struct sigframe);
663 #if defined(COMPAT_43)
664 td->td_sigstk.ss_flags |= SS_ONSTACK;
667 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
668 /* Align to 16 bytes. */
669 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
671 /* Translate the signal if appropriate. */
672 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
673 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
675 /* Build the argument list for the signal handler. */
677 sf.sf_ucontext = (register_t)&sfp->sf_uc;
678 bzero(&sf.sf_si, sizeof(sf.sf_si));
679 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
680 /* Signal handler installed with SA_SIGINFO. */
681 sf.sf_siginfo = (register_t)&sfp->sf_si;
682 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
684 /* Fill in POSIX parts */
685 sf.sf_si = ksi->ksi_info;
686 sf.sf_si.si_signo = sig; /* maybe a translated signal */
688 /* Old FreeBSD-style arguments. */
689 sf.sf_siginfo = ksi->ksi_code;
690 sf.sf_addr = (register_t)ksi->ksi_addr;
691 sf.sf_ahu.sf_handler = catcher;
693 mtx_unlock(&psp->ps_mtx);
697 * If we're a vm86 process, we want to save the segment registers.
698 * We also change eflags to be our emulated eflags, not the actual
701 if (regs->tf_eflags & PSL_VM) {
702 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
703 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
705 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
706 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
707 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
708 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
710 if (vm86->vm86_has_vme == 0)
711 sf.sf_uc.uc_mcontext.mc_eflags =
712 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
713 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
716 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
717 * syscalls made by the signal handler. This just avoids
718 * wasting time for our lazy fixup of such faults. PSL_NT
719 * does nothing in vm86 mode, but vm86 programs can set it
720 * almost legitimately in probes for old cpu types.
722 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
726 * Copy the sigframe out to the user's stack.
728 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
730 printf("process %ld has trashed its stack\n", (long)p->p_pid);
736 regs->tf_esp = (int)sfp;
737 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
738 regs->tf_eflags &= ~(PSL_T | PSL_D);
739 regs->tf_cs = _ucodesel;
740 regs->tf_ds = _udatasel;
741 regs->tf_es = _udatasel;
742 regs->tf_fs = _udatasel;
743 regs->tf_ss = _udatasel;
745 mtx_lock(&psp->ps_mtx);
749 * System call to cleanup state after a signal
750 * has been taken. Reset signal mask and
751 * stack state from context left by sendsig (above).
752 * Return to previous pc and psl as specified by
753 * context left by sendsig. Check carefully to
754 * make sure that the user has not modified the
755 * state to gain improper privileges.
763 struct osigreturn_args /* {
764 struct osigcontext *sigcntxp;
767 struct osigcontext sc;
768 struct trapframe *regs;
769 struct osigcontext *scp;
774 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
779 if (eflags & PSL_VM) {
780 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
781 struct vm86_kernel *vm86;
784 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
785 * set up the vm86 area, and we can't enter vm86 mode.
787 if (td->td_pcb->pcb_ext == 0)
789 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
790 if (vm86->vm86_inited == 0)
793 /* Go back to user mode if both flags are set. */
794 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
795 ksiginfo_init_trap(&ksi);
796 ksi.ksi_signo = SIGBUS;
797 ksi.ksi_code = BUS_OBJERR;
798 ksi.ksi_addr = (void *)regs->tf_eip;
799 trapsignal(td, &ksi);
802 if (vm86->vm86_has_vme) {
803 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
804 (eflags & VME_USERCHANGE) | PSL_VM;
806 vm86->vm86_eflags = eflags; /* save VIF, VIP */
807 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
808 (eflags & VM_USERCHANGE) | PSL_VM;
810 tf->tf_vm86_ds = scp->sc_ds;
811 tf->tf_vm86_es = scp->sc_es;
812 tf->tf_vm86_fs = scp->sc_fs;
813 tf->tf_vm86_gs = scp->sc_gs;
814 tf->tf_ds = _udatasel;
815 tf->tf_es = _udatasel;
816 tf->tf_fs = _udatasel;
819 * Don't allow users to change privileged or reserved flags.
822 * XXX do allow users to change the privileged flag PSL_RF.
823 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
824 * should sometimes set it there too. tf_eflags is kept in
825 * the signal context during signal handling and there is no
826 * other place to remember it, so the PSL_RF bit may be
827 * corrupted by the signal handler without us knowing.
828 * Corruption of the PSL_RF bit at worst causes one more or
829 * one less debugger trap, so allowing it is fairly harmless.
831 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
836 * Don't allow users to load a valid privileged %cs. Let the
837 * hardware check for invalid selectors, excess privilege in
838 * other selectors, invalid %eip's and invalid %esp's.
840 if (!CS_SECURE(scp->sc_cs)) {
841 ksiginfo_init_trap(&ksi);
842 ksi.ksi_signo = SIGBUS;
843 ksi.ksi_code = BUS_OBJERR;
844 ksi.ksi_trapno = T_PROTFLT;
845 ksi.ksi_addr = (void *)regs->tf_eip;
846 trapsignal(td, &ksi);
849 regs->tf_ds = scp->sc_ds;
850 regs->tf_es = scp->sc_es;
851 regs->tf_fs = scp->sc_fs;
854 /* Restore remaining registers. */
855 regs->tf_eax = scp->sc_eax;
856 regs->tf_ebx = scp->sc_ebx;
857 regs->tf_ecx = scp->sc_ecx;
858 regs->tf_edx = scp->sc_edx;
859 regs->tf_esi = scp->sc_esi;
860 regs->tf_edi = scp->sc_edi;
861 regs->tf_cs = scp->sc_cs;
862 regs->tf_ss = scp->sc_ss;
863 regs->tf_isp = scp->sc_isp;
864 regs->tf_ebp = scp->sc_fp;
865 regs->tf_esp = scp->sc_sp;
866 regs->tf_eip = scp->sc_pc;
867 regs->tf_eflags = eflags;
869 #if defined(COMPAT_43)
870 if (scp->sc_onstack & 1)
871 td->td_sigstk.ss_flags |= SS_ONSTACK;
873 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
875 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
877 return (EJUSTRETURN);
879 #endif /* COMPAT_43 */
881 #ifdef COMPAT_FREEBSD4
886 freebsd4_sigreturn(td, uap)
888 struct freebsd4_sigreturn_args /* {
889 const ucontext4 *sigcntxp;
893 struct trapframe *regs;
894 struct ucontext4 *ucp;
895 int cs, eflags, error;
898 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
903 eflags = ucp->uc_mcontext.mc_eflags;
904 if (eflags & PSL_VM) {
905 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
906 struct vm86_kernel *vm86;
909 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
910 * set up the vm86 area, and we can't enter vm86 mode.
912 if (td->td_pcb->pcb_ext == 0)
914 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
915 if (vm86->vm86_inited == 0)
918 /* Go back to user mode if both flags are set. */
919 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
920 ksiginfo_init_trap(&ksi);
921 ksi.ksi_signo = SIGBUS;
922 ksi.ksi_code = BUS_OBJERR;
923 ksi.ksi_addr = (void *)regs->tf_eip;
924 trapsignal(td, &ksi);
926 if (vm86->vm86_has_vme) {
927 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
928 (eflags & VME_USERCHANGE) | PSL_VM;
930 vm86->vm86_eflags = eflags; /* save VIF, VIP */
931 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
932 (eflags & VM_USERCHANGE) | PSL_VM;
934 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
935 tf->tf_eflags = eflags;
936 tf->tf_vm86_ds = tf->tf_ds;
937 tf->tf_vm86_es = tf->tf_es;
938 tf->tf_vm86_fs = tf->tf_fs;
939 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
940 tf->tf_ds = _udatasel;
941 tf->tf_es = _udatasel;
942 tf->tf_fs = _udatasel;
945 * Don't allow users to change privileged or reserved flags.
948 * XXX do allow users to change the privileged flag PSL_RF.
949 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
950 * should sometimes set it there too. tf_eflags is kept in
951 * the signal context during signal handling and there is no
952 * other place to remember it, so the PSL_RF bit may be
953 * corrupted by the signal handler without us knowing.
954 * Corruption of the PSL_RF bit at worst causes one more or
955 * one less debugger trap, so allowing it is fairly harmless.
957 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
958 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
959 td->td_proc->p_pid, td->td_name, eflags);
964 * Don't allow users to load a valid privileged %cs. Let the
965 * hardware check for invalid selectors, excess privilege in
966 * other selectors, invalid %eip's and invalid %esp's.
968 cs = ucp->uc_mcontext.mc_cs;
969 if (!CS_SECURE(cs)) {
970 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
971 td->td_proc->p_pid, td->td_name, cs);
972 ksiginfo_init_trap(&ksi);
973 ksi.ksi_signo = SIGBUS;
974 ksi.ksi_code = BUS_OBJERR;
975 ksi.ksi_trapno = T_PROTFLT;
976 ksi.ksi_addr = (void *)regs->tf_eip;
977 trapsignal(td, &ksi);
981 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
984 #if defined(COMPAT_43)
985 if (ucp->uc_mcontext.mc_onstack & 1)
986 td->td_sigstk.ss_flags |= SS_ONSTACK;
988 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
990 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
991 return (EJUSTRETURN);
993 #endif /* COMPAT_FREEBSD4 */
1001 struct sigreturn_args /* {
1002 const struct __ucontext *sigcntxp;
1006 struct trapframe *regs;
1008 int cs, eflags, error, ret;
1011 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1015 regs = td->td_frame;
1016 eflags = ucp->uc_mcontext.mc_eflags;
1017 if (eflags & PSL_VM) {
1018 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1019 struct vm86_kernel *vm86;
1022 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1023 * set up the vm86 area, and we can't enter vm86 mode.
1025 if (td->td_pcb->pcb_ext == 0)
1027 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1028 if (vm86->vm86_inited == 0)
1031 /* Go back to user mode if both flags are set. */
1032 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1033 ksiginfo_init_trap(&ksi);
1034 ksi.ksi_signo = SIGBUS;
1035 ksi.ksi_code = BUS_OBJERR;
1036 ksi.ksi_addr = (void *)regs->tf_eip;
1037 trapsignal(td, &ksi);
1040 if (vm86->vm86_has_vme) {
1041 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1042 (eflags & VME_USERCHANGE) | PSL_VM;
1044 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1045 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1046 (eflags & VM_USERCHANGE) | PSL_VM;
1048 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1049 tf->tf_eflags = eflags;
1050 tf->tf_vm86_ds = tf->tf_ds;
1051 tf->tf_vm86_es = tf->tf_es;
1052 tf->tf_vm86_fs = tf->tf_fs;
1053 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1054 tf->tf_ds = _udatasel;
1055 tf->tf_es = _udatasel;
1056 tf->tf_fs = _udatasel;
1059 * Don't allow users to change privileged or reserved flags.
1062 * XXX do allow users to change the privileged flag PSL_RF.
1063 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1064 * should sometimes set it there too. tf_eflags is kept in
1065 * the signal context during signal handling and there is no
1066 * other place to remember it, so the PSL_RF bit may be
1067 * corrupted by the signal handler without us knowing.
1068 * Corruption of the PSL_RF bit at worst causes one more or
1069 * one less debugger trap, so allowing it is fairly harmless.
1071 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1072 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1073 td->td_proc->p_pid, td->td_name, eflags);
1078 * Don't allow users to load a valid privileged %cs. Let the
1079 * hardware check for invalid selectors, excess privilege in
1080 * other selectors, invalid %eip's and invalid %esp's.
1082 cs = ucp->uc_mcontext.mc_cs;
1083 if (!CS_SECURE(cs)) {
1084 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1085 td->td_proc->p_pid, td->td_name, cs);
1086 ksiginfo_init_trap(&ksi);
1087 ksi.ksi_signo = SIGBUS;
1088 ksi.ksi_code = BUS_OBJERR;
1089 ksi.ksi_trapno = T_PROTFLT;
1090 ksi.ksi_addr = (void *)regs->tf_eip;
1091 trapsignal(td, &ksi);
1095 ret = set_fpcontext(td, &ucp->uc_mcontext);
1098 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1101 #if defined(COMPAT_43)
1102 if (ucp->uc_mcontext.mc_onstack & 1)
1103 td->td_sigstk.ss_flags |= SS_ONSTACK;
1105 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1108 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1109 return (EJUSTRETURN);
1113 * Machine dependent boot() routine
1115 * I haven't seen anything to put here yet
1116 * Possibly some stuff might be grafted back here from boot()
1124 * Flush the D-cache for non-DMA I/O so that the I-cache can
1125 * be made coherent later.
1128 cpu_flush_dcache(void *ptr, size_t len)
1130 /* Not applicable */
1133 /* Get current clock frequency for the given cpu id. */
1135 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1138 uint64_t tsc1, tsc2;
1140 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1143 return (EOPNOTSUPP);
1145 /* If we're booting, trust the rate calibrated moments ago. */
1152 /* Schedule ourselves on the indicated cpu. */
1153 thread_lock(curthread);
1154 sched_bind(curthread, cpu_id);
1155 thread_unlock(curthread);
1158 /* Calibrate by measuring a short delay. */
1159 reg = intr_disable();
1166 thread_lock(curthread);
1167 sched_unbind(curthread);
1168 thread_unlock(curthread);
1172 * Calculate the difference in readings, convert to Mhz, and
1173 * subtract 0.5% of the total. Empirical testing has shown that
1174 * overhead in DELAY() works out to approximately this value.
1177 *rate = tsc2 * 1000 - tsc2 * 5;
1182 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1189 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1192 int scheduler_running;
1195 cpu_idle_hlt(int busy)
1198 scheduler_running = 1;
1205 * Shutdown the CPU as much as possible
1215 cpu_idle_hlt(int busy)
1218 * we must absolutely guarentee that hlt is the next instruction
1219 * after sti or we introduce a timing window.
1222 if (sched_runnable())
1225 __asm __volatile("sti; hlt");
1230 cpu_idle_acpi(int busy)
1233 if (sched_runnable())
1235 else if (cpu_idle_hook)
1238 __asm __volatile("sti; hlt");
1241 static int cpu_ident_amdc1e = 0;
1243 #if !defined(XEN) || defined(XEN_PRIVILEGED)
1245 cpu_probe_amdc1e(void)
1251 * Forget it, if we're not using local APIC timer.
1253 if (resource_disabled("apic", 0) ||
1254 (resource_int_value("apic", 0, "clock", &i) == 0 && i == 0))
1258 * Detect the presence of C1E capability mostly on latest
1259 * dual-cores (or future) k8 family.
1261 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1262 (cpu_id & 0x00000f00) == 0x00000f00 &&
1263 (cpu_id & 0x0fff0000) >= 0x00040000) {
1264 cpu_ident_amdc1e = 1;
1273 * C1E renders the local APIC timer dead, so we disable it by
1274 * reading the Interrupt Pending Message register and clearing
1275 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1278 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1279 * #32559 revision 3.00+
1281 #define MSR_AMDK8_IPM 0xc0010055
1282 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1283 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1284 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1287 cpu_idle_amdc1e(int busy)
1291 if (sched_runnable())
1296 msr = rdmsr(MSR_AMDK8_IPM);
1297 if (msr & AMDK8_CMPHALT)
1298 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1303 __asm __volatile("sti; hlt");
1308 cpu_idle_spin(int busy)
1314 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1316 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1322 #if defined(SMP) && !defined(XEN)
1323 if (mp_grab_cpu_hlt())
1330 * mwait cpu power states. Lower 4 bits are sub-states.
1332 #define MWAIT_C0 0xf0
1333 #define MWAIT_C1 0x00
1334 #define MWAIT_C2 0x10
1335 #define MWAIT_C3 0x20
1336 #define MWAIT_C4 0x30
1338 #define MWAIT_DISABLED 0x0
1339 #define MWAIT_WOKEN 0x1
1340 #define MWAIT_WAITING 0x2
1343 cpu_idle_mwait(int busy)
1347 mwait = (int *)PCPU_PTR(monitorbuf);
1348 *mwait = MWAIT_WAITING;
1349 if (sched_runnable())
1351 cpu_monitor(mwait, 0, 0);
1352 if (*mwait == MWAIT_WAITING)
1353 cpu_mwait(0, MWAIT_C1);
1357 cpu_idle_mwait_hlt(int busy)
1361 mwait = (int *)PCPU_PTR(monitorbuf);
1363 *mwait = MWAIT_DISABLED;
1367 *mwait = MWAIT_WAITING;
1368 if (sched_runnable())
1370 cpu_monitor(mwait, 0, 0);
1371 if (*mwait == MWAIT_WAITING)
1372 cpu_mwait(0, MWAIT_C1);
1376 cpu_idle_wakeup(int cpu)
1381 if (cpu_idle_fn == cpu_idle_spin)
1383 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt)
1385 pcpu = pcpu_find(cpu);
1386 mwait = (int *)pcpu->pc_monitorbuf;
1388 * This doesn't need to be atomic since missing the race will
1389 * simply result in unnecessary IPIs.
1391 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED)
1393 *mwait = MWAIT_WOKEN;
1399 * Ordered by speed/power consumption.
1405 { cpu_idle_spin, "spin" },
1406 { cpu_idle_mwait, "mwait" },
1407 { cpu_idle_mwait_hlt, "mwait_hlt" },
1408 { cpu_idle_amdc1e, "amdc1e" },
1409 { cpu_idle_hlt, "hlt" },
1410 { cpu_idle_acpi, "acpi" },
1415 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1421 avail = malloc(256, M_TEMP, M_WAITOK);
1423 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1424 if (strstr(idle_tbl[i].id_name, "mwait") &&
1425 (cpu_feature2 & CPUID2_MON) == 0)
1427 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 &&
1428 cpu_ident_amdc1e == 0)
1430 p += sprintf(p, "%s, ", idle_tbl[i].id_name);
1432 error = sysctl_handle_string(oidp, avail, 0, req);
1433 free(avail, M_TEMP);
1438 idle_sysctl(SYSCTL_HANDLER_ARGS)
1446 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1447 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1448 p = idle_tbl[i].id_name;
1452 strncpy(buf, p, sizeof(buf));
1453 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1454 if (error != 0 || req->newptr == NULL)
1456 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1457 if (strstr(idle_tbl[i].id_name, "mwait") &&
1458 (cpu_feature2 & CPUID2_MON) == 0)
1460 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 &&
1461 cpu_ident_amdc1e == 0)
1463 if (strcmp(idle_tbl[i].id_name, buf))
1465 cpu_idle_fn = idle_tbl[i].id_fn;
1471 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1472 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1474 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1475 idle_sysctl, "A", "currently selected idle function");
1478 * Reset registers to default values on exec.
1481 exec_setregs(td, entry, stack, ps_strings)
1487 struct trapframe *regs = td->td_frame;
1488 struct pcb *pcb = td->td_pcb;
1490 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1491 pcb->pcb_gs = _udatasel;
1494 mtx_lock_spin(&dt_lock);
1495 if (td->td_proc->p_md.md_ldt)
1498 mtx_unlock_spin(&dt_lock);
1500 bzero((char *)regs, sizeof(struct trapframe));
1501 regs->tf_eip = entry;
1502 regs->tf_esp = stack;
1503 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1504 regs->tf_ss = _udatasel;
1505 regs->tf_ds = _udatasel;
1506 regs->tf_es = _udatasel;
1507 regs->tf_fs = _udatasel;
1508 regs->tf_cs = _ucodesel;
1510 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1511 regs->tf_ebx = ps_strings;
1514 * Reset the hardware debug registers if they were in use.
1515 * They won't have any meaning for the newly exec'd process.
1517 if (pcb->pcb_flags & PCB_DBREGS) {
1524 if (pcb == PCPU_GET(curpcb)) {
1526 * Clear the debug registers on the running
1527 * CPU, otherwise they will end up affecting
1528 * the next process we switch to.
1532 pcb->pcb_flags &= ~PCB_DBREGS;
1536 * Initialize the math emulator (if any) for the current process.
1537 * Actually, just clear the bit that says that the emulator has
1538 * been initialized. Initialization is delayed until the process
1539 * traps to the emulator (if it is done at all) mainly because
1540 * emulators don't provide an entry point for initialization.
1542 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1543 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1546 * Drop the FP state if we hold it, so that the process gets a
1547 * clean FP state if it uses the FPU again.
1552 * XXX - Linux emulator
1553 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1556 td->td_retval[1] = 0;
1567 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1569 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1570 * instructions. We must set the CR0_MP bit and use the CR0_TS
1571 * bit to control the trap, because setting the CR0_EM bit does
1572 * not cause WAIT instructions to trap. It's important to trap
1573 * WAIT instructions - otherwise the "wait" variants of no-wait
1574 * control instructions would degenerate to the "no-wait" variants
1575 * after FP context switches but work correctly otherwise. It's
1576 * particularly important to trap WAITs when there is no NPX -
1577 * otherwise the "wait" variants would always degenerate.
1579 * Try setting CR0_NE to get correct error reporting on 486DX's.
1580 * Setting it should fail or do nothing on lesser processors.
1582 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1587 u_long bootdev; /* not a struct cdev *- encoding is different */
1588 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1589 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1592 * Initialize 386 and configure to run kernel
1596 * Initialize segments & interrupt table
1602 union descriptor *gdt;
1603 union descriptor *ldt;
1605 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1606 union descriptor ldt[NLDT]; /* local descriptor table */
1608 static struct gate_descriptor idt0[NIDT];
1609 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1610 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1611 struct mtx dt_lock; /* lock for GDT and LDT */
1613 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1614 extern int has_f00f_bug;
1617 static struct i386tss dblfault_tss;
1618 static char dblfault_stack[PAGE_SIZE];
1620 extern vm_offset_t proc0kstack;
1624 * software prototypes -- in more palatable form.
1626 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1627 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1629 struct soft_segment_descriptor gdt_segs[] = {
1630 /* GNULL_SEL 0 Null Descriptor */
1636 .ssd_xx = 0, .ssd_xx1 = 0,
1639 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1641 .ssd_limit = 0xfffff,
1642 .ssd_type = SDT_MEMRWA,
1645 .ssd_xx = 0, .ssd_xx1 = 0,
1648 /* GUFS_SEL 2 %fs Descriptor for user */
1650 .ssd_limit = 0xfffff,
1651 .ssd_type = SDT_MEMRWA,
1654 .ssd_xx = 0, .ssd_xx1 = 0,
1657 /* GUGS_SEL 3 %gs Descriptor for user */
1659 .ssd_limit = 0xfffff,
1660 .ssd_type = SDT_MEMRWA,
1663 .ssd_xx = 0, .ssd_xx1 = 0,
1666 /* GCODE_SEL 4 Code Descriptor for kernel */
1668 .ssd_limit = 0xfffff,
1669 .ssd_type = SDT_MEMERA,
1672 .ssd_xx = 0, .ssd_xx1 = 0,
1675 /* GDATA_SEL 5 Data Descriptor for kernel */
1677 .ssd_limit = 0xfffff,
1678 .ssd_type = SDT_MEMRWA,
1681 .ssd_xx = 0, .ssd_xx1 = 0,
1684 /* GUCODE_SEL 6 Code Descriptor for user */
1686 .ssd_limit = 0xfffff,
1687 .ssd_type = SDT_MEMERA,
1690 .ssd_xx = 0, .ssd_xx1 = 0,
1693 /* GUDATA_SEL 7 Data Descriptor for user */
1695 .ssd_limit = 0xfffff,
1696 .ssd_type = SDT_MEMRWA,
1699 .ssd_xx = 0, .ssd_xx1 = 0,
1702 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1703 { .ssd_base = 0x400,
1704 .ssd_limit = 0xfffff,
1705 .ssd_type = SDT_MEMRWA,
1708 .ssd_xx = 0, .ssd_xx1 = 0,
1712 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1715 .ssd_limit = sizeof(struct i386tss)-1,
1716 .ssd_type = SDT_SYS386TSS,
1719 .ssd_xx = 0, .ssd_xx1 = 0,
1722 /* GLDT_SEL 10 LDT Descriptor */
1723 { .ssd_base = (int) ldt,
1724 .ssd_limit = sizeof(ldt)-1,
1725 .ssd_type = SDT_SYSLDT,
1728 .ssd_xx = 0, .ssd_xx1 = 0,
1731 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1732 { .ssd_base = (int) ldt,
1733 .ssd_limit = (512 * sizeof(union descriptor)-1),
1734 .ssd_type = SDT_SYSLDT,
1737 .ssd_xx = 0, .ssd_xx1 = 0,
1740 /* GPANIC_SEL 12 Panic Tss Descriptor */
1741 { .ssd_base = (int) &dblfault_tss,
1742 .ssd_limit = sizeof(struct i386tss)-1,
1743 .ssd_type = SDT_SYS386TSS,
1746 .ssd_xx = 0, .ssd_xx1 = 0,
1749 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1751 .ssd_limit = 0xfffff,
1752 .ssd_type = SDT_MEMERA,
1755 .ssd_xx = 0, .ssd_xx1 = 0,
1758 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1760 .ssd_limit = 0xfffff,
1761 .ssd_type = SDT_MEMERA,
1764 .ssd_xx = 0, .ssd_xx1 = 0,
1767 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1769 .ssd_limit = 0xfffff,
1770 .ssd_type = SDT_MEMRWA,
1773 .ssd_xx = 0, .ssd_xx1 = 0,
1776 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1778 .ssd_limit = 0xfffff,
1779 .ssd_type = SDT_MEMRWA,
1782 .ssd_xx = 0, .ssd_xx1 = 0,
1785 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1787 .ssd_limit = 0xfffff,
1788 .ssd_type = SDT_MEMRWA,
1791 .ssd_xx = 0, .ssd_xx1 = 0,
1794 /* GNDIS_SEL 18 NDIS Descriptor */
1800 .ssd_xx = 0, .ssd_xx1 = 0,
1806 static struct soft_segment_descriptor ldt_segs[] = {
1807 /* Null Descriptor - overwritten by call gate */
1813 .ssd_xx = 0, .ssd_xx1 = 0,
1816 /* Null Descriptor - overwritten by call gate */
1822 .ssd_xx = 0, .ssd_xx1 = 0,
1825 /* Null Descriptor - overwritten by call gate */
1831 .ssd_xx = 0, .ssd_xx1 = 0,
1834 /* Code Descriptor for user */
1836 .ssd_limit = 0xfffff,
1837 .ssd_type = SDT_MEMERA,
1840 .ssd_xx = 0, .ssd_xx1 = 0,
1843 /* Null Descriptor - overwritten by call gate */
1849 .ssd_xx = 0, .ssd_xx1 = 0,
1852 /* Data Descriptor for user */
1854 .ssd_limit = 0xfffff,
1855 .ssd_type = SDT_MEMRWA,
1858 .ssd_xx = 0, .ssd_xx1 = 0,
1864 setidt(idx, func, typ, dpl, selec)
1871 struct gate_descriptor *ip;
1874 ip->gd_looffset = (int)func;
1875 ip->gd_selector = selec;
1881 ip->gd_hioffset = ((int)func)>>16 ;
1885 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1886 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1887 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1888 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1890 #ifdef KDTRACE_HOOKS
1893 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1897 * Display the index and function name of any IDT entries that don't use
1898 * the default 'rsvd' entry point.
1900 DB_SHOW_COMMAND(idt, db_show_idt)
1902 struct gate_descriptor *ip;
1907 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1908 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1909 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1910 db_printf("%3d\t", idx);
1911 db_printsym(func, DB_STGY_PROC);
1918 /* Show privileged registers. */
1919 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1921 uint64_t idtr, gdtr;
1924 db_printf("idtr\t0x%08x/%04x\n",
1925 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1927 db_printf("gdtr\t0x%08x/%04x\n",
1928 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1929 db_printf("ldtr\t0x%04x\n", rldt());
1930 db_printf("tr\t0x%04x\n", rtr());
1931 db_printf("cr0\t0x%08x\n", rcr0());
1932 db_printf("cr2\t0x%08x\n", rcr2());
1933 db_printf("cr3\t0x%08x\n", rcr3());
1934 db_printf("cr4\t0x%08x\n", rcr4());
1940 struct segment_descriptor *sd;
1941 struct soft_segment_descriptor *ssd;
1943 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1944 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1945 ssd->ssd_type = sd->sd_type;
1946 ssd->ssd_dpl = sd->sd_dpl;
1947 ssd->ssd_p = sd->sd_p;
1948 ssd->ssd_def32 = sd->sd_def32;
1949 ssd->ssd_gran = sd->sd_gran;
1954 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1956 int i, insert_idx, physmap_idx;
1958 physmap_idx = *physmap_idxp;
1960 if (boothowto & RB_VERBOSE)
1961 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1962 smap->type, smap->base, smap->length);
1964 if (smap->type != SMAP_TYPE_MEMORY)
1967 if (smap->length == 0)
1971 if (smap->base > 0xffffffff) {
1972 printf("%uK of memory above 4GB ignored\n",
1973 (u_int)(smap->length / 1024));
1979 * Find insertion point while checking for overlap. Start off by
1980 * assuming the new entry will be added to the end.
1982 insert_idx = physmap_idx + 2;
1983 for (i = 0; i <= physmap_idx; i += 2) {
1984 if (smap->base < physmap[i + 1]) {
1985 if (smap->base + smap->length <= physmap[i]) {
1989 if (boothowto & RB_VERBOSE)
1991 "Overlapping memory regions, ignoring second region\n");
1996 /* See if we can prepend to the next entry. */
1997 if (insert_idx <= physmap_idx &&
1998 smap->base + smap->length == physmap[insert_idx]) {
1999 physmap[insert_idx] = smap->base;
2003 /* See if we can append to the previous entry. */
2004 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
2005 physmap[insert_idx - 1] += smap->length;
2010 *physmap_idxp = physmap_idx;
2011 if (physmap_idx == PHYSMAP_SIZE) {
2013 "Too many segments in the physical address map, giving up\n");
2018 * Move the last 'N' entries down to make room for the new
2021 for (i = physmap_idx; i > insert_idx; i -= 2) {
2022 physmap[i] = physmap[i - 2];
2023 physmap[i + 1] = physmap[i - 1];
2026 /* Insert the new entry. */
2027 physmap[insert_idx] = smap->base;
2028 physmap[insert_idx + 1] = smap->base + smap->length;
2039 if (basemem > 640) {
2040 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2046 * XXX if biosbasemem is now < 640, there is a `hole'
2047 * between the end of base memory and the start of
2048 * ISA memory. The hole may be empty or it may
2049 * contain BIOS code or data. Map it read/write so
2050 * that the BIOS can write to it. (Memory from 0 to
2051 * the physical end of the kernel is mapped read-only
2052 * to begin with and then parts of it are remapped.
2053 * The parts that aren't remapped form holes that
2054 * remain read-only and are unused by the kernel.
2055 * The base memory area is below the physical end of
2056 * the kernel and right now forms a read-only hole.
2057 * The part of it from PAGE_SIZE to
2058 * (trunc_page(biosbasemem * 1024) - 1) will be
2059 * remapped and used by the kernel later.)
2061 * This code is similar to the code used in
2062 * pmap_mapdev, but since no memory needs to be
2063 * allocated we simply change the mapping.
2065 for (pa = trunc_page(basemem * 1024);
2066 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2067 pmap_kenter(KERNBASE + pa, pa);
2070 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2071 * the vm86 page table so that vm86 can scribble on them using
2072 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2073 * page 0, at least as initialized here?
2075 pte = (pt_entry_t *)vm86paddr;
2076 for (i = basemem / 4; i < 160; i++)
2077 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2082 * Populate the (physmap) array with base/bound pairs describing the
2083 * available physical memory in the system, then test this memory and
2084 * build the phys_avail array describing the actually-available memory.
2086 * If we cannot accurately determine the physical memory map, then use
2087 * value from the 0xE801 call, and failing that, the RTC.
2089 * Total memory size may be set by the kernel environment variable
2090 * hw.physmem or the compile-time define MAXMEM.
2092 * XXX first should be vm_paddr_t.
2095 getmemsize(int first)
2097 int has_smap, off, physmap_idx, pa_indx, da_indx;
2098 u_long physmem_tunable, memtest;
2099 vm_paddr_t physmap[PHYSMAP_SIZE];
2101 quad_t dcons_addr, dcons_size;
2103 int hasbrokenint12, i;
2105 struct vm86frame vmf;
2106 struct vm86context vmc;
2108 struct bios_smap *smap, *smapbase, *smapend;
2115 Maxmem = xen_start_info->nr_pages - init_first;
2118 physmap[0] = init_first << PAGE_SHIFT;
2119 physmap[1] = ptoa(Maxmem) - round_page(msgbufsize);
2123 if (arch_i386_is_xbox) {
2125 * We queried the memory size before, so chop off 4MB for
2126 * the framebuffer and inform the OS of this.
2129 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2134 bzero(&vmf, sizeof(vmf));
2135 bzero(physmap, sizeof(physmap));
2139 * Check if the loader supplied an SMAP memory map. If so,
2140 * use that and do not make any VM86 calls.
2144 kmdp = preload_search_by_type("elf kernel");
2146 kmdp = preload_search_by_type("elf32 kernel");
2148 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2149 MODINFO_METADATA | MODINFOMD_SMAP);
2150 if (smapbase != NULL) {
2152 * subr_module.c says:
2153 * "Consumer may safely assume that size value precedes data."
2154 * ie: an int32_t immediately precedes SMAP.
2156 smapsize = *((u_int32_t *)smapbase - 1);
2157 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2160 for (smap = smapbase; smap < smapend; smap++)
2161 if (!add_smap_entry(smap, physmap, &physmap_idx))
2167 * Some newer BIOSes have a broken INT 12H implementation
2168 * which causes a kernel panic immediately. In this case, we
2169 * need use the SMAP to determine the base memory size.
2172 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2173 if (hasbrokenint12 == 0) {
2174 /* Use INT12 to determine base memory size. */
2175 vm86_intcall(0x12, &vmf);
2176 basemem = vmf.vmf_ax;
2181 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2182 * the kernel page table so we can use it as a buffer. The
2183 * kernel will unmap this page later.
2185 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2187 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2188 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2192 vmf.vmf_eax = 0xE820;
2193 vmf.vmf_edx = SMAP_SIG;
2194 vmf.vmf_ecx = sizeof(struct bios_smap);
2195 i = vm86_datacall(0x15, &vmf, &vmc);
2196 if (i || vmf.vmf_eax != SMAP_SIG)
2199 if (!add_smap_entry(smap, physmap, &physmap_idx))
2201 } while (vmf.vmf_ebx != 0);
2205 * If we didn't fetch the "base memory" size from INT12,
2206 * figure it out from the SMAP (or just guess).
2209 for (i = 0; i <= physmap_idx; i += 2) {
2210 if (physmap[i] == 0x00000000) {
2211 basemem = physmap[i + 1] / 1024;
2216 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2222 if (physmap[1] != 0)
2226 * If we failed to find an SMAP, figure out the extended
2227 * memory size. We will then build a simple memory map with
2228 * two segments, one for "base memory" and the second for
2229 * "extended memory". Note that "extended memory" starts at a
2230 * physical address of 1MB and that both basemem and extmem
2231 * are in units of 1KB.
2233 * First, try to fetch the extended memory size via INT 15:E801.
2235 vmf.vmf_ax = 0xE801;
2236 if (vm86_intcall(0x15, &vmf) == 0) {
2237 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2240 * If INT15:E801 fails, this is our last ditch effort
2241 * to determine the extended memory size. Currently
2242 * we prefer the RTC value over INT15:88.
2246 vm86_intcall(0x15, &vmf);
2247 extmem = vmf.vmf_ax;
2249 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2254 * Special hack for chipsets that still remap the 384k hole when
2255 * there's 16MB of memory - this really confuses people that
2256 * are trying to use bus mastering ISA controllers with the
2257 * "16MB limit"; they only have 16MB, but the remapping puts
2258 * them beyond the limit.
2260 * If extended memory is between 15-16MB (16-17MB phys address range),
2263 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2267 physmap[1] = basemem * 1024;
2269 physmap[physmap_idx] = 0x100000;
2270 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2275 * Now, physmap contains a map of physical memory.
2279 /* make hole for AP bootstrap code */
2280 physmap[1] = mp_bootaddress(physmap[1]);
2284 * Maxmem isn't the "maximum memory", it's one larger than the
2285 * highest page of the physical address space. It should be
2286 * called something like "Maxphyspage". We may adjust this
2287 * based on ``hw.physmem'' and the results of the memory test.
2289 Maxmem = atop(physmap[physmap_idx + 1]);
2292 Maxmem = MAXMEM / 4;
2295 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2296 Maxmem = atop(physmem_tunable);
2299 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2300 * the amount of memory in the system.
2302 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2303 Maxmem = atop(physmap[physmap_idx + 1]);
2306 * By default enable the memory test on real hardware, and disable
2307 * it if we appear to be running in a VM. This avoids touching all
2308 * pages unnecessarily, which doesn't matter on real hardware but is
2309 * bad for shared VM hosts. Use a general name so that
2310 * one could eventually do more with the code than just disable it.
2312 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2313 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2315 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2316 (boothowto & RB_VERBOSE))
2317 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2320 * If Maxmem has been increased beyond what the system has detected,
2321 * extend the last memory segment to the new limit.
2323 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2324 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2326 /* call pmap initialization to make new kernel address space */
2327 pmap_bootstrap(first);
2330 * Size up each available chunk of physical memory.
2332 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2335 phys_avail[pa_indx++] = physmap[0];
2336 phys_avail[pa_indx] = physmap[0];
2337 dump_avail[da_indx] = physmap[0];
2341 * Get dcons buffer address
2343 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2344 getenv_quad("dcons.size", &dcons_size) == 0)
2349 * physmap is in bytes, so when converting to page boundaries,
2350 * round up the start address and round down the end address.
2352 for (i = 0; i <= physmap_idx; i += 2) {
2355 end = ptoa((vm_paddr_t)Maxmem);
2356 if (physmap[i + 1] < end)
2357 end = trunc_page(physmap[i + 1]);
2358 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2359 int tmp, page_bad, full;
2360 int *ptr = (int *)CADDR1;
2364 * block out kernel memory as not available.
2366 if (pa >= KERNLOAD && pa < first)
2370 * block out dcons buffer
2373 && pa >= trunc_page(dcons_addr)
2374 && pa < dcons_addr + dcons_size)
2382 * map page into kernel: valid, read/write,non-cacheable
2384 *pte = pa | PG_V | PG_RW | PG_N;
2389 * Test for alternating 1's and 0's
2391 *(volatile int *)ptr = 0xaaaaaaaa;
2392 if (*(volatile int *)ptr != 0xaaaaaaaa)
2395 * Test for alternating 0's and 1's
2397 *(volatile int *)ptr = 0x55555555;
2398 if (*(volatile int *)ptr != 0x55555555)
2403 *(volatile int *)ptr = 0xffffffff;
2404 if (*(volatile int *)ptr != 0xffffffff)
2409 *(volatile int *)ptr = 0x0;
2410 if (*(volatile int *)ptr != 0x0)
2413 * Restore original value.
2419 * Adjust array of valid/good pages.
2421 if (page_bad == TRUE)
2424 * If this good page is a continuation of the
2425 * previous set of good pages, then just increase
2426 * the end pointer. Otherwise start a new chunk.
2427 * Note that "end" points one higher than end,
2428 * making the range >= start and < end.
2429 * If we're also doing a speculative memory
2430 * test and we at or past the end, bump up Maxmem
2431 * so that we keep going. The first bad page
2432 * will terminate the loop.
2434 if (phys_avail[pa_indx] == pa) {
2435 phys_avail[pa_indx] += PAGE_SIZE;
2438 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2440 "Too many holes in the physical address space, giving up\n");
2445 phys_avail[pa_indx++] = pa; /* start */
2446 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2450 if (dump_avail[da_indx] == pa) {
2451 dump_avail[da_indx] += PAGE_SIZE;
2454 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2458 dump_avail[da_indx++] = pa; /* start */
2459 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2469 phys_avail[0] = physfree;
2470 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2472 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2478 * The last chunk must contain at least one page plus the message
2479 * buffer to avoid complicating other code (message buffer address
2480 * calculation, etc.).
2482 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2483 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2484 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2485 phys_avail[pa_indx--] = 0;
2486 phys_avail[pa_indx--] = 0;
2489 Maxmem = atop(phys_avail[pa_indx]);
2491 /* Trim off space for the message buffer. */
2492 phys_avail[pa_indx] -= round_page(msgbufsize);
2494 /* Map the message buffer. */
2495 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2496 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2503 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2509 unsigned long gdtmachpfn;
2510 int error, gsel_tss, metadata_missing, x, pa;
2513 struct callback_register event = {
2514 .type = CALLBACKTYPE_event,
2515 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2517 struct callback_register failsafe = {
2518 .type = CALLBACKTYPE_failsafe,
2519 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2522 thread0.td_kstack = proc0kstack;
2523 thread0.td_kstack_pages = KSTACK_PAGES;
2524 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2525 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2528 * This may be done better later if it gets more high level
2529 * components in it. If so just link td->td_proc here.
2531 proc_linkup0(&proc0, &thread0);
2533 metadata_missing = 0;
2534 if (xen_start_info->mod_start) {
2535 preload_metadata = (caddr_t)xen_start_info->mod_start;
2536 preload_bootstrap_relocate(KERNBASE);
2538 metadata_missing = 1;
2541 kern_envp = static_env;
2542 else if ((caddr_t)xen_start_info->cmd_line)
2543 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2545 boothowto |= xen_boothowto(kern_envp);
2547 /* Init basic tunables, hz etc */
2551 * XEN occupies a portion of the upper virtual address space
2552 * At its base it manages an array mapping machine page frames
2553 * to physical page frames - hence we need to be able to
2554 * access 4GB - (64MB - 4MB + 64k)
2556 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2557 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2558 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2559 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2560 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2561 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2562 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2563 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2566 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2567 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2569 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2570 bzero(gdt, PAGE_SIZE);
2571 for (x = 0; x < NGDT; x++)
2572 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2574 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2576 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2577 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2578 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2582 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2583 panic("set_trap_table failed - error %d\n", error);
2586 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2588 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2589 #if CONFIG_XEN_COMPAT <= 0x030002
2590 if (error == -ENOXENSYS)
2591 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2592 (unsigned long)Xhypervisor_callback,
2593 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2595 pcpu_init(pc, 0, sizeof(struct pcpu));
2596 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2597 pmap_kenter(pa + KERNBASE, pa);
2598 dpcpu_init((void *)(first + KERNBASE), 0);
2599 first += DPCPU_SIZE;
2600 physfree += DPCPU_SIZE;
2601 init_first += DPCPU_SIZE / PAGE_SIZE;
2603 PCPU_SET(prvspace, pc);
2604 PCPU_SET(curthread, &thread0);
2605 PCPU_SET(curpcb, thread0.td_pcb);
2608 * Initialize mutexes.
2610 * icu_lock: in order to allow an interrupt to occur in a critical
2611 * section, to set pcpu->ipending (etc...) properly, we
2612 * must be able to get the icu lock, so it can't be
2616 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2618 /* make ldt memory segments */
2619 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2620 bzero(ldt, PAGE_SIZE);
2621 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2622 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2623 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2624 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2626 default_proc_ldt.ldt_base = (caddr_t)ldt;
2627 default_proc_ldt.ldt_len = 6;
2628 _default_ldt = (int)&default_proc_ldt;
2629 PCPU_SET(currentldt, _default_ldt);
2630 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2631 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2633 #if defined(XEN_PRIVILEGED)
2635 * Initialize the i8254 before the console so that console
2636 * initialization can use DELAY().
2642 * Initialize the console before we print anything out.
2646 if (metadata_missing)
2647 printf("WARNING: loader(8) metadata is missing!\n");
2655 ksym_start = bootinfo.bi_symtab;
2656 ksym_end = bootinfo.bi_esymtab;
2662 if (boothowto & RB_KDB)
2663 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2666 finishidentcpu(); /* Final stage of CPU initialization */
2667 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2668 GSEL(GCODE_SEL, SEL_KPL));
2669 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2670 GSEL(GCODE_SEL, SEL_KPL));
2671 initializecpu(); /* Initialize CPU registers */
2673 /* make an initial tss so cpu can get interrupt stack on syscall! */
2674 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2675 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2676 kstack0_sz - sizeof(struct pcb) - 16);
2677 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2678 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2679 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2680 PCPU_GET(common_tss.tss_esp0));
2682 /* pointer to selector slot for %fs/%gs */
2683 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2685 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2686 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2687 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2688 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2690 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2692 dblfault_tss.tss_cr3 = (int)IdlePTD;
2694 dblfault_tss.tss_eip = (int)dblfault_handler;
2695 dblfault_tss.tss_eflags = PSL_KERNEL;
2696 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2697 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2698 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2699 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2700 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2704 init_param2(physmem);
2706 /* now running on new page tables, configured,and u/iom is accessible */
2708 msgbufinit(msgbufp, msgbufsize);
2709 /* transfer to user mode */
2711 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2712 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2714 /* setup proc 0's pcb */
2715 thread0.td_pcb->pcb_flags = 0;
2717 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2719 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2721 thread0.td_pcb->pcb_ext = 0;
2722 thread0.td_frame = &proc0_tf;
2723 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2724 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2726 #if defined(XEN_PRIVILEGED)
2727 if (cpu_probe_amdc1e())
2728 cpu_idle_fn = cpu_idle_amdc1e;
2737 struct gate_descriptor *gdp;
2738 int gsel_tss, metadata_missing, x, pa;
2742 thread0.td_kstack = proc0kstack;
2743 thread0.td_kstack_pages = KSTACK_PAGES;
2744 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2745 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2748 * This may be done better later if it gets more high level
2749 * components in it. If so just link td->td_proc here.
2751 proc_linkup0(&proc0, &thread0);
2753 metadata_missing = 0;
2754 if (bootinfo.bi_modulep) {
2755 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2756 preload_bootstrap_relocate(KERNBASE);
2758 metadata_missing = 1;
2761 kern_envp = static_env;
2762 else if (bootinfo.bi_envp)
2763 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2765 /* Init basic tunables, hz etc */
2769 * Make gdt memory segments. All segments cover the full 4GB
2770 * of address space and permissions are enforced at page level.
2772 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2773 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2774 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2775 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2776 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2777 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2780 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2781 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2782 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2784 for (x = 0; x < NGDT; x++)
2785 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2787 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2788 r_gdt.rd_base = (int) gdt;
2789 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2792 pcpu_init(pc, 0, sizeof(struct pcpu));
2793 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2794 pmap_kenter(pa + KERNBASE, pa);
2795 dpcpu_init((void *)(first + KERNBASE), 0);
2796 first += DPCPU_SIZE;
2797 PCPU_SET(prvspace, pc);
2798 PCPU_SET(curthread, &thread0);
2799 PCPU_SET(curpcb, thread0.td_pcb);
2802 * Initialize mutexes.
2804 * icu_lock: in order to allow an interrupt to occur in a critical
2805 * section, to set pcpu->ipending (etc...) properly, we
2806 * must be able to get the icu lock, so it can't be
2810 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2812 /* make ldt memory segments */
2813 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2814 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2815 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2816 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2818 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2820 PCPU_SET(currentldt, _default_ldt);
2823 for (x = 0; x < NIDT; x++)
2824 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2825 GSEL(GCODE_SEL, SEL_KPL));
2826 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2827 GSEL(GCODE_SEL, SEL_KPL));
2828 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2829 GSEL(GCODE_SEL, SEL_KPL));
2830 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2831 GSEL(GCODE_SEL, SEL_KPL));
2832 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2833 GSEL(GCODE_SEL, SEL_KPL));
2834 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2835 GSEL(GCODE_SEL, SEL_KPL));
2836 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2837 GSEL(GCODE_SEL, SEL_KPL));
2838 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2839 GSEL(GCODE_SEL, SEL_KPL));
2840 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2841 , GSEL(GCODE_SEL, SEL_KPL));
2842 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2843 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2844 GSEL(GCODE_SEL, SEL_KPL));
2845 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2846 GSEL(GCODE_SEL, SEL_KPL));
2847 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2848 GSEL(GCODE_SEL, SEL_KPL));
2849 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2850 GSEL(GCODE_SEL, SEL_KPL));
2851 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2852 GSEL(GCODE_SEL, SEL_KPL));
2853 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2854 GSEL(GCODE_SEL, SEL_KPL));
2855 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2856 GSEL(GCODE_SEL, SEL_KPL));
2857 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2858 GSEL(GCODE_SEL, SEL_KPL));
2859 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2860 GSEL(GCODE_SEL, SEL_KPL));
2861 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2862 GSEL(GCODE_SEL, SEL_KPL));
2863 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2864 GSEL(GCODE_SEL, SEL_KPL));
2865 #ifdef KDTRACE_HOOKS
2866 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2867 GSEL(GCODE_SEL, SEL_KPL));
2870 r_idt.rd_limit = sizeof(idt0) - 1;
2871 r_idt.rd_base = (int) idt;
2876 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2877 * This should be 0x10de / 0x02a5.
2879 * This is exactly what Linux does.
2881 outl(0xcf8, 0x80000000);
2882 if (inl(0xcfc) == 0x02a510de) {
2883 arch_i386_is_xbox = 1;
2884 pic16l_setled(XBOX_LED_GREEN);
2887 * We are an XBOX, but we may have either 64MB or 128MB of
2888 * memory. The PCI host bridge should be programmed for this,
2889 * so we just query it.
2891 outl(0xcf8, 0x80000084);
2892 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2897 * Initialize the i8254 before the console so that console
2898 * initialization can use DELAY().
2903 * Initialize the console before we print anything out.
2907 if (metadata_missing)
2908 printf("WARNING: loader(8) metadata is missing!\n");
2916 ksym_start = bootinfo.bi_symtab;
2917 ksym_end = bootinfo.bi_esymtab;
2923 if (boothowto & RB_KDB)
2924 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2927 finishidentcpu(); /* Final stage of CPU initialization */
2928 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2929 GSEL(GCODE_SEL, SEL_KPL));
2930 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2931 GSEL(GCODE_SEL, SEL_KPL));
2932 initializecpu(); /* Initialize CPU registers */
2934 /* make an initial tss so cpu can get interrupt stack on syscall! */
2935 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2936 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2937 kstack0_sz - sizeof(struct pcb) - 16);
2938 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2939 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2940 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2941 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2942 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2945 /* pointer to selector slot for %fs/%gs */
2946 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2948 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2949 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2950 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2951 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2953 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2955 dblfault_tss.tss_cr3 = (int)IdlePTD;
2957 dblfault_tss.tss_eip = (int)dblfault_handler;
2958 dblfault_tss.tss_eflags = PSL_KERNEL;
2959 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2960 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2961 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2962 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2963 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2967 init_param2(physmem);
2969 /* now running on new page tables, configured,and u/iom is accessible */
2971 msgbufinit(msgbufp, msgbufsize);
2973 /* make a call gate to reenter kernel with */
2974 gdp = &ldt[LSYS5CALLS_SEL].gd;
2976 x = (int) &IDTVEC(lcall_syscall);
2977 gdp->gd_looffset = x;
2978 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2980 gdp->gd_type = SDT_SYS386CGT;
2981 gdp->gd_dpl = SEL_UPL;
2983 gdp->gd_hioffset = x >> 16;
2985 /* XXX does this work? */
2987 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2988 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2990 /* transfer to user mode */
2992 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2993 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2995 /* setup proc 0's pcb */
2996 thread0.td_pcb->pcb_flags = 0;
2998 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
3000 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
3002 thread0.td_pcb->pcb_ext = 0;
3003 thread0.td_frame = &proc0_tf;
3005 if (cpu_probe_amdc1e())
3006 cpu_idle_fn = cpu_idle_amdc1e;
3011 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
3014 pcpu->pc_acpi_id = 0xffffffff;
3018 spinlock_enter(void)
3024 if (td->td_md.md_spinlock_count == 0) {
3025 flags = intr_disable();
3026 td->td_md.md_spinlock_count = 1;
3027 td->td_md.md_saved_flags = flags;
3029 td->td_md.md_spinlock_count++;
3041 flags = td->td_md.md_saved_flags;
3042 td->td_md.md_spinlock_count--;
3043 if (td->td_md.md_spinlock_count == 0)
3044 intr_restore(flags);
3047 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3048 static void f00f_hack(void *unused);
3049 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3052 f00f_hack(void *unused)
3054 struct gate_descriptor *new_idt;
3062 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3064 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
3066 panic("kmem_alloc returned 0");
3068 /* Put the problematic entry (#6) at the end of the lower page. */
3069 new_idt = (struct gate_descriptor*)
3070 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3071 bcopy(idt, new_idt, sizeof(idt0));
3072 r_idt.rd_base = (u_int)new_idt;
3075 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3076 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3077 panic("vm_map_protect failed");
3079 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3082 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3083 * we want to start a backtrace from the function that caused us to enter
3084 * the debugger. We have the context in the trapframe, but base the trace
3085 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3086 * enough for a backtrace.
3089 makectx(struct trapframe *tf, struct pcb *pcb)
3092 pcb->pcb_edi = tf->tf_edi;
3093 pcb->pcb_esi = tf->tf_esi;
3094 pcb->pcb_ebp = tf->tf_ebp;
3095 pcb->pcb_ebx = tf->tf_ebx;
3096 pcb->pcb_eip = tf->tf_eip;
3097 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3101 ptrace_set_pc(struct thread *td, u_long addr)
3104 td->td_frame->tf_eip = addr;
3109 ptrace_single_step(struct thread *td)
3111 td->td_frame->tf_eflags |= PSL_T;
3116 ptrace_clear_single_step(struct thread *td)
3118 td->td_frame->tf_eflags &= ~PSL_T;
3123 fill_regs(struct thread *td, struct reg *regs)
3126 struct trapframe *tp;
3130 regs->r_gs = pcb->pcb_gs;
3131 return (fill_frame_regs(tp, regs));
3135 fill_frame_regs(struct trapframe *tp, struct reg *regs)
3137 regs->r_fs = tp->tf_fs;
3138 regs->r_es = tp->tf_es;
3139 regs->r_ds = tp->tf_ds;
3140 regs->r_edi = tp->tf_edi;
3141 regs->r_esi = tp->tf_esi;
3142 regs->r_ebp = tp->tf_ebp;
3143 regs->r_ebx = tp->tf_ebx;
3144 regs->r_edx = tp->tf_edx;
3145 regs->r_ecx = tp->tf_ecx;
3146 regs->r_eax = tp->tf_eax;
3147 regs->r_eip = tp->tf_eip;
3148 regs->r_cs = tp->tf_cs;
3149 regs->r_eflags = tp->tf_eflags;
3150 regs->r_esp = tp->tf_esp;
3151 regs->r_ss = tp->tf_ss;
3156 set_regs(struct thread *td, struct reg *regs)
3159 struct trapframe *tp;
3162 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3163 !CS_SECURE(regs->r_cs))
3166 tp->tf_fs = regs->r_fs;
3167 tp->tf_es = regs->r_es;
3168 tp->tf_ds = regs->r_ds;
3169 tp->tf_edi = regs->r_edi;
3170 tp->tf_esi = regs->r_esi;
3171 tp->tf_ebp = regs->r_ebp;
3172 tp->tf_ebx = regs->r_ebx;
3173 tp->tf_edx = regs->r_edx;
3174 tp->tf_ecx = regs->r_ecx;
3175 tp->tf_eax = regs->r_eax;
3176 tp->tf_eip = regs->r_eip;
3177 tp->tf_cs = regs->r_cs;
3178 tp->tf_eflags = regs->r_eflags;
3179 tp->tf_esp = regs->r_esp;
3180 tp->tf_ss = regs->r_ss;
3181 pcb->pcb_gs = regs->r_gs;
3185 #ifdef CPU_ENABLE_SSE
3187 fill_fpregs_xmm(sv_xmm, sv_87)
3188 struct savexmm *sv_xmm;
3189 struct save87 *sv_87;
3191 register struct env87 *penv_87 = &sv_87->sv_env;
3192 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3195 bzero(sv_87, sizeof(*sv_87));
3197 /* FPU control/status */
3198 penv_87->en_cw = penv_xmm->en_cw;
3199 penv_87->en_sw = penv_xmm->en_sw;
3200 penv_87->en_tw = penv_xmm->en_tw;
3201 penv_87->en_fip = penv_xmm->en_fip;
3202 penv_87->en_fcs = penv_xmm->en_fcs;
3203 penv_87->en_opcode = penv_xmm->en_opcode;
3204 penv_87->en_foo = penv_xmm->en_foo;
3205 penv_87->en_fos = penv_xmm->en_fos;
3208 for (i = 0; i < 8; ++i)
3209 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3213 set_fpregs_xmm(sv_87, sv_xmm)
3214 struct save87 *sv_87;
3215 struct savexmm *sv_xmm;
3217 register struct env87 *penv_87 = &sv_87->sv_env;
3218 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3221 /* FPU control/status */
3222 penv_xmm->en_cw = penv_87->en_cw;
3223 penv_xmm->en_sw = penv_87->en_sw;
3224 penv_xmm->en_tw = penv_87->en_tw;
3225 penv_xmm->en_fip = penv_87->en_fip;
3226 penv_xmm->en_fcs = penv_87->en_fcs;
3227 penv_xmm->en_opcode = penv_87->en_opcode;
3228 penv_xmm->en_foo = penv_87->en_foo;
3229 penv_xmm->en_fos = penv_87->en_fos;
3232 for (i = 0; i < 8; ++i)
3233 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3235 #endif /* CPU_ENABLE_SSE */
3238 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3241 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
3242 P_SHOULDSTOP(td->td_proc),
3243 ("not suspended thread %p", td));
3247 bzero(fpregs, sizeof(*fpregs));
3249 #ifdef CPU_ENABLE_SSE
3251 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3252 (struct save87 *)fpregs);
3254 #endif /* CPU_ENABLE_SSE */
3255 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
3261 set_fpregs(struct thread *td, struct fpreg *fpregs)
3264 #ifdef CPU_ENABLE_SSE
3266 set_fpregs_xmm((struct save87 *)fpregs,
3267 &td->td_pcb->pcb_user_save.sv_xmm);
3269 #endif /* CPU_ENABLE_SSE */
3270 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
3279 * Get machine context.
3282 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3284 struct trapframe *tp;
3285 struct segment_descriptor *sdp;
3289 PROC_LOCK(curthread->td_proc);
3290 mcp->mc_onstack = sigonstack(tp->tf_esp);
3291 PROC_UNLOCK(curthread->td_proc);
3292 mcp->mc_gs = td->td_pcb->pcb_gs;
3293 mcp->mc_fs = tp->tf_fs;
3294 mcp->mc_es = tp->tf_es;
3295 mcp->mc_ds = tp->tf_ds;
3296 mcp->mc_edi = tp->tf_edi;
3297 mcp->mc_esi = tp->tf_esi;
3298 mcp->mc_ebp = tp->tf_ebp;
3299 mcp->mc_isp = tp->tf_isp;
3300 mcp->mc_eflags = tp->tf_eflags;
3301 if (flags & GET_MC_CLEAR_RET) {
3304 mcp->mc_eflags &= ~PSL_C;
3306 mcp->mc_eax = tp->tf_eax;
3307 mcp->mc_edx = tp->tf_edx;
3309 mcp->mc_ebx = tp->tf_ebx;
3310 mcp->mc_ecx = tp->tf_ecx;
3311 mcp->mc_eip = tp->tf_eip;
3312 mcp->mc_cs = tp->tf_cs;
3313 mcp->mc_esp = tp->tf_esp;
3314 mcp->mc_ss = tp->tf_ss;
3315 mcp->mc_len = sizeof(*mcp);
3316 get_fpcontext(td, mcp);
3317 sdp = &td->td_pcb->pcb_fsd;
3318 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3319 sdp = &td->td_pcb->pcb_gsd;
3320 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3321 bzero(mcp->mc_spare1, sizeof(mcp->mc_spare1));
3322 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3327 * Set machine context.
3329 * However, we don't set any but the user modifiable flags, and we won't
3330 * touch the cs selector.
3333 set_mcontext(struct thread *td, const mcontext_t *mcp)
3335 struct trapframe *tp;
3339 if (mcp->mc_len != sizeof(*mcp))
3341 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3342 (tp->tf_eflags & ~PSL_USERCHANGE);
3343 if ((ret = set_fpcontext(td, mcp)) == 0) {
3344 tp->tf_fs = mcp->mc_fs;
3345 tp->tf_es = mcp->mc_es;
3346 tp->tf_ds = mcp->mc_ds;
3347 tp->tf_edi = mcp->mc_edi;
3348 tp->tf_esi = mcp->mc_esi;
3349 tp->tf_ebp = mcp->mc_ebp;
3350 tp->tf_ebx = mcp->mc_ebx;
3351 tp->tf_edx = mcp->mc_edx;
3352 tp->tf_ecx = mcp->mc_ecx;
3353 tp->tf_eax = mcp->mc_eax;
3354 tp->tf_eip = mcp->mc_eip;
3355 tp->tf_eflags = eflags;
3356 tp->tf_esp = mcp->mc_esp;
3357 tp->tf_ss = mcp->mc_ss;
3358 td->td_pcb->pcb_gs = mcp->mc_gs;
3365 get_fpcontext(struct thread *td, mcontext_t *mcp)
3369 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3370 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3371 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3373 mcp->mc_ownedfp = npxgetregs(td);
3374 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
3375 sizeof(mcp->mc_fpstate));
3376 mcp->mc_fpformat = npxformat();
3381 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3384 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3386 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3387 mcp->mc_fpformat != _MC_FPFMT_XMM)
3389 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3390 /* We don't care what state is left in the FPU or PCB. */
3392 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3393 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3395 #ifdef CPU_ENABLE_SSE
3397 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
3398 en_mxcsr &= cpu_mxcsr_mask;
3400 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
3408 fpstate_drop(struct thread *td)
3411 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3414 if (PCPU_GET(fpcurthread) == td)
3418 * XXX force a full drop of the npx. The above only drops it if we
3419 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3421 * XXX I don't much like npxgetregs()'s semantics of doing a full
3422 * drop. Dropping only to the pcb matches fnsave's behaviour.
3423 * We only need to drop to !PCB_INITDONE in sendsig(). But
3424 * sendsig() is the only caller of npxgetregs()... perhaps we just
3425 * have too many layers.
3427 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3428 PCB_NPXUSERINITDONE);
3433 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3438 dbregs->dr[0] = rdr0();
3439 dbregs->dr[1] = rdr1();
3440 dbregs->dr[2] = rdr2();
3441 dbregs->dr[3] = rdr3();
3442 dbregs->dr[4] = rdr4();
3443 dbregs->dr[5] = rdr5();
3444 dbregs->dr[6] = rdr6();
3445 dbregs->dr[7] = rdr7();
3448 dbregs->dr[0] = pcb->pcb_dr0;
3449 dbregs->dr[1] = pcb->pcb_dr1;
3450 dbregs->dr[2] = pcb->pcb_dr2;
3451 dbregs->dr[3] = pcb->pcb_dr3;
3454 dbregs->dr[6] = pcb->pcb_dr6;
3455 dbregs->dr[7] = pcb->pcb_dr7;
3461 set_dbregs(struct thread *td, struct dbreg *dbregs)
3467 load_dr0(dbregs->dr[0]);
3468 load_dr1(dbregs->dr[1]);
3469 load_dr2(dbregs->dr[2]);
3470 load_dr3(dbregs->dr[3]);
3471 load_dr4(dbregs->dr[4]);
3472 load_dr5(dbregs->dr[5]);
3473 load_dr6(dbregs->dr[6]);
3474 load_dr7(dbregs->dr[7]);
3477 * Don't let an illegal value for dr7 get set. Specifically,
3478 * check for undefined settings. Setting these bit patterns
3479 * result in undefined behaviour and can lead to an unexpected
3482 for (i = 0; i < 4; i++) {
3483 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3485 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3492 * Don't let a process set a breakpoint that is not within the
3493 * process's address space. If a process could do this, it
3494 * could halt the system by setting a breakpoint in the kernel
3495 * (if ddb was enabled). Thus, we need to check to make sure
3496 * that no breakpoints are being enabled for addresses outside
3497 * process's address space.
3499 * XXX - what about when the watched area of the user's
3500 * address space is written into from within the kernel
3501 * ... wouldn't that still cause a breakpoint to be generated
3502 * from within kernel mode?
3505 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3506 /* dr0 is enabled */
3507 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3511 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3512 /* dr1 is enabled */
3513 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3517 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3518 /* dr2 is enabled */
3519 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3523 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3524 /* dr3 is enabled */
3525 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3529 pcb->pcb_dr0 = dbregs->dr[0];
3530 pcb->pcb_dr1 = dbregs->dr[1];
3531 pcb->pcb_dr2 = dbregs->dr[2];
3532 pcb->pcb_dr3 = dbregs->dr[3];
3533 pcb->pcb_dr6 = dbregs->dr[6];
3534 pcb->pcb_dr7 = dbregs->dr[7];
3536 pcb->pcb_flags |= PCB_DBREGS;
3543 * Return > 0 if a hardware breakpoint has been hit, and the
3544 * breakpoint was in user space. Return 0, otherwise.
3547 user_dbreg_trap(void)
3549 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3550 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3551 int nbp; /* number of breakpoints that triggered */
3552 caddr_t addr[4]; /* breakpoint addresses */
3556 if ((dr7 & 0x000000ff) == 0) {
3558 * all GE and LE bits in the dr7 register are zero,
3559 * thus the trap couldn't have been caused by the
3560 * hardware debug registers
3567 bp = dr6 & 0x0000000f;
3571 * None of the breakpoint bits are set meaning this
3572 * trap was not caused by any of the debug registers
3578 * at least one of the breakpoints were hit, check to see
3579 * which ones and if any of them are user space addresses
3583 addr[nbp++] = (caddr_t)rdr0();
3586 addr[nbp++] = (caddr_t)rdr1();
3589 addr[nbp++] = (caddr_t)rdr2();
3592 addr[nbp++] = (caddr_t)rdr3();
3595 for (i = 0; i < nbp; i++) {
3596 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3598 * addr[i] is in user space
3605 * None of the breakpoints are in user space.
3611 #include <machine/apicvar.h>
3614 * Provide stub functions so that the MADT APIC enumerator in the acpi
3615 * kernel module will link against a kernel without 'device apic'.
3617 * XXX - This is a gross hack.
3620 apic_register_enumerator(struct apic_enumerator *enumerator)
3625 ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase)
3631 ioapic_disable_pin(void *cookie, u_int pin)
3637 ioapic_get_vector(void *cookie, u_int pin)
3643 ioapic_register(void *cookie)
3648 ioapic_remap_vector(void *cookie, u_int pin, int vector)
3654 ioapic_set_extint(void *cookie, u_int pin)
3660 ioapic_set_nmi(void *cookie, u_int pin)
3666 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
3672 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
3678 lapic_create(u_int apic_id, int boot_cpu)
3683 lapic_init(vm_paddr_t addr)
3688 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3694 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3700 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3709 * Provide inb() and outb() as functions. They are normally only available as
3710 * inline functions, thus cannot be called from the debugger.
3713 /* silence compiler warnings */
3714 u_char inb_(u_short);
3715 void outb_(u_short, u_char);
3724 outb_(u_short port, u_char data)