2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
56 #include "opt_perfmon.h"
58 #include "opt_kdtrace.h"
60 #include <sys/param.h>
62 #include <sys/systm.h>
66 #include <sys/callout.h>
69 #include <sys/eventhandler.h>
71 #include <sys/imgact.h>
73 #include <sys/kernel.h>
75 #include <sys/linker.h>
77 #include <sys/malloc.h>
78 #include <sys/memrange.h>
79 #include <sys/msgbuf.h>
80 #include <sys/mutex.h>
82 #include <sys/ptrace.h>
83 #include <sys/reboot.h>
84 #include <sys/sched.h>
85 #include <sys/signalvar.h>
89 #include <sys/syscallsubr.h>
90 #include <sys/sysctl.h>
91 #include <sys/sysent.h>
92 #include <sys/sysproto.h>
93 #include <sys/ucontext.h>
94 #include <sys/vmmeter.h>
97 #include <vm/vm_extern.h>
98 #include <vm/vm_kern.h>
99 #include <vm/vm_page.h>
100 #include <vm/vm_map.h>
101 #include <vm/vm_object.h>
102 #include <vm/vm_pager.h>
103 #include <vm/vm_param.h>
107 #error KDB must be enabled in order for DDB to work!
110 #include <ddb/db_sym.h>
115 #include <net/netisr.h>
117 #include <machine/bootinfo.h>
118 #include <machine/clock.h>
119 #include <machine/cpu.h>
120 #include <machine/cputypes.h>
121 #include <machine/intr_machdep.h>
123 #include <machine/md_var.h>
124 #include <machine/metadata.h>
125 #include <machine/mp_watchdog.h>
126 #include <machine/pc/bios.h>
127 #include <machine/pcb.h>
128 #include <machine/pcb_ext.h>
129 #include <machine/proc.h>
130 #include <machine/reg.h>
131 #include <machine/sigframe.h>
132 #include <machine/specialreg.h>
133 #include <machine/vm86.h>
135 #include <machine/perfmon.h>
138 #include <machine/smp.h>
142 #include <machine/apicvar.h>
146 #include <x86/isa/icu.h>
150 #include <machine/xbox.h>
152 int arch_i386_is_xbox = 0;
153 uint32_t arch_i386_xbox_memsize = 0;
158 #include <machine/xen/xen-os.h>
159 #include <xen/hypervisor.h>
160 #include <machine/xen/xen-os.h>
161 #include <machine/xen/xenvar.h>
162 #include <machine/xen/xenfunc.h>
163 #include <xen/xen_intr.h>
165 void Xhypervisor_callback(void);
166 void failsafe_callback(void);
168 extern trap_info_t trap_table[];
169 struct proc_ldt default_proc_ldt;
170 extern int init_first;
172 extern unsigned long physfree;
175 /* Sanity check for __curthread() */
176 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
178 extern void init386(int first);
179 extern void dblfault_handler(void);
181 extern void printcpuinfo(void); /* XXX header file */
182 extern void finishidentcpu(void);
183 extern void panicifcpuunsupported(void);
185 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
186 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
188 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
189 #define CPU_ENABLE_SSE
192 static void cpu_startup(void *);
193 static void fpstate_drop(struct thread *td);
194 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
195 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
196 #ifdef CPU_ENABLE_SSE
197 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
198 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
199 #endif /* CPU_ENABLE_SSE */
200 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
203 extern vm_offset_t ksym_start, ksym_end;
206 /* Intel ICH registers */
207 #define ICH_PMBASE 0x400
208 #define ICH_SMI_EN ICH_PMBASE + 0x30
210 int _udatasel, _ucodesel;
216 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
218 #ifdef COMPAT_FREEBSD4
219 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
226 FEATURE(pae, "Physical Address Extensions");
230 * The number of PHYSMAP entries must be one less than the number of
231 * PHYSSEG entries because the PHYSMAP entry that spans the largest
232 * physical address that is accessible by ISA DMA is split into two
235 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
237 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
238 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
240 /* must be 2 less so 0 0 can signal end of chunks */
241 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
242 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
244 struct kva_md_info kmi;
246 static struct trapframe proc0_tf;
247 struct pcpu __pcpu[MAXCPU];
251 struct mem_range_softc mem_range_softc;
261 * On MacBooks, we need to disallow the legacy USB circuit to
262 * generate an SMI# because this can cause several problems,
263 * namely: incorrect CPU frequency detection and failure to
265 * We do this by disabling a bit in the SMI_EN (SMI Control and
266 * Enable register) of the Intel ICH LPC Interface Bridge.
268 sysenv = getenv("smbios.system.product");
269 if (sysenv != NULL) {
270 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
271 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
272 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
273 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
274 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
275 strncmp(sysenv, "Macmini1,1", 10) == 0) {
277 printf("Disabling LEGACY_USB_EN bit on "
279 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
285 * Good {morning,afternoon,evening,night}.
289 panicifcpuunsupported();
296 * Display physical memory if SMBIOS reports reasonable amount.
299 sysenv = getenv("smbios.memory.enabled");
300 if (sysenv != NULL) {
301 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
304 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
305 memsize = ptoa((uintmax_t)Maxmem);
306 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
309 * Display any holes after the first chunk of extended memory.
314 printf("Physical memory chunk(s):\n");
315 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
318 size = phys_avail[indx + 1] - phys_avail[indx];
320 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
321 (uintmax_t)phys_avail[indx],
322 (uintmax_t)phys_avail[indx + 1] - 1,
323 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
327 vm_ksubmap_init(&kmi);
329 printf("avail memory = %ju (%ju MB)\n",
330 ptoa((uintmax_t)cnt.v_free_count),
331 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
334 * Set up buffers, so they can be used to read disk labels.
337 vm_pager_bufferinit();
343 * Add BSP as an interrupt target.
349 * Send an interrupt to process.
351 * Stack is set up to allow sigcode stored
352 * at top to call routine, followed by kcall
353 * to sigreturn routine below. After sigreturn
354 * resets the signal mask, the stack, and the
355 * frame pointer, it returns to the user
360 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
362 struct osigframe sf, *fp;
366 struct trapframe *regs;
372 PROC_LOCK_ASSERT(p, MA_OWNED);
373 sig = ksi->ksi_signo;
375 mtx_assert(&psp->ps_mtx, MA_OWNED);
377 oonstack = sigonstack(regs->tf_esp);
379 /* Allocate space for the signal handler context. */
380 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
381 SIGISMEMBER(psp->ps_sigonstack, sig)) {
382 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
383 td->td_sigstk.ss_size - sizeof(struct osigframe));
384 #if defined(COMPAT_43)
385 td->td_sigstk.ss_flags |= SS_ONSTACK;
388 fp = (struct osigframe *)regs->tf_esp - 1;
390 /* Translate the signal if appropriate. */
391 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
392 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
394 /* Build the argument list for the signal handler. */
396 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
397 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
398 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
399 /* Signal handler installed with SA_SIGINFO. */
400 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
401 sf.sf_siginfo.si_signo = sig;
402 sf.sf_siginfo.si_code = ksi->ksi_code;
403 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
406 /* Old FreeBSD-style arguments. */
407 sf.sf_arg2 = ksi->ksi_code;
408 sf.sf_addr = (register_t)ksi->ksi_addr;
409 sf.sf_ahu.sf_handler = catcher;
411 mtx_unlock(&psp->ps_mtx);
414 /* Save most if not all of trap frame. */
415 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
416 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
417 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
418 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
419 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
420 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
421 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
422 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
423 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
424 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
425 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
426 sf.sf_siginfo.si_sc.sc_gs = rgs();
427 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
429 /* Build the signal context to be used by osigreturn(). */
430 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
431 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
432 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
433 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
434 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
435 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
436 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
437 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
440 * If we're a vm86 process, we want to save the segment registers.
441 * We also change eflags to be our emulated eflags, not the actual
444 if (regs->tf_eflags & PSL_VM) {
445 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
446 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
447 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
449 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
450 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
451 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
452 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
454 if (vm86->vm86_has_vme == 0)
455 sf.sf_siginfo.si_sc.sc_ps =
456 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
457 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
459 /* See sendsig() for comments. */
460 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
464 * Copy the sigframe out to the user's stack.
466 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
468 printf("process %ld has trashed its stack\n", (long)p->p_pid);
474 regs->tf_esp = (int)fp;
475 if (p->p_sysent->sv_sigcode_base != 0) {
476 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
479 /* a.out sysentvec does not use shared page */
480 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
482 regs->tf_eflags &= ~(PSL_T | PSL_D);
483 regs->tf_cs = _ucodesel;
484 regs->tf_ds = _udatasel;
485 regs->tf_es = _udatasel;
486 regs->tf_fs = _udatasel;
488 regs->tf_ss = _udatasel;
490 mtx_lock(&psp->ps_mtx);
492 #endif /* COMPAT_43 */
494 #ifdef COMPAT_FREEBSD4
496 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
498 struct sigframe4 sf, *sfp;
502 struct trapframe *regs;
508 PROC_LOCK_ASSERT(p, MA_OWNED);
509 sig = ksi->ksi_signo;
511 mtx_assert(&psp->ps_mtx, MA_OWNED);
513 oonstack = sigonstack(regs->tf_esp);
515 /* Save user context. */
516 bzero(&sf, sizeof(sf));
517 sf.sf_uc.uc_sigmask = *mask;
518 sf.sf_uc.uc_stack = td->td_sigstk;
519 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
520 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
521 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
522 sf.sf_uc.uc_mcontext.mc_gs = rgs();
523 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
524 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
525 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
526 bzero(sf.sf_uc.uc_mcontext.__spare__,
527 sizeof(sf.sf_uc.uc_mcontext.__spare__));
528 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
530 /* Allocate space for the signal handler context. */
531 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
532 SIGISMEMBER(psp->ps_sigonstack, sig)) {
533 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
534 td->td_sigstk.ss_size - sizeof(struct sigframe4));
535 #if defined(COMPAT_43)
536 td->td_sigstk.ss_flags |= SS_ONSTACK;
539 sfp = (struct sigframe4 *)regs->tf_esp - 1;
541 /* Translate the signal if appropriate. */
542 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
543 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
545 /* Build the argument list for the signal handler. */
547 sf.sf_ucontext = (register_t)&sfp->sf_uc;
548 bzero(&sf.sf_si, sizeof(sf.sf_si));
549 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
550 /* Signal handler installed with SA_SIGINFO. */
551 sf.sf_siginfo = (register_t)&sfp->sf_si;
552 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
554 /* Fill in POSIX parts */
555 sf.sf_si.si_signo = sig;
556 sf.sf_si.si_code = ksi->ksi_code;
557 sf.sf_si.si_addr = ksi->ksi_addr;
559 /* Old FreeBSD-style arguments. */
560 sf.sf_siginfo = ksi->ksi_code;
561 sf.sf_addr = (register_t)ksi->ksi_addr;
562 sf.sf_ahu.sf_handler = catcher;
564 mtx_unlock(&psp->ps_mtx);
568 * If we're a vm86 process, we want to save the segment registers.
569 * We also change eflags to be our emulated eflags, not the actual
572 if (regs->tf_eflags & PSL_VM) {
573 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
574 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
576 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
577 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
578 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
579 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
581 if (vm86->vm86_has_vme == 0)
582 sf.sf_uc.uc_mcontext.mc_eflags =
583 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
584 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
587 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
588 * syscalls made by the signal handler. This just avoids
589 * wasting time for our lazy fixup of such faults. PSL_NT
590 * does nothing in vm86 mode, but vm86 programs can set it
591 * almost legitimately in probes for old cpu types.
593 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
597 * Copy the sigframe out to the user's stack.
599 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
601 printf("process %ld has trashed its stack\n", (long)p->p_pid);
607 regs->tf_esp = (int)sfp;
608 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
610 regs->tf_eflags &= ~(PSL_T | PSL_D);
611 regs->tf_cs = _ucodesel;
612 regs->tf_ds = _udatasel;
613 regs->tf_es = _udatasel;
614 regs->tf_fs = _udatasel;
615 regs->tf_ss = _udatasel;
617 mtx_lock(&psp->ps_mtx);
619 #endif /* COMPAT_FREEBSD4 */
622 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
624 struct sigframe sf, *sfp;
629 struct trapframe *regs;
630 struct segment_descriptor *sdp;
636 PROC_LOCK_ASSERT(p, MA_OWNED);
637 sig = ksi->ksi_signo;
639 mtx_assert(&psp->ps_mtx, MA_OWNED);
640 #ifdef COMPAT_FREEBSD4
641 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
642 freebsd4_sendsig(catcher, ksi, mask);
647 if (SIGISMEMBER(psp->ps_osigset, sig)) {
648 osendsig(catcher, ksi, mask);
653 oonstack = sigonstack(regs->tf_esp);
655 /* Save user context. */
656 bzero(&sf, sizeof(sf));
657 sf.sf_uc.uc_sigmask = *mask;
658 sf.sf_uc.uc_stack = td->td_sigstk;
659 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
660 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
661 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
662 sf.sf_uc.uc_mcontext.mc_gs = rgs();
663 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
664 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
665 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
668 * Unconditionally fill the fsbase and gsbase into the mcontext.
670 sdp = &td->td_pcb->pcb_fsd;
671 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
673 sdp = &td->td_pcb->pcb_gsd;
674 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
676 sf.sf_uc.uc_mcontext.mc_flags = 0;
677 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
678 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
679 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
681 /* Allocate space for the signal handler context. */
682 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
683 SIGISMEMBER(psp->ps_sigonstack, sig)) {
684 sp = td->td_sigstk.ss_sp +
685 td->td_sigstk.ss_size - sizeof(struct sigframe);
686 #if defined(COMPAT_43)
687 td->td_sigstk.ss_flags |= SS_ONSTACK;
690 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
691 /* Align to 16 bytes. */
692 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
694 /* Translate the signal if appropriate. */
695 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
696 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
698 /* Build the argument list for the signal handler. */
700 sf.sf_ucontext = (register_t)&sfp->sf_uc;
701 bzero(&sf.sf_si, sizeof(sf.sf_si));
702 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
703 /* Signal handler installed with SA_SIGINFO. */
704 sf.sf_siginfo = (register_t)&sfp->sf_si;
705 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
707 /* Fill in POSIX parts */
708 sf.sf_si = ksi->ksi_info;
709 sf.sf_si.si_signo = sig; /* maybe a translated signal */
711 /* Old FreeBSD-style arguments. */
712 sf.sf_siginfo = ksi->ksi_code;
713 sf.sf_addr = (register_t)ksi->ksi_addr;
714 sf.sf_ahu.sf_handler = catcher;
716 mtx_unlock(&psp->ps_mtx);
720 * If we're a vm86 process, we want to save the segment registers.
721 * We also change eflags to be our emulated eflags, not the actual
724 if (regs->tf_eflags & PSL_VM) {
725 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
726 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
728 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
729 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
730 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
731 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
733 if (vm86->vm86_has_vme == 0)
734 sf.sf_uc.uc_mcontext.mc_eflags =
735 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
736 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
739 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
740 * syscalls made by the signal handler. This just avoids
741 * wasting time for our lazy fixup of such faults. PSL_NT
742 * does nothing in vm86 mode, but vm86 programs can set it
743 * almost legitimately in probes for old cpu types.
745 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
749 * Copy the sigframe out to the user's stack.
751 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
753 printf("process %ld has trashed its stack\n", (long)p->p_pid);
759 regs->tf_esp = (int)sfp;
760 regs->tf_eip = p->p_sysent->sv_sigcode_base;
761 if (regs->tf_eip == 0)
762 regs->tf_eip = p->p_sysent->sv_psstrings - szsigcode;
763 regs->tf_eflags &= ~(PSL_T | PSL_D);
764 regs->tf_cs = _ucodesel;
765 regs->tf_ds = _udatasel;
766 regs->tf_es = _udatasel;
767 regs->tf_fs = _udatasel;
768 regs->tf_ss = _udatasel;
770 mtx_lock(&psp->ps_mtx);
774 * System call to cleanup state after a signal
775 * has been taken. Reset signal mask and
776 * stack state from context left by sendsig (above).
777 * Return to previous pc and psl as specified by
778 * context left by sendsig. Check carefully to
779 * make sure that the user has not modified the
780 * state to gain improper privileges.
788 struct osigreturn_args /* {
789 struct osigcontext *sigcntxp;
792 struct osigcontext sc;
793 struct trapframe *regs;
794 struct osigcontext *scp;
799 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
804 if (eflags & PSL_VM) {
805 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
806 struct vm86_kernel *vm86;
809 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
810 * set up the vm86 area, and we can't enter vm86 mode.
812 if (td->td_pcb->pcb_ext == 0)
814 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
815 if (vm86->vm86_inited == 0)
818 /* Go back to user mode if both flags are set. */
819 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
820 ksiginfo_init_trap(&ksi);
821 ksi.ksi_signo = SIGBUS;
822 ksi.ksi_code = BUS_OBJERR;
823 ksi.ksi_addr = (void *)regs->tf_eip;
824 trapsignal(td, &ksi);
827 if (vm86->vm86_has_vme) {
828 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
829 (eflags & VME_USERCHANGE) | PSL_VM;
831 vm86->vm86_eflags = eflags; /* save VIF, VIP */
832 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
833 (eflags & VM_USERCHANGE) | PSL_VM;
835 tf->tf_vm86_ds = scp->sc_ds;
836 tf->tf_vm86_es = scp->sc_es;
837 tf->tf_vm86_fs = scp->sc_fs;
838 tf->tf_vm86_gs = scp->sc_gs;
839 tf->tf_ds = _udatasel;
840 tf->tf_es = _udatasel;
841 tf->tf_fs = _udatasel;
844 * Don't allow users to change privileged or reserved flags.
846 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
851 * Don't allow users to load a valid privileged %cs. Let the
852 * hardware check for invalid selectors, excess privilege in
853 * other selectors, invalid %eip's and invalid %esp's.
855 if (!CS_SECURE(scp->sc_cs)) {
856 ksiginfo_init_trap(&ksi);
857 ksi.ksi_signo = SIGBUS;
858 ksi.ksi_code = BUS_OBJERR;
859 ksi.ksi_trapno = T_PROTFLT;
860 ksi.ksi_addr = (void *)regs->tf_eip;
861 trapsignal(td, &ksi);
864 regs->tf_ds = scp->sc_ds;
865 regs->tf_es = scp->sc_es;
866 regs->tf_fs = scp->sc_fs;
869 /* Restore remaining registers. */
870 regs->tf_eax = scp->sc_eax;
871 regs->tf_ebx = scp->sc_ebx;
872 regs->tf_ecx = scp->sc_ecx;
873 regs->tf_edx = scp->sc_edx;
874 regs->tf_esi = scp->sc_esi;
875 regs->tf_edi = scp->sc_edi;
876 regs->tf_cs = scp->sc_cs;
877 regs->tf_ss = scp->sc_ss;
878 regs->tf_isp = scp->sc_isp;
879 regs->tf_ebp = scp->sc_fp;
880 regs->tf_esp = scp->sc_sp;
881 regs->tf_eip = scp->sc_pc;
882 regs->tf_eflags = eflags;
884 #if defined(COMPAT_43)
885 if (scp->sc_onstack & 1)
886 td->td_sigstk.ss_flags |= SS_ONSTACK;
888 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
890 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
892 return (EJUSTRETURN);
894 #endif /* COMPAT_43 */
896 #ifdef COMPAT_FREEBSD4
901 freebsd4_sigreturn(td, uap)
903 struct freebsd4_sigreturn_args /* {
904 const ucontext4 *sigcntxp;
908 struct trapframe *regs;
909 struct ucontext4 *ucp;
910 int cs, eflags, error;
913 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
918 eflags = ucp->uc_mcontext.mc_eflags;
919 if (eflags & PSL_VM) {
920 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
921 struct vm86_kernel *vm86;
924 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
925 * set up the vm86 area, and we can't enter vm86 mode.
927 if (td->td_pcb->pcb_ext == 0)
929 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
930 if (vm86->vm86_inited == 0)
933 /* Go back to user mode if both flags are set. */
934 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
935 ksiginfo_init_trap(&ksi);
936 ksi.ksi_signo = SIGBUS;
937 ksi.ksi_code = BUS_OBJERR;
938 ksi.ksi_addr = (void *)regs->tf_eip;
939 trapsignal(td, &ksi);
941 if (vm86->vm86_has_vme) {
942 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
943 (eflags & VME_USERCHANGE) | PSL_VM;
945 vm86->vm86_eflags = eflags; /* save VIF, VIP */
946 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
947 (eflags & VM_USERCHANGE) | PSL_VM;
949 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
950 tf->tf_eflags = eflags;
951 tf->tf_vm86_ds = tf->tf_ds;
952 tf->tf_vm86_es = tf->tf_es;
953 tf->tf_vm86_fs = tf->tf_fs;
954 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
955 tf->tf_ds = _udatasel;
956 tf->tf_es = _udatasel;
957 tf->tf_fs = _udatasel;
960 * Don't allow users to change privileged or reserved flags.
962 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
963 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
964 td->td_proc->p_pid, td->td_name, eflags);
969 * Don't allow users to load a valid privileged %cs. Let the
970 * hardware check for invalid selectors, excess privilege in
971 * other selectors, invalid %eip's and invalid %esp's.
973 cs = ucp->uc_mcontext.mc_cs;
974 if (!CS_SECURE(cs)) {
975 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
976 td->td_proc->p_pid, td->td_name, cs);
977 ksiginfo_init_trap(&ksi);
978 ksi.ksi_signo = SIGBUS;
979 ksi.ksi_code = BUS_OBJERR;
980 ksi.ksi_trapno = T_PROTFLT;
981 ksi.ksi_addr = (void *)regs->tf_eip;
982 trapsignal(td, &ksi);
986 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
989 #if defined(COMPAT_43)
990 if (ucp->uc_mcontext.mc_onstack & 1)
991 td->td_sigstk.ss_flags |= SS_ONSTACK;
993 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
995 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
996 return (EJUSTRETURN);
998 #endif /* COMPAT_FREEBSD4 */
1004 sys_sigreturn(td, uap)
1006 struct sigreturn_args /* {
1007 const struct __ucontext *sigcntxp;
1011 struct trapframe *regs;
1013 int cs, eflags, error, ret;
1016 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1020 regs = td->td_frame;
1021 eflags = ucp->uc_mcontext.mc_eflags;
1022 if (eflags & PSL_VM) {
1023 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1024 struct vm86_kernel *vm86;
1027 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1028 * set up the vm86 area, and we can't enter vm86 mode.
1030 if (td->td_pcb->pcb_ext == 0)
1032 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1033 if (vm86->vm86_inited == 0)
1036 /* Go back to user mode if both flags are set. */
1037 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1038 ksiginfo_init_trap(&ksi);
1039 ksi.ksi_signo = SIGBUS;
1040 ksi.ksi_code = BUS_OBJERR;
1041 ksi.ksi_addr = (void *)regs->tf_eip;
1042 trapsignal(td, &ksi);
1045 if (vm86->vm86_has_vme) {
1046 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1047 (eflags & VME_USERCHANGE) | PSL_VM;
1049 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1050 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1051 (eflags & VM_USERCHANGE) | PSL_VM;
1053 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1054 tf->tf_eflags = eflags;
1055 tf->tf_vm86_ds = tf->tf_ds;
1056 tf->tf_vm86_es = tf->tf_es;
1057 tf->tf_vm86_fs = tf->tf_fs;
1058 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1059 tf->tf_ds = _udatasel;
1060 tf->tf_es = _udatasel;
1061 tf->tf_fs = _udatasel;
1064 * Don't allow users to change privileged or reserved flags.
1066 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
1067 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1068 td->td_proc->p_pid, td->td_name, eflags);
1073 * Don't allow users to load a valid privileged %cs. Let the
1074 * hardware check for invalid selectors, excess privilege in
1075 * other selectors, invalid %eip's and invalid %esp's.
1077 cs = ucp->uc_mcontext.mc_cs;
1078 if (!CS_SECURE(cs)) {
1079 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1080 td->td_proc->p_pid, td->td_name, cs);
1081 ksiginfo_init_trap(&ksi);
1082 ksi.ksi_signo = SIGBUS;
1083 ksi.ksi_code = BUS_OBJERR;
1084 ksi.ksi_trapno = T_PROTFLT;
1085 ksi.ksi_addr = (void *)regs->tf_eip;
1086 trapsignal(td, &ksi);
1090 ret = set_fpcontext(td, &ucp->uc_mcontext);
1093 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1096 #if defined(COMPAT_43)
1097 if (ucp->uc_mcontext.mc_onstack & 1)
1098 td->td_sigstk.ss_flags |= SS_ONSTACK;
1100 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1103 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1104 return (EJUSTRETURN);
1108 * Machine dependent boot() routine
1110 * I haven't seen anything to put here yet
1111 * Possibly some stuff might be grafted back here from boot()
1119 * Flush the D-cache for non-DMA I/O so that the I-cache can
1120 * be made coherent later.
1123 cpu_flush_dcache(void *ptr, size_t len)
1125 /* Not applicable */
1128 /* Get current clock frequency for the given cpu id. */
1130 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1132 uint64_t tsc1, tsc2;
1133 uint64_t acnt, mcnt, perf;
1136 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1138 if ((cpu_feature & CPUID_TSC) == 0)
1139 return (EOPNOTSUPP);
1142 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
1143 * DELAY(9) based logic fails.
1145 if (tsc_is_invariant && !tsc_perf_stat)
1146 return (EOPNOTSUPP);
1150 /* Schedule ourselves on the indicated cpu. */
1151 thread_lock(curthread);
1152 sched_bind(curthread, cpu_id);
1153 thread_unlock(curthread);
1157 /* Calibrate by measuring a short delay. */
1158 reg = intr_disable();
1159 if (tsc_is_invariant) {
1160 wrmsr(MSR_MPERF, 0);
1161 wrmsr(MSR_APERF, 0);
1164 mcnt = rdmsr(MSR_MPERF);
1165 acnt = rdmsr(MSR_APERF);
1168 perf = 1000 * acnt / mcnt;
1169 *rate = (tsc2 - tsc1) * perf;
1175 *rate = (tsc2 - tsc1) * 1000;
1180 thread_lock(curthread);
1181 sched_unbind(curthread);
1182 thread_unlock(curthread);
1194 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1197 int scheduler_running;
1200 cpu_idle_hlt(int busy)
1203 scheduler_running = 1;
1210 * Shutdown the CPU as much as possible
1221 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1222 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
1223 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1224 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1225 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1226 0, "Use MONITOR/MWAIT for short idle");
1228 #define STATE_RUNNING 0x0
1229 #define STATE_MWAIT 0x1
1230 #define STATE_SLEEPING 0x2
1233 cpu_idle_acpi(int busy)
1237 state = (int *)PCPU_PTR(monitorbuf);
1238 *state = STATE_SLEEPING;
1240 if (sched_runnable())
1242 else if (cpu_idle_hook)
1245 __asm __volatile("sti; hlt");
1246 *state = STATE_RUNNING;
1251 cpu_idle_hlt(int busy)
1255 state = (int *)PCPU_PTR(monitorbuf);
1256 *state = STATE_SLEEPING;
1258 * We must absolutely guarentee that hlt is the next instruction
1259 * after sti or we introduce a timing window.
1262 if (sched_runnable())
1265 __asm __volatile("sti; hlt");
1266 *state = STATE_RUNNING;
1271 * MWAIT cpu power states. Lower 4 bits are sub-states.
1273 #define MWAIT_C0 0xf0
1274 #define MWAIT_C1 0x00
1275 #define MWAIT_C2 0x10
1276 #define MWAIT_C3 0x20
1277 #define MWAIT_C4 0x30
1280 cpu_idle_mwait(int busy)
1284 state = (int *)PCPU_PTR(monitorbuf);
1285 *state = STATE_MWAIT;
1286 if (!sched_runnable()) {
1287 cpu_monitor(state, 0, 0);
1288 if (*state == STATE_MWAIT)
1289 cpu_mwait(0, MWAIT_C1);
1291 *state = STATE_RUNNING;
1295 cpu_idle_spin(int busy)
1300 state = (int *)PCPU_PTR(monitorbuf);
1301 *state = STATE_RUNNING;
1302 for (i = 0; i < 1000; i++) {
1303 if (sched_runnable())
1310 * C1E renders the local APIC timer dead, so we disable it by
1311 * reading the Interrupt Pending Message register and clearing
1312 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1315 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1316 * #32559 revision 3.00+
1318 #define MSR_AMDK8_IPM 0xc0010055
1319 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1320 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1321 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1324 cpu_probe_amdc1e(void)
1328 * Detect the presence of C1E capability mostly on latest
1329 * dual-cores (or future) k8 family.
1331 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1332 (cpu_id & 0x00000f00) == 0x00000f00 &&
1333 (cpu_id & 0x0fff0000) >= 0x00040000) {
1334 cpu_ident_amdc1e = 1;
1339 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1341 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1351 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1353 #if defined(MP_WATCHDOG) && !defined(XEN)
1354 ap_watchdog(PCPU_GET(cpuid));
1357 /* If we are busy - try to use fast methods. */
1359 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1360 cpu_idle_mwait(busy);
1366 /* If we have time - switch timers into idle mode. */
1373 /* Apply AMD APIC timer C1E workaround. */
1374 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
1375 msr = rdmsr(MSR_AMDK8_IPM);
1376 if (msr & AMDK8_CMPHALT)
1377 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1381 /* Call main idle method. */
1384 /* Switch timers mack into active mode. */
1392 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1397 cpu_idle_wakeup(int cpu)
1402 pcpu = pcpu_find(cpu);
1403 state = (int *)pcpu->pc_monitorbuf;
1405 * This doesn't need to be atomic since missing the race will
1406 * simply result in unnecessary IPIs.
1408 if (*state == STATE_SLEEPING)
1410 if (*state == STATE_MWAIT)
1411 *state = STATE_RUNNING;
1416 * Ordered by speed/power consumption.
1422 { cpu_idle_spin, "spin" },
1423 { cpu_idle_mwait, "mwait" },
1424 { cpu_idle_hlt, "hlt" },
1425 { cpu_idle_acpi, "acpi" },
1430 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1436 avail = malloc(256, M_TEMP, M_WAITOK);
1438 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1439 if (strstr(idle_tbl[i].id_name, "mwait") &&
1440 (cpu_feature2 & CPUID2_MON) == 0)
1442 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1443 cpu_idle_hook == NULL)
1445 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1446 idle_tbl[i].id_name);
1448 error = sysctl_handle_string(oidp, avail, 0, req);
1449 free(avail, M_TEMP);
1453 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1454 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1457 idle_sysctl(SYSCTL_HANDLER_ARGS)
1465 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1466 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1467 p = idle_tbl[i].id_name;
1471 strncpy(buf, p, sizeof(buf));
1472 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1473 if (error != 0 || req->newptr == NULL)
1475 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1476 if (strstr(idle_tbl[i].id_name, "mwait") &&
1477 (cpu_feature2 & CPUID2_MON) == 0)
1479 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1480 cpu_idle_hook == NULL)
1482 if (strcmp(idle_tbl[i].id_name, buf))
1484 cpu_idle_fn = idle_tbl[i].id_fn;
1490 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1491 idle_sysctl, "A", "currently selected idle function");
1493 uint64_t (*atomic_load_acq_64)(volatile uint64_t *) =
1494 atomic_load_acq_64_i386;
1495 void (*atomic_store_rel_64)(volatile uint64_t *, uint64_t) =
1496 atomic_store_rel_64_i386;
1499 cpu_probe_cmpxchg8b(void)
1502 if ((cpu_feature & CPUID_CX8) != 0 ||
1503 cpu_vendor_id == CPU_VENDOR_RISE) {
1504 atomic_load_acq_64 = atomic_load_acq_64_i586;
1505 atomic_store_rel_64 = atomic_store_rel_64_i586;
1510 * Reset registers to default values on exec.
1513 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1515 struct trapframe *regs = td->td_frame;
1516 struct pcb *pcb = td->td_pcb;
1518 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1519 pcb->pcb_gs = _udatasel;
1522 mtx_lock_spin(&dt_lock);
1523 if (td->td_proc->p_md.md_ldt)
1526 mtx_unlock_spin(&dt_lock);
1528 bzero((char *)regs, sizeof(struct trapframe));
1529 regs->tf_eip = imgp->entry_addr;
1530 regs->tf_esp = stack;
1531 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1532 regs->tf_ss = _udatasel;
1533 regs->tf_ds = _udatasel;
1534 regs->tf_es = _udatasel;
1535 regs->tf_fs = _udatasel;
1536 regs->tf_cs = _ucodesel;
1538 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1539 regs->tf_ebx = imgp->ps_strings;
1542 * Reset the hardware debug registers if they were in use.
1543 * They won't have any meaning for the newly exec'd process.
1545 if (pcb->pcb_flags & PCB_DBREGS) {
1552 if (pcb == curpcb) {
1554 * Clear the debug registers on the running
1555 * CPU, otherwise they will end up affecting
1556 * the next process we switch to.
1560 pcb->pcb_flags &= ~PCB_DBREGS;
1564 * Initialize the math emulator (if any) for the current process.
1565 * Actually, just clear the bit that says that the emulator has
1566 * been initialized. Initialization is delayed until the process
1567 * traps to the emulator (if it is done at all) mainly because
1568 * emulators don't provide an entry point for initialization.
1570 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1571 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1574 * Drop the FP state if we hold it, so that the process gets a
1575 * clean FP state if it uses the FPU again.
1580 * XXX - Linux emulator
1581 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1584 td->td_retval[1] = 0;
1595 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1597 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1598 * instructions. We must set the CR0_MP bit and use the CR0_TS
1599 * bit to control the trap, because setting the CR0_EM bit does
1600 * not cause WAIT instructions to trap. It's important to trap
1601 * WAIT instructions - otherwise the "wait" variants of no-wait
1602 * control instructions would degenerate to the "no-wait" variants
1603 * after FP context switches but work correctly otherwise. It's
1604 * particularly important to trap WAITs when there is no NPX -
1605 * otherwise the "wait" variants would always degenerate.
1607 * Try setting CR0_NE to get correct error reporting on 486DX's.
1608 * Setting it should fail or do nothing on lesser processors.
1610 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1615 u_long bootdev; /* not a struct cdev *- encoding is different */
1616 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1617 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1620 * Initialize 386 and configure to run kernel
1624 * Initialize segments & interrupt table
1630 union descriptor *gdt;
1631 union descriptor *ldt;
1633 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1634 union descriptor ldt[NLDT]; /* local descriptor table */
1636 static struct gate_descriptor idt0[NIDT];
1637 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1638 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1639 struct mtx dt_lock; /* lock for GDT and LDT */
1641 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1642 extern int has_f00f_bug;
1645 static struct i386tss dblfault_tss;
1646 static char dblfault_stack[PAGE_SIZE];
1648 extern vm_offset_t proc0kstack;
1652 * software prototypes -- in more palatable form.
1654 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1655 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1657 struct soft_segment_descriptor gdt_segs[] = {
1658 /* GNULL_SEL 0 Null Descriptor */
1664 .ssd_xx = 0, .ssd_xx1 = 0,
1667 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1669 .ssd_limit = 0xfffff,
1670 .ssd_type = SDT_MEMRWA,
1673 .ssd_xx = 0, .ssd_xx1 = 0,
1676 /* GUFS_SEL 2 %fs Descriptor for user */
1678 .ssd_limit = 0xfffff,
1679 .ssd_type = SDT_MEMRWA,
1682 .ssd_xx = 0, .ssd_xx1 = 0,
1685 /* GUGS_SEL 3 %gs Descriptor for user */
1687 .ssd_limit = 0xfffff,
1688 .ssd_type = SDT_MEMRWA,
1691 .ssd_xx = 0, .ssd_xx1 = 0,
1694 /* GCODE_SEL 4 Code Descriptor for kernel */
1696 .ssd_limit = 0xfffff,
1697 .ssd_type = SDT_MEMERA,
1700 .ssd_xx = 0, .ssd_xx1 = 0,
1703 /* GDATA_SEL 5 Data Descriptor for kernel */
1705 .ssd_limit = 0xfffff,
1706 .ssd_type = SDT_MEMRWA,
1709 .ssd_xx = 0, .ssd_xx1 = 0,
1712 /* GUCODE_SEL 6 Code Descriptor for user */
1714 .ssd_limit = 0xfffff,
1715 .ssd_type = SDT_MEMERA,
1718 .ssd_xx = 0, .ssd_xx1 = 0,
1721 /* GUDATA_SEL 7 Data Descriptor for user */
1723 .ssd_limit = 0xfffff,
1724 .ssd_type = SDT_MEMRWA,
1727 .ssd_xx = 0, .ssd_xx1 = 0,
1730 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1731 { .ssd_base = 0x400,
1732 .ssd_limit = 0xfffff,
1733 .ssd_type = SDT_MEMRWA,
1736 .ssd_xx = 0, .ssd_xx1 = 0,
1740 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1743 .ssd_limit = sizeof(struct i386tss)-1,
1744 .ssd_type = SDT_SYS386TSS,
1747 .ssd_xx = 0, .ssd_xx1 = 0,
1750 /* GLDT_SEL 10 LDT Descriptor */
1751 { .ssd_base = (int) ldt,
1752 .ssd_limit = sizeof(ldt)-1,
1753 .ssd_type = SDT_SYSLDT,
1756 .ssd_xx = 0, .ssd_xx1 = 0,
1759 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1760 { .ssd_base = (int) ldt,
1761 .ssd_limit = (512 * sizeof(union descriptor)-1),
1762 .ssd_type = SDT_SYSLDT,
1765 .ssd_xx = 0, .ssd_xx1 = 0,
1768 /* GPANIC_SEL 12 Panic Tss Descriptor */
1769 { .ssd_base = (int) &dblfault_tss,
1770 .ssd_limit = sizeof(struct i386tss)-1,
1771 .ssd_type = SDT_SYS386TSS,
1774 .ssd_xx = 0, .ssd_xx1 = 0,
1777 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1779 .ssd_limit = 0xfffff,
1780 .ssd_type = SDT_MEMERA,
1783 .ssd_xx = 0, .ssd_xx1 = 0,
1786 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1788 .ssd_limit = 0xfffff,
1789 .ssd_type = SDT_MEMERA,
1792 .ssd_xx = 0, .ssd_xx1 = 0,
1795 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1797 .ssd_limit = 0xfffff,
1798 .ssd_type = SDT_MEMRWA,
1801 .ssd_xx = 0, .ssd_xx1 = 0,
1804 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1806 .ssd_limit = 0xfffff,
1807 .ssd_type = SDT_MEMRWA,
1810 .ssd_xx = 0, .ssd_xx1 = 0,
1813 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1815 .ssd_limit = 0xfffff,
1816 .ssd_type = SDT_MEMRWA,
1819 .ssd_xx = 0, .ssd_xx1 = 0,
1822 /* GNDIS_SEL 18 NDIS Descriptor */
1828 .ssd_xx = 0, .ssd_xx1 = 0,
1834 static struct soft_segment_descriptor ldt_segs[] = {
1835 /* Null Descriptor - overwritten by call gate */
1841 .ssd_xx = 0, .ssd_xx1 = 0,
1844 /* Null Descriptor - overwritten by call gate */
1850 .ssd_xx = 0, .ssd_xx1 = 0,
1853 /* Null Descriptor - overwritten by call gate */
1859 .ssd_xx = 0, .ssd_xx1 = 0,
1862 /* Code Descriptor for user */
1864 .ssd_limit = 0xfffff,
1865 .ssd_type = SDT_MEMERA,
1868 .ssd_xx = 0, .ssd_xx1 = 0,
1871 /* Null Descriptor - overwritten by call gate */
1877 .ssd_xx = 0, .ssd_xx1 = 0,
1880 /* Data Descriptor for user */
1882 .ssd_limit = 0xfffff,
1883 .ssd_type = SDT_MEMRWA,
1886 .ssd_xx = 0, .ssd_xx1 = 0,
1892 setidt(idx, func, typ, dpl, selec)
1899 struct gate_descriptor *ip;
1902 ip->gd_looffset = (int)func;
1903 ip->gd_selector = selec;
1909 ip->gd_hioffset = ((int)func)>>16 ;
1913 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1914 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1915 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1916 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1918 #ifdef KDTRACE_HOOKS
1921 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1925 * Display the index and function name of any IDT entries that don't use
1926 * the default 'rsvd' entry point.
1928 DB_SHOW_COMMAND(idt, db_show_idt)
1930 struct gate_descriptor *ip;
1935 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1936 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1937 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1938 db_printf("%3d\t", idx);
1939 db_printsym(func, DB_STGY_PROC);
1946 /* Show privileged registers. */
1947 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1949 uint64_t idtr, gdtr;
1952 db_printf("idtr\t0x%08x/%04x\n",
1953 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1955 db_printf("gdtr\t0x%08x/%04x\n",
1956 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1957 db_printf("ldtr\t0x%04x\n", rldt());
1958 db_printf("tr\t0x%04x\n", rtr());
1959 db_printf("cr0\t0x%08x\n", rcr0());
1960 db_printf("cr2\t0x%08x\n", rcr2());
1961 db_printf("cr3\t0x%08x\n", rcr3());
1962 db_printf("cr4\t0x%08x\n", rcr4());
1968 struct segment_descriptor *sd;
1969 struct soft_segment_descriptor *ssd;
1971 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1972 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1973 ssd->ssd_type = sd->sd_type;
1974 ssd->ssd_dpl = sd->sd_dpl;
1975 ssd->ssd_p = sd->sd_p;
1976 ssd->ssd_def32 = sd->sd_def32;
1977 ssd->ssd_gran = sd->sd_gran;
1982 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1984 int i, insert_idx, physmap_idx;
1986 physmap_idx = *physmap_idxp;
1988 if (boothowto & RB_VERBOSE)
1989 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1990 smap->type, smap->base, smap->length);
1992 if (smap->type != SMAP_TYPE_MEMORY)
1995 if (smap->length == 0)
1999 if (smap->base > 0xffffffff) {
2000 printf("%uK of memory above 4GB ignored\n",
2001 (u_int)(smap->length / 1024));
2007 * Find insertion point while checking for overlap. Start off by
2008 * assuming the new entry will be added to the end.
2010 insert_idx = physmap_idx + 2;
2011 for (i = 0; i <= physmap_idx; i += 2) {
2012 if (smap->base < physmap[i + 1]) {
2013 if (smap->base + smap->length <= physmap[i]) {
2017 if (boothowto & RB_VERBOSE)
2019 "Overlapping memory regions, ignoring second region\n");
2024 /* See if we can prepend to the next entry. */
2025 if (insert_idx <= physmap_idx &&
2026 smap->base + smap->length == physmap[insert_idx]) {
2027 physmap[insert_idx] = smap->base;
2031 /* See if we can append to the previous entry. */
2032 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
2033 physmap[insert_idx - 1] += smap->length;
2038 *physmap_idxp = physmap_idx;
2039 if (physmap_idx == PHYSMAP_SIZE) {
2041 "Too many segments in the physical address map, giving up\n");
2046 * Move the last 'N' entries down to make room for the new
2049 for (i = physmap_idx; i > insert_idx; i -= 2) {
2050 physmap[i] = physmap[i - 2];
2051 physmap[i + 1] = physmap[i - 1];
2054 /* Insert the new entry. */
2055 physmap[insert_idx] = smap->base;
2056 physmap[insert_idx + 1] = smap->base + smap->length;
2067 if (basemem > 640) {
2068 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2074 * XXX if biosbasemem is now < 640, there is a `hole'
2075 * between the end of base memory and the start of
2076 * ISA memory. The hole may be empty or it may
2077 * contain BIOS code or data. Map it read/write so
2078 * that the BIOS can write to it. (Memory from 0 to
2079 * the physical end of the kernel is mapped read-only
2080 * to begin with and then parts of it are remapped.
2081 * The parts that aren't remapped form holes that
2082 * remain read-only and are unused by the kernel.
2083 * The base memory area is below the physical end of
2084 * the kernel and right now forms a read-only hole.
2085 * The part of it from PAGE_SIZE to
2086 * (trunc_page(biosbasemem * 1024) - 1) will be
2087 * remapped and used by the kernel later.)
2089 * This code is similar to the code used in
2090 * pmap_mapdev, but since no memory needs to be
2091 * allocated we simply change the mapping.
2093 for (pa = trunc_page(basemem * 1024);
2094 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2095 pmap_kenter(KERNBASE + pa, pa);
2098 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2099 * the vm86 page table so that vm86 can scribble on them using
2100 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2101 * page 0, at least as initialized here?
2103 pte = (pt_entry_t *)vm86paddr;
2104 for (i = basemem / 4; i < 160; i++)
2105 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2110 * Populate the (physmap) array with base/bound pairs describing the
2111 * available physical memory in the system, then test this memory and
2112 * build the phys_avail array describing the actually-available memory.
2114 * If we cannot accurately determine the physical memory map, then use
2115 * value from the 0xE801 call, and failing that, the RTC.
2117 * Total memory size may be set by the kernel environment variable
2118 * hw.physmem or the compile-time define MAXMEM.
2120 * XXX first should be vm_paddr_t.
2123 getmemsize(int first)
2125 int has_smap, off, physmap_idx, pa_indx, da_indx;
2126 u_long physmem_tunable, memtest;
2127 vm_paddr_t physmap[PHYSMAP_SIZE];
2129 quad_t dcons_addr, dcons_size;
2131 int hasbrokenint12, i;
2133 struct vm86frame vmf;
2134 struct vm86context vmc;
2136 struct bios_smap *smap, *smapbase, *smapend;
2143 Maxmem = xen_start_info->nr_pages - init_first;
2146 physmap[0] = init_first << PAGE_SHIFT;
2147 physmap[1] = ptoa(Maxmem) - round_page(msgbufsize);
2151 if (arch_i386_is_xbox) {
2153 * We queried the memory size before, so chop off 4MB for
2154 * the framebuffer and inform the OS of this.
2157 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2162 bzero(&vmf, sizeof(vmf));
2163 bzero(physmap, sizeof(physmap));
2167 * Check if the loader supplied an SMAP memory map. If so,
2168 * use that and do not make any VM86 calls.
2172 kmdp = preload_search_by_type("elf kernel");
2174 kmdp = preload_search_by_type("elf32 kernel");
2176 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2177 MODINFO_METADATA | MODINFOMD_SMAP);
2178 if (smapbase != NULL) {
2180 * subr_module.c says:
2181 * "Consumer may safely assume that size value precedes data."
2182 * ie: an int32_t immediately precedes SMAP.
2184 smapsize = *((u_int32_t *)smapbase - 1);
2185 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2188 for (smap = smapbase; smap < smapend; smap++)
2189 if (!add_smap_entry(smap, physmap, &physmap_idx))
2195 * Some newer BIOSes have a broken INT 12H implementation
2196 * which causes a kernel panic immediately. In this case, we
2197 * need use the SMAP to determine the base memory size.
2200 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2201 if (hasbrokenint12 == 0) {
2202 /* Use INT12 to determine base memory size. */
2203 vm86_intcall(0x12, &vmf);
2204 basemem = vmf.vmf_ax;
2209 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2210 * the kernel page table so we can use it as a buffer. The
2211 * kernel will unmap this page later.
2213 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2215 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2216 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2220 vmf.vmf_eax = 0xE820;
2221 vmf.vmf_edx = SMAP_SIG;
2222 vmf.vmf_ecx = sizeof(struct bios_smap);
2223 i = vm86_datacall(0x15, &vmf, &vmc);
2224 if (i || vmf.vmf_eax != SMAP_SIG)
2227 if (!add_smap_entry(smap, physmap, &physmap_idx))
2229 } while (vmf.vmf_ebx != 0);
2233 * If we didn't fetch the "base memory" size from INT12,
2234 * figure it out from the SMAP (or just guess).
2237 for (i = 0; i <= physmap_idx; i += 2) {
2238 if (physmap[i] == 0x00000000) {
2239 basemem = physmap[i + 1] / 1024;
2244 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2250 if (physmap[1] != 0)
2254 * If we failed to find an SMAP, figure out the extended
2255 * memory size. We will then build a simple memory map with
2256 * two segments, one for "base memory" and the second for
2257 * "extended memory". Note that "extended memory" starts at a
2258 * physical address of 1MB and that both basemem and extmem
2259 * are in units of 1KB.
2261 * First, try to fetch the extended memory size via INT 15:E801.
2263 vmf.vmf_ax = 0xE801;
2264 if (vm86_intcall(0x15, &vmf) == 0) {
2265 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2268 * If INT15:E801 fails, this is our last ditch effort
2269 * to determine the extended memory size. Currently
2270 * we prefer the RTC value over INT15:88.
2274 vm86_intcall(0x15, &vmf);
2275 extmem = vmf.vmf_ax;
2277 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2282 * Special hack for chipsets that still remap the 384k hole when
2283 * there's 16MB of memory - this really confuses people that
2284 * are trying to use bus mastering ISA controllers with the
2285 * "16MB limit"; they only have 16MB, but the remapping puts
2286 * them beyond the limit.
2288 * If extended memory is between 15-16MB (16-17MB phys address range),
2291 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2295 physmap[1] = basemem * 1024;
2297 physmap[physmap_idx] = 0x100000;
2298 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2303 * Now, physmap contains a map of physical memory.
2307 /* make hole for AP bootstrap code */
2308 physmap[1] = mp_bootaddress(physmap[1]);
2312 * Maxmem isn't the "maximum memory", it's one larger than the
2313 * highest page of the physical address space. It should be
2314 * called something like "Maxphyspage". We may adjust this
2315 * based on ``hw.physmem'' and the results of the memory test.
2317 Maxmem = atop(physmap[physmap_idx + 1]);
2320 Maxmem = MAXMEM / 4;
2323 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2324 Maxmem = atop(physmem_tunable);
2327 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2328 * the amount of memory in the system.
2330 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2331 Maxmem = atop(physmap[physmap_idx + 1]);
2334 * By default enable the memory test on real hardware, and disable
2335 * it if we appear to be running in a VM. This avoids touching all
2336 * pages unnecessarily, which doesn't matter on real hardware but is
2337 * bad for shared VM hosts. Use a general name so that
2338 * one could eventually do more with the code than just disable it.
2340 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2341 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2343 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2344 (boothowto & RB_VERBOSE))
2345 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2348 * If Maxmem has been increased beyond what the system has detected,
2349 * extend the last memory segment to the new limit.
2351 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2352 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2354 /* call pmap initialization to make new kernel address space */
2355 pmap_bootstrap(first);
2358 * Size up each available chunk of physical memory.
2360 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2363 phys_avail[pa_indx++] = physmap[0];
2364 phys_avail[pa_indx] = physmap[0];
2365 dump_avail[da_indx] = physmap[0];
2369 * Get dcons buffer address
2371 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2372 getenv_quad("dcons.size", &dcons_size) == 0)
2377 * physmap is in bytes, so when converting to page boundaries,
2378 * round up the start address and round down the end address.
2380 for (i = 0; i <= physmap_idx; i += 2) {
2383 end = ptoa((vm_paddr_t)Maxmem);
2384 if (physmap[i + 1] < end)
2385 end = trunc_page(physmap[i + 1]);
2386 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2387 int tmp, page_bad, full;
2388 int *ptr = (int *)CADDR1;
2392 * block out kernel memory as not available.
2394 if (pa >= KERNLOAD && pa < first)
2398 * block out dcons buffer
2401 && pa >= trunc_page(dcons_addr)
2402 && pa < dcons_addr + dcons_size)
2410 * map page into kernel: valid, read/write,non-cacheable
2412 *pte = pa | PG_V | PG_RW | PG_N;
2417 * Test for alternating 1's and 0's
2419 *(volatile int *)ptr = 0xaaaaaaaa;
2420 if (*(volatile int *)ptr != 0xaaaaaaaa)
2423 * Test for alternating 0's and 1's
2425 *(volatile int *)ptr = 0x55555555;
2426 if (*(volatile int *)ptr != 0x55555555)
2431 *(volatile int *)ptr = 0xffffffff;
2432 if (*(volatile int *)ptr != 0xffffffff)
2437 *(volatile int *)ptr = 0x0;
2438 if (*(volatile int *)ptr != 0x0)
2441 * Restore original value.
2447 * Adjust array of valid/good pages.
2449 if (page_bad == TRUE)
2452 * If this good page is a continuation of the
2453 * previous set of good pages, then just increase
2454 * the end pointer. Otherwise start a new chunk.
2455 * Note that "end" points one higher than end,
2456 * making the range >= start and < end.
2457 * If we're also doing a speculative memory
2458 * test and we at or past the end, bump up Maxmem
2459 * so that we keep going. The first bad page
2460 * will terminate the loop.
2462 if (phys_avail[pa_indx] == pa) {
2463 phys_avail[pa_indx] += PAGE_SIZE;
2466 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2468 "Too many holes in the physical address space, giving up\n");
2473 phys_avail[pa_indx++] = pa; /* start */
2474 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2478 if (dump_avail[da_indx] == pa) {
2479 dump_avail[da_indx] += PAGE_SIZE;
2482 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2486 dump_avail[da_indx++] = pa; /* start */
2487 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2497 phys_avail[0] = physfree;
2498 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2500 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2506 * The last chunk must contain at least one page plus the message
2507 * buffer to avoid complicating other code (message buffer address
2508 * calculation, etc.).
2510 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2511 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2512 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2513 phys_avail[pa_indx--] = 0;
2514 phys_avail[pa_indx--] = 0;
2517 Maxmem = atop(phys_avail[pa_indx]);
2519 /* Trim off space for the message buffer. */
2520 phys_avail[pa_indx] -= round_page(msgbufsize);
2522 /* Map the message buffer. */
2523 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2524 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2531 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2537 unsigned long gdtmachpfn;
2538 int error, gsel_tss, metadata_missing, x, pa;
2541 struct callback_register event = {
2542 .type = CALLBACKTYPE_event,
2543 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2545 struct callback_register failsafe = {
2546 .type = CALLBACKTYPE_failsafe,
2547 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2550 thread0.td_kstack = proc0kstack;
2551 thread0.td_kstack_pages = KSTACK_PAGES;
2552 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2553 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2556 * This may be done better later if it gets more high level
2557 * components in it. If so just link td->td_proc here.
2559 proc_linkup0(&proc0, &thread0);
2561 metadata_missing = 0;
2562 if (xen_start_info->mod_start) {
2563 preload_metadata = (caddr_t)xen_start_info->mod_start;
2564 preload_bootstrap_relocate(KERNBASE);
2566 metadata_missing = 1;
2569 kern_envp = static_env;
2570 else if ((caddr_t)xen_start_info->cmd_line)
2571 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2573 boothowto |= xen_boothowto(kern_envp);
2575 /* Init basic tunables, hz etc */
2579 * XEN occupies a portion of the upper virtual address space
2580 * At its base it manages an array mapping machine page frames
2581 * to physical page frames - hence we need to be able to
2582 * access 4GB - (64MB - 4MB + 64k)
2584 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2585 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2586 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2587 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2588 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2589 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2590 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2591 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2594 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2595 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2597 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2598 bzero(gdt, PAGE_SIZE);
2599 for (x = 0; x < NGDT; x++)
2600 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2602 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2604 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2605 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2606 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2610 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2611 panic("set_trap_table failed - error %d\n", error);
2614 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2616 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2617 #if CONFIG_XEN_COMPAT <= 0x030002
2618 if (error == -ENOXENSYS)
2619 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2620 (unsigned long)Xhypervisor_callback,
2621 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2623 pcpu_init(pc, 0, sizeof(struct pcpu));
2624 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2625 pmap_kenter(pa + KERNBASE, pa);
2626 dpcpu_init((void *)(first + KERNBASE), 0);
2627 first += DPCPU_SIZE;
2628 physfree += DPCPU_SIZE;
2629 init_first += DPCPU_SIZE / PAGE_SIZE;
2631 PCPU_SET(prvspace, pc);
2632 PCPU_SET(curthread, &thread0);
2633 PCPU_SET(curpcb, thread0.td_pcb);
2636 * Initialize mutexes.
2638 * icu_lock: in order to allow an interrupt to occur in a critical
2639 * section, to set pcpu->ipending (etc...) properly, we
2640 * must be able to get the icu lock, so it can't be
2644 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2646 /* make ldt memory segments */
2647 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2648 bzero(ldt, PAGE_SIZE);
2649 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2650 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2651 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2652 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2654 default_proc_ldt.ldt_base = (caddr_t)ldt;
2655 default_proc_ldt.ldt_len = 6;
2656 _default_ldt = (int)&default_proc_ldt;
2657 PCPU_SET(currentldt, _default_ldt);
2658 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2659 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2661 #if defined(XEN_PRIVILEGED)
2663 * Initialize the i8254 before the console so that console
2664 * initialization can use DELAY().
2670 * Initialize the console before we print anything out.
2674 if (metadata_missing)
2675 printf("WARNING: loader(8) metadata is missing!\n");
2682 /* Reset and mask the atpics and leave them shut down. */
2686 * Point the ICU spurious interrupt vectors at the APIC spurious
2687 * interrupt handler.
2689 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2690 GSEL(GCODE_SEL, SEL_KPL));
2691 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2692 GSEL(GCODE_SEL, SEL_KPL));
2697 ksym_start = bootinfo.bi_symtab;
2698 ksym_end = bootinfo.bi_esymtab;
2704 if (boothowto & RB_KDB)
2705 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2708 finishidentcpu(); /* Final stage of CPU initialization */
2709 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2710 GSEL(GCODE_SEL, SEL_KPL));
2711 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2712 GSEL(GCODE_SEL, SEL_KPL));
2713 initializecpu(); /* Initialize CPU registers */
2715 /* make an initial tss so cpu can get interrupt stack on syscall! */
2716 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2717 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2718 kstack0_sz - sizeof(struct pcb) - 16);
2719 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2720 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2721 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2722 PCPU_GET(common_tss.tss_esp0));
2724 /* pointer to selector slot for %fs/%gs */
2725 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2727 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2728 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2729 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2730 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2732 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2734 dblfault_tss.tss_cr3 = (int)IdlePTD;
2736 dblfault_tss.tss_eip = (int)dblfault_handler;
2737 dblfault_tss.tss_eflags = PSL_KERNEL;
2738 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2739 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2740 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2741 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2742 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2746 init_param2(physmem);
2748 /* now running on new page tables, configured,and u/iom is accessible */
2750 msgbufinit(msgbufp, msgbufsize);
2751 /* transfer to user mode */
2753 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2754 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2756 /* setup proc 0's pcb */
2757 thread0.td_pcb->pcb_flags = 0;
2759 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2761 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2763 thread0.td_pcb->pcb_ext = 0;
2764 thread0.td_frame = &proc0_tf;
2765 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2766 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2769 cpu_probe_cmpxchg8b();
2777 struct gate_descriptor *gdp;
2778 int gsel_tss, metadata_missing, x, pa;
2782 thread0.td_kstack = proc0kstack;
2783 thread0.td_kstack_pages = KSTACK_PAGES;
2784 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2785 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2788 * This may be done better later if it gets more high level
2789 * components in it. If so just link td->td_proc here.
2791 proc_linkup0(&proc0, &thread0);
2793 metadata_missing = 0;
2794 if (bootinfo.bi_modulep) {
2795 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2796 preload_bootstrap_relocate(KERNBASE);
2798 metadata_missing = 1;
2801 kern_envp = static_env;
2802 else if (bootinfo.bi_envp)
2803 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2805 /* Init basic tunables, hz etc */
2809 * Make gdt memory segments. All segments cover the full 4GB
2810 * of address space and permissions are enforced at page level.
2812 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2813 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2814 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2815 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2816 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2817 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2820 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2821 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2822 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2824 for (x = 0; x < NGDT; x++)
2825 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2827 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2828 r_gdt.rd_base = (int) gdt;
2829 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2832 pcpu_init(pc, 0, sizeof(struct pcpu));
2833 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2834 pmap_kenter(pa + KERNBASE, pa);
2835 dpcpu_init((void *)(first + KERNBASE), 0);
2836 first += DPCPU_SIZE;
2837 PCPU_SET(prvspace, pc);
2838 PCPU_SET(curthread, &thread0);
2839 PCPU_SET(curpcb, thread0.td_pcb);
2842 * Initialize mutexes.
2844 * icu_lock: in order to allow an interrupt to occur in a critical
2845 * section, to set pcpu->ipending (etc...) properly, we
2846 * must be able to get the icu lock, so it can't be
2850 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2852 /* make ldt memory segments */
2853 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2854 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2855 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2856 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2858 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2860 PCPU_SET(currentldt, _default_ldt);
2863 for (x = 0; x < NIDT; x++)
2864 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2865 GSEL(GCODE_SEL, SEL_KPL));
2866 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2867 GSEL(GCODE_SEL, SEL_KPL));
2868 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2869 GSEL(GCODE_SEL, SEL_KPL));
2870 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2871 GSEL(GCODE_SEL, SEL_KPL));
2872 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2873 GSEL(GCODE_SEL, SEL_KPL));
2874 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2875 GSEL(GCODE_SEL, SEL_KPL));
2876 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2877 GSEL(GCODE_SEL, SEL_KPL));
2878 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2879 GSEL(GCODE_SEL, SEL_KPL));
2880 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2881 , GSEL(GCODE_SEL, SEL_KPL));
2882 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2883 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2884 GSEL(GCODE_SEL, SEL_KPL));
2885 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2886 GSEL(GCODE_SEL, SEL_KPL));
2887 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2888 GSEL(GCODE_SEL, SEL_KPL));
2889 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2890 GSEL(GCODE_SEL, SEL_KPL));
2891 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2892 GSEL(GCODE_SEL, SEL_KPL));
2893 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2894 GSEL(GCODE_SEL, SEL_KPL));
2895 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2896 GSEL(GCODE_SEL, SEL_KPL));
2897 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2898 GSEL(GCODE_SEL, SEL_KPL));
2899 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2900 GSEL(GCODE_SEL, SEL_KPL));
2901 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2902 GSEL(GCODE_SEL, SEL_KPL));
2903 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2904 GSEL(GCODE_SEL, SEL_KPL));
2905 #ifdef KDTRACE_HOOKS
2906 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2907 GSEL(GCODE_SEL, SEL_KPL));
2910 r_idt.rd_limit = sizeof(idt0) - 1;
2911 r_idt.rd_base = (int) idt;
2916 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2917 * This should be 0x10de / 0x02a5.
2919 * This is exactly what Linux does.
2921 outl(0xcf8, 0x80000000);
2922 if (inl(0xcfc) == 0x02a510de) {
2923 arch_i386_is_xbox = 1;
2924 pic16l_setled(XBOX_LED_GREEN);
2927 * We are an XBOX, but we may have either 64MB or 128MB of
2928 * memory. The PCI host bridge should be programmed for this,
2929 * so we just query it.
2931 outl(0xcf8, 0x80000084);
2932 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2937 * Initialize the i8254 before the console so that console
2938 * initialization can use DELAY().
2943 * Initialize the console before we print anything out.
2947 if (metadata_missing)
2948 printf("WARNING: loader(8) metadata is missing!\n");
2955 /* Reset and mask the atpics and leave them shut down. */
2959 * Point the ICU spurious interrupt vectors at the APIC spurious
2960 * interrupt handler.
2962 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2963 GSEL(GCODE_SEL, SEL_KPL));
2964 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2965 GSEL(GCODE_SEL, SEL_KPL));
2970 ksym_start = bootinfo.bi_symtab;
2971 ksym_end = bootinfo.bi_esymtab;
2977 if (boothowto & RB_KDB)
2978 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2981 finishidentcpu(); /* Final stage of CPU initialization */
2982 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2983 GSEL(GCODE_SEL, SEL_KPL));
2984 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2985 GSEL(GCODE_SEL, SEL_KPL));
2986 initializecpu(); /* Initialize CPU registers */
2988 /* make an initial tss so cpu can get interrupt stack on syscall! */
2989 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2990 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2991 kstack0_sz - sizeof(struct pcb) - 16);
2992 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2993 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2994 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2995 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2996 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2999 /* pointer to selector slot for %fs/%gs */
3000 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
3002 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
3003 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
3004 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
3005 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
3007 dblfault_tss.tss_cr3 = (int)IdlePDPT;
3009 dblfault_tss.tss_cr3 = (int)IdlePTD;
3011 dblfault_tss.tss_eip = (int)dblfault_handler;
3012 dblfault_tss.tss_eflags = PSL_KERNEL;
3013 dblfault_tss.tss_ds = dblfault_tss.tss_es =
3014 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
3015 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
3016 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
3017 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
3021 init_param2(physmem);
3023 /* now running on new page tables, configured,and u/iom is accessible */
3025 msgbufinit(msgbufp, msgbufsize);
3027 /* make a call gate to reenter kernel with */
3028 gdp = &ldt[LSYS5CALLS_SEL].gd;
3030 x = (int) &IDTVEC(lcall_syscall);
3031 gdp->gd_looffset = x;
3032 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
3034 gdp->gd_type = SDT_SYS386CGT;
3035 gdp->gd_dpl = SEL_UPL;
3037 gdp->gd_hioffset = x >> 16;
3039 /* XXX does this work? */
3041 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
3042 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
3044 /* transfer to user mode */
3046 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
3047 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
3049 /* setup proc 0's pcb */
3050 thread0.td_pcb->pcb_flags = 0;
3052 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
3054 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
3056 thread0.td_pcb->pcb_ext = 0;
3057 thread0.td_frame = &proc0_tf;
3060 cpu_probe_cmpxchg8b();
3065 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
3068 pcpu->pc_acpi_id = 0xffffffff;
3072 spinlock_enter(void)
3078 if (td->td_md.md_spinlock_count == 0) {
3079 flags = intr_disable();
3080 td->td_md.md_spinlock_count = 1;
3081 td->td_md.md_saved_flags = flags;
3083 td->td_md.md_spinlock_count++;
3095 flags = td->td_md.md_saved_flags;
3096 td->td_md.md_spinlock_count--;
3097 if (td->td_md.md_spinlock_count == 0)
3098 intr_restore(flags);
3101 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3102 static void f00f_hack(void *unused);
3103 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3106 f00f_hack(void *unused)
3108 struct gate_descriptor *new_idt;
3116 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3118 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
3120 panic("kmem_alloc returned 0");
3122 /* Put the problematic entry (#6) at the end of the lower page. */
3123 new_idt = (struct gate_descriptor*)
3124 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3125 bcopy(idt, new_idt, sizeof(idt0));
3126 r_idt.rd_base = (u_int)new_idt;
3129 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3130 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3131 panic("vm_map_protect failed");
3133 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3136 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3137 * we want to start a backtrace from the function that caused us to enter
3138 * the debugger. We have the context in the trapframe, but base the trace
3139 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3140 * enough for a backtrace.
3143 makectx(struct trapframe *tf, struct pcb *pcb)
3146 pcb->pcb_edi = tf->tf_edi;
3147 pcb->pcb_esi = tf->tf_esi;
3148 pcb->pcb_ebp = tf->tf_ebp;
3149 pcb->pcb_ebx = tf->tf_ebx;
3150 pcb->pcb_eip = tf->tf_eip;
3151 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3155 ptrace_set_pc(struct thread *td, u_long addr)
3158 td->td_frame->tf_eip = addr;
3163 ptrace_single_step(struct thread *td)
3165 td->td_frame->tf_eflags |= PSL_T;
3170 ptrace_clear_single_step(struct thread *td)
3172 td->td_frame->tf_eflags &= ~PSL_T;
3177 fill_regs(struct thread *td, struct reg *regs)
3180 struct trapframe *tp;
3184 regs->r_gs = pcb->pcb_gs;
3185 return (fill_frame_regs(tp, regs));
3189 fill_frame_regs(struct trapframe *tp, struct reg *regs)
3191 regs->r_fs = tp->tf_fs;
3192 regs->r_es = tp->tf_es;
3193 regs->r_ds = tp->tf_ds;
3194 regs->r_edi = tp->tf_edi;
3195 regs->r_esi = tp->tf_esi;
3196 regs->r_ebp = tp->tf_ebp;
3197 regs->r_ebx = tp->tf_ebx;
3198 regs->r_edx = tp->tf_edx;
3199 regs->r_ecx = tp->tf_ecx;
3200 regs->r_eax = tp->tf_eax;
3201 regs->r_eip = tp->tf_eip;
3202 regs->r_cs = tp->tf_cs;
3203 regs->r_eflags = tp->tf_eflags;
3204 regs->r_esp = tp->tf_esp;
3205 regs->r_ss = tp->tf_ss;
3210 set_regs(struct thread *td, struct reg *regs)
3213 struct trapframe *tp;
3216 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3217 !CS_SECURE(regs->r_cs))
3220 tp->tf_fs = regs->r_fs;
3221 tp->tf_es = regs->r_es;
3222 tp->tf_ds = regs->r_ds;
3223 tp->tf_edi = regs->r_edi;
3224 tp->tf_esi = regs->r_esi;
3225 tp->tf_ebp = regs->r_ebp;
3226 tp->tf_ebx = regs->r_ebx;
3227 tp->tf_edx = regs->r_edx;
3228 tp->tf_ecx = regs->r_ecx;
3229 tp->tf_eax = regs->r_eax;
3230 tp->tf_eip = regs->r_eip;
3231 tp->tf_cs = regs->r_cs;
3232 tp->tf_eflags = regs->r_eflags;
3233 tp->tf_esp = regs->r_esp;
3234 tp->tf_ss = regs->r_ss;
3235 pcb->pcb_gs = regs->r_gs;
3239 #ifdef CPU_ENABLE_SSE
3241 fill_fpregs_xmm(sv_xmm, sv_87)
3242 struct savexmm *sv_xmm;
3243 struct save87 *sv_87;
3245 register struct env87 *penv_87 = &sv_87->sv_env;
3246 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3249 bzero(sv_87, sizeof(*sv_87));
3251 /* FPU control/status */
3252 penv_87->en_cw = penv_xmm->en_cw;
3253 penv_87->en_sw = penv_xmm->en_sw;
3254 penv_87->en_tw = penv_xmm->en_tw;
3255 penv_87->en_fip = penv_xmm->en_fip;
3256 penv_87->en_fcs = penv_xmm->en_fcs;
3257 penv_87->en_opcode = penv_xmm->en_opcode;
3258 penv_87->en_foo = penv_xmm->en_foo;
3259 penv_87->en_fos = penv_xmm->en_fos;
3262 for (i = 0; i < 8; ++i)
3263 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3267 set_fpregs_xmm(sv_87, sv_xmm)
3268 struct save87 *sv_87;
3269 struct savexmm *sv_xmm;
3271 register struct env87 *penv_87 = &sv_87->sv_env;
3272 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3275 /* FPU control/status */
3276 penv_xmm->en_cw = penv_87->en_cw;
3277 penv_xmm->en_sw = penv_87->en_sw;
3278 penv_xmm->en_tw = penv_87->en_tw;
3279 penv_xmm->en_fip = penv_87->en_fip;
3280 penv_xmm->en_fcs = penv_87->en_fcs;
3281 penv_xmm->en_opcode = penv_87->en_opcode;
3282 penv_xmm->en_foo = penv_87->en_foo;
3283 penv_xmm->en_fos = penv_87->en_fos;
3286 for (i = 0; i < 8; ++i)
3287 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3289 #endif /* CPU_ENABLE_SSE */
3292 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3295 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
3296 P_SHOULDSTOP(td->td_proc),
3297 ("not suspended thread %p", td));
3301 bzero(fpregs, sizeof(*fpregs));
3303 #ifdef CPU_ENABLE_SSE
3305 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3306 (struct save87 *)fpregs);
3308 #endif /* CPU_ENABLE_SSE */
3309 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
3315 set_fpregs(struct thread *td, struct fpreg *fpregs)
3318 #ifdef CPU_ENABLE_SSE
3320 set_fpregs_xmm((struct save87 *)fpregs,
3321 &td->td_pcb->pcb_user_save.sv_xmm);
3323 #endif /* CPU_ENABLE_SSE */
3324 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
3333 * Get machine context.
3336 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3338 struct trapframe *tp;
3339 struct segment_descriptor *sdp;
3343 PROC_LOCK(curthread->td_proc);
3344 mcp->mc_onstack = sigonstack(tp->tf_esp);
3345 PROC_UNLOCK(curthread->td_proc);
3346 mcp->mc_gs = td->td_pcb->pcb_gs;
3347 mcp->mc_fs = tp->tf_fs;
3348 mcp->mc_es = tp->tf_es;
3349 mcp->mc_ds = tp->tf_ds;
3350 mcp->mc_edi = tp->tf_edi;
3351 mcp->mc_esi = tp->tf_esi;
3352 mcp->mc_ebp = tp->tf_ebp;
3353 mcp->mc_isp = tp->tf_isp;
3354 mcp->mc_eflags = tp->tf_eflags;
3355 if (flags & GET_MC_CLEAR_RET) {
3358 mcp->mc_eflags &= ~PSL_C;
3360 mcp->mc_eax = tp->tf_eax;
3361 mcp->mc_edx = tp->tf_edx;
3363 mcp->mc_ebx = tp->tf_ebx;
3364 mcp->mc_ecx = tp->tf_ecx;
3365 mcp->mc_eip = tp->tf_eip;
3366 mcp->mc_cs = tp->tf_cs;
3367 mcp->mc_esp = tp->tf_esp;
3368 mcp->mc_ss = tp->tf_ss;
3369 mcp->mc_len = sizeof(*mcp);
3370 get_fpcontext(td, mcp);
3371 sdp = &td->td_pcb->pcb_fsd;
3372 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3373 sdp = &td->td_pcb->pcb_gsd;
3374 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3376 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3381 * Set machine context.
3383 * However, we don't set any but the user modifiable flags, and we won't
3384 * touch the cs selector.
3387 set_mcontext(struct thread *td, const mcontext_t *mcp)
3389 struct trapframe *tp;
3393 if (mcp->mc_len != sizeof(*mcp))
3395 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3396 (tp->tf_eflags & ~PSL_USERCHANGE);
3397 if ((ret = set_fpcontext(td, mcp)) == 0) {
3398 tp->tf_fs = mcp->mc_fs;
3399 tp->tf_es = mcp->mc_es;
3400 tp->tf_ds = mcp->mc_ds;
3401 tp->tf_edi = mcp->mc_edi;
3402 tp->tf_esi = mcp->mc_esi;
3403 tp->tf_ebp = mcp->mc_ebp;
3404 tp->tf_ebx = mcp->mc_ebx;
3405 tp->tf_edx = mcp->mc_edx;
3406 tp->tf_ecx = mcp->mc_ecx;
3407 tp->tf_eax = mcp->mc_eax;
3408 tp->tf_eip = mcp->mc_eip;
3409 tp->tf_eflags = eflags;
3410 tp->tf_esp = mcp->mc_esp;
3411 tp->tf_ss = mcp->mc_ss;
3412 td->td_pcb->pcb_gs = mcp->mc_gs;
3419 get_fpcontext(struct thread *td, mcontext_t *mcp)
3423 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3424 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3425 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3427 mcp->mc_ownedfp = npxgetregs(td);
3428 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate[0],
3429 sizeof(mcp->mc_fpstate));
3430 mcp->mc_fpformat = npxformat();
3435 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3438 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3440 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3441 mcp->mc_fpformat != _MC_FPFMT_XMM)
3443 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3444 /* We don't care what state is left in the FPU or PCB. */
3446 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3447 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3449 #ifdef CPU_ENABLE_SSE
3451 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
3452 en_mxcsr &= cpu_mxcsr_mask;
3454 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
3462 fpstate_drop(struct thread *td)
3465 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3468 if (PCPU_GET(fpcurthread) == td)
3472 * XXX force a full drop of the npx. The above only drops it if we
3473 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3475 * XXX I don't much like npxgetregs()'s semantics of doing a full
3476 * drop. Dropping only to the pcb matches fnsave's behaviour.
3477 * We only need to drop to !PCB_INITDONE in sendsig(). But
3478 * sendsig() is the only caller of npxgetregs()... perhaps we just
3479 * have too many layers.
3481 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3482 PCB_NPXUSERINITDONE);
3487 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3492 dbregs->dr[0] = rdr0();
3493 dbregs->dr[1] = rdr1();
3494 dbregs->dr[2] = rdr2();
3495 dbregs->dr[3] = rdr3();
3496 dbregs->dr[4] = rdr4();
3497 dbregs->dr[5] = rdr5();
3498 dbregs->dr[6] = rdr6();
3499 dbregs->dr[7] = rdr7();
3502 dbregs->dr[0] = pcb->pcb_dr0;
3503 dbregs->dr[1] = pcb->pcb_dr1;
3504 dbregs->dr[2] = pcb->pcb_dr2;
3505 dbregs->dr[3] = pcb->pcb_dr3;
3508 dbregs->dr[6] = pcb->pcb_dr6;
3509 dbregs->dr[7] = pcb->pcb_dr7;
3515 set_dbregs(struct thread *td, struct dbreg *dbregs)
3521 load_dr0(dbregs->dr[0]);
3522 load_dr1(dbregs->dr[1]);
3523 load_dr2(dbregs->dr[2]);
3524 load_dr3(dbregs->dr[3]);
3525 load_dr4(dbregs->dr[4]);
3526 load_dr5(dbregs->dr[5]);
3527 load_dr6(dbregs->dr[6]);
3528 load_dr7(dbregs->dr[7]);
3531 * Don't let an illegal value for dr7 get set. Specifically,
3532 * check for undefined settings. Setting these bit patterns
3533 * result in undefined behaviour and can lead to an unexpected
3536 for (i = 0; i < 4; i++) {
3537 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3539 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3546 * Don't let a process set a breakpoint that is not within the
3547 * process's address space. If a process could do this, it
3548 * could halt the system by setting a breakpoint in the kernel
3549 * (if ddb was enabled). Thus, we need to check to make sure
3550 * that no breakpoints are being enabled for addresses outside
3551 * process's address space.
3553 * XXX - what about when the watched area of the user's
3554 * address space is written into from within the kernel
3555 * ... wouldn't that still cause a breakpoint to be generated
3556 * from within kernel mode?
3559 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3560 /* dr0 is enabled */
3561 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3565 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3566 /* dr1 is enabled */
3567 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3571 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3572 /* dr2 is enabled */
3573 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3577 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3578 /* dr3 is enabled */
3579 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3583 pcb->pcb_dr0 = dbregs->dr[0];
3584 pcb->pcb_dr1 = dbregs->dr[1];
3585 pcb->pcb_dr2 = dbregs->dr[2];
3586 pcb->pcb_dr3 = dbregs->dr[3];
3587 pcb->pcb_dr6 = dbregs->dr[6];
3588 pcb->pcb_dr7 = dbregs->dr[7];
3590 pcb->pcb_flags |= PCB_DBREGS;
3597 * Return > 0 if a hardware breakpoint has been hit, and the
3598 * breakpoint was in user space. Return 0, otherwise.
3601 user_dbreg_trap(void)
3603 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3604 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3605 int nbp; /* number of breakpoints that triggered */
3606 caddr_t addr[4]; /* breakpoint addresses */
3610 if ((dr7 & 0x000000ff) == 0) {
3612 * all GE and LE bits in the dr7 register are zero,
3613 * thus the trap couldn't have been caused by the
3614 * hardware debug registers
3621 bp = dr6 & 0x0000000f;
3625 * None of the breakpoint bits are set meaning this
3626 * trap was not caused by any of the debug registers
3632 * at least one of the breakpoints were hit, check to see
3633 * which ones and if any of them are user space addresses
3637 addr[nbp++] = (caddr_t)rdr0();
3640 addr[nbp++] = (caddr_t)rdr1();
3643 addr[nbp++] = (caddr_t)rdr2();
3646 addr[nbp++] = (caddr_t)rdr3();
3649 for (i = 0; i < nbp; i++) {
3650 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3652 * addr[i] is in user space
3659 * None of the breakpoints are in user space.
3667 * Provide inb() and outb() as functions. They are normally only available as
3668 * inline functions, thus cannot be called from the debugger.
3671 /* silence compiler warnings */
3672 u_char inb_(u_short);
3673 void outb_(u_short, u_char);
3682 outb_(u_short port, u_char data)