2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
56 #include "opt_perfmon.h"
57 #include "opt_platform.h"
59 #include "opt_kdtrace.h"
61 #include <sys/param.h>
63 #include <sys/systm.h>
67 #include <sys/callout.h>
70 #include <sys/eventhandler.h>
72 #include <sys/imgact.h>
74 #include <sys/kernel.h>
76 #include <sys/linker.h>
78 #include <sys/malloc.h>
79 #include <sys/memrange.h>
80 #include <sys/msgbuf.h>
81 #include <sys/mutex.h>
83 #include <sys/ptrace.h>
84 #include <sys/reboot.h>
85 #include <sys/rwlock.h>
86 #include <sys/sched.h>
87 #include <sys/signalvar.h>
91 #include <sys/syscallsubr.h>
92 #include <sys/sysctl.h>
93 #include <sys/sysent.h>
94 #include <sys/sysproto.h>
95 #include <sys/ucontext.h>
96 #include <sys/vmmeter.h>
99 #include <vm/vm_extern.h>
100 #include <vm/vm_kern.h>
101 #include <vm/vm_page.h>
102 #include <vm/vm_map.h>
103 #include <vm/vm_object.h>
104 #include <vm/vm_pager.h>
105 #include <vm/vm_param.h>
109 #error KDB must be enabled in order for DDB to work!
112 #include <ddb/db_sym.h>
117 #include <net/netisr.h>
119 #include <machine/bootinfo.h>
120 #include <machine/clock.h>
121 #include <machine/cpu.h>
122 #include <machine/cputypes.h>
123 #include <machine/intr_machdep.h>
125 #include <machine/md_var.h>
126 #include <machine/metadata.h>
127 #include <machine/mp_watchdog.h>
128 #include <machine/pc/bios.h>
129 #include <machine/pcb.h>
130 #include <machine/pcb_ext.h>
131 #include <machine/proc.h>
132 #include <machine/reg.h>
133 #include <machine/sigframe.h>
134 #include <machine/specialreg.h>
135 #include <machine/vm86.h>
137 #include <machine/perfmon.h>
140 #include <machine/smp.h>
147 #include <machine/apicvar.h>
151 #include <x86/isa/icu.h>
155 #include <machine/xbox.h>
157 int arch_i386_is_xbox = 0;
158 uint32_t arch_i386_xbox_memsize = 0;
163 #include <xen/xen-os.h>
164 #include <xen/hypervisor.h>
165 #include <machine/xen/xenvar.h>
166 #include <machine/xen/xenfunc.h>
167 #include <xen/xen_intr.h>
169 void Xhypervisor_callback(void);
170 void failsafe_callback(void);
172 extern trap_info_t trap_table[];
173 struct proc_ldt default_proc_ldt;
174 extern int init_first;
176 extern unsigned long physfree;
179 /* Sanity check for __curthread() */
180 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
182 extern void init386(int first);
183 extern void dblfault_handler(void);
185 extern void printcpuinfo(void); /* XXX header file */
186 extern void finishidentcpu(void);
187 extern void panicifcpuunsupported(void);
189 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
190 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
192 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
193 #define CPU_ENABLE_SSE
196 static void cpu_startup(void *);
197 static void fpstate_drop(struct thread *td);
198 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
199 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
200 #ifdef CPU_ENABLE_SSE
201 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
202 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
203 #endif /* CPU_ENABLE_SSE */
204 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
207 extern vm_offset_t ksym_start, ksym_end;
210 /* Intel ICH registers */
211 #define ICH_PMBASE 0x400
212 #define ICH_SMI_EN ICH_PMBASE + 0x30
214 int _udatasel, _ucodesel;
220 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
222 #ifdef COMPAT_FREEBSD4
223 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
230 FEATURE(pae, "Physical Address Extensions");
234 * The number of PHYSMAP entries must be one less than the number of
235 * PHYSSEG entries because the PHYSMAP entry that spans the largest
236 * physical address that is accessible by ISA DMA is split into two
239 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
241 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
242 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
244 /* must be 2 less so 0 0 can signal end of chunks */
245 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
246 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
248 struct kva_md_info kmi;
250 static struct trapframe proc0_tf;
251 struct pcpu __pcpu[MAXCPU];
255 struct mem_range_softc mem_range_softc;
265 * On MacBooks, we need to disallow the legacy USB circuit to
266 * generate an SMI# because this can cause several problems,
267 * namely: incorrect CPU frequency detection and failure to
269 * We do this by disabling a bit in the SMI_EN (SMI Control and
270 * Enable register) of the Intel ICH LPC Interface Bridge.
272 sysenv = getenv("smbios.system.product");
273 if (sysenv != NULL) {
274 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
275 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
276 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
277 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
278 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
279 strncmp(sysenv, "Macmini1,1", 10) == 0) {
281 printf("Disabling LEGACY_USB_EN bit on "
283 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
289 * Good {morning,afternoon,evening,night}.
293 panicifcpuunsupported();
299 * Display physical memory if SMBIOS reports reasonable amount.
302 sysenv = getenv("smbios.memory.enabled");
303 if (sysenv != NULL) {
304 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
307 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
308 memsize = ptoa((uintmax_t)Maxmem);
309 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
310 realmem = atop(memsize);
313 * Display any holes after the first chunk of extended memory.
318 printf("Physical memory chunk(s):\n");
319 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
322 size = phys_avail[indx + 1] - phys_avail[indx];
324 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
325 (uintmax_t)phys_avail[indx],
326 (uintmax_t)phys_avail[indx + 1] - 1,
327 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
331 vm_ksubmap_init(&kmi);
333 printf("avail memory = %ju (%ju MB)\n",
334 ptoa((uintmax_t)cnt.v_free_count),
335 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
338 * Set up buffers, so they can be used to read disk labels.
341 vm_pager_bufferinit();
348 * Send an interrupt to process.
350 * Stack is set up to allow sigcode stored
351 * at top to call routine, followed by kcall
352 * to sigreturn routine below. After sigreturn
353 * resets the signal mask, the stack, and the
354 * frame pointer, it returns to the user
359 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
361 struct osigframe sf, *fp;
365 struct trapframe *regs;
371 PROC_LOCK_ASSERT(p, MA_OWNED);
372 sig = ksi->ksi_signo;
374 mtx_assert(&psp->ps_mtx, MA_OWNED);
376 oonstack = sigonstack(regs->tf_esp);
378 /* Allocate space for the signal handler context. */
379 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
380 SIGISMEMBER(psp->ps_sigonstack, sig)) {
381 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
382 td->td_sigstk.ss_size - sizeof(struct osigframe));
383 #if defined(COMPAT_43)
384 td->td_sigstk.ss_flags |= SS_ONSTACK;
387 fp = (struct osigframe *)regs->tf_esp - 1;
389 /* Translate the signal if appropriate. */
390 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
391 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
393 /* Build the argument list for the signal handler. */
395 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
396 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
397 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
398 /* Signal handler installed with SA_SIGINFO. */
399 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
400 sf.sf_siginfo.si_signo = sig;
401 sf.sf_siginfo.si_code = ksi->ksi_code;
402 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
405 /* Old FreeBSD-style arguments. */
406 sf.sf_arg2 = ksi->ksi_code;
407 sf.sf_addr = (register_t)ksi->ksi_addr;
408 sf.sf_ahu.sf_handler = catcher;
410 mtx_unlock(&psp->ps_mtx);
413 /* Save most if not all of trap frame. */
414 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
415 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
416 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
417 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
418 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
419 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
420 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
421 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
422 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
423 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
424 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
425 sf.sf_siginfo.si_sc.sc_gs = rgs();
426 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
428 /* Build the signal context to be used by osigreturn(). */
429 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
430 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
431 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
432 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
433 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
434 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
435 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
436 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
439 * If we're a vm86 process, we want to save the segment registers.
440 * We also change eflags to be our emulated eflags, not the actual
443 if (regs->tf_eflags & PSL_VM) {
444 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
445 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
446 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
448 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
449 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
450 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
451 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
453 if (vm86->vm86_has_vme == 0)
454 sf.sf_siginfo.si_sc.sc_ps =
455 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
456 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
458 /* See sendsig() for comments. */
459 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
463 * Copy the sigframe out to the user's stack.
465 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
467 printf("process %ld has trashed its stack\n", (long)p->p_pid);
473 regs->tf_esp = (int)fp;
474 if (p->p_sysent->sv_sigcode_base != 0) {
475 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
478 /* a.out sysentvec does not use shared page */
479 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
481 regs->tf_eflags &= ~(PSL_T | PSL_D);
482 regs->tf_cs = _ucodesel;
483 regs->tf_ds = _udatasel;
484 regs->tf_es = _udatasel;
485 regs->tf_fs = _udatasel;
487 regs->tf_ss = _udatasel;
489 mtx_lock(&psp->ps_mtx);
491 #endif /* COMPAT_43 */
493 #ifdef COMPAT_FREEBSD4
495 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
497 struct sigframe4 sf, *sfp;
501 struct trapframe *regs;
507 PROC_LOCK_ASSERT(p, MA_OWNED);
508 sig = ksi->ksi_signo;
510 mtx_assert(&psp->ps_mtx, MA_OWNED);
512 oonstack = sigonstack(regs->tf_esp);
514 /* Save user context. */
515 bzero(&sf, sizeof(sf));
516 sf.sf_uc.uc_sigmask = *mask;
517 sf.sf_uc.uc_stack = td->td_sigstk;
518 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
519 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
520 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
521 sf.sf_uc.uc_mcontext.mc_gs = rgs();
522 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
523 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
524 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
525 bzero(sf.sf_uc.uc_mcontext.__spare__,
526 sizeof(sf.sf_uc.uc_mcontext.__spare__));
527 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
529 /* Allocate space for the signal handler context. */
530 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
531 SIGISMEMBER(psp->ps_sigonstack, sig)) {
532 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
533 td->td_sigstk.ss_size - sizeof(struct sigframe4));
534 #if defined(COMPAT_43)
535 td->td_sigstk.ss_flags |= SS_ONSTACK;
538 sfp = (struct sigframe4 *)regs->tf_esp - 1;
540 /* Translate the signal if appropriate. */
541 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
542 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
544 /* Build the argument list for the signal handler. */
546 sf.sf_ucontext = (register_t)&sfp->sf_uc;
547 bzero(&sf.sf_si, sizeof(sf.sf_si));
548 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
549 /* Signal handler installed with SA_SIGINFO. */
550 sf.sf_siginfo = (register_t)&sfp->sf_si;
551 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
553 /* Fill in POSIX parts */
554 sf.sf_si.si_signo = sig;
555 sf.sf_si.si_code = ksi->ksi_code;
556 sf.sf_si.si_addr = ksi->ksi_addr;
558 /* Old FreeBSD-style arguments. */
559 sf.sf_siginfo = ksi->ksi_code;
560 sf.sf_addr = (register_t)ksi->ksi_addr;
561 sf.sf_ahu.sf_handler = catcher;
563 mtx_unlock(&psp->ps_mtx);
567 * If we're a vm86 process, we want to save the segment registers.
568 * We also change eflags to be our emulated eflags, not the actual
571 if (regs->tf_eflags & PSL_VM) {
572 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
573 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
575 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
576 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
577 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
578 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
580 if (vm86->vm86_has_vme == 0)
581 sf.sf_uc.uc_mcontext.mc_eflags =
582 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
583 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
586 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
587 * syscalls made by the signal handler. This just avoids
588 * wasting time for our lazy fixup of such faults. PSL_NT
589 * does nothing in vm86 mode, but vm86 programs can set it
590 * almost legitimately in probes for old cpu types.
592 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
596 * Copy the sigframe out to the user's stack.
598 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
600 printf("process %ld has trashed its stack\n", (long)p->p_pid);
606 regs->tf_esp = (int)sfp;
607 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
609 regs->tf_eflags &= ~(PSL_T | PSL_D);
610 regs->tf_cs = _ucodesel;
611 regs->tf_ds = _udatasel;
612 regs->tf_es = _udatasel;
613 regs->tf_fs = _udatasel;
614 regs->tf_ss = _udatasel;
616 mtx_lock(&psp->ps_mtx);
618 #endif /* COMPAT_FREEBSD4 */
621 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
623 struct sigframe sf, *sfp;
628 struct trapframe *regs;
629 struct segment_descriptor *sdp;
635 PROC_LOCK_ASSERT(p, MA_OWNED);
636 sig = ksi->ksi_signo;
638 mtx_assert(&psp->ps_mtx, MA_OWNED);
639 #ifdef COMPAT_FREEBSD4
640 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
641 freebsd4_sendsig(catcher, ksi, mask);
646 if (SIGISMEMBER(psp->ps_osigset, sig)) {
647 osendsig(catcher, ksi, mask);
652 oonstack = sigonstack(regs->tf_esp);
654 /* Save user context. */
655 bzero(&sf, sizeof(sf));
656 sf.sf_uc.uc_sigmask = *mask;
657 sf.sf_uc.uc_stack = td->td_sigstk;
658 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
659 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
660 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
661 sf.sf_uc.uc_mcontext.mc_gs = rgs();
662 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
663 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
664 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
667 * Unconditionally fill the fsbase and gsbase into the mcontext.
669 sdp = &td->td_pcb->pcb_fsd;
670 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
672 sdp = &td->td_pcb->pcb_gsd;
673 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
675 sf.sf_uc.uc_mcontext.mc_flags = 0;
676 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
677 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
678 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
680 /* Allocate space for the signal handler context. */
681 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
682 SIGISMEMBER(psp->ps_sigonstack, sig)) {
683 sp = td->td_sigstk.ss_sp +
684 td->td_sigstk.ss_size - sizeof(struct sigframe);
685 #if defined(COMPAT_43)
686 td->td_sigstk.ss_flags |= SS_ONSTACK;
689 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
690 /* Align to 16 bytes. */
691 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
693 /* Translate the signal if appropriate. */
694 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
695 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
697 /* Build the argument list for the signal handler. */
699 sf.sf_ucontext = (register_t)&sfp->sf_uc;
700 bzero(&sf.sf_si, sizeof(sf.sf_si));
701 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
702 /* Signal handler installed with SA_SIGINFO. */
703 sf.sf_siginfo = (register_t)&sfp->sf_si;
704 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
706 /* Fill in POSIX parts */
707 sf.sf_si = ksi->ksi_info;
708 sf.sf_si.si_signo = sig; /* maybe a translated signal */
710 /* Old FreeBSD-style arguments. */
711 sf.sf_siginfo = ksi->ksi_code;
712 sf.sf_addr = (register_t)ksi->ksi_addr;
713 sf.sf_ahu.sf_handler = catcher;
715 mtx_unlock(&psp->ps_mtx);
719 * If we're a vm86 process, we want to save the segment registers.
720 * We also change eflags to be our emulated eflags, not the actual
723 if (regs->tf_eflags & PSL_VM) {
724 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
725 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
727 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
728 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
729 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
730 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
732 if (vm86->vm86_has_vme == 0)
733 sf.sf_uc.uc_mcontext.mc_eflags =
734 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
735 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
738 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
739 * syscalls made by the signal handler. This just avoids
740 * wasting time for our lazy fixup of such faults. PSL_NT
741 * does nothing in vm86 mode, but vm86 programs can set it
742 * almost legitimately in probes for old cpu types.
744 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
748 * Copy the sigframe out to the user's stack.
750 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
752 printf("process %ld has trashed its stack\n", (long)p->p_pid);
758 regs->tf_esp = (int)sfp;
759 regs->tf_eip = p->p_sysent->sv_sigcode_base;
760 if (regs->tf_eip == 0)
761 regs->tf_eip = p->p_sysent->sv_psstrings - szsigcode;
762 regs->tf_eflags &= ~(PSL_T | PSL_D);
763 regs->tf_cs = _ucodesel;
764 regs->tf_ds = _udatasel;
765 regs->tf_es = _udatasel;
766 regs->tf_fs = _udatasel;
767 regs->tf_ss = _udatasel;
769 mtx_lock(&psp->ps_mtx);
773 * System call to cleanup state after a signal
774 * has been taken. Reset signal mask and
775 * stack state from context left by sendsig (above).
776 * Return to previous pc and psl as specified by
777 * context left by sendsig. Check carefully to
778 * make sure that the user has not modified the
779 * state to gain improper privileges.
787 struct osigreturn_args /* {
788 struct osigcontext *sigcntxp;
791 struct osigcontext sc;
792 struct trapframe *regs;
793 struct osigcontext *scp;
798 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
803 if (eflags & PSL_VM) {
804 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
805 struct vm86_kernel *vm86;
808 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
809 * set up the vm86 area, and we can't enter vm86 mode.
811 if (td->td_pcb->pcb_ext == 0)
813 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
814 if (vm86->vm86_inited == 0)
817 /* Go back to user mode if both flags are set. */
818 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
819 ksiginfo_init_trap(&ksi);
820 ksi.ksi_signo = SIGBUS;
821 ksi.ksi_code = BUS_OBJERR;
822 ksi.ksi_addr = (void *)regs->tf_eip;
823 trapsignal(td, &ksi);
826 if (vm86->vm86_has_vme) {
827 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
828 (eflags & VME_USERCHANGE) | PSL_VM;
830 vm86->vm86_eflags = eflags; /* save VIF, VIP */
831 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
832 (eflags & VM_USERCHANGE) | PSL_VM;
834 tf->tf_vm86_ds = scp->sc_ds;
835 tf->tf_vm86_es = scp->sc_es;
836 tf->tf_vm86_fs = scp->sc_fs;
837 tf->tf_vm86_gs = scp->sc_gs;
838 tf->tf_ds = _udatasel;
839 tf->tf_es = _udatasel;
840 tf->tf_fs = _udatasel;
843 * Don't allow users to change privileged or reserved flags.
845 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
850 * Don't allow users to load a valid privileged %cs. Let the
851 * hardware check for invalid selectors, excess privilege in
852 * other selectors, invalid %eip's and invalid %esp's.
854 if (!CS_SECURE(scp->sc_cs)) {
855 ksiginfo_init_trap(&ksi);
856 ksi.ksi_signo = SIGBUS;
857 ksi.ksi_code = BUS_OBJERR;
858 ksi.ksi_trapno = T_PROTFLT;
859 ksi.ksi_addr = (void *)regs->tf_eip;
860 trapsignal(td, &ksi);
863 regs->tf_ds = scp->sc_ds;
864 regs->tf_es = scp->sc_es;
865 regs->tf_fs = scp->sc_fs;
868 /* Restore remaining registers. */
869 regs->tf_eax = scp->sc_eax;
870 regs->tf_ebx = scp->sc_ebx;
871 regs->tf_ecx = scp->sc_ecx;
872 regs->tf_edx = scp->sc_edx;
873 regs->tf_esi = scp->sc_esi;
874 regs->tf_edi = scp->sc_edi;
875 regs->tf_cs = scp->sc_cs;
876 regs->tf_ss = scp->sc_ss;
877 regs->tf_isp = scp->sc_isp;
878 regs->tf_ebp = scp->sc_fp;
879 regs->tf_esp = scp->sc_sp;
880 regs->tf_eip = scp->sc_pc;
881 regs->tf_eflags = eflags;
883 #if defined(COMPAT_43)
884 if (scp->sc_onstack & 1)
885 td->td_sigstk.ss_flags |= SS_ONSTACK;
887 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
889 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
891 return (EJUSTRETURN);
893 #endif /* COMPAT_43 */
895 #ifdef COMPAT_FREEBSD4
900 freebsd4_sigreturn(td, uap)
902 struct freebsd4_sigreturn_args /* {
903 const ucontext4 *sigcntxp;
907 struct trapframe *regs;
908 struct ucontext4 *ucp;
909 int cs, eflags, error;
912 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
917 eflags = ucp->uc_mcontext.mc_eflags;
918 if (eflags & PSL_VM) {
919 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
920 struct vm86_kernel *vm86;
923 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
924 * set up the vm86 area, and we can't enter vm86 mode.
926 if (td->td_pcb->pcb_ext == 0)
928 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
929 if (vm86->vm86_inited == 0)
932 /* Go back to user mode if both flags are set. */
933 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
934 ksiginfo_init_trap(&ksi);
935 ksi.ksi_signo = SIGBUS;
936 ksi.ksi_code = BUS_OBJERR;
937 ksi.ksi_addr = (void *)regs->tf_eip;
938 trapsignal(td, &ksi);
940 if (vm86->vm86_has_vme) {
941 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
942 (eflags & VME_USERCHANGE) | PSL_VM;
944 vm86->vm86_eflags = eflags; /* save VIF, VIP */
945 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
946 (eflags & VM_USERCHANGE) | PSL_VM;
948 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
949 tf->tf_eflags = eflags;
950 tf->tf_vm86_ds = tf->tf_ds;
951 tf->tf_vm86_es = tf->tf_es;
952 tf->tf_vm86_fs = tf->tf_fs;
953 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
954 tf->tf_ds = _udatasel;
955 tf->tf_es = _udatasel;
956 tf->tf_fs = _udatasel;
959 * Don't allow users to change privileged or reserved flags.
961 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
962 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
963 td->td_proc->p_pid, td->td_name, eflags);
968 * Don't allow users to load a valid privileged %cs. Let the
969 * hardware check for invalid selectors, excess privilege in
970 * other selectors, invalid %eip's and invalid %esp's.
972 cs = ucp->uc_mcontext.mc_cs;
973 if (!CS_SECURE(cs)) {
974 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
975 td->td_proc->p_pid, td->td_name, cs);
976 ksiginfo_init_trap(&ksi);
977 ksi.ksi_signo = SIGBUS;
978 ksi.ksi_code = BUS_OBJERR;
979 ksi.ksi_trapno = T_PROTFLT;
980 ksi.ksi_addr = (void *)regs->tf_eip;
981 trapsignal(td, &ksi);
985 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
988 #if defined(COMPAT_43)
989 if (ucp->uc_mcontext.mc_onstack & 1)
990 td->td_sigstk.ss_flags |= SS_ONSTACK;
992 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
994 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
995 return (EJUSTRETURN);
997 #endif /* COMPAT_FREEBSD4 */
1003 sys_sigreturn(td, uap)
1005 struct sigreturn_args /* {
1006 const struct __ucontext *sigcntxp;
1010 struct trapframe *regs;
1012 int cs, eflags, error, ret;
1015 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1019 regs = td->td_frame;
1020 eflags = ucp->uc_mcontext.mc_eflags;
1021 if (eflags & PSL_VM) {
1022 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1023 struct vm86_kernel *vm86;
1026 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1027 * set up the vm86 area, and we can't enter vm86 mode.
1029 if (td->td_pcb->pcb_ext == 0)
1031 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1032 if (vm86->vm86_inited == 0)
1035 /* Go back to user mode if both flags are set. */
1036 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1037 ksiginfo_init_trap(&ksi);
1038 ksi.ksi_signo = SIGBUS;
1039 ksi.ksi_code = BUS_OBJERR;
1040 ksi.ksi_addr = (void *)regs->tf_eip;
1041 trapsignal(td, &ksi);
1044 if (vm86->vm86_has_vme) {
1045 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1046 (eflags & VME_USERCHANGE) | PSL_VM;
1048 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1049 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1050 (eflags & VM_USERCHANGE) | PSL_VM;
1052 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1053 tf->tf_eflags = eflags;
1054 tf->tf_vm86_ds = tf->tf_ds;
1055 tf->tf_vm86_es = tf->tf_es;
1056 tf->tf_vm86_fs = tf->tf_fs;
1057 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1058 tf->tf_ds = _udatasel;
1059 tf->tf_es = _udatasel;
1060 tf->tf_fs = _udatasel;
1063 * Don't allow users to change privileged or reserved flags.
1065 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
1066 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1067 td->td_proc->p_pid, td->td_name, eflags);
1072 * Don't allow users to load a valid privileged %cs. Let the
1073 * hardware check for invalid selectors, excess privilege in
1074 * other selectors, invalid %eip's and invalid %esp's.
1076 cs = ucp->uc_mcontext.mc_cs;
1077 if (!CS_SECURE(cs)) {
1078 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1079 td->td_proc->p_pid, td->td_name, cs);
1080 ksiginfo_init_trap(&ksi);
1081 ksi.ksi_signo = SIGBUS;
1082 ksi.ksi_code = BUS_OBJERR;
1083 ksi.ksi_trapno = T_PROTFLT;
1084 ksi.ksi_addr = (void *)regs->tf_eip;
1085 trapsignal(td, &ksi);
1089 ret = set_fpcontext(td, &ucp->uc_mcontext);
1092 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1095 #if defined(COMPAT_43)
1096 if (ucp->uc_mcontext.mc_onstack & 1)
1097 td->td_sigstk.ss_flags |= SS_ONSTACK;
1099 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1102 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1103 return (EJUSTRETURN);
1107 * Machine dependent boot() routine
1109 * I haven't seen anything to put here yet
1110 * Possibly some stuff might be grafted back here from boot()
1118 * Flush the D-cache for non-DMA I/O so that the I-cache can
1119 * be made coherent later.
1122 cpu_flush_dcache(void *ptr, size_t len)
1124 /* Not applicable */
1127 /* Get current clock frequency for the given cpu id. */
1129 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1131 uint64_t tsc1, tsc2;
1132 uint64_t acnt, mcnt, perf;
1135 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1137 if ((cpu_feature & CPUID_TSC) == 0)
1138 return (EOPNOTSUPP);
1141 * If TSC is P-state invariant and APERF/MPERF MSRs do not exist,
1142 * DELAY(9) based logic fails.
1144 if (tsc_is_invariant && !tsc_perf_stat)
1145 return (EOPNOTSUPP);
1149 /* Schedule ourselves on the indicated cpu. */
1150 thread_lock(curthread);
1151 sched_bind(curthread, cpu_id);
1152 thread_unlock(curthread);
1156 /* Calibrate by measuring a short delay. */
1157 reg = intr_disable();
1158 if (tsc_is_invariant) {
1159 wrmsr(MSR_MPERF, 0);
1160 wrmsr(MSR_APERF, 0);
1163 mcnt = rdmsr(MSR_MPERF);
1164 acnt = rdmsr(MSR_APERF);
1167 perf = 1000 * acnt / mcnt;
1168 *rate = (tsc2 - tsc1) * perf;
1174 *rate = (tsc2 - tsc1) * 1000;
1179 thread_lock(curthread);
1180 sched_unbind(curthread);
1181 thread_unlock(curthread);
1194 HYPERVISOR_sched_op(SCHEDOP_block, 0);
1200 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1203 int scheduler_running;
1206 cpu_idle_hlt(sbintime_t sbt)
1209 scheduler_running = 1;
1216 * Shutdown the CPU as much as possible
1227 void (*cpu_idle_hook)(sbintime_t) = NULL; /* ACPI idle hook. */
1228 static int cpu_ident_amdc1e = 0; /* AMD C1E supported. */
1229 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1230 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1231 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1232 0, "Use MONITOR/MWAIT for short idle");
1234 #define STATE_RUNNING 0x0
1235 #define STATE_MWAIT 0x1
1236 #define STATE_SLEEPING 0x2
1239 cpu_idle_acpi(sbintime_t sbt)
1243 state = (int *)PCPU_PTR(monitorbuf);
1244 *state = STATE_SLEEPING;
1246 /* See comments in cpu_idle_hlt(). */
1248 if (sched_runnable())
1250 else if (cpu_idle_hook)
1253 __asm __volatile("sti; hlt");
1254 *state = STATE_RUNNING;
1259 cpu_idle_hlt(sbintime_t sbt)
1263 state = (int *)PCPU_PTR(monitorbuf);
1264 *state = STATE_SLEEPING;
1267 * Since we may be in a critical section from cpu_idle(), if
1268 * an interrupt fires during that critical section we may have
1269 * a pending preemption. If the CPU halts, then that thread
1270 * may not execute until a later interrupt awakens the CPU.
1271 * To handle this race, check for a runnable thread after
1272 * disabling interrupts and immediately return if one is
1273 * found. Also, we must absolutely guarentee that hlt is
1274 * the next instruction after sti. This ensures that any
1275 * interrupt that fires after the call to disable_intr() will
1276 * immediately awaken the CPU from hlt. Finally, please note
1277 * that on x86 this works fine because of interrupts enabled only
1278 * after the instruction following sti takes place, while IF is set
1279 * to 1 immediately, allowing hlt instruction to acknowledge the
1283 if (sched_runnable())
1286 __asm __volatile("sti; hlt");
1287 *state = STATE_RUNNING;
1292 * MWAIT cpu power states. Lower 4 bits are sub-states.
1294 #define MWAIT_C0 0xf0
1295 #define MWAIT_C1 0x00
1296 #define MWAIT_C2 0x10
1297 #define MWAIT_C3 0x20
1298 #define MWAIT_C4 0x30
1301 cpu_idle_mwait(sbintime_t sbt)
1305 state = (int *)PCPU_PTR(monitorbuf);
1306 *state = STATE_MWAIT;
1308 /* See comments in cpu_idle_hlt(). */
1310 if (sched_runnable()) {
1312 *state = STATE_RUNNING;
1315 cpu_monitor(state, 0, 0);
1316 if (*state == STATE_MWAIT)
1317 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
1320 *state = STATE_RUNNING;
1324 cpu_idle_spin(sbintime_t sbt)
1329 state = (int *)PCPU_PTR(monitorbuf);
1330 *state = STATE_RUNNING;
1333 * The sched_runnable() call is racy but as long as there is
1334 * a loop missing it one time will have just a little impact if any
1335 * (and it is much better than missing the check at all).
1337 for (i = 0; i < 1000; i++) {
1338 if (sched_runnable())
1345 * C1E renders the local APIC timer dead, so we disable it by
1346 * reading the Interrupt Pending Message register and clearing
1347 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1350 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1351 * #32559 revision 3.00+
1353 #define MSR_AMDK8_IPM 0xc0010055
1354 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1355 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1356 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1359 cpu_probe_amdc1e(void)
1363 * Detect the presence of C1E capability mostly on latest
1364 * dual-cores (or future) k8 family.
1366 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1367 (cpu_id & 0x00000f00) == 0x00000f00 &&
1368 (cpu_id & 0x0fff0000) >= 0x00040000) {
1369 cpu_ident_amdc1e = 1;
1374 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_hlt;
1376 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_acpi;
1385 sbintime_t sbt = -1;
1387 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1389 #if defined(MP_WATCHDOG) && !defined(XEN)
1390 ap_watchdog(PCPU_GET(cpuid));
1393 /* If we are busy - try to use fast methods. */
1395 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1396 cpu_idle_mwait(busy);
1402 /* If we have time - switch timers into idle mode. */
1405 sbt = cpu_idleclock();
1409 /* Apply AMD APIC timer C1E workaround. */
1410 if (cpu_ident_amdc1e && cpu_disable_deep_sleep) {
1411 msr = rdmsr(MSR_AMDK8_IPM);
1412 if (msr & AMDK8_CMPHALT)
1413 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1417 /* Call main idle method. */
1420 /* Switch timers mack into active mode. */
1428 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1433 cpu_idle_wakeup(int cpu)
1438 pcpu = pcpu_find(cpu);
1439 state = (int *)pcpu->pc_monitorbuf;
1441 * This doesn't need to be atomic since missing the race will
1442 * simply result in unnecessary IPIs.
1444 if (*state == STATE_SLEEPING)
1446 if (*state == STATE_MWAIT)
1447 *state = STATE_RUNNING;
1452 * Ordered by speed/power consumption.
1458 { cpu_idle_spin, "spin" },
1459 { cpu_idle_mwait, "mwait" },
1460 { cpu_idle_hlt, "hlt" },
1461 { cpu_idle_acpi, "acpi" },
1466 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1472 avail = malloc(256, M_TEMP, M_WAITOK);
1474 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1475 if (strstr(idle_tbl[i].id_name, "mwait") &&
1476 (cpu_feature2 & CPUID2_MON) == 0)
1478 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1479 cpu_idle_hook == NULL)
1481 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1482 idle_tbl[i].id_name);
1484 error = sysctl_handle_string(oidp, avail, 0, req);
1485 free(avail, M_TEMP);
1489 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1490 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1493 idle_sysctl(SYSCTL_HANDLER_ARGS)
1501 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1502 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1503 p = idle_tbl[i].id_name;
1507 strncpy(buf, p, sizeof(buf));
1508 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1509 if (error != 0 || req->newptr == NULL)
1511 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1512 if (strstr(idle_tbl[i].id_name, "mwait") &&
1513 (cpu_feature2 & CPUID2_MON) == 0)
1515 if (strcmp(idle_tbl[i].id_name, "acpi") == 0 &&
1516 cpu_idle_hook == NULL)
1518 if (strcmp(idle_tbl[i].id_name, buf))
1520 cpu_idle_fn = idle_tbl[i].id_fn;
1526 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1527 idle_sysctl, "A", "currently selected idle function");
1530 * Reset registers to default values on exec.
1533 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1535 struct trapframe *regs = td->td_frame;
1536 struct pcb *pcb = td->td_pcb;
1538 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1539 pcb->pcb_gs = _udatasel;
1542 mtx_lock_spin(&dt_lock);
1543 if (td->td_proc->p_md.md_ldt)
1546 mtx_unlock_spin(&dt_lock);
1548 bzero((char *)regs, sizeof(struct trapframe));
1549 regs->tf_eip = imgp->entry_addr;
1550 regs->tf_esp = stack;
1551 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1552 regs->tf_ss = _udatasel;
1553 regs->tf_ds = _udatasel;
1554 regs->tf_es = _udatasel;
1555 regs->tf_fs = _udatasel;
1556 regs->tf_cs = _ucodesel;
1558 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1559 regs->tf_ebx = imgp->ps_strings;
1562 * Reset the hardware debug registers if they were in use.
1563 * They won't have any meaning for the newly exec'd process.
1565 if (pcb->pcb_flags & PCB_DBREGS) {
1572 if (pcb == curpcb) {
1574 * Clear the debug registers on the running
1575 * CPU, otherwise they will end up affecting
1576 * the next process we switch to.
1580 pcb->pcb_flags &= ~PCB_DBREGS;
1584 * Initialize the math emulator (if any) for the current process.
1585 * Actually, just clear the bit that says that the emulator has
1586 * been initialized. Initialization is delayed until the process
1587 * traps to the emulator (if it is done at all) mainly because
1588 * emulators don't provide an entry point for initialization.
1590 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1591 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1594 * Drop the FP state if we hold it, so that the process gets a
1595 * clean FP state if it uses the FPU again.
1600 * XXX - Linux emulator
1601 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1604 td->td_retval[1] = 0;
1615 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1617 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1618 * instructions. We must set the CR0_MP bit and use the CR0_TS
1619 * bit to control the trap, because setting the CR0_EM bit does
1620 * not cause WAIT instructions to trap. It's important to trap
1621 * WAIT instructions - otherwise the "wait" variants of no-wait
1622 * control instructions would degenerate to the "no-wait" variants
1623 * after FP context switches but work correctly otherwise. It's
1624 * particularly important to trap WAITs when there is no NPX -
1625 * otherwise the "wait" variants would always degenerate.
1627 * Try setting CR0_NE to get correct error reporting on 486DX's.
1628 * Setting it should fail or do nothing on lesser processors.
1630 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1635 u_long bootdev; /* not a struct cdev *- encoding is different */
1636 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1637 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1639 static char bootmethod[16] = "BIOS";
1640 SYSCTL_STRING(_machdep, OID_AUTO, bootmethod, CTLFLAG_RD, bootmethod, 0,
1641 "System firmware boot method");
1644 * Initialize 386 and configure to run kernel
1648 * Initialize segments & interrupt table
1654 union descriptor *gdt;
1655 union descriptor *ldt;
1657 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1658 union descriptor ldt[NLDT]; /* local descriptor table */
1660 static struct gate_descriptor idt0[NIDT];
1661 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1662 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1663 struct mtx dt_lock; /* lock for GDT and LDT */
1665 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1666 extern int has_f00f_bug;
1669 static struct i386tss dblfault_tss;
1670 static char dblfault_stack[PAGE_SIZE];
1672 extern vm_offset_t proc0kstack;
1676 * software prototypes -- in more palatable form.
1678 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1679 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1681 struct soft_segment_descriptor gdt_segs[] = {
1682 /* GNULL_SEL 0 Null Descriptor */
1688 .ssd_xx = 0, .ssd_xx1 = 0,
1691 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1693 .ssd_limit = 0xfffff,
1694 .ssd_type = SDT_MEMRWA,
1697 .ssd_xx = 0, .ssd_xx1 = 0,
1700 /* GUFS_SEL 2 %fs Descriptor for user */
1702 .ssd_limit = 0xfffff,
1703 .ssd_type = SDT_MEMRWA,
1706 .ssd_xx = 0, .ssd_xx1 = 0,
1709 /* GUGS_SEL 3 %gs Descriptor for user */
1711 .ssd_limit = 0xfffff,
1712 .ssd_type = SDT_MEMRWA,
1715 .ssd_xx = 0, .ssd_xx1 = 0,
1718 /* GCODE_SEL 4 Code Descriptor for kernel */
1720 .ssd_limit = 0xfffff,
1721 .ssd_type = SDT_MEMERA,
1724 .ssd_xx = 0, .ssd_xx1 = 0,
1727 /* GDATA_SEL 5 Data Descriptor for kernel */
1729 .ssd_limit = 0xfffff,
1730 .ssd_type = SDT_MEMRWA,
1733 .ssd_xx = 0, .ssd_xx1 = 0,
1736 /* GUCODE_SEL 6 Code Descriptor for user */
1738 .ssd_limit = 0xfffff,
1739 .ssd_type = SDT_MEMERA,
1742 .ssd_xx = 0, .ssd_xx1 = 0,
1745 /* GUDATA_SEL 7 Data Descriptor for user */
1747 .ssd_limit = 0xfffff,
1748 .ssd_type = SDT_MEMRWA,
1751 .ssd_xx = 0, .ssd_xx1 = 0,
1754 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1755 { .ssd_base = 0x400,
1756 .ssd_limit = 0xfffff,
1757 .ssd_type = SDT_MEMRWA,
1760 .ssd_xx = 0, .ssd_xx1 = 0,
1764 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1767 .ssd_limit = sizeof(struct i386tss)-1,
1768 .ssd_type = SDT_SYS386TSS,
1771 .ssd_xx = 0, .ssd_xx1 = 0,
1774 /* GLDT_SEL 10 LDT Descriptor */
1775 { .ssd_base = (int) ldt,
1776 .ssd_limit = sizeof(ldt)-1,
1777 .ssd_type = SDT_SYSLDT,
1780 .ssd_xx = 0, .ssd_xx1 = 0,
1783 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1784 { .ssd_base = (int) ldt,
1785 .ssd_limit = (512 * sizeof(union descriptor)-1),
1786 .ssd_type = SDT_SYSLDT,
1789 .ssd_xx = 0, .ssd_xx1 = 0,
1792 /* GPANIC_SEL 12 Panic Tss Descriptor */
1793 { .ssd_base = (int) &dblfault_tss,
1794 .ssd_limit = sizeof(struct i386tss)-1,
1795 .ssd_type = SDT_SYS386TSS,
1798 .ssd_xx = 0, .ssd_xx1 = 0,
1801 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1803 .ssd_limit = 0xfffff,
1804 .ssd_type = SDT_MEMERA,
1807 .ssd_xx = 0, .ssd_xx1 = 0,
1810 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1812 .ssd_limit = 0xfffff,
1813 .ssd_type = SDT_MEMERA,
1816 .ssd_xx = 0, .ssd_xx1 = 0,
1819 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1821 .ssd_limit = 0xfffff,
1822 .ssd_type = SDT_MEMRWA,
1825 .ssd_xx = 0, .ssd_xx1 = 0,
1828 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1830 .ssd_limit = 0xfffff,
1831 .ssd_type = SDT_MEMRWA,
1834 .ssd_xx = 0, .ssd_xx1 = 0,
1837 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1839 .ssd_limit = 0xfffff,
1840 .ssd_type = SDT_MEMRWA,
1843 .ssd_xx = 0, .ssd_xx1 = 0,
1846 /* GNDIS_SEL 18 NDIS Descriptor */
1852 .ssd_xx = 0, .ssd_xx1 = 0,
1858 static struct soft_segment_descriptor ldt_segs[] = {
1859 /* Null Descriptor - overwritten by call gate */
1865 .ssd_xx = 0, .ssd_xx1 = 0,
1868 /* Null Descriptor - overwritten by call gate */
1874 .ssd_xx = 0, .ssd_xx1 = 0,
1877 /* Null Descriptor - overwritten by call gate */
1883 .ssd_xx = 0, .ssd_xx1 = 0,
1886 /* Code Descriptor for user */
1888 .ssd_limit = 0xfffff,
1889 .ssd_type = SDT_MEMERA,
1892 .ssd_xx = 0, .ssd_xx1 = 0,
1895 /* Null Descriptor - overwritten by call gate */
1901 .ssd_xx = 0, .ssd_xx1 = 0,
1904 /* Data Descriptor for user */
1906 .ssd_limit = 0xfffff,
1907 .ssd_type = SDT_MEMRWA,
1910 .ssd_xx = 0, .ssd_xx1 = 0,
1916 setidt(idx, func, typ, dpl, selec)
1923 struct gate_descriptor *ip;
1926 ip->gd_looffset = (int)func;
1927 ip->gd_selector = selec;
1933 ip->gd_hioffset = ((int)func)>>16 ;
1937 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1938 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1939 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1940 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1942 #ifdef KDTRACE_HOOKS
1946 IDTVEC(xen_intr_upcall),
1948 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1952 * Display the index and function name of any IDT entries that don't use
1953 * the default 'rsvd' entry point.
1955 DB_SHOW_COMMAND(idt, db_show_idt)
1957 struct gate_descriptor *ip;
1962 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1963 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1964 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1965 db_printf("%3d\t", idx);
1966 db_printsym(func, DB_STGY_PROC);
1973 /* Show privileged registers. */
1974 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1976 uint64_t idtr, gdtr;
1979 db_printf("idtr\t0x%08x/%04x\n",
1980 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1982 db_printf("gdtr\t0x%08x/%04x\n",
1983 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1984 db_printf("ldtr\t0x%04x\n", rldt());
1985 db_printf("tr\t0x%04x\n", rtr());
1986 db_printf("cr0\t0x%08x\n", rcr0());
1987 db_printf("cr2\t0x%08x\n", rcr2());
1988 db_printf("cr3\t0x%08x\n", rcr3());
1989 db_printf("cr4\t0x%08x\n", rcr4());
1995 struct segment_descriptor *sd;
1996 struct soft_segment_descriptor *ssd;
1998 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1999 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
2000 ssd->ssd_type = sd->sd_type;
2001 ssd->ssd_dpl = sd->sd_dpl;
2002 ssd->ssd_p = sd->sd_p;
2003 ssd->ssd_def32 = sd->sd_def32;
2004 ssd->ssd_gran = sd->sd_gran;
2009 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
2011 int i, insert_idx, physmap_idx;
2013 physmap_idx = *physmap_idxp;
2015 if (boothowto & RB_VERBOSE)
2016 printf("SMAP type=%02x base=%016llx len=%016llx\n",
2017 smap->type, smap->base, smap->length);
2019 if (smap->type != SMAP_TYPE_MEMORY)
2022 if (smap->length == 0)
2026 if (smap->base > 0xffffffff) {
2027 printf("%uK of memory above 4GB ignored\n",
2028 (u_int)(smap->length / 1024));
2034 * Find insertion point while checking for overlap. Start off by
2035 * assuming the new entry will be added to the end.
2037 insert_idx = physmap_idx + 2;
2038 for (i = 0; i <= physmap_idx; i += 2) {
2039 if (smap->base < physmap[i + 1]) {
2040 if (smap->base + smap->length <= physmap[i]) {
2044 if (boothowto & RB_VERBOSE)
2046 "Overlapping memory regions, ignoring second region\n");
2051 /* See if we can prepend to the next entry. */
2052 if (insert_idx <= physmap_idx &&
2053 smap->base + smap->length == physmap[insert_idx]) {
2054 physmap[insert_idx] = smap->base;
2058 /* See if we can append to the previous entry. */
2059 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
2060 physmap[insert_idx - 1] += smap->length;
2065 *physmap_idxp = physmap_idx;
2066 if (physmap_idx == PHYSMAP_SIZE) {
2068 "Too many segments in the physical address map, giving up\n");
2073 * Move the last 'N' entries down to make room for the new
2076 for (i = physmap_idx; i > insert_idx; i -= 2) {
2077 physmap[i] = physmap[i - 2];
2078 physmap[i + 1] = physmap[i - 1];
2081 /* Insert the new entry. */
2082 physmap[insert_idx] = smap->base;
2083 physmap[insert_idx + 1] = smap->base + smap->length;
2094 if (basemem > 640) {
2095 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2101 * XXX if biosbasemem is now < 640, there is a `hole'
2102 * between the end of base memory and the start of
2103 * ISA memory. The hole may be empty or it may
2104 * contain BIOS code or data. Map it read/write so
2105 * that the BIOS can write to it. (Memory from 0 to
2106 * the physical end of the kernel is mapped read-only
2107 * to begin with and then parts of it are remapped.
2108 * The parts that aren't remapped form holes that
2109 * remain read-only and are unused by the kernel.
2110 * The base memory area is below the physical end of
2111 * the kernel and right now forms a read-only hole.
2112 * The part of it from PAGE_SIZE to
2113 * (trunc_page(biosbasemem * 1024) - 1) will be
2114 * remapped and used by the kernel later.)
2116 * This code is similar to the code used in
2117 * pmap_mapdev, but since no memory needs to be
2118 * allocated we simply change the mapping.
2120 for (pa = trunc_page(basemem * 1024);
2121 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2122 pmap_kenter(KERNBASE + pa, pa);
2125 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2126 * the vm86 page table so that vm86 can scribble on them using
2127 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2128 * page 0, at least as initialized here?
2130 pte = (pt_entry_t *)vm86paddr;
2131 for (i = basemem / 4; i < 160; i++)
2132 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2137 * Populate the (physmap) array with base/bound pairs describing the
2138 * available physical memory in the system, then test this memory and
2139 * build the phys_avail array describing the actually-available memory.
2141 * If we cannot accurately determine the physical memory map, then use
2142 * value from the 0xE801 call, and failing that, the RTC.
2144 * Total memory size may be set by the kernel environment variable
2145 * hw.physmem or the compile-time define MAXMEM.
2147 * XXX first should be vm_paddr_t.
2150 getmemsize(int first)
2152 int has_smap, off, physmap_idx, pa_indx, da_indx;
2153 u_long physmem_tunable, memtest;
2154 vm_paddr_t physmap[PHYSMAP_SIZE];
2156 quad_t dcons_addr, dcons_size;
2158 int hasbrokenint12, i, res;
2160 struct vm86frame vmf;
2161 struct vm86context vmc;
2163 struct bios_smap *smap, *smapbase, *smapend;
2170 Maxmem = xen_start_info->nr_pages - init_first;
2173 physmap[0] = init_first << PAGE_SHIFT;
2174 physmap[1] = ptoa(Maxmem) - round_page(msgbufsize);
2178 if (arch_i386_is_xbox) {
2180 * We queried the memory size before, so chop off 4MB for
2181 * the framebuffer and inform the OS of this.
2184 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2189 bzero(&vmf, sizeof(vmf));
2190 bzero(physmap, sizeof(physmap));
2194 * Check if the loader supplied an SMAP memory map. If so,
2195 * use that and do not make any VM86 calls.
2199 kmdp = preload_search_by_type("elf kernel");
2201 kmdp = preload_search_by_type("elf32 kernel");
2203 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2204 MODINFO_METADATA | MODINFOMD_SMAP);
2205 if (smapbase != NULL) {
2207 * subr_module.c says:
2208 * "Consumer may safely assume that size value precedes data."
2209 * ie: an int32_t immediately precedes SMAP.
2211 smapsize = *((u_int32_t *)smapbase - 1);
2212 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2215 for (smap = smapbase; smap < smapend; smap++)
2216 if (!add_smap_entry(smap, physmap, &physmap_idx))
2222 * Some newer BIOSes have a broken INT 12H implementation
2223 * which causes a kernel panic immediately. In this case, we
2224 * need use the SMAP to determine the base memory size.
2227 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2228 if (hasbrokenint12 == 0) {
2229 /* Use INT12 to determine base memory size. */
2230 vm86_intcall(0x12, &vmf);
2231 basemem = vmf.vmf_ax;
2236 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2237 * the kernel page table so we can use it as a buffer. The
2238 * kernel will unmap this page later.
2240 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2242 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2243 res = vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2244 KASSERT(res != 0, ("vm86_getptr() failed: address not found"));
2248 vmf.vmf_eax = 0xE820;
2249 vmf.vmf_edx = SMAP_SIG;
2250 vmf.vmf_ecx = sizeof(struct bios_smap);
2251 i = vm86_datacall(0x15, &vmf, &vmc);
2252 if (i || vmf.vmf_eax != SMAP_SIG)
2255 if (!add_smap_entry(smap, physmap, &physmap_idx))
2257 } while (vmf.vmf_ebx != 0);
2261 * If we didn't fetch the "base memory" size from INT12,
2262 * figure it out from the SMAP (or just guess).
2265 for (i = 0; i <= physmap_idx; i += 2) {
2266 if (physmap[i] == 0x00000000) {
2267 basemem = physmap[i + 1] / 1024;
2272 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2278 if (physmap[1] != 0)
2282 * If we failed to find an SMAP, figure out the extended
2283 * memory size. We will then build a simple memory map with
2284 * two segments, one for "base memory" and the second for
2285 * "extended memory". Note that "extended memory" starts at a
2286 * physical address of 1MB and that both basemem and extmem
2287 * are in units of 1KB.
2289 * First, try to fetch the extended memory size via INT 15:E801.
2291 vmf.vmf_ax = 0xE801;
2292 if (vm86_intcall(0x15, &vmf) == 0) {
2293 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2296 * If INT15:E801 fails, this is our last ditch effort
2297 * to determine the extended memory size. Currently
2298 * we prefer the RTC value over INT15:88.
2302 vm86_intcall(0x15, &vmf);
2303 extmem = vmf.vmf_ax;
2305 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2310 * Special hack for chipsets that still remap the 384k hole when
2311 * there's 16MB of memory - this really confuses people that
2312 * are trying to use bus mastering ISA controllers with the
2313 * "16MB limit"; they only have 16MB, but the remapping puts
2314 * them beyond the limit.
2316 * If extended memory is between 15-16MB (16-17MB phys address range),
2319 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2323 physmap[1] = basemem * 1024;
2325 physmap[physmap_idx] = 0x100000;
2326 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2331 * Now, physmap contains a map of physical memory.
2335 /* make hole for AP bootstrap code */
2336 physmap[1] = mp_bootaddress(physmap[1]);
2340 * Maxmem isn't the "maximum memory", it's one larger than the
2341 * highest page of the physical address space. It should be
2342 * called something like "Maxphyspage". We may adjust this
2343 * based on ``hw.physmem'' and the results of the memory test.
2345 Maxmem = atop(physmap[physmap_idx + 1]);
2348 Maxmem = MAXMEM / 4;
2351 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2352 Maxmem = atop(physmem_tunable);
2355 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2356 * the amount of memory in the system.
2358 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2359 Maxmem = atop(physmap[physmap_idx + 1]);
2362 * By default enable the memory test on real hardware, and disable
2363 * it if we appear to be running in a VM. This avoids touching all
2364 * pages unnecessarily, which doesn't matter on real hardware but is
2365 * bad for shared VM hosts. Use a general name so that
2366 * one could eventually do more with the code than just disable it.
2368 memtest = (vm_guest > VM_GUEST_NO) ? 0 : 1;
2369 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
2371 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2372 (boothowto & RB_VERBOSE))
2373 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2376 * If Maxmem has been increased beyond what the system has detected,
2377 * extend the last memory segment to the new limit.
2379 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2380 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2382 /* call pmap initialization to make new kernel address space */
2383 pmap_bootstrap(first);
2386 * Size up each available chunk of physical memory.
2388 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2391 phys_avail[pa_indx++] = physmap[0];
2392 phys_avail[pa_indx] = physmap[0];
2393 dump_avail[da_indx] = physmap[0];
2397 * Get dcons buffer address
2399 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2400 getenv_quad("dcons.size", &dcons_size) == 0)
2405 * physmap is in bytes, so when converting to page boundaries,
2406 * round up the start address and round down the end address.
2408 for (i = 0; i <= physmap_idx; i += 2) {
2411 end = ptoa((vm_paddr_t)Maxmem);
2412 if (physmap[i + 1] < end)
2413 end = trunc_page(physmap[i + 1]);
2414 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2415 int tmp, page_bad, full;
2416 int *ptr = (int *)CADDR3;
2420 * block out kernel memory as not available.
2422 if (pa >= KERNLOAD && pa < first)
2426 * block out dcons buffer
2429 && pa >= trunc_page(dcons_addr)
2430 && pa < dcons_addr + dcons_size)
2438 * map page into kernel: valid, read/write,non-cacheable
2440 *pte = pa | PG_V | PG_RW | PG_N;
2445 * Test for alternating 1's and 0's
2447 *(volatile int *)ptr = 0xaaaaaaaa;
2448 if (*(volatile int *)ptr != 0xaaaaaaaa)
2451 * Test for alternating 0's and 1's
2453 *(volatile int *)ptr = 0x55555555;
2454 if (*(volatile int *)ptr != 0x55555555)
2459 *(volatile int *)ptr = 0xffffffff;
2460 if (*(volatile int *)ptr != 0xffffffff)
2465 *(volatile int *)ptr = 0x0;
2466 if (*(volatile int *)ptr != 0x0)
2469 * Restore original value.
2475 * Adjust array of valid/good pages.
2477 if (page_bad == TRUE)
2480 * If this good page is a continuation of the
2481 * previous set of good pages, then just increase
2482 * the end pointer. Otherwise start a new chunk.
2483 * Note that "end" points one higher than end,
2484 * making the range >= start and < end.
2485 * If we're also doing a speculative memory
2486 * test and we at or past the end, bump up Maxmem
2487 * so that we keep going. The first bad page
2488 * will terminate the loop.
2490 if (phys_avail[pa_indx] == pa) {
2491 phys_avail[pa_indx] += PAGE_SIZE;
2494 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2496 "Too many holes in the physical address space, giving up\n");
2501 phys_avail[pa_indx++] = pa; /* start */
2502 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2506 if (dump_avail[da_indx] == pa) {
2507 dump_avail[da_indx] += PAGE_SIZE;
2510 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2514 dump_avail[da_indx++] = pa; /* start */
2515 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2525 phys_avail[0] = physfree;
2526 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2528 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2534 * The last chunk must contain at least one page plus the message
2535 * buffer to avoid complicating other code (message buffer address
2536 * calculation, etc.).
2538 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2539 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2540 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2541 phys_avail[pa_indx--] = 0;
2542 phys_avail[pa_indx--] = 0;
2545 Maxmem = atop(phys_avail[pa_indx]);
2547 /* Trim off space for the message buffer. */
2548 phys_avail[pa_indx] -= round_page(msgbufsize);
2550 /* Map the message buffer. */
2551 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2552 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2559 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2565 unsigned long gdtmachpfn;
2566 int error, gsel_tss, metadata_missing, x, pa;
2569 struct callback_register event = {
2570 .type = CALLBACKTYPE_event,
2571 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2573 struct callback_register failsafe = {
2574 .type = CALLBACKTYPE_failsafe,
2575 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2578 thread0.td_kstack = proc0kstack;
2579 thread0.td_kstack_pages = KSTACK_PAGES;
2580 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2581 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2584 * This may be done better later if it gets more high level
2585 * components in it. If so just link td->td_proc here.
2587 proc_linkup0(&proc0, &thread0);
2589 metadata_missing = 0;
2590 if (xen_start_info->mod_start) {
2591 preload_metadata = (caddr_t)xen_start_info->mod_start;
2592 preload_bootstrap_relocate(KERNBASE);
2594 metadata_missing = 1;
2597 kern_envp = static_env;
2598 else if ((caddr_t)xen_start_info->cmd_line)
2599 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2601 boothowto |= xen_boothowto(kern_envp);
2603 /* Init basic tunables, hz etc */
2607 * XEN occupies a portion of the upper virtual address space
2608 * At its base it manages an array mapping machine page frames
2609 * to physical page frames - hence we need to be able to
2610 * access 4GB - (64MB - 4MB + 64k)
2612 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2613 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2614 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2615 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2616 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2617 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2618 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2619 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2622 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2623 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2625 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2626 bzero(gdt, PAGE_SIZE);
2627 for (x = 0; x < NGDT; x++)
2628 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2630 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2632 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2633 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2634 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2638 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2639 panic("set_trap_table failed - error %d\n", error);
2642 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2644 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2645 #if CONFIG_XEN_COMPAT <= 0x030002
2646 if (error == -ENOXENSYS)
2647 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2648 (unsigned long)Xhypervisor_callback,
2649 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2651 pcpu_init(pc, 0, sizeof(struct pcpu));
2652 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2653 pmap_kenter(pa + KERNBASE, pa);
2654 dpcpu_init((void *)(first + KERNBASE), 0);
2655 first += DPCPU_SIZE;
2656 physfree += DPCPU_SIZE;
2657 init_first += DPCPU_SIZE / PAGE_SIZE;
2659 PCPU_SET(prvspace, pc);
2660 PCPU_SET(curthread, &thread0);
2661 PCPU_SET(curpcb, thread0.td_pcb);
2664 * Initialize mutexes.
2666 * icu_lock: in order to allow an interrupt to occur in a critical
2667 * section, to set pcpu->ipending (etc...) properly, we
2668 * must be able to get the icu lock, so it can't be
2672 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2674 /* make ldt memory segments */
2675 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2676 bzero(ldt, PAGE_SIZE);
2677 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2678 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2679 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2680 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2682 default_proc_ldt.ldt_base = (caddr_t)ldt;
2683 default_proc_ldt.ldt_len = 6;
2684 _default_ldt = (int)&default_proc_ldt;
2685 PCPU_SET(currentldt, _default_ldt);
2686 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2687 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2689 #if defined(XEN_PRIVILEGED)
2691 * Initialize the i8254 before the console so that console
2692 * initialization can use DELAY().
2698 * Initialize the console before we print anything out.
2702 if (metadata_missing)
2703 printf("WARNING: loader(8) metadata is missing!\n");
2710 /* Reset and mask the atpics and leave them shut down. */
2714 * Point the ICU spurious interrupt vectors at the APIC spurious
2715 * interrupt handler.
2717 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2718 GSEL(GCODE_SEL, SEL_KPL));
2719 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2720 GSEL(GCODE_SEL, SEL_KPL));
2725 ksym_start = bootinfo.bi_symtab;
2726 ksym_end = bootinfo.bi_esymtab;
2732 if (boothowto & RB_KDB)
2733 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2736 finishidentcpu(); /* Final stage of CPU initialization */
2737 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2738 GSEL(GCODE_SEL, SEL_KPL));
2739 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2740 GSEL(GCODE_SEL, SEL_KPL));
2741 initializecpu(); /* Initialize CPU registers */
2743 /* make an initial tss so cpu can get interrupt stack on syscall! */
2744 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2745 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2746 kstack0_sz - sizeof(struct pcb) - 16);
2747 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2748 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2749 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2750 PCPU_GET(common_tss.tss_esp0));
2752 /* pointer to selector slot for %fs/%gs */
2753 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2755 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2756 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2757 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2758 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2760 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2762 dblfault_tss.tss_cr3 = (int)IdlePTD;
2764 dblfault_tss.tss_eip = (int)dblfault_handler;
2765 dblfault_tss.tss_eflags = PSL_KERNEL;
2766 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2767 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2768 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2769 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2770 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2774 init_param2(physmem);
2776 /* now running on new page tables, configured,and u/iom is accessible */
2778 msgbufinit(msgbufp, msgbufsize);
2779 /* transfer to user mode */
2781 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2782 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2784 /* setup proc 0's pcb */
2785 thread0.td_pcb->pcb_flags = 0;
2787 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2789 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2791 thread0.td_pcb->pcb_ext = 0;
2792 thread0.td_frame = &proc0_tf;
2793 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2794 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2804 struct gate_descriptor *gdp;
2805 int gsel_tss, metadata_missing, x, pa;
2809 thread0.td_kstack = proc0kstack;
2810 thread0.td_kstack_pages = KSTACK_PAGES;
2811 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2812 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2815 * This may be done better later if it gets more high level
2816 * components in it. If so just link td->td_proc here.
2818 proc_linkup0(&proc0, &thread0);
2820 metadata_missing = 0;
2821 if (bootinfo.bi_modulep) {
2822 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2823 preload_bootstrap_relocate(KERNBASE);
2825 metadata_missing = 1;
2828 kern_envp = static_env;
2829 else if (bootinfo.bi_envp)
2830 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2832 /* Init basic tunables, hz etc */
2836 * Make gdt memory segments. All segments cover the full 4GB
2837 * of address space and permissions are enforced at page level.
2839 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2840 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2841 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2842 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2843 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2844 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2847 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2848 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2849 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2851 for (x = 0; x < NGDT; x++)
2852 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2854 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2855 r_gdt.rd_base = (int) gdt;
2856 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2859 pcpu_init(pc, 0, sizeof(struct pcpu));
2860 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2861 pmap_kenter(pa + KERNBASE, pa);
2862 dpcpu_init((void *)(first + KERNBASE), 0);
2863 first += DPCPU_SIZE;
2864 PCPU_SET(prvspace, pc);
2865 PCPU_SET(curthread, &thread0);
2866 PCPU_SET(curpcb, thread0.td_pcb);
2869 * Initialize mutexes.
2871 * icu_lock: in order to allow an interrupt to occur in a critical
2872 * section, to set pcpu->ipending (etc...) properly, we
2873 * must be able to get the icu lock, so it can't be
2877 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2879 /* make ldt memory segments */
2880 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2881 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2882 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2883 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2885 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2887 PCPU_SET(currentldt, _default_ldt);
2890 for (x = 0; x < NIDT; x++)
2891 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2892 GSEL(GCODE_SEL, SEL_KPL));
2893 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2894 GSEL(GCODE_SEL, SEL_KPL));
2895 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2896 GSEL(GCODE_SEL, SEL_KPL));
2897 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2898 GSEL(GCODE_SEL, SEL_KPL));
2899 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2900 GSEL(GCODE_SEL, SEL_KPL));
2901 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2902 GSEL(GCODE_SEL, SEL_KPL));
2903 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2904 GSEL(GCODE_SEL, SEL_KPL));
2905 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2906 GSEL(GCODE_SEL, SEL_KPL));
2907 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2908 , GSEL(GCODE_SEL, SEL_KPL));
2909 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2910 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2911 GSEL(GCODE_SEL, SEL_KPL));
2912 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2913 GSEL(GCODE_SEL, SEL_KPL));
2914 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2915 GSEL(GCODE_SEL, SEL_KPL));
2916 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2917 GSEL(GCODE_SEL, SEL_KPL));
2918 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2919 GSEL(GCODE_SEL, SEL_KPL));
2920 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2921 GSEL(GCODE_SEL, SEL_KPL));
2922 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2923 GSEL(GCODE_SEL, SEL_KPL));
2924 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2925 GSEL(GCODE_SEL, SEL_KPL));
2926 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2927 GSEL(GCODE_SEL, SEL_KPL));
2928 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2929 GSEL(GCODE_SEL, SEL_KPL));
2930 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2931 GSEL(GCODE_SEL, SEL_KPL));
2932 #ifdef KDTRACE_HOOKS
2933 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2934 GSEL(GCODE_SEL, SEL_KPL));
2937 setidt(IDT_EVTCHN, &IDTVEC(xen_intr_upcall), SDT_SYS386IGT, SEL_UPL,
2938 GSEL(GCODE_SEL, SEL_KPL));
2941 r_idt.rd_limit = sizeof(idt0) - 1;
2942 r_idt.rd_base = (int) idt;
2947 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2948 * This should be 0x10de / 0x02a5.
2950 * This is exactly what Linux does.
2952 outl(0xcf8, 0x80000000);
2953 if (inl(0xcfc) == 0x02a510de) {
2954 arch_i386_is_xbox = 1;
2955 pic16l_setled(XBOX_LED_GREEN);
2958 * We are an XBOX, but we may have either 64MB or 128MB of
2959 * memory. The PCI host bridge should be programmed for this,
2960 * so we just query it.
2962 outl(0xcf8, 0x80000084);
2963 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2968 * Initialize the i8254 before the console so that console
2969 * initialization can use DELAY().
2974 * Initialize the console before we print anything out.
2978 if (metadata_missing)
2979 printf("WARNING: loader(8) metadata is missing!\n");
2986 /* Reset and mask the atpics and leave them shut down. */
2990 * Point the ICU spurious interrupt vectors at the APIC spurious
2991 * interrupt handler.
2993 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2994 GSEL(GCODE_SEL, SEL_KPL));
2995 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2996 GSEL(GCODE_SEL, SEL_KPL));
3001 ksym_start = bootinfo.bi_symtab;
3002 ksym_end = bootinfo.bi_esymtab;
3008 if (boothowto & RB_KDB)
3009 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
3012 finishidentcpu(); /* Final stage of CPU initialization */
3013 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
3014 GSEL(GCODE_SEL, SEL_KPL));
3015 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
3016 GSEL(GCODE_SEL, SEL_KPL));
3017 initializecpu(); /* Initialize CPU registers */
3019 /* make an initial tss so cpu can get interrupt stack on syscall! */
3020 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
3021 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
3022 kstack0_sz - sizeof(struct pcb) - 16);
3023 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
3024 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
3025 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
3026 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
3027 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
3030 /* pointer to selector slot for %fs/%gs */
3031 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
3033 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
3034 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
3035 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
3036 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
3038 dblfault_tss.tss_cr3 = (int)IdlePDPT;
3040 dblfault_tss.tss_cr3 = (int)IdlePTD;
3042 dblfault_tss.tss_eip = (int)dblfault_handler;
3043 dblfault_tss.tss_eflags = PSL_KERNEL;
3044 dblfault_tss.tss_ds = dblfault_tss.tss_es =
3045 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
3046 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
3047 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
3048 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
3052 init_param2(physmem);
3054 /* now running on new page tables, configured,and u/iom is accessible */
3056 msgbufinit(msgbufp, msgbufsize);
3058 /* make a call gate to reenter kernel with */
3059 gdp = &ldt[LSYS5CALLS_SEL].gd;
3061 x = (int) &IDTVEC(lcall_syscall);
3062 gdp->gd_looffset = x;
3063 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
3065 gdp->gd_type = SDT_SYS386CGT;
3066 gdp->gd_dpl = SEL_UPL;
3068 gdp->gd_hioffset = x >> 16;
3070 /* XXX does this work? */
3072 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
3073 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
3075 /* transfer to user mode */
3077 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
3078 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
3080 /* setup proc 0's pcb */
3081 thread0.td_pcb->pcb_flags = 0;
3083 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
3085 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
3087 thread0.td_pcb->pcb_ext = 0;
3088 thread0.td_frame = &proc0_tf;
3099 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
3102 pcpu->pc_acpi_id = 0xffffffff;
3106 spinlock_enter(void)
3112 if (td->td_md.md_spinlock_count == 0) {
3113 flags = intr_disable();
3114 td->td_md.md_spinlock_count = 1;
3115 td->td_md.md_saved_flags = flags;
3117 td->td_md.md_spinlock_count++;
3129 flags = td->td_md.md_saved_flags;
3130 td->td_md.md_spinlock_count--;
3131 if (td->td_md.md_spinlock_count == 0)
3132 intr_restore(flags);
3135 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3136 static void f00f_hack(void *unused);
3137 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3140 f00f_hack(void *unused)
3142 struct gate_descriptor *new_idt;
3150 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3152 tmp = kmem_malloc(kernel_arena, PAGE_SIZE * 2, M_WAITOK | M_ZERO);
3154 panic("kmem_malloc returned 0");
3156 /* Put the problematic entry (#6) at the end of the lower page. */
3157 new_idt = (struct gate_descriptor*)
3158 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3159 bcopy(idt, new_idt, sizeof(idt0));
3160 r_idt.rd_base = (u_int)new_idt;
3163 pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
3165 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3168 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3169 * we want to start a backtrace from the function that caused us to enter
3170 * the debugger. We have the context in the trapframe, but base the trace
3171 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3172 * enough for a backtrace.
3175 makectx(struct trapframe *tf, struct pcb *pcb)
3178 pcb->pcb_edi = tf->tf_edi;
3179 pcb->pcb_esi = tf->tf_esi;
3180 pcb->pcb_ebp = tf->tf_ebp;
3181 pcb->pcb_ebx = tf->tf_ebx;
3182 pcb->pcb_eip = tf->tf_eip;
3183 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3187 ptrace_set_pc(struct thread *td, u_long addr)
3190 td->td_frame->tf_eip = addr;
3195 ptrace_single_step(struct thread *td)
3197 td->td_frame->tf_eflags |= PSL_T;
3202 ptrace_clear_single_step(struct thread *td)
3204 td->td_frame->tf_eflags &= ~PSL_T;
3209 fill_regs(struct thread *td, struct reg *regs)
3212 struct trapframe *tp;
3216 regs->r_gs = pcb->pcb_gs;
3217 return (fill_frame_regs(tp, regs));
3221 fill_frame_regs(struct trapframe *tp, struct reg *regs)
3223 regs->r_fs = tp->tf_fs;
3224 regs->r_es = tp->tf_es;
3225 regs->r_ds = tp->tf_ds;
3226 regs->r_edi = tp->tf_edi;
3227 regs->r_esi = tp->tf_esi;
3228 regs->r_ebp = tp->tf_ebp;
3229 regs->r_ebx = tp->tf_ebx;
3230 regs->r_edx = tp->tf_edx;
3231 regs->r_ecx = tp->tf_ecx;
3232 regs->r_eax = tp->tf_eax;
3233 regs->r_eip = tp->tf_eip;
3234 regs->r_cs = tp->tf_cs;
3235 regs->r_eflags = tp->tf_eflags;
3236 regs->r_esp = tp->tf_esp;
3237 regs->r_ss = tp->tf_ss;
3242 set_regs(struct thread *td, struct reg *regs)
3245 struct trapframe *tp;
3248 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3249 !CS_SECURE(regs->r_cs))
3252 tp->tf_fs = regs->r_fs;
3253 tp->tf_es = regs->r_es;
3254 tp->tf_ds = regs->r_ds;
3255 tp->tf_edi = regs->r_edi;
3256 tp->tf_esi = regs->r_esi;
3257 tp->tf_ebp = regs->r_ebp;
3258 tp->tf_ebx = regs->r_ebx;
3259 tp->tf_edx = regs->r_edx;
3260 tp->tf_ecx = regs->r_ecx;
3261 tp->tf_eax = regs->r_eax;
3262 tp->tf_eip = regs->r_eip;
3263 tp->tf_cs = regs->r_cs;
3264 tp->tf_eflags = regs->r_eflags;
3265 tp->tf_esp = regs->r_esp;
3266 tp->tf_ss = regs->r_ss;
3267 pcb->pcb_gs = regs->r_gs;
3271 #ifdef CPU_ENABLE_SSE
3273 fill_fpregs_xmm(sv_xmm, sv_87)
3274 struct savexmm *sv_xmm;
3275 struct save87 *sv_87;
3277 register struct env87 *penv_87 = &sv_87->sv_env;
3278 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3281 bzero(sv_87, sizeof(*sv_87));
3283 /* FPU control/status */
3284 penv_87->en_cw = penv_xmm->en_cw;
3285 penv_87->en_sw = penv_xmm->en_sw;
3286 penv_87->en_tw = penv_xmm->en_tw;
3287 penv_87->en_fip = penv_xmm->en_fip;
3288 penv_87->en_fcs = penv_xmm->en_fcs;
3289 penv_87->en_opcode = penv_xmm->en_opcode;
3290 penv_87->en_foo = penv_xmm->en_foo;
3291 penv_87->en_fos = penv_xmm->en_fos;
3294 for (i = 0; i < 8; ++i)
3295 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3299 set_fpregs_xmm(sv_87, sv_xmm)
3300 struct save87 *sv_87;
3301 struct savexmm *sv_xmm;
3303 register struct env87 *penv_87 = &sv_87->sv_env;
3304 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3307 /* FPU control/status */
3308 penv_xmm->en_cw = penv_87->en_cw;
3309 penv_xmm->en_sw = penv_87->en_sw;
3310 penv_xmm->en_tw = penv_87->en_tw;
3311 penv_xmm->en_fip = penv_87->en_fip;
3312 penv_xmm->en_fcs = penv_87->en_fcs;
3313 penv_xmm->en_opcode = penv_87->en_opcode;
3314 penv_xmm->en_foo = penv_87->en_foo;
3315 penv_xmm->en_fos = penv_87->en_fos;
3318 for (i = 0; i < 8; ++i)
3319 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3321 #endif /* CPU_ENABLE_SSE */
3324 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3327 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
3328 P_SHOULDSTOP(td->td_proc),
3329 ("not suspended thread %p", td));
3333 bzero(fpregs, sizeof(*fpregs));
3335 #ifdef CPU_ENABLE_SSE
3337 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3338 (struct save87 *)fpregs);
3340 #endif /* CPU_ENABLE_SSE */
3341 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
3347 set_fpregs(struct thread *td, struct fpreg *fpregs)
3350 #ifdef CPU_ENABLE_SSE
3352 set_fpregs_xmm((struct save87 *)fpregs,
3353 &td->td_pcb->pcb_user_save.sv_xmm);
3355 #endif /* CPU_ENABLE_SSE */
3356 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
3365 * Get machine context.
3368 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3370 struct trapframe *tp;
3371 struct segment_descriptor *sdp;
3375 PROC_LOCK(curthread->td_proc);
3376 mcp->mc_onstack = sigonstack(tp->tf_esp);
3377 PROC_UNLOCK(curthread->td_proc);
3378 mcp->mc_gs = td->td_pcb->pcb_gs;
3379 mcp->mc_fs = tp->tf_fs;
3380 mcp->mc_es = tp->tf_es;
3381 mcp->mc_ds = tp->tf_ds;
3382 mcp->mc_edi = tp->tf_edi;
3383 mcp->mc_esi = tp->tf_esi;
3384 mcp->mc_ebp = tp->tf_ebp;
3385 mcp->mc_isp = tp->tf_isp;
3386 mcp->mc_eflags = tp->tf_eflags;
3387 if (flags & GET_MC_CLEAR_RET) {
3390 mcp->mc_eflags &= ~PSL_C;
3392 mcp->mc_eax = tp->tf_eax;
3393 mcp->mc_edx = tp->tf_edx;
3395 mcp->mc_ebx = tp->tf_ebx;
3396 mcp->mc_ecx = tp->tf_ecx;
3397 mcp->mc_eip = tp->tf_eip;
3398 mcp->mc_cs = tp->tf_cs;
3399 mcp->mc_esp = tp->tf_esp;
3400 mcp->mc_ss = tp->tf_ss;
3401 mcp->mc_len = sizeof(*mcp);
3402 get_fpcontext(td, mcp);
3403 sdp = &td->td_pcb->pcb_fsd;
3404 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3405 sdp = &td->td_pcb->pcb_gsd;
3406 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3408 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
3413 * Set machine context.
3415 * However, we don't set any but the user modifiable flags, and we won't
3416 * touch the cs selector.
3419 set_mcontext(struct thread *td, const mcontext_t *mcp)
3421 struct trapframe *tp;
3425 if (mcp->mc_len != sizeof(*mcp))
3427 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3428 (tp->tf_eflags & ~PSL_USERCHANGE);
3429 if ((ret = set_fpcontext(td, mcp)) == 0) {
3430 tp->tf_fs = mcp->mc_fs;
3431 tp->tf_es = mcp->mc_es;
3432 tp->tf_ds = mcp->mc_ds;
3433 tp->tf_edi = mcp->mc_edi;
3434 tp->tf_esi = mcp->mc_esi;
3435 tp->tf_ebp = mcp->mc_ebp;
3436 tp->tf_ebx = mcp->mc_ebx;
3437 tp->tf_edx = mcp->mc_edx;
3438 tp->tf_ecx = mcp->mc_ecx;
3439 tp->tf_eax = mcp->mc_eax;
3440 tp->tf_eip = mcp->mc_eip;
3441 tp->tf_eflags = eflags;
3442 tp->tf_esp = mcp->mc_esp;
3443 tp->tf_ss = mcp->mc_ss;
3444 td->td_pcb->pcb_gs = mcp->mc_gs;
3451 get_fpcontext(struct thread *td, mcontext_t *mcp)
3455 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3456 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3457 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
3459 mcp->mc_ownedfp = npxgetregs(td);
3460 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate[0],
3461 sizeof(mcp->mc_fpstate));
3462 mcp->mc_fpformat = npxformat();
3467 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3470 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3472 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3473 mcp->mc_fpformat != _MC_FPFMT_XMM)
3475 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3476 /* We don't care what state is left in the FPU or PCB. */
3478 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3479 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3481 #ifdef CPU_ENABLE_SSE
3483 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
3484 en_mxcsr &= cpu_mxcsr_mask;
3486 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
3494 fpstate_drop(struct thread *td)
3497 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3500 if (PCPU_GET(fpcurthread) == td)
3504 * XXX force a full drop of the npx. The above only drops it if we
3505 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3507 * XXX I don't much like npxgetregs()'s semantics of doing a full
3508 * drop. Dropping only to the pcb matches fnsave's behaviour.
3509 * We only need to drop to !PCB_INITDONE in sendsig(). But
3510 * sendsig() is the only caller of npxgetregs()... perhaps we just
3511 * have too many layers.
3513 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3514 PCB_NPXUSERINITDONE);
3519 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3524 dbregs->dr[0] = rdr0();
3525 dbregs->dr[1] = rdr1();
3526 dbregs->dr[2] = rdr2();
3527 dbregs->dr[3] = rdr3();
3528 dbregs->dr[4] = rdr4();
3529 dbregs->dr[5] = rdr5();
3530 dbregs->dr[6] = rdr6();
3531 dbregs->dr[7] = rdr7();
3534 dbregs->dr[0] = pcb->pcb_dr0;
3535 dbregs->dr[1] = pcb->pcb_dr1;
3536 dbregs->dr[2] = pcb->pcb_dr2;
3537 dbregs->dr[3] = pcb->pcb_dr3;
3540 dbregs->dr[6] = pcb->pcb_dr6;
3541 dbregs->dr[7] = pcb->pcb_dr7;
3547 set_dbregs(struct thread *td, struct dbreg *dbregs)
3553 load_dr0(dbregs->dr[0]);
3554 load_dr1(dbregs->dr[1]);
3555 load_dr2(dbregs->dr[2]);
3556 load_dr3(dbregs->dr[3]);
3557 load_dr4(dbregs->dr[4]);
3558 load_dr5(dbregs->dr[5]);
3559 load_dr6(dbregs->dr[6]);
3560 load_dr7(dbregs->dr[7]);
3563 * Don't let an illegal value for dr7 get set. Specifically,
3564 * check for undefined settings. Setting these bit patterns
3565 * result in undefined behaviour and can lead to an unexpected
3568 for (i = 0; i < 4; i++) {
3569 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3571 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3578 * Don't let a process set a breakpoint that is not within the
3579 * process's address space. If a process could do this, it
3580 * could halt the system by setting a breakpoint in the kernel
3581 * (if ddb was enabled). Thus, we need to check to make sure
3582 * that no breakpoints are being enabled for addresses outside
3583 * process's address space.
3585 * XXX - what about when the watched area of the user's
3586 * address space is written into from within the kernel
3587 * ... wouldn't that still cause a breakpoint to be generated
3588 * from within kernel mode?
3591 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3592 /* dr0 is enabled */
3593 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3597 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3598 /* dr1 is enabled */
3599 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3603 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3604 /* dr2 is enabled */
3605 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3609 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3610 /* dr3 is enabled */
3611 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3615 pcb->pcb_dr0 = dbregs->dr[0];
3616 pcb->pcb_dr1 = dbregs->dr[1];
3617 pcb->pcb_dr2 = dbregs->dr[2];
3618 pcb->pcb_dr3 = dbregs->dr[3];
3619 pcb->pcb_dr6 = dbregs->dr[6];
3620 pcb->pcb_dr7 = dbregs->dr[7];
3622 pcb->pcb_flags |= PCB_DBREGS;
3629 * Return > 0 if a hardware breakpoint has been hit, and the
3630 * breakpoint was in user space. Return 0, otherwise.
3633 user_dbreg_trap(void)
3635 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3636 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3637 int nbp; /* number of breakpoints that triggered */
3638 caddr_t addr[4]; /* breakpoint addresses */
3642 if ((dr7 & 0x000000ff) == 0) {
3644 * all GE and LE bits in the dr7 register are zero,
3645 * thus the trap couldn't have been caused by the
3646 * hardware debug registers
3653 bp = dr6 & 0x0000000f;
3657 * None of the breakpoint bits are set meaning this
3658 * trap was not caused by any of the debug registers
3664 * at least one of the breakpoints were hit, check to see
3665 * which ones and if any of them are user space addresses
3669 addr[nbp++] = (caddr_t)rdr0();
3672 addr[nbp++] = (caddr_t)rdr1();
3675 addr[nbp++] = (caddr_t)rdr2();
3678 addr[nbp++] = (caddr_t)rdr3();
3681 for (i = 0; i < nbp; i++) {
3682 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3684 * addr[i] is in user space
3691 * None of the breakpoints are in user space.
3699 * Provide inb() and outb() as functions. They are normally only available as
3700 * inline functions, thus cannot be called from the debugger.
3703 /* silence compiler warnings */
3704 u_char inb_(u_short);
3705 void outb_(u_short, u_char);
3714 outb_(u_short port, u_char data)