2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005-2010 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
109 #include "opt_xbox.h"
111 #include <sys/param.h>
112 #include <sys/systm.h>
113 #include <sys/kernel.h>
115 #include <sys/lock.h>
116 #include <sys/malloc.h>
117 #include <sys/mman.h>
118 #include <sys/msgbuf.h>
119 #include <sys/mutex.h>
120 #include <sys/proc.h>
121 #include <sys/sf_buf.h>
123 #include <sys/vmmeter.h>
124 #include <sys/sched.h>
125 #include <sys/sysctl.h>
129 #include <sys/cpuset.h>
133 #include <vm/vm_param.h>
134 #include <vm/vm_kern.h>
135 #include <vm/vm_page.h>
136 #include <vm/vm_map.h>
137 #include <vm/vm_object.h>
138 #include <vm/vm_extern.h>
139 #include <vm/vm_pageout.h>
140 #include <vm/vm_pager.h>
141 #include <vm/vm_reserv.h>
144 #include <machine/cpu.h>
145 #include <machine/cputypes.h>
146 #include <machine/md_var.h>
147 #include <machine/pcb.h>
148 #include <machine/specialreg.h>
150 #include <machine/smp.h>
154 #include <machine/xbox.h>
157 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
158 #define CPU_ENABLE_SSE
161 #ifndef PMAP_SHPGPERPROC
162 #define PMAP_SHPGPERPROC 200
165 #if !defined(DIAGNOSTIC)
166 #ifdef __GNUC_GNU_INLINE__
167 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
169 #define PMAP_INLINE extern inline
177 #define PV_STAT(x) do { x ; } while (0)
179 #define PV_STAT(x) do { } while (0)
182 #define pa_index(pa) ((pa) >> PDRSHIFT)
183 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
186 * Get PDEs and PTEs for user/kernel address space
188 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
189 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
191 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
192 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
193 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
194 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
195 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
197 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
198 atomic_clear_int((u_int *)(pte), PG_W))
199 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
201 struct pmap kernel_pmap_store;
202 LIST_HEAD(pmaplist, pmap);
203 static struct pmaplist allpmaps;
204 static struct mtx allpmaps_lock;
206 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
207 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
208 int pgeflag = 0; /* PG_G or-in */
209 int pseflag = 0; /* PG_PS or-in */
211 static int nkpt = NKPT;
212 vm_offset_t kernel_vm_end = KERNBASE + NKPT * NBPDR;
213 extern u_int32_t KERNend;
214 extern u_int32_t KPTphys;
218 static uma_zone_t pdptzone;
221 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
223 static int pat_works = 1;
224 SYSCTL_INT(_vm_pmap, OID_AUTO, pat_works, CTLFLAG_RD, &pat_works, 1,
225 "Is page attribute table fully functional?");
227 static int pg_ps_enabled = 1;
228 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0,
229 "Are large page mappings enabled?");
231 #define PAT_INDEX_SIZE 8
232 static int pat_index[PAT_INDEX_SIZE]; /* cache mode to PAT index conversion */
235 * Data for the pv entry allocation mechanism
237 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
238 static struct md_page *pv_table;
239 static int shpgperproc = PMAP_SHPGPERPROC;
241 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
242 int pv_maxchunks; /* How many chunks we have KVA for */
243 vm_offset_t pv_vafree; /* freelist stored in the PTE */
246 * All those kernel PT submaps that BSD is so fond of
255 static struct sysmaps sysmaps_pcpu[MAXCPU];
256 pt_entry_t *CMAP1 = 0;
257 static pt_entry_t *CMAP3;
258 static pd_entry_t *KPTD;
259 caddr_t CADDR1 = 0, ptvmmap = 0;
260 static caddr_t CADDR3;
261 struct msgbuf *msgbufp = 0;
266 static caddr_t crashdumpmap;
268 static pt_entry_t *PMAP1 = 0, *PMAP2;
269 static pt_entry_t *PADDR1 = 0, *PADDR2;
272 static int PMAP1changedcpu;
273 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
275 "Number of times pmap_pte_quick changed CPU with same PMAP1");
277 static int PMAP1changed;
278 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
280 "Number of times pmap_pte_quick changed PMAP1");
281 static int PMAP1unchanged;
282 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
284 "Number of times pmap_pte_quick didn't change PMAP1");
285 static struct mtx PMAP2mutex;
287 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
288 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
289 static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
290 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
291 static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
292 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
293 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
295 static int pmap_pvh_wired_mappings(struct md_page *pvh, int count);
297 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
298 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
300 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
301 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
302 static void pmap_flush_page(vm_page_t m);
303 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
304 static void pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte);
305 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
306 static boolean_t pmap_is_referenced_pvh(struct md_page *pvh);
307 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
308 static void pmap_kenter_pde(vm_offset_t va, pd_entry_t newpde);
309 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
310 static void pmap_pde_attr(pd_entry_t *pde, int cache_bits);
311 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
312 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
314 static void pmap_pte_attr(pt_entry_t *pte, int cache_bits);
315 static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
317 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
319 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
320 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
322 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
324 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
325 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
327 static void pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde,
329 static void pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde);
331 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
333 static vm_page_t _pmap_allocpte(pmap_t pmap, u_int ptepindex, int flags);
334 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
335 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
336 static void pmap_pte_release(pt_entry_t *pte);
337 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
339 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
341 static void pmap_set_pg(void);
343 static __inline void pagezero(void *page);
345 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
346 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
349 * If you get an error here, then you set KVA_PAGES wrong! See the
350 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
351 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
353 CTASSERT(KERNBASE % (1 << 24) == 0);
356 * Bootstrap the system enough to run with virtual memory.
358 * On the i386 this is called after mapping has already been enabled
359 * and just syncs the pmap module with what has already been done.
360 * [We can't call it easily with mapping off since the kernel is not
361 * mapped with PA == VA, hence we would have to relocate every address
362 * from the linked base (virtual) address "KERNBASE" to the actual
363 * (physical) address starting relative to 0]
366 pmap_bootstrap(vm_paddr_t firstaddr)
369 pt_entry_t *pte, *unused;
370 struct sysmaps *sysmaps;
374 * Initialize the first available kernel virtual address. However,
375 * using "firstaddr" may waste a few pages of the kernel virtual
376 * address space, because locore may not have mapped every physical
377 * page that it allocated. Preferably, locore would provide a first
378 * unused virtual address in addition to "firstaddr".
380 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
382 virtual_end = VM_MAX_KERNEL_ADDRESS;
385 * Initialize the kernel pmap (which is statically allocated).
387 PMAP_LOCK_INIT(kernel_pmap);
388 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
390 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
392 kernel_pmap->pm_root = NULL;
393 CPU_FILL(&kernel_pmap->pm_active); /* don't allow deactivation */
394 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
395 LIST_INIT(&allpmaps);
398 * Request a spin mutex so that changes to allpmaps cannot be
399 * preempted by smp_rendezvous_cpus(). Otherwise,
400 * pmap_update_pde_kernel() could access allpmaps while it is
403 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
404 mtx_lock_spin(&allpmaps_lock);
405 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
406 mtx_unlock_spin(&allpmaps_lock);
409 * Reserve some special page table entries/VA space for temporary
412 #define SYSMAP(c, p, v, n) \
413 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
419 * CMAP1/CMAP2 are used for zeroing and copying pages.
420 * CMAP3 is used for the idle process page zeroing.
422 for (i = 0; i < MAXCPU; i++) {
423 sysmaps = &sysmaps_pcpu[i];
424 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
425 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
426 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
428 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
429 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
434 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
437 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
439 SYSMAP(caddr_t, unused, ptvmmap, 1)
442 * msgbufp is used to map the system message buffer.
444 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(msgbufsize)))
447 * KPTmap is used by pmap_kextract().
449 * KPTmap is first initialized by locore. However, that initial
450 * KPTmap can only support NKPT page table pages. Here, a larger
451 * KPTmap is created that can support KVA_PAGES page table pages.
453 SYSMAP(pt_entry_t *, KPTD, KPTmap, KVA_PAGES)
455 for (i = 0; i < NKPT; i++)
456 KPTD[i] = (KPTphys + (i << PAGE_SHIFT)) | pgeflag | PG_RW | PG_V;
459 * Adjust the start of the KPTD and KPTmap so that the implementation
460 * of pmap_kextract() and pmap_growkernel() can be made simpler.
463 KPTmap -= i386_btop(KPTDI << PDRSHIFT);
466 * ptemap is used for pmap_pte_quick
468 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1)
469 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1)
471 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
476 * Leave in place an identity mapping (virt == phys) for the low 1 MB
477 * physical memory region that is used by the ACPI wakeup code. This
478 * mapping must not have PG_G set.
481 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
482 * an early stadium, we cannot yet neatly map video memory ... :-(
483 * Better fixes are very welcome! */
484 if (!arch_i386_is_xbox)
486 for (i = 1; i < NKPT; i++)
489 /* Initialize the PAT MSR if present. */
492 /* Turn on PG_G on kernel page(s) */
502 int pat_table[PAT_INDEX_SIZE];
507 /* Set default PAT index table. */
508 for (i = 0; i < PAT_INDEX_SIZE; i++)
510 pat_table[PAT_WRITE_BACK] = 0;
511 pat_table[PAT_WRITE_THROUGH] = 1;
512 pat_table[PAT_UNCACHEABLE] = 3;
513 pat_table[PAT_WRITE_COMBINING] = 3;
514 pat_table[PAT_WRITE_PROTECTED] = 3;
515 pat_table[PAT_UNCACHED] = 3;
517 /* Bail if this CPU doesn't implement PAT. */
518 if ((cpu_feature & CPUID_PAT) == 0) {
519 for (i = 0; i < PAT_INDEX_SIZE; i++)
520 pat_index[i] = pat_table[i];
526 * Due to some Intel errata, we can only safely use the lower 4
529 * Intel Pentium III Processor Specification Update
530 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
533 * Intel Pentium IV Processor Specification Update
534 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
536 if (cpu_vendor_id == CPU_VENDOR_INTEL &&
537 !(CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe))
540 /* Initialize default PAT entries. */
541 pat_msr = PAT_VALUE(0, PAT_WRITE_BACK) |
542 PAT_VALUE(1, PAT_WRITE_THROUGH) |
543 PAT_VALUE(2, PAT_UNCACHED) |
544 PAT_VALUE(3, PAT_UNCACHEABLE) |
545 PAT_VALUE(4, PAT_WRITE_BACK) |
546 PAT_VALUE(5, PAT_WRITE_THROUGH) |
547 PAT_VALUE(6, PAT_UNCACHED) |
548 PAT_VALUE(7, PAT_UNCACHEABLE);
552 * Leave the indices 0-3 at the default of WB, WT, UC-, and UC.
553 * Program 5 and 6 as WP and WC.
554 * Leave 4 and 7 as WB and UC.
556 pat_msr &= ~(PAT_MASK(5) | PAT_MASK(6));
557 pat_msr |= PAT_VALUE(5, PAT_WRITE_PROTECTED) |
558 PAT_VALUE(6, PAT_WRITE_COMBINING);
559 pat_table[PAT_UNCACHED] = 2;
560 pat_table[PAT_WRITE_PROTECTED] = 5;
561 pat_table[PAT_WRITE_COMBINING] = 6;
564 * Just replace PAT Index 2 with WC instead of UC-.
566 pat_msr &= ~PAT_MASK(2);
567 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
568 pat_table[PAT_WRITE_COMBINING] = 2;
573 load_cr4(cr4 & ~CR4_PGE);
575 /* Disable caches (CD = 1, NW = 0). */
577 load_cr0((cr0 & ~CR0_NW) | CR0_CD);
579 /* Flushes caches and TLBs. */
583 /* Update PAT and index table. */
584 wrmsr(MSR_PAT, pat_msr);
585 for (i = 0; i < PAT_INDEX_SIZE; i++)
586 pat_index[i] = pat_table[i];
588 /* Flush caches and TLBs again. */
592 /* Restore caches and PGE. */
598 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
604 vm_offset_t va, endva;
609 endva = KERNBASE + KERNend;
612 va = KERNBASE + KERNLOAD;
614 pdir_pde(PTD, va) |= pgeflag;
615 invltlb(); /* Play it safe, invltlb() every time */
619 va = (vm_offset_t)btext;
624 invltlb(); /* Play it safe, invltlb() every time */
631 * Initialize a vm_page's machine-dependent fields.
634 pmap_page_init(vm_page_t m)
637 TAILQ_INIT(&m->md.pv_list);
638 m->md.pat_mode = PAT_WRITE_BACK;
643 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
646 /* Inform UMA that this allocator uses kernel_map/object. */
647 *flags = UMA_SLAB_KERNEL;
648 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
649 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
654 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
656 * - Must deal with pages in order to ensure that none of the PG_* bits
657 * are ever set, PG_V in particular.
658 * - Assumes we can write to ptes without pte_store() atomic ops, even
659 * on PAE systems. This should be ok.
660 * - Assumes nothing will ever test these addresses for 0 to indicate
661 * no mapping instead of correctly checking PG_V.
662 * - Assumes a vm_offset_t will fit in a pte (true for i386).
663 * Because PG_V is never set, there can be no mappings to invalidate.
666 pmap_ptelist_alloc(vm_offset_t *head)
673 return (va); /* Out of memory */
677 panic("pmap_ptelist_alloc: va with PG_V set!");
683 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
688 panic("pmap_ptelist_free: freeing va with PG_V set!");
690 *pte = *head; /* virtual! PG_V is 0 though */
695 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
701 for (i = npages - 1; i >= 0; i--) {
702 va = (vm_offset_t)base + i * PAGE_SIZE;
703 pmap_ptelist_free(head, va);
709 * Initialize the pmap module.
710 * Called by vm_init, to initialize any structures that the pmap
711 * system needs to map virtual memory.
721 * Initialize the vm page array entries for the kernel pmap's
724 for (i = 0; i < NKPT; i++) {
725 mpte = PHYS_TO_VM_PAGE(KPTphys + (i << PAGE_SHIFT));
726 KASSERT(mpte >= vm_page_array &&
727 mpte < &vm_page_array[vm_page_array_size],
728 ("pmap_init: page table page is out of range"));
729 mpte->pindex = i + KPTDI;
730 mpte->phys_addr = KPTphys + (i << PAGE_SHIFT);
734 * Initialize the address space (zone) for the pv entries. Set a
735 * high water mark so that the system can recover from excessive
736 * numbers of pv entries.
738 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
739 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
740 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
741 pv_entry_max = roundup(pv_entry_max, _NPCPV);
742 pv_entry_high_water = 9 * (pv_entry_max / 10);
745 * If the kernel is running in a virtual machine on an AMD Family 10h
746 * processor, then it must assume that MCA is enabled by the virtual
749 if (vm_guest == VM_GUEST_VM && cpu_vendor_id == CPU_VENDOR_AMD &&
750 CPUID_TO_FAMILY(cpu_id) == 0x10)
751 workaround_erratum383 = 1;
754 * Are large page mappings supported and enabled?
756 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
759 else if (pg_ps_enabled) {
760 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
761 ("pmap_init: can't assign to pagesizes[1]"));
762 pagesizes[1] = NBPDR;
766 * Calculate the size of the pv head table for superpages.
768 for (i = 0; phys_avail[i + 1]; i += 2);
769 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
772 * Allocate memory for the pv head table for superpages.
774 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
776 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
777 for (i = 0; i < pv_npg; i++)
778 TAILQ_INIT(&pv_table[i].pv_list);
780 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
781 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
782 PAGE_SIZE * pv_maxchunks);
783 if (pv_chunkbase == NULL)
784 panic("pmap_init: not enough kvm for pv chunks");
785 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
787 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
788 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
789 UMA_ZONE_VM | UMA_ZONE_NOFREE);
790 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
795 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
796 "Max number of PV entries");
797 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
798 "Page share factor per proc");
800 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
801 "2/4MB page mapping counters");
803 static u_long pmap_pde_demotions;
804 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
805 &pmap_pde_demotions, 0, "2/4MB page demotions");
807 static u_long pmap_pde_mappings;
808 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
809 &pmap_pde_mappings, 0, "2/4MB page mappings");
811 static u_long pmap_pde_p_failures;
812 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
813 &pmap_pde_p_failures, 0, "2/4MB page promotion failures");
815 static u_long pmap_pde_promotions;
816 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
817 &pmap_pde_promotions, 0, "2/4MB page promotions");
819 /***************************************************
820 * Low level helper routines.....
821 ***************************************************/
824 * Determine the appropriate bits to set in a PTE or PDE for a specified
828 pmap_cache_bits(int mode, boolean_t is_pde)
830 int cache_bits, pat_flag, pat_idx;
832 if (mode < 0 || mode >= PAT_INDEX_SIZE || pat_index[mode] < 0)
833 panic("Unknown caching mode %d\n", mode);
835 /* The PAT bit is different for PTE's and PDE's. */
836 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
838 /* Map the caching mode to a PAT index. */
839 pat_idx = pat_index[mode];
841 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
844 cache_bits |= pat_flag;
846 cache_bits |= PG_NC_PCD;
848 cache_bits |= PG_NC_PWT;
853 * The caller is responsible for maintaining TLB consistency.
856 pmap_kenter_pde(vm_offset_t va, pd_entry_t newpde)
860 boolean_t PTD_updated;
863 mtx_lock_spin(&allpmaps_lock);
864 LIST_FOREACH(pmap, &allpmaps, pm_list) {
865 if ((pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] &
868 pde = pmap_pde(pmap, va);
869 pde_store(pde, newpde);
871 mtx_unlock_spin(&allpmaps_lock);
873 ("pmap_kenter_pde: current page table is not in allpmaps"));
877 * After changing the page size for the specified virtual address in the page
878 * table, flush the corresponding entries from the processor's TLB. Only the
879 * calling processor's TLB is affected.
881 * The calling thread must be pinned to a processor.
884 pmap_update_pde_invalidate(vm_offset_t va, pd_entry_t newpde)
888 if ((newpde & PG_PS) == 0)
889 /* Demotion: flush a specific 2MB page mapping. */
891 else if ((newpde & PG_G) == 0)
893 * Promotion: flush every 4KB page mapping from the TLB
894 * because there are too many to flush individually.
899 * Promotion: flush every 4KB page mapping from the TLB,
900 * including any global (PG_G) mappings.
903 load_cr4(cr4 & ~CR4_PGE);
905 * Although preemption at this point could be detrimental to
906 * performance, it would not lead to an error. PG_G is simply
907 * ignored if CR4.PGE is clear. Moreover, in case this block
908 * is re-entered, the load_cr4() either above or below will
909 * modify CR4.PGE flushing the TLB.
911 load_cr4(cr4 | CR4_PGE);
916 * For SMP, these functions have to use the IPI mechanism for coherence.
918 * N.B.: Before calling any of the following TLB invalidation functions,
919 * the calling processor must ensure that all stores updating a non-
920 * kernel page table are globally performed. Otherwise, another
921 * processor could cache an old, pre-update entry without being
922 * invalidated. This can happen one of two ways: (1) The pmap becomes
923 * active on another processor after its pm_active field is checked by
924 * one of the following functions but before a store updating the page
925 * table is globally performed. (2) The pmap becomes active on another
926 * processor before its pm_active field is checked but due to
927 * speculative loads one of the following functions stills reads the
928 * pmap as inactive on the other processor.
930 * The kernel page table is exempt because its pm_active field is
931 * immutable. The kernel page table is always active on every
935 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
941 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
945 cpuid = PCPU_GET(cpuid);
946 other_cpus = all_cpus;
947 CPU_CLR(cpuid, &other_cpus);
948 if (CPU_ISSET(cpuid, &pmap->pm_active))
950 CPU_AND(&other_cpus, &pmap->pm_active);
951 if (!CPU_EMPTY(&other_cpus))
952 smp_masked_invlpg(other_cpus, va);
958 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
965 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
966 for (addr = sva; addr < eva; addr += PAGE_SIZE)
968 smp_invlpg_range(sva, eva);
970 cpuid = PCPU_GET(cpuid);
971 other_cpus = all_cpus;
972 CPU_CLR(cpuid, &other_cpus);
973 if (CPU_ISSET(cpuid, &pmap->pm_active))
974 for (addr = sva; addr < eva; addr += PAGE_SIZE)
976 CPU_AND(&other_cpus, &pmap->pm_active);
977 if (!CPU_EMPTY(&other_cpus))
978 smp_masked_invlpg_range(other_cpus, sva, eva);
984 pmap_invalidate_all(pmap_t pmap)
990 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
994 cpuid = PCPU_GET(cpuid);
995 other_cpus = all_cpus;
996 CPU_CLR(cpuid, &other_cpus);
997 if (CPU_ISSET(cpuid, &pmap->pm_active))
999 CPU_AND(&other_cpus, &pmap->pm_active);
1000 if (!CPU_EMPTY(&other_cpus))
1001 smp_masked_invltlb(other_cpus);
1007 pmap_invalidate_cache(void)
1017 cpuset_t invalidate; /* processors that invalidate their TLB */
1021 u_int store; /* processor that updates the PDE */
1025 pmap_update_pde_kernel(void *arg)
1027 struct pde_action *act = arg;
1031 if (act->store == PCPU_GET(cpuid)) {
1034 * Elsewhere, this operation requires allpmaps_lock for
1035 * synchronization. Here, it does not because it is being
1036 * performed in the context of an all_cpus rendezvous.
1038 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1039 pde = pmap_pde(pmap, act->va);
1040 pde_store(pde, act->newpde);
1046 pmap_update_pde_user(void *arg)
1048 struct pde_action *act = arg;
1050 if (act->store == PCPU_GET(cpuid))
1051 pde_store(act->pde, act->newpde);
1055 pmap_update_pde_teardown(void *arg)
1057 struct pde_action *act = arg;
1059 if (CPU_ISSET(PCPU_GET(cpuid), &act->invalidate))
1060 pmap_update_pde_invalidate(act->va, act->newpde);
1064 * Change the page size for the specified virtual address in a way that
1065 * prevents any possibility of the TLB ever having two entries that map the
1066 * same virtual address using different page sizes. This is the recommended
1067 * workaround for Erratum 383 on AMD Family 10h processors. It prevents a
1068 * machine check exception for a TLB state that is improperly diagnosed as a
1072 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
1074 struct pde_action act;
1075 cpuset_t active, other_cpus;
1079 cpuid = PCPU_GET(cpuid);
1080 other_cpus = all_cpus;
1081 CPU_CLR(cpuid, &other_cpus);
1082 if (pmap == kernel_pmap)
1085 active = pmap->pm_active;
1086 if (CPU_OVERLAP(&active, &other_cpus)) {
1088 act.invalidate = active;
1091 act.newpde = newpde;
1092 CPU_SET(cpuid, &active);
1093 smp_rendezvous_cpus(active,
1094 smp_no_rendevous_barrier, pmap == kernel_pmap ?
1095 pmap_update_pde_kernel : pmap_update_pde_user,
1096 pmap_update_pde_teardown, &act);
1098 if (pmap == kernel_pmap)
1099 pmap_kenter_pde(va, newpde);
1101 pde_store(pde, newpde);
1102 if (CPU_ISSET(cpuid, &active))
1103 pmap_update_pde_invalidate(va, newpde);
1109 * Normal, non-SMP, 486+ invalidation functions.
1110 * We inline these within pmap.c for speed.
1113 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
1116 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
1121 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1125 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
1126 for (addr = sva; addr < eva; addr += PAGE_SIZE)
1131 pmap_invalidate_all(pmap_t pmap)
1134 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
1139 pmap_invalidate_cache(void)
1146 pmap_update_pde(pmap_t pmap, vm_offset_t va, pd_entry_t *pde, pd_entry_t newpde)
1149 if (pmap == kernel_pmap)
1150 pmap_kenter_pde(va, newpde);
1152 pde_store(pde, newpde);
1153 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
1154 pmap_update_pde_invalidate(va, newpde);
1158 #define PMAP_CLFLUSH_THRESHOLD (2 * 1024 * 1024)
1161 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
1164 KASSERT((sva & PAGE_MASK) == 0,
1165 ("pmap_invalidate_cache_range: sva not page-aligned"));
1166 KASSERT((eva & PAGE_MASK) == 0,
1167 ("pmap_invalidate_cache_range: eva not page-aligned"));
1169 if (cpu_feature & CPUID_SS)
1170 ; /* If "Self Snoop" is supported, do nothing. */
1171 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
1172 eva - sva < PMAP_CLFLUSH_THRESHOLD) {
1175 * Otherwise, do per-cache line flush. Use the mfence
1176 * instruction to insure that previous stores are
1177 * included in the write-back. The processor
1178 * propagates flush to other processors in the cache
1182 for (; sva < eva; sva += cpu_clflush_line_size)
1188 * No targeted cache flush methods are supported by CPU,
1189 * or the supplied range is bigger than 2MB.
1190 * Globally invalidate cache.
1192 pmap_invalidate_cache();
1197 pmap_invalidate_cache_pages(vm_page_t *pages, int count)
1201 if (count >= PMAP_CLFLUSH_THRESHOLD / PAGE_SIZE ||
1202 (cpu_feature & CPUID_CLFSH) == 0) {
1203 pmap_invalidate_cache();
1205 for (i = 0; i < count; i++)
1206 pmap_flush_page(pages[i]);
1211 * Are we current address space or kernel? N.B. We return FALSE when
1212 * a pmap's page table is in use because a kernel thread is borrowing
1213 * it. The borrowed page table can change spontaneously, making any
1214 * dependence on its continued use subject to a race condition.
1217 pmap_is_current(pmap_t pmap)
1220 return (pmap == kernel_pmap ||
1221 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
1222 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
1226 * If the given pmap is not the current or kernel pmap, the returned pte must
1227 * be released by passing it to pmap_pte_release().
1230 pmap_pte(pmap_t pmap, vm_offset_t va)
1235 pde = pmap_pde(pmap, va);
1239 /* are we current address space or kernel? */
1240 if (pmap_is_current(pmap))
1241 return (vtopte(va));
1242 mtx_lock(&PMAP2mutex);
1243 newpf = *pde & PG_FRAME;
1244 if ((*PMAP2 & PG_FRAME) != newpf) {
1245 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
1246 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
1248 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1254 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1257 static __inline void
1258 pmap_pte_release(pt_entry_t *pte)
1261 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
1262 mtx_unlock(&PMAP2mutex);
1265 static __inline void
1266 invlcaddr(void *caddr)
1269 invlpg((u_int)caddr);
1273 * Super fast pmap_pte routine best used when scanning
1274 * the pv lists. This eliminates many coarse-grained
1275 * invltlb calls. Note that many of the pv list
1276 * scans are across different pmaps. It is very wasteful
1277 * to do an entire invltlb for checking a single mapping.
1279 * If the given pmap is not the current pmap, vm_page_queue_mtx
1280 * must be held and curthread pinned to a CPU.
1283 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1288 pde = pmap_pde(pmap, va);
1292 /* are we current address space or kernel? */
1293 if (pmap_is_current(pmap))
1294 return (vtopte(va));
1295 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1296 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1297 newpf = *pde & PG_FRAME;
1298 if ((*PMAP1 & PG_FRAME) != newpf) {
1299 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
1301 PMAP1cpu = PCPU_GET(cpuid);
1307 if (PMAP1cpu != PCPU_GET(cpuid)) {
1308 PMAP1cpu = PCPU_GET(cpuid);
1314 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1320 * Routine: pmap_extract
1322 * Extract the physical page address associated
1323 * with the given map/virtual_address pair.
1326 pmap_extract(pmap_t pmap, vm_offset_t va)
1334 pde = pmap->pm_pdir[va >> PDRSHIFT];
1336 if ((pde & PG_PS) != 0)
1337 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
1339 pte = pmap_pte(pmap, va);
1340 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1341 pmap_pte_release(pte);
1349 * Routine: pmap_extract_and_hold
1351 * Atomically extract and hold the physical page
1352 * with the given pmap and virtual address pair
1353 * if that mapping permits the given protection.
1356 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1359 pt_entry_t pte, *ptep;
1367 pde = *pmap_pde(pmap, va);
1370 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1371 if (vm_page_pa_tryrelock(pmap, (pde &
1372 PG_PS_FRAME) | (va & PDRMASK), &pa))
1374 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1379 ptep = pmap_pte(pmap, va);
1381 pmap_pte_release(ptep);
1383 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1384 if (vm_page_pa_tryrelock(pmap, pte & PG_FRAME,
1387 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1397 /***************************************************
1398 * Low level mapping routines.....
1399 ***************************************************/
1402 * Add a wired page to the kva.
1403 * Note: not SMP coherent.
1405 * This function may be used before pmap_bootstrap() is called.
1408 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1413 pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1416 static __inline void
1417 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1422 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1426 * Remove a page from the kernel pagetables.
1427 * Note: not SMP coherent.
1429 * This function may be used before pmap_bootstrap() is called.
1432 pmap_kremove(vm_offset_t va)
1441 * Used to map a range of physical addresses into kernel
1442 * virtual address space.
1444 * The value passed in '*virt' is a suggested virtual address for
1445 * the mapping. Architectures which can support a direct-mapped
1446 * physical to virtual region can return the appropriate address
1447 * within that region, leaving '*virt' unchanged. Other
1448 * architectures should map the pages starting at '*virt' and
1449 * update '*virt' with the first usable address after the mapped
1453 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1455 vm_offset_t va, sva;
1458 while (start < end) {
1459 pmap_kenter(va, start);
1463 pmap_invalidate_range(kernel_pmap, sva, va);
1470 * Add a list of wired pages to the kva
1471 * this routine is only used for temporary
1472 * kernel mappings that do not need to have
1473 * page modification or references recorded.
1474 * Note that old mappings are simply written
1475 * over. The page *must* be wired.
1476 * Note: SMP coherent. Uses a ranged shootdown IPI.
1479 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1481 pt_entry_t *endpte, oldpte, pa, *pte;
1486 endpte = pte + count;
1487 while (pte < endpte) {
1489 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
1490 if ((*pte & (PG_FRAME | PG_PTE_CACHE)) != pa) {
1492 pte_store(pte, pa | pgeflag | PG_RW | PG_V);
1496 if (__predict_false((oldpte & PG_V) != 0))
1497 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1502 * This routine tears out page mappings from the
1503 * kernel -- it is meant only for temporary mappings.
1504 * Note: SMP coherent. Uses a ranged shootdown IPI.
1507 pmap_qremove(vm_offset_t sva, int count)
1512 while (count-- > 0) {
1516 pmap_invalidate_range(kernel_pmap, sva, va);
1519 /***************************************************
1520 * Page table page management routines.....
1521 ***************************************************/
1522 static __inline void
1523 pmap_free_zero_pages(vm_page_t free)
1527 while (free != NULL) {
1530 /* Preserve the page's PG_ZERO setting. */
1531 vm_page_free_toq(m);
1536 * Schedule the specified unused page table page to be freed. Specifically,
1537 * add the page to the specified list of pages that will be released to the
1538 * physical memory manager after the TLB has been updated.
1540 static __inline void
1541 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
1545 m->flags |= PG_ZERO;
1547 m->flags &= ~PG_ZERO;
1553 * Inserts the specified page table page into the specified pmap's collection
1554 * of idle page table pages. Each of a pmap's page table pages is responsible
1555 * for mapping a distinct range of virtual addresses. The pmap's collection is
1556 * ordered by this virtual address range.
1559 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
1563 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1564 root = pmap->pm_root;
1569 root = vm_page_splay(mpte->pindex, root);
1570 if (mpte->pindex < root->pindex) {
1571 mpte->left = root->left;
1574 } else if (mpte->pindex == root->pindex)
1575 panic("pmap_insert_pt_page: pindex already inserted");
1577 mpte->right = root->right;
1582 pmap->pm_root = mpte;
1586 * Looks for a page table page mapping the specified virtual address in the
1587 * specified pmap's collection of idle page table pages. Returns NULL if there
1588 * is no page table page corresponding to the specified virtual address.
1591 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
1594 vm_pindex_t pindex = va >> PDRSHIFT;
1596 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1597 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
1598 mpte = vm_page_splay(pindex, mpte);
1599 if ((pmap->pm_root = mpte)->pindex != pindex)
1606 * Removes the specified page table page from the specified pmap's collection
1607 * of idle page table pages. The specified page table page must be a member of
1608 * the pmap's collection.
1611 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
1615 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1616 if (mpte != pmap->pm_root)
1617 vm_page_splay(mpte->pindex, pmap->pm_root);
1618 if (mpte->left == NULL)
1621 root = vm_page_splay(mpte->pindex, mpte->left);
1622 root->right = mpte->right;
1624 pmap->pm_root = root;
1628 * This routine unholds page table pages, and if the hold count
1629 * drops to zero, then it decrements the wire count.
1632 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1636 if (m->wire_count == 0)
1637 return (_pmap_unwire_pte_hold(pmap, m, free));
1643 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1648 * unmap the page table page
1650 pmap->pm_pdir[m->pindex] = 0;
1651 --pmap->pm_stats.resident_count;
1654 * This is a release store so that the ordinary store unmapping
1655 * the page table page is globally performed before TLB shoot-
1658 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1661 * Do an invltlb to make the invalidated mapping
1662 * take effect immediately.
1664 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1665 pmap_invalidate_page(pmap, pteva);
1668 * Put page on a list so that it is released after
1669 * *ALL* TLB shootdown is done
1671 pmap_add_delayed_free_list(m, free, TRUE);
1677 * After removing a page table entry, this routine is used to
1678 * conditionally free the page, and manage the hold/wire counts.
1681 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1686 if (va >= VM_MAXUSER_ADDRESS)
1688 ptepde = *pmap_pde(pmap, va);
1689 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1690 return (pmap_unwire_pte_hold(pmap, mpte, free));
1694 * Initialize the pmap for the swapper process.
1697 pmap_pinit0(pmap_t pmap)
1700 PMAP_LOCK_INIT(pmap);
1702 * Since the page table directory is shared with the kernel pmap,
1703 * which is already included in the list "allpmaps", this pmap does
1704 * not need to be inserted into that list.
1706 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1708 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1710 pmap->pm_root = NULL;
1711 CPU_ZERO(&pmap->pm_active);
1712 PCPU_SET(curpmap, pmap);
1713 TAILQ_INIT(&pmap->pm_pvchunk);
1714 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1718 * Initialize a preallocated and zeroed pmap structure,
1719 * such as one in a vmspace structure.
1722 pmap_pinit(pmap_t pmap)
1724 vm_page_t m, ptdpg[NPGPTD];
1729 PMAP_LOCK_INIT(pmap);
1732 * No need to allocate page table space yet but we do need a valid
1733 * page directory table.
1735 if (pmap->pm_pdir == NULL) {
1736 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1738 if (pmap->pm_pdir == NULL) {
1739 PMAP_LOCK_DESTROY(pmap);
1743 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1744 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1745 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1746 ("pmap_pinit: pdpt misaligned"));
1747 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1748 ("pmap_pinit: pdpt above 4g"));
1750 pmap->pm_root = NULL;
1752 KASSERT(pmap->pm_root == NULL,
1753 ("pmap_pinit: pmap has reserved page table page(s)"));
1756 * allocate the page directory page(s)
1758 for (i = 0; i < NPGPTD;) {
1759 m = vm_page_alloc(NULL, color++,
1760 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1769 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1771 for (i = 0; i < NPGPTD; i++)
1772 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1773 pagezero(pmap->pm_pdir + (i * NPDEPG));
1775 mtx_lock_spin(&allpmaps_lock);
1776 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1777 /* Copy the kernel page table directory entries. */
1778 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1779 mtx_unlock_spin(&allpmaps_lock);
1781 /* install self-referential address mapping entry(s) */
1782 for (i = 0; i < NPGPTD; i++) {
1783 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1784 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1786 pmap->pm_pdpt[i] = pa | PG_V;
1790 CPU_ZERO(&pmap->pm_active);
1791 TAILQ_INIT(&pmap->pm_pvchunk);
1792 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1798 * this routine is called if the page table page is not
1802 _pmap_allocpte(pmap_t pmap, u_int ptepindex, int flags)
1807 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1808 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1809 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1812 * Allocate a page table page.
1814 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1815 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1816 if (flags & M_WAITOK) {
1818 vm_page_unlock_queues();
1820 vm_page_lock_queues();
1825 * Indicate the need to retry. While waiting, the page table
1826 * page may have been allocated.
1830 if ((m->flags & PG_ZERO) == 0)
1834 * Map the pagetable page into the process address space, if
1835 * it isn't already there.
1838 pmap->pm_stats.resident_count++;
1840 ptepa = VM_PAGE_TO_PHYS(m);
1841 pmap->pm_pdir[ptepindex] =
1842 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1848 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1854 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1855 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1856 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1859 * Calculate pagetable page index
1861 ptepindex = va >> PDRSHIFT;
1864 * Get the page directory entry
1866 ptepa = pmap->pm_pdir[ptepindex];
1869 * This supports switching from a 4MB page to a
1872 if (ptepa & PG_PS) {
1873 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va);
1874 ptepa = pmap->pm_pdir[ptepindex];
1878 * If the page table page is mapped, we just increment the
1879 * hold count, and activate it.
1882 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
1886 * Here if the pte page isn't mapped, or if it has
1889 m = _pmap_allocpte(pmap, ptepindex, flags);
1890 if (m == NULL && (flags & M_WAITOK))
1897 /***************************************************
1898 * Pmap allocation/deallocation routines.
1899 ***************************************************/
1903 * Deal with a SMP shootdown of other users of the pmap that we are
1904 * trying to dispose of. This can be a bit hairy.
1906 static cpuset_t *lazymask;
1907 static u_int lazyptd;
1908 static volatile u_int lazywait;
1910 void pmap_lazyfix_action(void);
1913 pmap_lazyfix_action(void)
1917 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1919 if (rcr3() == lazyptd)
1920 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1921 CPU_CLR_ATOMIC(PCPU_GET(cpuid), lazymask);
1922 atomic_store_rel_int(&lazywait, 1);
1926 pmap_lazyfix_self(u_int cpuid)
1929 if (rcr3() == lazyptd)
1930 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1931 CPU_CLR_ATOMIC(cpuid, lazymask);
1936 pmap_lazyfix(pmap_t pmap)
1938 cpuset_t mymask, mask;
1942 mask = pmap->pm_active;
1943 while (!CPU_EMPTY(&mask)) {
1946 /* Find least significant set bit. */
1947 lsb = cpusetobj_ffs(&mask);
1950 CPU_SETOF(lsb, &mask);
1951 mtx_lock_spin(&smp_ipi_mtx);
1953 lazyptd = vtophys(pmap->pm_pdpt);
1955 lazyptd = vtophys(pmap->pm_pdir);
1957 cpuid = PCPU_GET(cpuid);
1959 /* Use a cpuset just for having an easy check. */
1960 CPU_SETOF(cpuid, &mymask);
1961 if (!CPU_CMP(&mask, &mymask)) {
1962 lazymask = &pmap->pm_active;
1963 pmap_lazyfix_self(cpuid);
1965 atomic_store_rel_int((u_int *)&lazymask,
1966 (u_int)&pmap->pm_active);
1967 atomic_store_rel_int(&lazywait, 0);
1968 ipi_selected(mask, IPI_LAZYPMAP);
1969 while (lazywait == 0) {
1975 mtx_unlock_spin(&smp_ipi_mtx);
1977 printf("pmap_lazyfix: spun for 50000000\n");
1978 mask = pmap->pm_active;
1985 * Cleaning up on uniprocessor is easy. For various reasons, we're
1986 * unlikely to have to even execute this code, including the fact
1987 * that the cleanup is deferred until the parent does a wait(2), which
1988 * means that another userland process has run.
1991 pmap_lazyfix(pmap_t pmap)
1995 cr3 = vtophys(pmap->pm_pdir);
1996 if (cr3 == rcr3()) {
1997 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1998 CPU_CLR(PCPU_GET(cpuid), &pmap->pm_active);
2004 * Release any resources held by the given physical map.
2005 * Called when a pmap initialized by pmap_pinit is being released.
2006 * Should only be called if the map contains no valid mappings.
2009 pmap_release(pmap_t pmap)
2011 vm_page_t m, ptdpg[NPGPTD];
2014 KASSERT(pmap->pm_stats.resident_count == 0,
2015 ("pmap_release: pmap resident count %ld != 0",
2016 pmap->pm_stats.resident_count));
2017 KASSERT(pmap->pm_root == NULL,
2018 ("pmap_release: pmap has reserved page table page(s)"));
2021 mtx_lock_spin(&allpmaps_lock);
2022 LIST_REMOVE(pmap, pm_list);
2023 mtx_unlock_spin(&allpmaps_lock);
2025 for (i = 0; i < NPGPTD; i++)
2026 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] &
2029 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
2030 sizeof(*pmap->pm_pdir));
2032 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
2034 for (i = 0; i < NPGPTD; i++) {
2037 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
2038 ("pmap_release: got wrong ptd page"));
2041 atomic_subtract_int(&cnt.v_wire_count, 1);
2042 vm_page_free_zero(m);
2044 PMAP_LOCK_DESTROY(pmap);
2048 kvm_size(SYSCTL_HANDLER_ARGS)
2050 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
2052 return (sysctl_handle_long(oidp, &ksize, 0, req));
2054 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
2055 0, 0, kvm_size, "IU", "Size of KVM");
2058 kvm_free(SYSCTL_HANDLER_ARGS)
2060 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
2062 return (sysctl_handle_long(oidp, &kfree, 0, req));
2064 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
2065 0, 0, kvm_free, "IU", "Amount of KVM free");
2068 * grow the number of kernel page table entries, if needed
2071 pmap_growkernel(vm_offset_t addr)
2073 vm_paddr_t ptppaddr;
2077 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
2078 addr = roundup2(addr, NBPDR);
2079 if (addr - 1 >= kernel_map->max_offset)
2080 addr = kernel_map->max_offset;
2081 while (kernel_vm_end < addr) {
2082 if (pdir_pde(PTD, kernel_vm_end)) {
2083 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
2084 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2085 kernel_vm_end = kernel_map->max_offset;
2091 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
2092 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
2095 panic("pmap_growkernel: no memory to grow kernel");
2099 if ((nkpg->flags & PG_ZERO) == 0)
2100 pmap_zero_page(nkpg);
2101 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2102 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
2103 pdir_pde(KPTD, kernel_vm_end) = pgeflag | newpdir;
2105 pmap_kenter_pde(kernel_vm_end, newpdir);
2106 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
2107 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
2108 kernel_vm_end = kernel_map->max_offset;
2115 /***************************************************
2116 * page management routines.
2117 ***************************************************/
2119 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
2120 CTASSERT(_NPCM == 11);
2122 static __inline struct pv_chunk *
2123 pv_to_chunk(pv_entry_t pv)
2126 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
2129 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
2131 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
2132 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
2134 static uint32_t pc_freemask[11] = {
2135 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2136 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2137 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
2138 PC_FREE0_9, PC_FREE10
2141 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
2142 "Current number of pv entries");
2145 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
2147 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
2148 "Current number of pv entry chunks");
2149 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
2150 "Current number of pv entry chunks allocated");
2151 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
2152 "Current number of pv entry chunks frees");
2153 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
2154 "Number of times tried to get a chunk page but failed.");
2156 static long pv_entry_frees, pv_entry_allocs;
2157 static int pv_entry_spare;
2159 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
2160 "Current number of pv entry frees");
2161 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
2162 "Current number of pv entry allocs");
2163 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
2164 "Current number of spare pv entries");
2166 static int pmap_collect_inactive, pmap_collect_active;
2168 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
2169 "Current number times pmap_collect called on inactive queue");
2170 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
2171 "Current number times pmap_collect called on active queue");
2175 * We are in a serious low memory condition. Resort to
2176 * drastic measures to free some pages so we can allocate
2177 * another pv entry chunk. This is normally called to
2178 * unmap inactive pages, and if necessary, active pages.
2181 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
2185 pt_entry_t *pte, tpte;
2186 pv_entry_t next_pv, pv;
2191 TAILQ_FOREACH(m, &vpq->pl, pageq) {
2192 if ((m->flags & PG_MARKER) != 0 || m->hold_count || m->busy)
2194 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
2197 /* Avoid deadlock and lock recursion. */
2198 if (pmap > locked_pmap)
2200 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
2202 pmap->pm_stats.resident_count--;
2203 pde = pmap_pde(pmap, va);
2204 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
2205 " a 4mpage in page %p's pv list", m));
2206 pte = pmap_pte_quick(pmap, va);
2207 tpte = pte_load_clear(pte);
2208 KASSERT((tpte & PG_W) == 0,
2209 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
2211 vm_page_aflag_set(m, PGA_REFERENCED);
2212 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2215 pmap_unuse_pt(pmap, va, &free);
2216 pmap_invalidate_page(pmap, va);
2217 pmap_free_zero_pages(free);
2218 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2219 free_pv_entry(pmap, pv);
2220 if (pmap != locked_pmap)
2223 if (TAILQ_EMPTY(&m->md.pv_list) &&
2224 TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list))
2225 vm_page_aflag_clear(m, PGA_WRITEABLE);
2232 * free the pv_entry back to the free list
2235 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2238 struct pv_chunk *pc;
2239 int idx, field, bit;
2241 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2242 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2243 PV_STAT(pv_entry_frees++);
2244 PV_STAT(pv_entry_spare++);
2246 pc = pv_to_chunk(pv);
2247 idx = pv - &pc->pc_pventry[0];
2250 pc->pc_map[field] |= 1ul << bit;
2251 /* move to head of list */
2252 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2253 for (idx = 0; idx < _NPCM; idx++)
2254 if (pc->pc_map[idx] != pc_freemask[idx]) {
2255 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2258 PV_STAT(pv_entry_spare -= _NPCPV);
2259 PV_STAT(pc_chunk_count--);
2260 PV_STAT(pc_chunk_frees++);
2261 /* entire chunk is free, return it */
2262 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2263 pmap_qremove((vm_offset_t)pc, 1);
2264 vm_page_unwire(m, 0);
2266 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2270 * get a new pv_entry, allocating a block from the system
2274 get_pv_entry(pmap_t pmap, int try)
2276 static const struct timeval printinterval = { 60, 0 };
2277 static struct timeval lastprint;
2278 static vm_pindex_t colour;
2279 struct vpgqueues *pq;
2282 struct pv_chunk *pc;
2285 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2286 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2287 PV_STAT(pv_entry_allocs++);
2289 if (pv_entry_count > pv_entry_high_water)
2290 if (ratecheck(&lastprint, &printinterval))
2291 printf("Approaching the limit on PV entries, consider "
2292 "increasing either the vm.pmap.shpgperproc or the "
2293 "vm.pmap.pv_entry_max tunable.\n");
2296 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2298 for (field = 0; field < _NPCM; field++) {
2299 if (pc->pc_map[field]) {
2300 bit = bsfl(pc->pc_map[field]);
2304 if (field < _NPCM) {
2305 pv = &pc->pc_pventry[field * 32 + bit];
2306 pc->pc_map[field] &= ~(1ul << bit);
2307 /* If this was the last item, move it to tail */
2308 for (field = 0; field < _NPCM; field++)
2309 if (pc->pc_map[field] != 0) {
2310 PV_STAT(pv_entry_spare--);
2311 return (pv); /* not full, return */
2313 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2314 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2315 PV_STAT(pv_entry_spare--);
2320 * Access to the ptelist "pv_vafree" is synchronized by the page
2321 * queues lock. If "pv_vafree" is currently non-empty, it will
2322 * remain non-empty until pmap_ptelist_alloc() completes.
2324 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2325 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2326 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2329 PV_STAT(pc_chunk_tryfail++);
2333 * Reclaim pv entries: At first, destroy mappings to
2334 * inactive pages. After that, if a pv chunk entry
2335 * is still needed, destroy mappings to active pages.
2338 PV_STAT(pmap_collect_inactive++);
2339 pq = &vm_page_queues[PQ_INACTIVE];
2340 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2341 PV_STAT(pmap_collect_active++);
2342 pq = &vm_page_queues[PQ_ACTIVE];
2344 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2345 pmap_collect(pmap, pq);
2348 PV_STAT(pc_chunk_count++);
2349 PV_STAT(pc_chunk_allocs++);
2351 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2352 pmap_qenter((vm_offset_t)pc, &m, 1);
2354 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2355 for (field = 1; field < _NPCM; field++)
2356 pc->pc_map[field] = pc_freemask[field];
2357 pv = &pc->pc_pventry[0];
2358 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2359 PV_STAT(pv_entry_spare += _NPCPV - 1);
2363 static __inline pv_entry_t
2364 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2368 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2369 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
2370 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2371 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2379 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2381 struct md_page *pvh;
2383 vm_offset_t va_last;
2386 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2387 KASSERT((pa & PDRMASK) == 0,
2388 ("pmap_pv_demote_pde: pa is not 4mpage aligned"));
2391 * Transfer the 4mpage's pv entry for this mapping to the first
2394 pvh = pa_to_pvh(pa);
2395 va = trunc_4mpage(va);
2396 pv = pmap_pvh_remove(pvh, pmap, va);
2397 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
2398 m = PHYS_TO_VM_PAGE(pa);
2399 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2400 /* Instantiate the remaining NPTEPG - 1 pv entries. */
2401 va_last = va + NBPDR - PAGE_SIZE;
2404 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2405 ("pmap_pv_demote_pde: page %p is not managed", m));
2407 pmap_insert_entry(pmap, va, m);
2408 } while (va < va_last);
2412 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2414 struct md_page *pvh;
2416 vm_offset_t va_last;
2419 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2420 KASSERT((pa & PDRMASK) == 0,
2421 ("pmap_pv_promote_pde: pa is not 4mpage aligned"));
2424 * Transfer the first page's pv entry for this mapping to the
2425 * 4mpage's pv list. Aside from avoiding the cost of a call
2426 * to get_pv_entry(), a transfer avoids the possibility that
2427 * get_pv_entry() calls pmap_collect() and that pmap_collect()
2428 * removes one of the mappings that is being promoted.
2430 m = PHYS_TO_VM_PAGE(pa);
2431 va = trunc_4mpage(va);
2432 pv = pmap_pvh_remove(&m->md, pmap, va);
2433 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
2434 pvh = pa_to_pvh(pa);
2435 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2436 /* Free the remaining NPTEPG - 1 pv entries. */
2437 va_last = va + NBPDR - PAGE_SIZE;
2441 pmap_pvh_free(&m->md, pmap, va);
2442 } while (va < va_last);
2446 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2450 pv = pmap_pvh_remove(pvh, pmap, va);
2451 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2452 free_pv_entry(pmap, pv);
2456 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2458 struct md_page *pvh;
2460 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2461 pmap_pvh_free(&m->md, pmap, va);
2462 if (TAILQ_EMPTY(&m->md.pv_list) && (m->flags & PG_FICTITIOUS) == 0) {
2463 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2464 if (TAILQ_EMPTY(&pvh->pv_list))
2465 vm_page_aflag_clear(m, PGA_WRITEABLE);
2470 * Create a pv entry for page at pa for
2474 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2478 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2479 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2480 pv = get_pv_entry(pmap, FALSE);
2482 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2486 * Conditionally create a pv entry.
2489 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2493 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2494 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2495 if (pv_entry_count < pv_entry_high_water &&
2496 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2498 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2505 * Create the pv entries for each of the pages within a superpage.
2508 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2510 struct md_page *pvh;
2513 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2514 if (pv_entry_count < pv_entry_high_water &&
2515 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2517 pvh = pa_to_pvh(pa);
2518 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2525 * Fills a page table page with mappings to consecutive physical pages.
2528 pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte)
2532 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
2534 newpte += PAGE_SIZE;
2539 * Tries to demote a 2- or 4MB page mapping. If demotion fails, the
2540 * 2- or 4MB page mapping is invalidated.
2543 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2545 pd_entry_t newpde, oldpde;
2546 pt_entry_t *firstpte, newpte;
2548 vm_page_t free, mpte;
2550 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2552 KASSERT((oldpde & (PG_PS | PG_V)) == (PG_PS | PG_V),
2553 ("pmap_demote_pde: oldpde is missing PG_PS and/or PG_V"));
2554 mpte = pmap_lookup_pt_page(pmap, va);
2556 pmap_remove_pt_page(pmap, mpte);
2558 KASSERT((oldpde & PG_W) == 0,
2559 ("pmap_demote_pde: page table page for a wired mapping"
2563 * Invalidate the 2- or 4MB page mapping and return
2564 * "failure" if the mapping was never accessed or the
2565 * allocation of the new page table page fails.
2567 if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc(NULL,
2568 va >> PDRSHIFT, VM_ALLOC_NOOBJ | VM_ALLOC_NORMAL |
2569 VM_ALLOC_WIRED)) == NULL) {
2571 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free);
2572 pmap_invalidate_page(pmap, trunc_4mpage(va));
2573 pmap_free_zero_pages(free);
2574 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x"
2575 " in pmap %p", va, pmap);
2578 if (va < VM_MAXUSER_ADDRESS)
2579 pmap->pm_stats.resident_count++;
2581 mptepa = VM_PAGE_TO_PHYS(mpte);
2584 * If the page mapping is in the kernel's address space, then the
2585 * KPTmap can provide access to the page table page. Otherwise,
2586 * temporarily map the page table page (mpte) into the kernel's
2587 * address space at either PADDR1 or PADDR2.
2590 firstpte = &KPTmap[i386_btop(trunc_4mpage(va))];
2591 else if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) {
2592 if ((*PMAP1 & PG_FRAME) != mptepa) {
2593 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2595 PMAP1cpu = PCPU_GET(cpuid);
2601 if (PMAP1cpu != PCPU_GET(cpuid)) {
2602 PMAP1cpu = PCPU_GET(cpuid);
2610 mtx_lock(&PMAP2mutex);
2611 if ((*PMAP2 & PG_FRAME) != mptepa) {
2612 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2613 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
2617 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
2618 KASSERT((oldpde & PG_A) != 0,
2619 ("pmap_demote_pde: oldpde is missing PG_A"));
2620 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
2621 ("pmap_demote_pde: oldpde is missing PG_M"));
2622 newpte = oldpde & ~PG_PS;
2623 if ((newpte & PG_PDE_PAT) != 0)
2624 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
2627 * If the page table page is new, initialize it.
2629 if (mpte->wire_count == 1) {
2630 mpte->wire_count = NPTEPG;
2631 pmap_fill_ptp(firstpte, newpte);
2633 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
2634 ("pmap_demote_pde: firstpte and newpte map different physical"
2638 * If the mapping has changed attributes, update the page table
2641 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
2642 pmap_fill_ptp(firstpte, newpte);
2645 * Demote the mapping. This pmap is locked. The old PDE has
2646 * PG_A set. If the old PDE has PG_RW set, it also has PG_M
2647 * set. Thus, there is no danger of a race with another
2648 * processor changing the setting of PG_A and/or PG_M between
2649 * the read above and the store below.
2651 if (workaround_erratum383)
2652 pmap_update_pde(pmap, va, pde, newpde);
2653 else if (pmap == kernel_pmap)
2654 pmap_kenter_pde(va, newpde);
2656 pde_store(pde, newpde);
2657 if (firstpte == PADDR2)
2658 mtx_unlock(&PMAP2mutex);
2661 * Invalidate the recursive mapping of the page table page.
2663 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
2666 * Demote the pv entry. This depends on the earlier demotion
2667 * of the mapping. Specifically, the (re)creation of a per-
2668 * page pv entry might trigger the execution of pmap_collect(),
2669 * which might reclaim a newly (re)created per-page pv entry
2670 * and destroy the associated mapping. In order to destroy
2671 * the mapping, the PDE must have already changed from mapping
2672 * the 2mpage to referencing the page table page.
2674 if ((oldpde & PG_MANAGED) != 0)
2675 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
2677 pmap_pde_demotions++;
2678 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x"
2679 " in pmap %p", va, pmap);
2684 * pmap_remove_pde: do the things to unmap a superpage in a process
2687 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
2690 struct md_page *pvh;
2692 vm_offset_t eva, va;
2695 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2696 KASSERT((sva & PDRMASK) == 0,
2697 ("pmap_remove_pde: sva is not 4mpage aligned"));
2698 oldpde = pte_load_clear(pdq);
2700 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
2703 * Machines that don't support invlpg, also don't support
2707 pmap_invalidate_page(kernel_pmap, sva);
2708 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2709 if (oldpde & PG_MANAGED) {
2710 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
2711 pmap_pvh_free(pvh, pmap, sva);
2713 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2714 va < eva; va += PAGE_SIZE, m++) {
2715 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2718 vm_page_aflag_set(m, PGA_REFERENCED);
2719 if (TAILQ_EMPTY(&m->md.pv_list) &&
2720 TAILQ_EMPTY(&pvh->pv_list))
2721 vm_page_aflag_clear(m, PGA_WRITEABLE);
2724 if (pmap == kernel_pmap) {
2725 if (!pmap_demote_pde(pmap, pdq, sva))
2726 panic("pmap_remove_pde: failed demotion");
2728 mpte = pmap_lookup_pt_page(pmap, sva);
2730 pmap_remove_pt_page(pmap, mpte);
2731 pmap->pm_stats.resident_count--;
2732 KASSERT(mpte->wire_count == NPTEPG,
2733 ("pmap_remove_pde: pte page wire count error"));
2734 mpte->wire_count = 0;
2735 pmap_add_delayed_free_list(mpte, free, FALSE);
2736 atomic_subtract_int(&cnt.v_wire_count, 1);
2742 * pmap_remove_pte: do the things to unmap a page in a process
2745 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2750 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2751 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2752 oldpte = pte_load_clear(ptq);
2754 pmap->pm_stats.wired_count -= 1;
2756 * Machines that don't support invlpg, also don't support
2760 pmap_invalidate_page(kernel_pmap, va);
2761 pmap->pm_stats.resident_count -= 1;
2762 if (oldpte & PG_MANAGED) {
2763 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
2764 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2767 vm_page_aflag_set(m, PGA_REFERENCED);
2768 pmap_remove_entry(pmap, m, va);
2770 return (pmap_unuse_pt(pmap, va, free));
2774 * Remove a single page from a process address space
2777 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2781 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2782 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2783 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2784 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2786 pmap_remove_pte(pmap, pte, va, free);
2787 pmap_invalidate_page(pmap, va);
2791 * Remove the given range of addresses from the specified map.
2793 * It is assumed that the start and end are properly
2794 * rounded to the page size.
2797 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2802 vm_page_t free = NULL;
2806 * Perform an unsynchronized read. This is, however, safe.
2808 if (pmap->pm_stats.resident_count == 0)
2813 vm_page_lock_queues();
2818 * special handling of removing one page. a very
2819 * common operation and easy to short circuit some
2822 if ((sva + PAGE_SIZE == eva) &&
2823 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2824 pmap_remove_page(pmap, sva, &free);
2828 for (; sva < eva; sva = pdnxt) {
2832 * Calculate index for next page table.
2834 pdnxt = (sva + NBPDR) & ~PDRMASK;
2837 if (pmap->pm_stats.resident_count == 0)
2840 pdirindex = sva >> PDRSHIFT;
2841 ptpaddr = pmap->pm_pdir[pdirindex];
2844 * Weed out invalid mappings. Note: we assume that the page
2845 * directory table is always allocated, and in kernel virtual.
2851 * Check for large page.
2853 if ((ptpaddr & PG_PS) != 0) {
2855 * Are we removing the entire large page? If not,
2856 * demote the mapping and fall through.
2858 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2860 * The TLB entry for a PG_G mapping is
2861 * invalidated by pmap_remove_pde().
2863 if ((ptpaddr & PG_G) == 0)
2865 pmap_remove_pde(pmap,
2866 &pmap->pm_pdir[pdirindex], sva, &free);
2868 } else if (!pmap_demote_pde(pmap,
2869 &pmap->pm_pdir[pdirindex], sva)) {
2870 /* The large page mapping was destroyed. */
2876 * Limit our scan to either the end of the va represented
2877 * by the current page table page, or to the end of the
2878 * range being removed.
2883 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2889 * The TLB entry for a PG_G mapping is invalidated
2890 * by pmap_remove_pte().
2892 if ((*pte & PG_G) == 0)
2894 if (pmap_remove_pte(pmap, pte, sva, &free))
2901 pmap_invalidate_all(pmap);
2902 vm_page_unlock_queues();
2904 pmap_free_zero_pages(free);
2908 * Routine: pmap_remove_all
2910 * Removes this physical page from
2911 * all physical maps in which it resides.
2912 * Reflects back modify bits to the pager.
2915 * Original versions of this routine were very
2916 * inefficient because they iteratively called
2917 * pmap_remove (slow...)
2921 pmap_remove_all(vm_page_t m)
2923 struct md_page *pvh;
2926 pt_entry_t *pte, tpte;
2931 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2932 ("pmap_remove_all: page %p is not managed", m));
2934 vm_page_lock_queues();
2936 if ((m->flags & PG_FICTITIOUS) != 0)
2937 goto small_mappings;
2938 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2939 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2943 pde = pmap_pde(pmap, va);
2944 (void)pmap_demote_pde(pmap, pde, va);
2948 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2951 pmap->pm_stats.resident_count--;
2952 pde = pmap_pde(pmap, pv->pv_va);
2953 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
2954 " a 4mpage in page %p's pv list", m));
2955 pte = pmap_pte_quick(pmap, pv->pv_va);
2956 tpte = pte_load_clear(pte);
2958 pmap->pm_stats.wired_count--;
2960 vm_page_aflag_set(m, PGA_REFERENCED);
2963 * Update the vm_page_t clean and reference bits.
2965 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2967 pmap_unuse_pt(pmap, pv->pv_va, &free);
2968 pmap_invalidate_page(pmap, pv->pv_va);
2969 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2970 free_pv_entry(pmap, pv);
2973 vm_page_aflag_clear(m, PGA_WRITEABLE);
2975 vm_page_unlock_queues();
2976 pmap_free_zero_pages(free);
2980 * pmap_protect_pde: do the things to protect a 4mpage in a process
2983 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
2985 pd_entry_t newpde, oldpde;
2986 vm_offset_t eva, va;
2988 boolean_t anychanged;
2990 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2991 KASSERT((sva & PDRMASK) == 0,
2992 ("pmap_protect_pde: sva is not 4mpage aligned"));
2995 oldpde = newpde = *pde;
2996 if (oldpde & PG_MANAGED) {
2998 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2999 va < eva; va += PAGE_SIZE, m++)
3000 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
3003 if ((prot & VM_PROT_WRITE) == 0)
3004 newpde &= ~(PG_RW | PG_M);
3006 if ((prot & VM_PROT_EXECUTE) == 0)
3009 if (newpde != oldpde) {
3010 if (!pde_cmpset(pde, oldpde, newpde))
3013 pmap_invalidate_page(pmap, sva);
3017 return (anychanged);
3021 * Set the physical protection on the
3022 * specified range of this map as requested.
3025 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
3032 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
3033 pmap_remove(pmap, sva, eva);
3038 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
3039 (VM_PROT_WRITE|VM_PROT_EXECUTE))
3042 if (prot & VM_PROT_WRITE)
3048 vm_page_lock_queues();
3051 for (; sva < eva; sva = pdnxt) {
3052 pt_entry_t obits, pbits;
3055 pdnxt = (sva + NBPDR) & ~PDRMASK;
3059 pdirindex = sva >> PDRSHIFT;
3060 ptpaddr = pmap->pm_pdir[pdirindex];
3063 * Weed out invalid mappings. Note: we assume that the page
3064 * directory table is always allocated, and in kernel virtual.
3070 * Check for large page.
3072 if ((ptpaddr & PG_PS) != 0) {
3074 * Are we protecting the entire large page? If not,
3075 * demote the mapping and fall through.
3077 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
3079 * The TLB entry for a PG_G mapping is
3080 * invalidated by pmap_protect_pde().
3082 if (pmap_protect_pde(pmap,
3083 &pmap->pm_pdir[pdirindex], sva, prot))
3086 } else if (!pmap_demote_pde(pmap,
3087 &pmap->pm_pdir[pdirindex], sva)) {
3088 /* The large page mapping was destroyed. */
3096 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3102 * Regardless of whether a pte is 32 or 64 bits in
3103 * size, PG_RW, PG_A, and PG_M are among the least
3104 * significant 32 bits.
3106 obits = pbits = *pte;
3107 if ((pbits & PG_V) == 0)
3110 if ((prot & VM_PROT_WRITE) == 0) {
3111 if ((pbits & (PG_MANAGED | PG_M | PG_RW)) ==
3112 (PG_MANAGED | PG_M | PG_RW)) {
3113 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
3116 pbits &= ~(PG_RW | PG_M);
3119 if ((prot & VM_PROT_EXECUTE) == 0)
3123 if (pbits != obits) {
3125 if (!atomic_cmpset_64(pte, obits, pbits))
3128 if (!atomic_cmpset_int((u_int *)pte, obits,
3133 pmap_invalidate_page(pmap, sva);
3141 pmap_invalidate_all(pmap);
3142 vm_page_unlock_queues();
3147 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are
3148 * within a single page table page (PTP) to a single 2- or 4MB page mapping.
3149 * For promotion to occur, two conditions must be met: (1) the 4KB page
3150 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
3151 * mappings must have identical characteristics.
3153 * Managed (PG_MANAGED) mappings within the kernel address space are not
3154 * promoted. The reason is that kernel PDEs are replicated in each pmap but
3155 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel
3159 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
3162 pt_entry_t *firstpte, oldpte, pa, *pte;
3163 vm_offset_t oldpteva;
3166 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3169 * Examine the first PTE in the specified PTP. Abort if this PTE is
3170 * either invalid, unused, or does not map the first 4KB physical page
3171 * within a 2- or 4MB page.
3173 firstpte = pmap_pte_quick(pmap, trunc_4mpage(va));
3176 if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
3177 pmap_pde_p_failures++;
3178 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3179 " in pmap %p", va, pmap);
3182 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) {
3183 pmap_pde_p_failures++;
3184 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3185 " in pmap %p", va, pmap);
3188 if ((newpde & (PG_M | PG_RW)) == PG_RW) {
3190 * When PG_M is already clear, PG_RW can be cleared without
3191 * a TLB invalidation.
3193 if (!atomic_cmpset_int((u_int *)firstpte, newpde, newpde &
3200 * Examine each of the other PTEs in the specified PTP. Abort if this
3201 * PTE maps an unexpected 4KB physical page or does not have identical
3202 * characteristics to the first PTE.
3204 pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
3205 for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
3208 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
3209 pmap_pde_p_failures++;
3210 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3211 " in pmap %p", va, pmap);
3214 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
3216 * When PG_M is already clear, PG_RW can be cleared
3217 * without a TLB invalidation.
3219 if (!atomic_cmpset_int((u_int *)pte, oldpte,
3223 oldpteva = (oldpte & PG_FRAME & PDRMASK) |
3225 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x"
3226 " in pmap %p", oldpteva, pmap);
3228 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
3229 pmap_pde_p_failures++;
3230 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3231 " in pmap %p", va, pmap);
3238 * Save the page table page in its current state until the PDE
3239 * mapping the superpage is demoted by pmap_demote_pde() or
3240 * destroyed by pmap_remove_pde().
3242 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
3243 KASSERT(mpte >= vm_page_array &&
3244 mpte < &vm_page_array[vm_page_array_size],
3245 ("pmap_promote_pde: page table page is out of range"));
3246 KASSERT(mpte->pindex == va >> PDRSHIFT,
3247 ("pmap_promote_pde: page table page's pindex is wrong"));
3248 pmap_insert_pt_page(pmap, mpte);
3251 * Promote the pv entries.
3253 if ((newpde & PG_MANAGED) != 0)
3254 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
3257 * Propagate the PAT index to its proper position.
3259 if ((newpde & PG_PTE_PAT) != 0)
3260 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
3263 * Map the superpage.
3265 if (workaround_erratum383)
3266 pmap_update_pde(pmap, va, pde, PG_PS | newpde);
3267 else if (pmap == kernel_pmap)
3268 pmap_kenter_pde(va, PG_PS | newpde);
3270 pde_store(pde, PG_PS | newpde);
3272 pmap_pde_promotions++;
3273 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x"
3274 " in pmap %p", va, pmap);
3278 * Insert the given physical page (p) at
3279 * the specified virtual address (v) in the
3280 * target physical map with the protection requested.
3282 * If specified, the page will be wired down, meaning
3283 * that the related pte can not be reclaimed.
3285 * NB: This is the only routine which MAY NOT lazy-evaluate
3286 * or lose information. That is, this routine must actually
3287 * insert this page into the given map NOW.
3290 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
3291 vm_prot_t prot, boolean_t wired)
3295 pt_entry_t newpte, origpte;
3301 va = trunc_page(va);
3302 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
3303 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
3304 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)",
3306 KASSERT((m->oflags & (VPO_UNMANAGED | VPO_BUSY)) != 0 ||
3307 VM_OBJECT_LOCKED(m->object),
3308 ("pmap_enter: page %p is not busy", m));
3312 vm_page_lock_queues();
3317 * In the case that a page table page is not
3318 * resident, we are creating it here.
3320 if (va < VM_MAXUSER_ADDRESS) {
3321 mpte = pmap_allocpte(pmap, va, M_WAITOK);
3324 pde = pmap_pde(pmap, va);
3325 if ((*pde & PG_PS) != 0)
3326 panic("pmap_enter: attempted pmap_enter on 4MB page");
3327 pte = pmap_pte_quick(pmap, va);
3330 * Page Directory table entry not valid, we need a new PT page
3333 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
3334 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
3337 pa = VM_PAGE_TO_PHYS(m);
3340 opa = origpte & PG_FRAME;
3343 * Mapping has not changed, must be protection or wiring change.
3345 if (origpte && (opa == pa)) {
3347 * Wiring change, just update stats. We don't worry about
3348 * wiring PT pages as they remain resident as long as there
3349 * are valid mappings in them. Hence, if a user page is wired,
3350 * the PT page will be also.
3352 if (wired && ((origpte & PG_W) == 0))
3353 pmap->pm_stats.wired_count++;
3354 else if (!wired && (origpte & PG_W))
3355 pmap->pm_stats.wired_count--;
3358 * Remove extra pte reference
3363 if (origpte & PG_MANAGED) {
3373 * Mapping has changed, invalidate old range and fall through to
3374 * handle validating new mapping.
3378 pmap->pm_stats.wired_count--;
3379 if (origpte & PG_MANAGED) {
3380 om = PHYS_TO_VM_PAGE(opa);
3381 pv = pmap_pvh_remove(&om->md, pmap, va);
3385 KASSERT(mpte->wire_count > 0,
3386 ("pmap_enter: missing reference to page table page,"
3390 pmap->pm_stats.resident_count++;
3393 * Enter on the PV list if part of our managed memory.
3395 if ((m->oflags & VPO_UNMANAGED) == 0) {
3396 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3397 ("pmap_enter: managed mapping within the clean submap"));
3399 pv = get_pv_entry(pmap, FALSE);
3401 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3403 } else if (pv != NULL)
3404 free_pv_entry(pmap, pv);
3407 * Increment counters
3410 pmap->pm_stats.wired_count++;
3414 * Now validate mapping with desired protection/wiring.
3416 newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
3417 if ((prot & VM_PROT_WRITE) != 0) {
3419 if ((newpte & PG_MANAGED) != 0)
3420 vm_page_aflag_set(m, PGA_WRITEABLE);
3423 if ((prot & VM_PROT_EXECUTE) == 0)
3428 if (va < VM_MAXUSER_ADDRESS)
3430 if (pmap == kernel_pmap)
3434 * if the mapping or permission bits are different, we need
3435 * to update the pte.
3437 if ((origpte & ~(PG_M|PG_A)) != newpte) {
3439 if ((access & VM_PROT_WRITE) != 0)
3441 if (origpte & PG_V) {
3443 origpte = pte_load_store(pte, newpte);
3444 if (origpte & PG_A) {
3445 if (origpte & PG_MANAGED)
3446 vm_page_aflag_set(om, PGA_REFERENCED);
3447 if (opa != VM_PAGE_TO_PHYS(m))
3450 if ((origpte & PG_NX) == 0 &&
3451 (newpte & PG_NX) != 0)
3455 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3456 if ((origpte & PG_MANAGED) != 0)
3458 if ((prot & VM_PROT_WRITE) == 0)
3461 if ((origpte & PG_MANAGED) != 0 &&
3462 TAILQ_EMPTY(&om->md.pv_list) &&
3463 ((om->flags & PG_FICTITIOUS) != 0 ||
3464 TAILQ_EMPTY(&pa_to_pvh(opa)->pv_list)))
3465 vm_page_aflag_clear(om, PGA_WRITEABLE);
3467 pmap_invalidate_page(pmap, va);
3469 pte_store(pte, newpte);
3473 * If both the page table page and the reservation are fully
3474 * populated, then attempt promotion.
3476 if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
3477 pg_ps_enabled && (m->flags & PG_FICTITIOUS) == 0 &&
3478 vm_reserv_level_iffullpop(m) == 0)
3479 pmap_promote_pde(pmap, pde, va);
3482 vm_page_unlock_queues();
3487 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and
3488 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without
3489 * blocking, (2) a mapping already exists at the specified virtual address, or
3490 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3493 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3495 pd_entry_t *pde, newpde;
3497 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3498 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3499 pde = pmap_pde(pmap, va);
3501 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3502 " in pmap %p", va, pmap);
3505 newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
3507 if ((m->oflags & VPO_UNMANAGED) == 0) {
3508 newpde |= PG_MANAGED;
3511 * Abort this mapping if its PV entry could not be created.
3513 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
3514 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3515 " in pmap %p", va, pmap);
3520 if ((prot & VM_PROT_EXECUTE) == 0)
3523 if (va < VM_MAXUSER_ADDRESS)
3527 * Increment counters.
3529 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3532 * Map the superpage.
3534 pde_store(pde, newpde);
3536 pmap_pde_mappings++;
3537 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
3538 " in pmap %p", va, pmap);
3543 * Maps a sequence of resident pages belonging to the same object.
3544 * The sequence begins with the given page m_start. This page is
3545 * mapped at the given virtual address start. Each subsequent page is
3546 * mapped at a virtual address that is offset from start by the same
3547 * amount as the page is offset from m_start within the object. The
3548 * last page in the sequence is the page with the largest offset from
3549 * m_start that can be mapped at a virtual address less than the given
3550 * virtual address end. Not every virtual page between start and end
3551 * is mapped; only those for which a resident page exists with the
3552 * corresponding offset from m_start are mapped.
3555 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3556 vm_page_t m_start, vm_prot_t prot)
3560 vm_pindex_t diff, psize;
3562 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
3563 psize = atop(end - start);
3566 vm_page_lock_queues();
3568 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3569 va = start + ptoa(diff);
3570 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
3571 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
3572 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3573 pmap_enter_pde(pmap, va, m, prot))
3574 m = &m[NBPDR / PAGE_SIZE - 1];
3576 mpte = pmap_enter_quick_locked(pmap, va, m, prot,
3578 m = TAILQ_NEXT(m, listq);
3580 vm_page_unlock_queues();
3585 * this code makes some *MAJOR* assumptions:
3586 * 1. Current pmap & pmap exists.
3589 * 4. No page table pages.
3590 * but is *MUCH* faster than pmap_enter...
3594 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3597 vm_page_lock_queues();
3599 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL);
3600 vm_page_unlock_queues();
3605 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3606 vm_prot_t prot, vm_page_t mpte)
3612 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3613 (m->oflags & VPO_UNMANAGED) != 0,
3614 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3615 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3616 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3619 * In the case that a page table page is not
3620 * resident, we are creating it here.
3622 if (va < VM_MAXUSER_ADDRESS) {
3627 * Calculate pagetable page index
3629 ptepindex = va >> PDRSHIFT;
3630 if (mpte && (mpte->pindex == ptepindex)) {
3634 * Get the page directory entry
3636 ptepa = pmap->pm_pdir[ptepindex];
3639 * If the page table page is mapped, we just increment
3640 * the hold count, and activate it.
3645 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
3648 mpte = _pmap_allocpte(pmap, ptepindex,
3659 * This call to vtopte makes the assumption that we are
3660 * entering the page into the current pmap. In order to support
3661 * quick entry into any pmap, one would likely use pmap_pte_quick.
3662 * But that isn't as quick as vtopte.
3674 * Enter on the PV list if part of our managed memory.
3676 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3677 !pmap_try_insert_pv_entry(pmap, va, m)) {
3680 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3681 pmap_invalidate_page(pmap, va);
3682 pmap_free_zero_pages(free);
3691 * Increment counters
3693 pmap->pm_stats.resident_count++;
3695 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
3697 if ((prot & VM_PROT_EXECUTE) == 0)
3702 * Now validate mapping with RO protection
3704 if ((m->oflags & VPO_UNMANAGED) != 0)
3705 pte_store(pte, pa | PG_V | PG_U);
3707 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3712 * Make a temporary mapping for a physical address. This is only intended
3713 * to be used for panic dumps.
3716 pmap_kenter_temporary(vm_paddr_t pa, int i)
3720 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3721 pmap_kenter(va, pa);
3723 return ((void *)crashdumpmap);
3727 * This code maps large physical mmap regions into the
3728 * processor address space. Note that some shortcuts
3729 * are taken, but the code works.
3732 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3733 vm_pindex_t pindex, vm_size_t size)
3736 vm_paddr_t pa, ptepa;
3740 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3741 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3742 ("pmap_object_init_pt: non-device object"));
3744 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3745 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3747 p = vm_page_lookup(object, pindex);
3748 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3749 ("pmap_object_init_pt: invalid page %p", p));
3750 pat_mode = p->md.pat_mode;
3753 * Abort the mapping if the first page is not physically
3754 * aligned to a 2/4MB page boundary.
3756 ptepa = VM_PAGE_TO_PHYS(p);
3757 if (ptepa & (NBPDR - 1))
3761 * Skip the first page. Abort the mapping if the rest of
3762 * the pages are not physically contiguous or have differing
3763 * memory attributes.
3765 p = TAILQ_NEXT(p, listq);
3766 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3768 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3769 ("pmap_object_init_pt: invalid page %p", p));
3770 if (pa != VM_PAGE_TO_PHYS(p) ||
3771 pat_mode != p->md.pat_mode)
3773 p = TAILQ_NEXT(p, listq);
3777 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3778 * "size" is a multiple of 2/4M, adding the PAT setting to
3779 * "pa" will not affect the termination of this loop.
3782 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3783 size; pa += NBPDR) {
3784 pde = pmap_pde(pmap, addr);
3786 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3787 PG_U | PG_RW | PG_V);
3788 pmap->pm_stats.resident_count += NBPDR /
3790 pmap_pde_mappings++;
3792 /* Else continue on if the PDE is already valid. */
3800 * Routine: pmap_change_wiring
3801 * Function: Change the wiring attribute for a map/virtual-address
3803 * In/out conditions:
3804 * The mapping must already exist in the pmap.
3807 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3811 boolean_t are_queues_locked;
3813 are_queues_locked = FALSE;
3816 pde = pmap_pde(pmap, va);
3817 if ((*pde & PG_PS) != 0) {
3818 if (!wired != ((*pde & PG_W) == 0)) {
3819 if (!are_queues_locked) {
3820 are_queues_locked = TRUE;
3821 if (!mtx_trylock(&vm_page_queue_mtx)) {
3823 vm_page_lock_queues();
3827 if (!pmap_demote_pde(pmap, pde, va))
3828 panic("pmap_change_wiring: demotion failed");
3832 pte = pmap_pte(pmap, va);
3834 if (wired && !pmap_pte_w(pte))
3835 pmap->pm_stats.wired_count++;
3836 else if (!wired && pmap_pte_w(pte))
3837 pmap->pm_stats.wired_count--;
3840 * Wiring is not a hardware characteristic so there is no need to
3843 pmap_pte_set_w(pte, wired);
3844 pmap_pte_release(pte);
3846 if (are_queues_locked)
3847 vm_page_unlock_queues();
3854 * Copy the range specified by src_addr/len
3855 * from the source map to the range dst_addr/len
3856 * in the destination map.
3858 * This routine is only advisory and need not do anything.
3862 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3863 vm_offset_t src_addr)
3867 vm_offset_t end_addr = src_addr + len;
3870 if (dst_addr != src_addr)
3873 if (!pmap_is_current(src_pmap))
3876 vm_page_lock_queues();
3877 if (dst_pmap < src_pmap) {
3878 PMAP_LOCK(dst_pmap);
3879 PMAP_LOCK(src_pmap);
3881 PMAP_LOCK(src_pmap);
3882 PMAP_LOCK(dst_pmap);
3885 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3886 pt_entry_t *src_pte, *dst_pte;
3887 vm_page_t dstmpte, srcmpte;
3888 pd_entry_t srcptepaddr;
3891 KASSERT(addr < UPT_MIN_ADDRESS,
3892 ("pmap_copy: invalid to pmap_copy page tables"));
3894 pdnxt = (addr + NBPDR) & ~PDRMASK;
3897 ptepindex = addr >> PDRSHIFT;
3899 srcptepaddr = src_pmap->pm_pdir[ptepindex];
3900 if (srcptepaddr == 0)
3903 if (srcptepaddr & PG_PS) {
3904 if (dst_pmap->pm_pdir[ptepindex] == 0 &&
3905 ((srcptepaddr & PG_MANAGED) == 0 ||
3906 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
3908 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
3910 dst_pmap->pm_stats.resident_count +=
3916 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3917 KASSERT(srcmpte->wire_count > 0,
3918 ("pmap_copy: source page table page is unused"));
3920 if (pdnxt > end_addr)
3923 src_pte = vtopte(addr);
3924 while (addr < pdnxt) {
3928 * we only virtual copy managed pages
3930 if ((ptetemp & PG_MANAGED) != 0) {
3931 dstmpte = pmap_allocpte(dst_pmap, addr,
3933 if (dstmpte == NULL)
3935 dst_pte = pmap_pte_quick(dst_pmap, addr);
3936 if (*dst_pte == 0 &&
3937 pmap_try_insert_pv_entry(dst_pmap, addr,
3938 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
3940 * Clear the wired, modified, and
3941 * accessed (referenced) bits
3944 *dst_pte = ptetemp & ~(PG_W | PG_M |
3946 dst_pmap->pm_stats.resident_count++;
3949 if (pmap_unwire_pte_hold(dst_pmap,
3951 pmap_invalidate_page(dst_pmap,
3953 pmap_free_zero_pages(free);
3957 if (dstmpte->wire_count >= srcmpte->wire_count)
3966 vm_page_unlock_queues();
3967 PMAP_UNLOCK(src_pmap);
3968 PMAP_UNLOCK(dst_pmap);
3971 static __inline void
3972 pagezero(void *page)
3974 #if defined(I686_CPU)
3975 if (cpu_class == CPUCLASS_686) {
3976 #if defined(CPU_ENABLE_SSE)
3977 if (cpu_feature & CPUID_SSE2)
3978 sse2_pagezero(page);
3981 i686_pagezero(page);
3984 bzero(page, PAGE_SIZE);
3988 * pmap_zero_page zeros the specified hardware page by mapping
3989 * the page into KVM and using bzero to clear its contents.
3992 pmap_zero_page(vm_page_t m)
3994 struct sysmaps *sysmaps;
3996 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3997 mtx_lock(&sysmaps->lock);
3998 if (*sysmaps->CMAP2)
3999 panic("pmap_zero_page: CMAP2 busy");
4001 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
4002 pmap_cache_bits(m->md.pat_mode, 0);
4003 invlcaddr(sysmaps->CADDR2);
4004 pagezero(sysmaps->CADDR2);
4005 *sysmaps->CMAP2 = 0;
4007 mtx_unlock(&sysmaps->lock);
4011 * pmap_zero_page_area zeros the specified hardware page by mapping
4012 * the page into KVM and using bzero to clear its contents.
4014 * off and size may not cover an area beyond a single hardware page.
4017 pmap_zero_page_area(vm_page_t m, int off, int size)
4019 struct sysmaps *sysmaps;
4021 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4022 mtx_lock(&sysmaps->lock);
4023 if (*sysmaps->CMAP2)
4024 panic("pmap_zero_page_area: CMAP2 busy");
4026 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
4027 pmap_cache_bits(m->md.pat_mode, 0);
4028 invlcaddr(sysmaps->CADDR2);
4029 if (off == 0 && size == PAGE_SIZE)
4030 pagezero(sysmaps->CADDR2);
4032 bzero((char *)sysmaps->CADDR2 + off, size);
4033 *sysmaps->CMAP2 = 0;
4035 mtx_unlock(&sysmaps->lock);
4039 * pmap_zero_page_idle zeros the specified hardware page by mapping
4040 * the page into KVM and using bzero to clear its contents. This
4041 * is intended to be called from the vm_pagezero process only and
4045 pmap_zero_page_idle(vm_page_t m)
4049 panic("pmap_zero_page_idle: CMAP3 busy");
4051 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
4052 pmap_cache_bits(m->md.pat_mode, 0);
4060 * pmap_copy_page copies the specified (machine independent)
4061 * page by mapping the page into virtual memory and using
4062 * bcopy to copy the page, one machine dependent page at a
4066 pmap_copy_page(vm_page_t src, vm_page_t dst)
4068 struct sysmaps *sysmaps;
4070 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4071 mtx_lock(&sysmaps->lock);
4072 if (*sysmaps->CMAP1)
4073 panic("pmap_copy_page: CMAP1 busy");
4074 if (*sysmaps->CMAP2)
4075 panic("pmap_copy_page: CMAP2 busy");
4077 invlpg((u_int)sysmaps->CADDR1);
4078 invlpg((u_int)sysmaps->CADDR2);
4079 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
4080 pmap_cache_bits(src->md.pat_mode, 0);
4081 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
4082 pmap_cache_bits(dst->md.pat_mode, 0);
4083 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
4084 *sysmaps->CMAP1 = 0;
4085 *sysmaps->CMAP2 = 0;
4087 mtx_unlock(&sysmaps->lock);
4091 * Returns true if the pmap's pv is one of the first
4092 * 16 pvs linked to from this page. This count may
4093 * be changed upwards or downwards in the future; it
4094 * is only necessary that true be returned for a small
4095 * subset of pmaps for proper page aging.
4098 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
4100 struct md_page *pvh;
4105 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4106 ("pmap_page_exists_quick: page %p is not managed", m));
4108 vm_page_lock_queues();
4109 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4110 if (PV_PMAP(pv) == pmap) {
4118 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
4119 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4120 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4121 if (PV_PMAP(pv) == pmap) {
4130 vm_page_unlock_queues();
4135 * pmap_page_wired_mappings:
4137 * Return the number of managed mappings to the given physical page
4141 pmap_page_wired_mappings(vm_page_t m)
4146 if ((m->oflags & VPO_UNMANAGED) != 0)
4148 vm_page_lock_queues();
4149 count = pmap_pvh_wired_mappings(&m->md, count);
4150 if ((m->flags & PG_FICTITIOUS) == 0) {
4151 count = pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)),
4154 vm_page_unlock_queues();
4159 * pmap_pvh_wired_mappings:
4161 * Return the updated number "count" of managed mappings that are wired.
4164 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
4170 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4172 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4175 pte = pmap_pte_quick(pmap, pv->pv_va);
4176 if ((*pte & PG_W) != 0)
4185 * Returns TRUE if the given page is mapped individually or as part of
4186 * a 4mpage. Otherwise, returns FALSE.
4189 pmap_page_is_mapped(vm_page_t m)
4193 if ((m->oflags & VPO_UNMANAGED) != 0)
4195 vm_page_lock_queues();
4196 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
4197 ((m->flags & PG_FICTITIOUS) == 0 &&
4198 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
4199 vm_page_unlock_queues();
4204 * Remove all pages from specified address space
4205 * this aids process exit speeds. Also, this code
4206 * is special cased for current process only, but
4207 * can have the more generic (and slightly slower)
4208 * mode enabled. This is much faster than pmap_remove
4209 * in the case of running down an entire address space.
4212 pmap_remove_pages(pmap_t pmap)
4214 pt_entry_t *pte, tpte;
4215 vm_page_t free = NULL;
4216 vm_page_t m, mpte, mt;
4218 struct md_page *pvh;
4219 struct pv_chunk *pc, *npc;
4222 uint32_t inuse, bitmask;
4225 if (pmap != PCPU_GET(curpmap)) {
4226 printf("warning: pmap_remove_pages called with non-current pmap\n");
4229 vm_page_lock_queues();
4232 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
4234 for (field = 0; field < _NPCM; field++) {
4235 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
4236 while (inuse != 0) {
4238 bitmask = 1UL << bit;
4239 idx = field * 32 + bit;
4240 pv = &pc->pc_pventry[idx];
4243 pte = pmap_pde(pmap, pv->pv_va);
4245 if ((tpte & PG_PS) == 0) {
4246 pte = vtopte(pv->pv_va);
4247 tpte = *pte & ~PG_PTE_PAT;
4252 "TPTE at %p IS ZERO @ VA %08x\n",
4258 * We cannot remove wired pages from a process' mapping at this time
4265 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
4266 KASSERT(m->phys_addr == (tpte & PG_FRAME),
4267 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
4268 m, (uintmax_t)m->phys_addr,
4271 KASSERT((m->flags & PG_FICTITIOUS) != 0 ||
4272 m < &vm_page_array[vm_page_array_size],
4273 ("pmap_remove_pages: bad tpte %#jx",
4279 * Update the vm_page_t clean/reference bits.
4281 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4282 if ((tpte & PG_PS) != 0) {
4283 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4290 PV_STAT(pv_entry_frees++);
4291 PV_STAT(pv_entry_spare++);
4293 pc->pc_map[field] |= bitmask;
4294 if ((tpte & PG_PS) != 0) {
4295 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
4296 pvh = pa_to_pvh(tpte & PG_PS_FRAME);
4297 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
4298 if (TAILQ_EMPTY(&pvh->pv_list)) {
4299 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4300 if (TAILQ_EMPTY(&mt->md.pv_list))
4301 vm_page_aflag_clear(mt, PGA_WRITEABLE);
4303 mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
4305 pmap_remove_pt_page(pmap, mpte);
4306 pmap->pm_stats.resident_count--;
4307 KASSERT(mpte->wire_count == NPTEPG,
4308 ("pmap_remove_pages: pte page wire count error"));
4309 mpte->wire_count = 0;
4310 pmap_add_delayed_free_list(mpte, &free, FALSE);
4311 atomic_subtract_int(&cnt.v_wire_count, 1);
4314 pmap->pm_stats.resident_count--;
4315 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4316 if (TAILQ_EMPTY(&m->md.pv_list) &&
4317 (m->flags & PG_FICTITIOUS) == 0) {
4318 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4319 if (TAILQ_EMPTY(&pvh->pv_list))
4320 vm_page_aflag_clear(m, PGA_WRITEABLE);
4322 pmap_unuse_pt(pmap, pv->pv_va, &free);
4327 PV_STAT(pv_entry_spare -= _NPCPV);
4328 PV_STAT(pc_chunk_count--);
4329 PV_STAT(pc_chunk_frees++);
4330 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4331 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4332 pmap_qremove((vm_offset_t)pc, 1);
4333 vm_page_unwire(m, 0);
4335 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4339 pmap_invalidate_all(pmap);
4340 vm_page_unlock_queues();
4342 pmap_free_zero_pages(free);
4348 * Return whether or not the specified physical page was modified
4349 * in any physical maps.
4352 pmap_is_modified(vm_page_t m)
4356 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4357 ("pmap_is_modified: page %p is not managed", m));
4360 * If the page is not VPO_BUSY, then PGA_WRITEABLE cannot be
4361 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
4362 * is clear, no PTEs can have PG_M set.
4364 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
4365 if ((m->oflags & VPO_BUSY) == 0 &&
4366 (m->aflags & PGA_WRITEABLE) == 0)
4368 vm_page_lock_queues();
4369 rv = pmap_is_modified_pvh(&m->md) ||
4370 ((m->flags & PG_FICTITIOUS) == 0 &&
4371 pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4372 vm_page_unlock_queues();
4377 * Returns TRUE if any of the given mappings were used to modify
4378 * physical memory. Otherwise, returns FALSE. Both page and 2mpage
4379 * mappings are supported.
4382 pmap_is_modified_pvh(struct md_page *pvh)
4389 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4392 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4395 pte = pmap_pte_quick(pmap, pv->pv_va);
4396 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
4406 * pmap_is_prefaultable:
4408 * Return whether or not the specified virtual address is elgible
4412 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
4420 pde = pmap_pde(pmap, addr);
4421 if (*pde != 0 && (*pde & PG_PS) == 0) {
4430 * pmap_is_referenced:
4432 * Return whether or not the specified physical page was referenced
4433 * in any physical maps.
4436 pmap_is_referenced(vm_page_t m)
4440 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4441 ("pmap_is_referenced: page %p is not managed", m));
4442 vm_page_lock_queues();
4443 rv = pmap_is_referenced_pvh(&m->md) ||
4444 ((m->flags & PG_FICTITIOUS) == 0 &&
4445 pmap_is_referenced_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4446 vm_page_unlock_queues();
4451 * Returns TRUE if any of the given mappings were referenced and FALSE
4452 * otherwise. Both page and 4mpage mappings are supported.
4455 pmap_is_referenced_pvh(struct md_page *pvh)
4462 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4465 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4468 pte = pmap_pte_quick(pmap, pv->pv_va);
4469 rv = (*pte & (PG_A | PG_V)) == (PG_A | PG_V);
4479 * Clear the write and modified bits in each of the given page's mappings.
4482 pmap_remove_write(vm_page_t m)
4484 struct md_page *pvh;
4485 pv_entry_t next_pv, pv;
4488 pt_entry_t oldpte, *pte;
4491 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4492 ("pmap_remove_write: page %p is not managed", m));
4495 * If the page is not VPO_BUSY, then PGA_WRITEABLE cannot be set by
4496 * another thread while the object is locked. Thus, if PGA_WRITEABLE
4497 * is clear, no page table entries need updating.
4499 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
4500 if ((m->oflags & VPO_BUSY) == 0 &&
4501 (m->aflags & PGA_WRITEABLE) == 0)
4503 vm_page_lock_queues();
4505 if ((m->flags & PG_FICTITIOUS) != 0)
4506 goto small_mappings;
4507 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4508 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4512 pde = pmap_pde(pmap, va);
4513 if ((*pde & PG_RW) != 0)
4514 (void)pmap_demote_pde(pmap, pde, va);
4518 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4521 pde = pmap_pde(pmap, pv->pv_va);
4522 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
4523 " a 4mpage in page %p's pv list", m));
4524 pte = pmap_pte_quick(pmap, pv->pv_va);
4527 if ((oldpte & PG_RW) != 0) {
4529 * Regardless of whether a pte is 32 or 64 bits
4530 * in size, PG_RW and PG_M are among the least
4531 * significant 32 bits.
4533 if (!atomic_cmpset_int((u_int *)pte, oldpte,
4534 oldpte & ~(PG_RW | PG_M)))
4536 if ((oldpte & PG_M) != 0)
4538 pmap_invalidate_page(pmap, pv->pv_va);
4542 vm_page_aflag_clear(m, PGA_WRITEABLE);
4544 vm_page_unlock_queues();
4548 * pmap_ts_referenced:
4550 * Return a count of reference bits for a page, clearing those bits.
4551 * It is not necessary for every reference bit to be cleared, but it
4552 * is necessary that 0 only be returned when there are truly no
4553 * reference bits set.
4555 * XXX: The exact number of bits to check and clear is a matter that
4556 * should be tested and standardized at some point in the future for
4557 * optimal aging of shared pages.
4560 pmap_ts_referenced(vm_page_t m)
4562 struct md_page *pvh;
4563 pv_entry_t pv, pvf, pvn;
4565 pd_entry_t oldpde, *pde;
4570 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4571 ("pmap_ts_referenced: page %p is not managed", m));
4572 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4573 vm_page_lock_queues();
4575 if ((m->flags & PG_FICTITIOUS) != 0)
4576 goto small_mappings;
4577 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
4581 pde = pmap_pde(pmap, va);
4583 if ((oldpde & PG_A) != 0) {
4584 if (pmap_demote_pde(pmap, pde, va)) {
4585 if ((oldpde & PG_W) == 0) {
4587 * Remove the mapping to a single page
4588 * so that a subsequent access may
4589 * repromote. Since the underlying
4590 * page table page is fully populated,
4591 * this removal never frees a page
4594 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4596 pmap_remove_page(pmap, va, NULL);
4608 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
4611 pvn = TAILQ_NEXT(pv, pv_list);
4612 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4613 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
4616 pde = pmap_pde(pmap, pv->pv_va);
4617 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
4618 " found a 4mpage in page %p's pv list", m));
4619 pte = pmap_pte_quick(pmap, pv->pv_va);
4620 if ((*pte & PG_A) != 0) {
4621 atomic_clear_int((u_int *)pte, PG_A);
4622 pmap_invalidate_page(pmap, pv->pv_va);
4628 } while ((pv = pvn) != NULL && pv != pvf);
4632 vm_page_unlock_queues();
4637 * Clear the modify bits on the specified physical page.
4640 pmap_clear_modify(vm_page_t m)
4642 struct md_page *pvh;
4643 pv_entry_t next_pv, pv;
4645 pd_entry_t oldpde, *pde;
4646 pt_entry_t oldpte, *pte;
4649 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4650 ("pmap_clear_modify: page %p is not managed", m));
4651 VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED);
4652 KASSERT((m->oflags & VPO_BUSY) == 0,
4653 ("pmap_clear_modify: page %p is busy", m));
4656 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4657 * If the object containing the page is locked and the page is not
4658 * VPO_BUSY, then PGA_WRITEABLE cannot be concurrently set.
4660 if ((m->aflags & PGA_WRITEABLE) == 0)
4662 vm_page_lock_queues();
4664 if ((m->flags & PG_FICTITIOUS) != 0)
4665 goto small_mappings;
4666 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4667 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4671 pde = pmap_pde(pmap, va);
4673 if ((oldpde & PG_RW) != 0) {
4674 if (pmap_demote_pde(pmap, pde, va)) {
4675 if ((oldpde & PG_W) == 0) {
4677 * Write protect the mapping to a
4678 * single page so that a subsequent
4679 * write access may repromote.
4681 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4683 pte = pmap_pte_quick(pmap, va);
4685 if ((oldpte & PG_V) != 0) {
4687 * Regardless of whether a pte is 32 or 64 bits
4688 * in size, PG_RW and PG_M are among the least
4689 * significant 32 bits.
4691 while (!atomic_cmpset_int((u_int *)pte,
4693 oldpte & ~(PG_M | PG_RW)))
4696 pmap_invalidate_page(pmap, va);
4704 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4707 pde = pmap_pde(pmap, pv->pv_va);
4708 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
4709 " a 4mpage in page %p's pv list", m));
4710 pte = pmap_pte_quick(pmap, pv->pv_va);
4711 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4713 * Regardless of whether a pte is 32 or 64 bits
4714 * in size, PG_M is among the least significant
4717 atomic_clear_int((u_int *)pte, PG_M);
4718 pmap_invalidate_page(pmap, pv->pv_va);
4723 vm_page_unlock_queues();
4727 * pmap_clear_reference:
4729 * Clear the reference bit on the specified physical page.
4732 pmap_clear_reference(vm_page_t m)
4734 struct md_page *pvh;
4735 pv_entry_t next_pv, pv;
4737 pd_entry_t oldpde, *pde;
4741 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4742 ("pmap_clear_reference: page %p is not managed", m));
4743 vm_page_lock_queues();
4745 if ((m->flags & PG_FICTITIOUS) != 0)
4746 goto small_mappings;
4747 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4748 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4752 pde = pmap_pde(pmap, va);
4754 if ((oldpde & PG_A) != 0) {
4755 if (pmap_demote_pde(pmap, pde, va)) {
4757 * Remove the mapping to a single page so
4758 * that a subsequent access may repromote.
4759 * Since the underlying page table page is
4760 * fully populated, this removal never frees
4761 * a page table page.
4763 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4765 pmap_remove_page(pmap, va, NULL);
4771 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4774 pde = pmap_pde(pmap, pv->pv_va);
4775 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
4776 " a 4mpage in page %p's pv list", m));
4777 pte = pmap_pte_quick(pmap, pv->pv_va);
4778 if ((*pte & PG_A) != 0) {
4780 * Regardless of whether a pte is 32 or 64 bits
4781 * in size, PG_A is among the least significant
4784 atomic_clear_int((u_int *)pte, PG_A);
4785 pmap_invalidate_page(pmap, pv->pv_va);
4790 vm_page_unlock_queues();
4794 * Miscellaneous support routines follow
4797 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
4798 static __inline void
4799 pmap_pte_attr(pt_entry_t *pte, int cache_bits)
4804 * The cache mode bits are all in the low 32-bits of the
4805 * PTE, so we can just spin on updating the low 32-bits.
4808 opte = *(u_int *)pte;
4809 npte = opte & ~PG_PTE_CACHE;
4811 } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
4814 /* Adjust the cache mode for a 2/4MB page mapped via a PDE. */
4815 static __inline void
4816 pmap_pde_attr(pd_entry_t *pde, int cache_bits)
4821 * The cache mode bits are all in the low 32-bits of the
4822 * PDE, so we can just spin on updating the low 32-bits.
4825 opde = *(u_int *)pde;
4826 npde = opde & ~PG_PDE_CACHE;
4828 } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
4832 * Map a set of physical memory pages into the kernel virtual
4833 * address space. Return a pointer to where it is mapped. This
4834 * routine is intended to be used for mapping device memory,
4838 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4840 vm_offset_t va, offset;
4843 offset = pa & PAGE_MASK;
4844 size = roundup(offset + size, PAGE_SIZE);
4847 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4850 va = kmem_alloc_nofault(kernel_map, size);
4852 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4854 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4855 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4856 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4857 pmap_invalidate_cache_range(va, va + size);
4858 return ((void *)(va + offset));
4862 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4865 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4869 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4872 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4876 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4878 vm_offset_t base, offset, tmpva;
4880 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4882 base = trunc_page(va);
4883 offset = va & PAGE_MASK;
4884 size = roundup(offset + size, PAGE_SIZE);
4885 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
4886 pmap_kremove(tmpva);
4887 pmap_invalidate_range(kernel_pmap, va, tmpva);
4888 kmem_free(kernel_map, base, size);
4892 * Sets the memory attribute for the specified page.
4895 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4898 m->md.pat_mode = ma;
4899 if ((m->flags & PG_FICTITIOUS) != 0)
4903 * If "m" is a normal page, flush it from the cache.
4904 * See pmap_invalidate_cache_range().
4906 * First, try to find an existing mapping of the page by sf
4907 * buffer. sf_buf_invalidate_cache() modifies mapping and
4908 * flushes the cache.
4910 if (sf_buf_invalidate_cache(m))
4914 * If page is not mapped by sf buffer, but CPU does not
4915 * support self snoop, map the page transient and do
4916 * invalidation. In the worst case, whole cache is flushed by
4917 * pmap_invalidate_cache_range().
4919 if ((cpu_feature & CPUID_SS) == 0)
4924 pmap_flush_page(vm_page_t m)
4926 struct sysmaps *sysmaps;
4927 vm_offset_t sva, eva;
4929 if ((cpu_feature & CPUID_CLFSH) != 0) {
4930 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4931 mtx_lock(&sysmaps->lock);
4932 if (*sysmaps->CMAP2)
4933 panic("pmap_flush_page: CMAP2 busy");
4935 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) |
4936 PG_A | PG_M | pmap_cache_bits(m->md.pat_mode, 0);
4937 invlcaddr(sysmaps->CADDR2);
4938 sva = (vm_offset_t)sysmaps->CADDR2;
4939 eva = sva + PAGE_SIZE;
4942 * Use mfence despite the ordering implied by
4943 * mtx_{un,}lock() because clflush is not guaranteed
4944 * to be ordered by any other instruction.
4947 for (; sva < eva; sva += cpu_clflush_line_size)
4950 *sysmaps->CMAP2 = 0;
4952 mtx_unlock(&sysmaps->lock);
4954 pmap_invalidate_cache();
4958 * Changes the specified virtual address range's memory type to that given by
4959 * the parameter "mode". The specified virtual address range must be
4960 * completely contained within either the kernel map.
4962 * Returns zero if the change completed successfully, and either EINVAL or
4963 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4964 * of the virtual address range was not mapped, and ENOMEM is returned if
4965 * there was insufficient memory available to complete the change.
4968 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4970 vm_offset_t base, offset, tmpva;
4973 int cache_bits_pte, cache_bits_pde;
4976 base = trunc_page(va);
4977 offset = va & PAGE_MASK;
4978 size = roundup(offset + size, PAGE_SIZE);
4981 * Only supported on kernel virtual addresses above the recursive map.
4983 if (base < VM_MIN_KERNEL_ADDRESS)
4986 cache_bits_pde = pmap_cache_bits(mode, 1);
4987 cache_bits_pte = pmap_cache_bits(mode, 0);
4991 * Pages that aren't mapped aren't supported. Also break down
4992 * 2/4MB pages into 4KB pages if required.
4994 PMAP_LOCK(kernel_pmap);
4995 for (tmpva = base; tmpva < base + size; ) {
4996 pde = pmap_pde(kernel_pmap, tmpva);
4998 PMAP_UNLOCK(kernel_pmap);
5003 * If the current 2/4MB page already has
5004 * the required memory type, then we need not
5005 * demote this page. Just increment tmpva to
5006 * the next 2/4MB page frame.
5008 if ((*pde & PG_PDE_CACHE) == cache_bits_pde) {
5009 tmpva = trunc_4mpage(tmpva) + NBPDR;
5014 * If the current offset aligns with a 2/4MB
5015 * page frame and there is at least 2/4MB left
5016 * within the range, then we need not break
5017 * down this page into 4KB pages.
5019 if ((tmpva & PDRMASK) == 0 &&
5020 tmpva + PDRMASK < base + size) {
5024 if (!pmap_demote_pde(kernel_pmap, pde, tmpva)) {
5025 PMAP_UNLOCK(kernel_pmap);
5029 pte = vtopte(tmpva);
5031 PMAP_UNLOCK(kernel_pmap);
5036 PMAP_UNLOCK(kernel_pmap);
5039 * Ok, all the pages exist, so run through them updating their
5040 * cache mode if required.
5042 for (tmpva = base; tmpva < base + size; ) {
5043 pde = pmap_pde(kernel_pmap, tmpva);
5045 if ((*pde & PG_PDE_CACHE) != cache_bits_pde) {
5046 pmap_pde_attr(pde, cache_bits_pde);
5049 tmpva = trunc_4mpage(tmpva) + NBPDR;
5051 pte = vtopte(tmpva);
5052 if ((*pte & PG_PTE_CACHE) != cache_bits_pte) {
5053 pmap_pte_attr(pte, cache_bits_pte);
5061 * Flush CPU caches to make sure any data isn't cached that
5062 * shouldn't be, etc.
5065 pmap_invalidate_range(kernel_pmap, base, tmpva);
5066 pmap_invalidate_cache_range(base, tmpva);
5072 * perform the pmap work for mincore
5075 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
5078 pt_entry_t *ptep, pte;
5084 pdep = pmap_pde(pmap, addr);
5086 if (*pdep & PG_PS) {
5088 /* Compute the physical address of the 4KB page. */
5089 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
5091 val = MINCORE_SUPER;
5093 ptep = pmap_pte(pmap, addr);
5095 pmap_pte_release(ptep);
5096 pa = pte & PG_FRAME;
5104 if ((pte & PG_V) != 0) {
5105 val |= MINCORE_INCORE;
5106 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
5107 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
5108 if ((pte & PG_A) != 0)
5109 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
5111 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
5112 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
5113 (pte & (PG_MANAGED | PG_V)) == (PG_MANAGED | PG_V)) {
5114 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
5115 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
5118 PA_UNLOCK_COND(*locked_pa);
5124 pmap_activate(struct thread *td)
5126 pmap_t pmap, oldpmap;
5131 pmap = vmspace_pmap(td->td_proc->p_vmspace);
5132 oldpmap = PCPU_GET(curpmap);
5133 cpuid = PCPU_GET(cpuid);
5135 CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active);
5136 CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
5138 CPU_CLR(cpuid, &oldpmap->pm_active);
5139 CPU_SET(cpuid, &pmap->pm_active);
5142 cr3 = vtophys(pmap->pm_pdpt);
5144 cr3 = vtophys(pmap->pm_pdir);
5147 * pmap_activate is for the current thread on the current cpu
5149 td->td_pcb->pcb_cr3 = cr3;
5151 PCPU_SET(curpmap, pmap);
5156 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
5161 * Increase the starting virtual address of the given mapping if a
5162 * different alignment might result in more superpage mappings.
5165 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
5166 vm_offset_t *addr, vm_size_t size)
5168 vm_offset_t superpage_offset;
5172 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
5173 offset += ptoa(object->pg_color);
5174 superpage_offset = offset & PDRMASK;
5175 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
5176 (*addr & PDRMASK) == superpage_offset)
5178 if ((*addr & PDRMASK) < superpage_offset)
5179 *addr = (*addr & ~PDRMASK) + superpage_offset;
5181 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
5185 #if defined(PMAP_DEBUG)
5186 pmap_pid_dump(int pid)
5193 sx_slock(&allproc_lock);
5194 FOREACH_PROC_IN_SYSTEM(p) {
5195 if (p->p_pid != pid)
5201 pmap = vmspace_pmap(p->p_vmspace);
5202 for (i = 0; i < NPDEPTD; i++) {
5205 vm_offset_t base = i << PDRSHIFT;
5207 pde = &pmap->pm_pdir[i];
5208 if (pde && pmap_pde_v(pde)) {
5209 for (j = 0; j < NPTEPG; j++) {
5210 vm_offset_t va = base + (j << PAGE_SHIFT);
5211 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
5216 sx_sunlock(&allproc_lock);
5219 pte = pmap_pte(pmap, va);
5220 if (pte && pmap_pte_v(pte)) {
5224 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
5225 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
5226 va, pa, m->hold_count, m->wire_count, m->flags);
5241 sx_sunlock(&allproc_lock);
5248 static void pads(pmap_t pm);
5249 void pmap_pvdump(vm_paddr_t pa);
5251 /* print address space of pmap*/
5259 if (pm == kernel_pmap)
5261 for (i = 0; i < NPDEPTD; i++)
5263 for (j = 0; j < NPTEPG; j++) {
5264 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
5265 if (pm == kernel_pmap && va < KERNBASE)
5267 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
5269 ptep = pmap_pte(pm, va);
5270 if (pmap_pte_v(ptep))
5271 printf("%x:%x ", va, *ptep);
5277 pmap_pvdump(vm_paddr_t pa)
5283 printf("pa %x", pa);
5284 m = PHYS_TO_VM_PAGE(pa);
5285 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
5287 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);