2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
107 #include "opt_pmap.h"
108 #include "opt_msgbuf.h"
110 #include "opt_xbox.h"
112 #include <sys/param.h>
113 #include <sys/systm.h>
114 #include <sys/kernel.h>
116 #include <sys/lock.h>
117 #include <sys/malloc.h>
118 #include <sys/mman.h>
119 #include <sys/msgbuf.h>
120 #include <sys/mutex.h>
121 #include <sys/proc.h>
122 #include <sys/sf_buf.h>
124 #include <sys/vmmeter.h>
125 #include <sys/sched.h>
126 #include <sys/sysctl.h>
132 #include <vm/vm_param.h>
133 #include <vm/vm_kern.h>
134 #include <vm/vm_page.h>
135 #include <vm/vm_map.h>
136 #include <vm/vm_object.h>
137 #include <vm/vm_extern.h>
138 #include <vm/vm_pageout.h>
139 #include <vm/vm_pager.h>
140 #include <vm/vm_reserv.h>
143 #include <machine/cpu.h>
144 #include <machine/cputypes.h>
145 #include <machine/md_var.h>
146 #include <machine/pcb.h>
147 #include <machine/specialreg.h>
149 #include <machine/smp.h>
153 #include <machine/xbox.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
164 #if !defined(DIAGNOSTIC)
165 #define PMAP_INLINE __gnu89_inline
172 #define PV_STAT(x) do { x ; } while (0)
174 #define PV_STAT(x) do { } while (0)
177 #define pa_index(pa) ((pa) >> PDRSHIFT)
178 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
181 * Get PDEs and PTEs for user/kernel address space
183 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
184 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
186 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
187 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
188 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
189 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
190 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
192 #define pmap_pte_set_w(pte, v) ((v) ? atomic_set_int((u_int *)(pte), PG_W) : \
193 atomic_clear_int((u_int *)(pte), PG_W))
194 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
196 struct pmap kernel_pmap_store;
197 LIST_HEAD(pmaplist, pmap);
198 static struct pmaplist allpmaps;
199 static struct mtx allpmaps_lock;
201 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
202 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
203 int pgeflag = 0; /* PG_G or-in */
204 int pseflag = 0; /* PG_PS or-in */
207 vm_offset_t kernel_vm_end;
208 extern u_int32_t KERNend;
212 static uma_zone_t pdptzone;
215 static int pat_works; /* Is page attribute table sane? */
217 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
219 static int pg_ps_enabled;
220 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RD, &pg_ps_enabled, 0,
221 "Are large page mappings enabled?");
224 * Data for the pv entry allocation mechanism
226 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
227 static struct md_page *pv_table;
228 static int shpgperproc = PMAP_SHPGPERPROC;
230 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
231 int pv_maxchunks; /* How many chunks we have KVA for */
232 vm_offset_t pv_vafree; /* freelist stored in the PTE */
235 * All those kernel PT submaps that BSD is so fond of
244 static struct sysmaps sysmaps_pcpu[MAXCPU];
245 pt_entry_t *CMAP1 = 0;
246 static pt_entry_t *CMAP3;
247 caddr_t CADDR1 = 0, ptvmmap = 0;
248 static caddr_t CADDR3;
249 struct msgbuf *msgbufp = 0;
254 static caddr_t crashdumpmap;
256 static pt_entry_t *PMAP1 = 0, *PMAP2;
257 static pt_entry_t *PADDR1 = 0, *PADDR2;
260 static int PMAP1changedcpu;
261 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
263 "Number of times pmap_pte_quick changed CPU with same PMAP1");
265 static int PMAP1changed;
266 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
268 "Number of times pmap_pte_quick changed PMAP1");
269 static int PMAP1unchanged;
270 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
272 "Number of times pmap_pte_quick didn't change PMAP1");
273 static struct mtx PMAP2mutex;
275 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
276 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
277 static void pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
278 static boolean_t pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
279 static void pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa);
280 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
281 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
283 static int pmap_pvh_wired_mappings(struct md_page *pvh, int count);
285 static boolean_t pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
286 static boolean_t pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m,
288 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
289 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
290 static void pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte);
291 static void pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte);
292 static boolean_t pmap_is_modified_pvh(struct md_page *pvh);
293 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
294 static vm_page_t pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va);
295 static void pmap_pde_attr(pd_entry_t *pde, int cache_bits);
296 static void pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va);
297 static boolean_t pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva,
299 static void pmap_pte_attr(pt_entry_t *pte, int cache_bits);
300 static void pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
302 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
304 static void pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte);
305 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
307 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
309 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
310 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
313 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
315 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
316 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
317 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
318 static void pmap_pte_release(pt_entry_t *pte);
319 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
320 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
322 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
325 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
326 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
329 * If you get an error here, then you set KVA_PAGES wrong! See the
330 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
331 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
333 CTASSERT(KERNBASE % (1 << 24) == 0);
336 * Move the kernel virtual free pointer to the next
337 * 4MB. This is used to help improve performance
338 * by using a large (4MB) page for much of the kernel
339 * (.text, .data, .bss)
342 pmap_kmem_choose(vm_offset_t addr)
344 vm_offset_t newaddr = addr;
347 if (cpu_feature & CPUID_PSE)
348 newaddr = (addr + PDRMASK) & ~PDRMASK;
354 * Bootstrap the system enough to run with virtual memory.
356 * On the i386 this is called after mapping has already been enabled
357 * and just syncs the pmap module with what has already been done.
358 * [We can't call it easily with mapping off since the kernel is not
359 * mapped with PA == VA, hence we would have to relocate every address
360 * from the linked base (virtual) address "KERNBASE" to the actual
361 * (physical) address starting relative to 0]
364 pmap_bootstrap(vm_paddr_t firstaddr)
367 pt_entry_t *pte, *unused;
368 struct sysmaps *sysmaps;
372 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
373 * large. It should instead be correctly calculated in locore.s and
374 * not based on 'first' (which is a physical address, not a virtual
375 * address, for the start of unused physical memory). The kernel
376 * page tables are NOT double mapped and thus should not be included
377 * in this calculation.
379 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
380 virtual_avail = pmap_kmem_choose(virtual_avail);
382 virtual_end = VM_MAX_KERNEL_ADDRESS;
385 * Initialize the kernel pmap (which is statically allocated).
387 PMAP_LOCK_INIT(kernel_pmap);
388 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
390 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
392 kernel_pmap->pm_root = NULL;
393 kernel_pmap->pm_active = -1; /* don't allow deactivation */
394 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
395 LIST_INIT(&allpmaps);
396 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
397 mtx_lock_spin(&allpmaps_lock);
398 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
399 mtx_unlock_spin(&allpmaps_lock);
403 * Reserve some special page table entries/VA space for temporary
406 #define SYSMAP(c, p, v, n) \
407 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
413 * CMAP1/CMAP2 are used for zeroing and copying pages.
414 * CMAP3 is used for the idle process page zeroing.
416 for (i = 0; i < MAXCPU; i++) {
417 sysmaps = &sysmaps_pcpu[i];
418 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
419 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
420 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
422 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
423 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
429 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
432 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
434 SYSMAP(caddr_t, unused, ptvmmap, 1)
437 * msgbufp is used to map the system message buffer.
439 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
442 * ptemap is used for pmap_pte_quick
444 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1);
445 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1);
447 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
454 * Leave in place an identity mapping (virt == phys) for the low 1 MB
455 * physical memory region that is used by the ACPI wakeup code. This
456 * mapping must not have PG_G set.
459 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
460 * an early stadium, we cannot yet neatly map video memory ... :-(
461 * Better fixes are very welcome! */
462 if (!arch_i386_is_xbox)
464 for (i = 1; i < NKPT; i++)
467 /* Initialize the PAT MSR if present. */
470 /* Turn on PG_G on kernel page(s) */
482 /* Bail if this CPU doesn't implement PAT. */
483 if (!(cpu_feature & CPUID_PAT))
486 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
487 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) {
489 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
490 * Program 4 and 5 as WP and WC.
491 * Leave 6 and 7 as UC and UC-.
493 pat_msr = rdmsr(MSR_PAT);
494 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
495 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
496 PAT_VALUE(5, PAT_WRITE_COMBINING);
500 * Due to some Intel errata, we can only safely use the lower 4
501 * PAT entries. Thus, just replace PAT Index 2 with WC instead
504 * Intel Pentium III Processor Specification Update
505 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
508 * Intel Pentium IV Processor Specification Update
509 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
511 pat_msr = rdmsr(MSR_PAT);
512 pat_msr &= ~PAT_MASK(2);
513 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
516 wrmsr(MSR_PAT, pat_msr);
520 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
527 vm_offset_t va, endva;
534 endva = KERNBASE + KERNend;
537 va = KERNBASE + KERNLOAD;
539 pdir = kernel_pmap->pm_pdir[KPTDI+i];
541 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir;
542 invltlb(); /* Play it safe, invltlb() every time */
547 va = (vm_offset_t)btext;
552 invltlb(); /* Play it safe, invltlb() every time */
559 * Initialize a vm_page's machine-dependent fields.
562 pmap_page_init(vm_page_t m)
565 TAILQ_INIT(&m->md.pv_list);
566 m->md.pat_mode = PAT_WRITE_BACK;
571 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
574 /* Inform UMA that this allocator uses kernel_map/object. */
575 *flags = UMA_SLAB_KERNEL;
576 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
577 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
582 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
584 * - Must deal with pages in order to ensure that none of the PG_* bits
585 * are ever set, PG_V in particular.
586 * - Assumes we can write to ptes without pte_store() atomic ops, even
587 * on PAE systems. This should be ok.
588 * - Assumes nothing will ever test these addresses for 0 to indicate
589 * no mapping instead of correctly checking PG_V.
590 * - Assumes a vm_offset_t will fit in a pte (true for i386).
591 * Because PG_V is never set, there can be no mappings to invalidate.
594 pmap_ptelist_alloc(vm_offset_t *head)
601 return (va); /* Out of memory */
605 panic("pmap_ptelist_alloc: va with PG_V set!");
611 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
616 panic("pmap_ptelist_free: freeing va with PG_V set!");
618 *pte = *head; /* virtual! PG_V is 0 though */
623 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
629 for (i = npages - 1; i >= 0; i--) {
630 va = (vm_offset_t)base + i * PAGE_SIZE;
631 pmap_ptelist_free(head, va);
637 * Initialize the pmap module.
638 * Called by vm_init, to initialize any structures that the pmap
639 * system needs to map virtual memory.
649 * Initialize the vm page array entries for the kernel pmap's
652 for (i = 0; i < nkpt; i++) {
653 mpte = PHYS_TO_VM_PAGE(PTD[i + KPTDI] & PG_FRAME);
654 KASSERT(mpte >= vm_page_array &&
655 mpte < &vm_page_array[vm_page_array_size],
656 ("pmap_init: page table page is out of range"));
657 mpte->pindex = i + KPTDI;
658 mpte->phys_addr = PTD[i + KPTDI] & PG_FRAME;
662 * Initialize the address space (zone) for the pv entries. Set a
663 * high water mark so that the system can recover from excessive
664 * numbers of pv entries.
666 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
667 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
668 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
669 pv_entry_max = roundup(pv_entry_max, _NPCPV);
670 pv_entry_high_water = 9 * (pv_entry_max / 10);
673 * Are large page mappings enabled?
675 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
677 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
678 ("pmap_init: can't assign to pagesizes[1]"));
679 pagesizes[1] = NBPDR;
683 * Calculate the size of the pv head table for superpages.
685 for (i = 0; phys_avail[i + 1]; i += 2);
686 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
689 * Allocate memory for the pv head table for superpages.
691 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
693 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
694 for (i = 0; i < pv_npg; i++)
695 TAILQ_INIT(&pv_table[i].pv_list);
697 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
698 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
699 PAGE_SIZE * pv_maxchunks);
700 if (pv_chunkbase == NULL)
701 panic("pmap_init: not enough kvm for pv chunks");
702 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
704 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
705 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
706 UMA_ZONE_VM | UMA_ZONE_NOFREE);
707 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
712 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
713 "Max number of PV entries");
714 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
715 "Page share factor per proc");
717 SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
718 "2/4MB page mapping counters");
720 static u_long pmap_pde_demotions;
721 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, demotions, CTLFLAG_RD,
722 &pmap_pde_demotions, 0, "2/4MB page demotions");
724 static u_long pmap_pde_mappings;
725 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
726 &pmap_pde_mappings, 0, "2/4MB page mappings");
728 static u_long pmap_pde_p_failures;
729 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, p_failures, CTLFLAG_RD,
730 &pmap_pde_p_failures, 0, "2/4MB page promotion failures");
732 static u_long pmap_pde_promotions;
733 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, promotions, CTLFLAG_RD,
734 &pmap_pde_promotions, 0, "2/4MB page promotions");
736 /***************************************************
737 * Low level helper routines.....
738 ***************************************************/
741 * Determine the appropriate bits to set in a PTE or PDE for a specified
745 pmap_cache_bits(int mode, boolean_t is_pde)
747 int pat_flag, pat_index, cache_bits;
749 /* The PAT bit is different for PTE's and PDE's. */
750 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
752 /* If we don't support PAT, map extended modes to older ones. */
753 if (!(cpu_feature & CPUID_PAT)) {
755 case PAT_UNCACHEABLE:
756 case PAT_WRITE_THROUGH:
760 case PAT_WRITE_COMBINING:
761 case PAT_WRITE_PROTECTED:
762 mode = PAT_UNCACHEABLE;
767 /* Map the caching mode to a PAT index. */
770 case PAT_UNCACHEABLE:
773 case PAT_WRITE_THROUGH:
782 case PAT_WRITE_COMBINING:
785 case PAT_WRITE_PROTECTED:
789 panic("Unknown caching mode %d\n", mode);
794 case PAT_UNCACHEABLE:
795 case PAT_WRITE_PROTECTED:
798 case PAT_WRITE_THROUGH:
804 case PAT_WRITE_COMBINING:
808 panic("Unknown caching mode %d\n", mode);
812 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
815 cache_bits |= pat_flag;
817 cache_bits |= PG_NC_PCD;
819 cache_bits |= PG_NC_PWT;
824 * For SMP, these functions have to use the IPI mechanism for coherence.
826 * N.B.: Before calling any of the following TLB invalidation functions,
827 * the calling processor must ensure that all stores updating a non-
828 * kernel page table are globally performed. Otherwise, another
829 * processor could cache an old, pre-update entry without being
830 * invalidated. This can happen one of two ways: (1) The pmap becomes
831 * active on another processor after its pm_active field is checked by
832 * one of the following functions but before a store updating the page
833 * table is globally performed. (2) The pmap becomes active on another
834 * processor before its pm_active field is checked but due to
835 * speculative loads one of the following functions stills reads the
836 * pmap as inactive on the other processor.
838 * The kernel page table is exempt because its pm_active field is
839 * immutable. The kernel page table is always active on every
843 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
849 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
853 cpumask = PCPU_GET(cpumask);
854 other_cpus = PCPU_GET(other_cpus);
855 if (pmap->pm_active & cpumask)
857 if (pmap->pm_active & other_cpus)
858 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
864 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
871 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
872 for (addr = sva; addr < eva; addr += PAGE_SIZE)
874 smp_invlpg_range(sva, eva);
876 cpumask = PCPU_GET(cpumask);
877 other_cpus = PCPU_GET(other_cpus);
878 if (pmap->pm_active & cpumask)
879 for (addr = sva; addr < eva; addr += PAGE_SIZE)
881 if (pmap->pm_active & other_cpus)
882 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
889 pmap_invalidate_all(pmap_t pmap)
895 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
899 cpumask = PCPU_GET(cpumask);
900 other_cpus = PCPU_GET(other_cpus);
901 if (pmap->pm_active & cpumask)
903 if (pmap->pm_active & other_cpus)
904 smp_masked_invltlb(pmap->pm_active & other_cpus);
910 pmap_invalidate_cache(void)
920 * Normal, non-SMP, 486+ invalidation functions.
921 * We inline these within pmap.c for speed.
924 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
927 if (pmap == kernel_pmap || pmap->pm_active)
932 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
936 if (pmap == kernel_pmap || pmap->pm_active)
937 for (addr = sva; addr < eva; addr += PAGE_SIZE)
942 pmap_invalidate_all(pmap_t pmap)
945 if (pmap == kernel_pmap || pmap->pm_active)
950 pmap_invalidate_cache(void)
958 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
961 KASSERT((sva & PAGE_MASK) == 0,
962 ("pmap_invalidate_cache_range: sva not page-aligned"));
963 KASSERT((eva & PAGE_MASK) == 0,
964 ("pmap_invalidate_cache_range: eva not page-aligned"));
966 if (cpu_feature & CPUID_SS)
967 ; /* If "Self Snoop" is supported, do nothing. */
968 else if (cpu_feature & CPUID_CLFSH) {
971 * Otherwise, do per-cache line flush. Use the mfence
972 * instruction to insure that previous stores are
973 * included in the write-back. The processor
974 * propagates flush to other processors in the cache
978 for (; sva < eva; sva += cpu_clflush_line_size)
984 * No targeted cache flush methods are supported by CPU,
985 * globally invalidate cache as a last resort.
987 pmap_invalidate_cache();
992 * Are we current address space or kernel? N.B. We return FALSE when
993 * a pmap's page table is in use because a kernel thread is borrowing
994 * it. The borrowed page table can change spontaneously, making any
995 * dependence on its continued use subject to a race condition.
998 pmap_is_current(pmap_t pmap)
1001 return (pmap == kernel_pmap ||
1002 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
1003 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
1007 * If the given pmap is not the current or kernel pmap, the returned pte must
1008 * be released by passing it to pmap_pte_release().
1011 pmap_pte(pmap_t pmap, vm_offset_t va)
1016 pde = pmap_pde(pmap, va);
1020 /* are we current address space or kernel? */
1021 if (pmap_is_current(pmap))
1022 return (vtopte(va));
1023 mtx_lock(&PMAP2mutex);
1024 newpf = *pde & PG_FRAME;
1025 if ((*PMAP2 & PG_FRAME) != newpf) {
1026 *PMAP2 = newpf | PG_RW | PG_V | PG_A | PG_M;
1027 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
1029 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1035 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1038 static __inline void
1039 pmap_pte_release(pt_entry_t *pte)
1042 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2)
1043 mtx_unlock(&PMAP2mutex);
1046 static __inline void
1047 invlcaddr(void *caddr)
1050 invlpg((u_int)caddr);
1054 * Super fast pmap_pte routine best used when scanning
1055 * the pv lists. This eliminates many coarse-grained
1056 * invltlb calls. Note that many of the pv list
1057 * scans are across different pmaps. It is very wasteful
1058 * to do an entire invltlb for checking a single mapping.
1060 * If the given pmap is not the current pmap, vm_page_queue_mtx
1061 * must be held and curthread pinned to a CPU.
1064 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1069 pde = pmap_pde(pmap, va);
1073 /* are we current address space or kernel? */
1074 if (pmap_is_current(pmap))
1075 return (vtopte(va));
1076 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1077 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1078 newpf = *pde & PG_FRAME;
1079 if ((*PMAP1 & PG_FRAME) != newpf) {
1080 *PMAP1 = newpf | PG_RW | PG_V | PG_A | PG_M;
1082 PMAP1cpu = PCPU_GET(cpuid);
1088 if (PMAP1cpu != PCPU_GET(cpuid)) {
1089 PMAP1cpu = PCPU_GET(cpuid);
1095 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1101 * Routine: pmap_extract
1103 * Extract the physical page address associated
1104 * with the given map/virtual_address pair.
1107 pmap_extract(pmap_t pmap, vm_offset_t va)
1115 pde = pmap->pm_pdir[va >> PDRSHIFT];
1117 if ((pde & PG_PS) != 0)
1118 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
1120 pte = pmap_pte(pmap, va);
1121 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1122 pmap_pte_release(pte);
1130 * Routine: pmap_extract_and_hold
1132 * Atomically extract and hold the physical page
1133 * with the given pmap and virtual address pair
1134 * if that mapping permits the given protection.
1137 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1144 vm_page_lock_queues();
1146 pde = *pmap_pde(pmap, va);
1149 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1150 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1156 pte = *pmap_pte_quick(pmap, va);
1158 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1159 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1165 vm_page_unlock_queues();
1170 /***************************************************
1171 * Low level mapping routines.....
1172 ***************************************************/
1175 * Add a wired page to the kva.
1176 * Note: not SMP coherent.
1179 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1184 pte_store(pte, pa | PG_RW | PG_V | pgeflag);
1187 static __inline void
1188 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1193 pte_store(pte, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1197 * Remove a page from the kernel pagetables.
1198 * Note: not SMP coherent.
1201 pmap_kremove(vm_offset_t va)
1210 * Used to map a range of physical addresses into kernel
1211 * virtual address space.
1213 * The value passed in '*virt' is a suggested virtual address for
1214 * the mapping. Architectures which can support a direct-mapped
1215 * physical to virtual region can return the appropriate address
1216 * within that region, leaving '*virt' unchanged. Other
1217 * architectures should map the pages starting at '*virt' and
1218 * update '*virt' with the first usable address after the mapped
1222 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1224 vm_offset_t va, sva;
1227 while (start < end) {
1228 pmap_kenter(va, start);
1232 pmap_invalidate_range(kernel_pmap, sva, va);
1239 * Add a list of wired pages to the kva
1240 * this routine is only used for temporary
1241 * kernel mappings that do not need to have
1242 * page modification or references recorded.
1243 * Note that old mappings are simply written
1244 * over. The page *must* be wired.
1245 * Note: SMP coherent. Uses a ranged shootdown IPI.
1248 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1250 pt_entry_t *endpte, oldpte, *pte;
1254 endpte = pte + count;
1255 while (pte < endpte) {
1257 pte_store(pte, VM_PAGE_TO_PHYS(*ma) | pgeflag |
1258 pmap_cache_bits((*ma)->md.pat_mode, 0) | PG_RW | PG_V);
1262 if ((oldpte & PG_V) != 0)
1263 pmap_invalidate_range(kernel_pmap, sva, sva + count *
1268 * This routine tears out page mappings from the
1269 * kernel -- it is meant only for temporary mappings.
1270 * Note: SMP coherent. Uses a ranged shootdown IPI.
1273 pmap_qremove(vm_offset_t sva, int count)
1278 while (count-- > 0) {
1282 pmap_invalidate_range(kernel_pmap, sva, va);
1285 /***************************************************
1286 * Page table page management routines.....
1287 ***************************************************/
1288 static __inline void
1289 pmap_free_zero_pages(vm_page_t free)
1293 while (free != NULL) {
1296 /* Preserve the page's PG_ZERO setting. */
1297 vm_page_free_toq(m);
1302 * Schedule the specified unused page table page to be freed. Specifically,
1303 * add the page to the specified list of pages that will be released to the
1304 * physical memory manager after the TLB has been updated.
1306 static __inline void
1307 pmap_add_delayed_free_list(vm_page_t m, vm_page_t *free, boolean_t set_PG_ZERO)
1311 m->flags |= PG_ZERO;
1313 m->flags &= ~PG_ZERO;
1319 * Inserts the specified page table page into the specified pmap's collection
1320 * of idle page table pages. Each of a pmap's page table pages is responsible
1321 * for mapping a distinct range of virtual addresses. The pmap's collection is
1322 * ordered by this virtual address range.
1325 pmap_insert_pt_page(pmap_t pmap, vm_page_t mpte)
1329 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1330 root = pmap->pm_root;
1335 root = vm_page_splay(mpte->pindex, root);
1336 if (mpte->pindex < root->pindex) {
1337 mpte->left = root->left;
1340 } else if (mpte->pindex == root->pindex)
1341 panic("pmap_insert_pt_page: pindex already inserted");
1343 mpte->right = root->right;
1348 pmap->pm_root = mpte;
1352 * Looks for a page table page mapping the specified virtual address in the
1353 * specified pmap's collection of idle page table pages. Returns NULL if there
1354 * is no page table page corresponding to the specified virtual address.
1357 pmap_lookup_pt_page(pmap_t pmap, vm_offset_t va)
1360 vm_pindex_t pindex = va >> PDRSHIFT;
1362 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1363 if ((mpte = pmap->pm_root) != NULL && mpte->pindex != pindex) {
1364 mpte = vm_page_splay(pindex, mpte);
1365 if ((pmap->pm_root = mpte)->pindex != pindex)
1372 * Removes the specified page table page from the specified pmap's collection
1373 * of idle page table pages. The specified page table page must be a member of
1374 * the pmap's collection.
1377 pmap_remove_pt_page(pmap_t pmap, vm_page_t mpte)
1381 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1382 if (mpte != pmap->pm_root)
1383 vm_page_splay(mpte->pindex, pmap->pm_root);
1384 if (mpte->left == NULL)
1387 root = vm_page_splay(mpte->pindex, mpte->left);
1388 root->right = mpte->right;
1390 pmap->pm_root = root;
1394 * This routine unholds page table pages, and if the hold count
1395 * drops to zero, then it decrements the wire count.
1398 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1402 if (m->wire_count == 0)
1403 return _pmap_unwire_pte_hold(pmap, m, free);
1409 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1414 * unmap the page table page
1416 pmap->pm_pdir[m->pindex] = 0;
1417 --pmap->pm_stats.resident_count;
1420 * This is a release store so that the ordinary store unmapping
1421 * the page table page is globally performed before TLB shoot-
1424 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1427 * Do an invltlb to make the invalidated mapping
1428 * take effect immediately.
1430 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1431 pmap_invalidate_page(pmap, pteva);
1434 * Put page on a list so that it is released after
1435 * *ALL* TLB shootdown is done
1437 pmap_add_delayed_free_list(m, free, TRUE);
1443 * After removing a page table entry, this routine is used to
1444 * conditionally free the page, and manage the hold/wire counts.
1447 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1452 if (va >= VM_MAXUSER_ADDRESS)
1454 ptepde = *pmap_pde(pmap, va);
1455 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1456 return pmap_unwire_pte_hold(pmap, mpte, free);
1460 pmap_pinit0(pmap_t pmap)
1463 PMAP_LOCK_INIT(pmap);
1464 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1466 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1468 pmap->pm_root = NULL;
1469 pmap->pm_active = 0;
1470 PCPU_SET(curpmap, pmap);
1471 TAILQ_INIT(&pmap->pm_pvchunk);
1472 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1473 mtx_lock_spin(&allpmaps_lock);
1474 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1475 mtx_unlock_spin(&allpmaps_lock);
1479 * Initialize a preallocated and zeroed pmap structure,
1480 * such as one in a vmspace structure.
1483 pmap_pinit(pmap_t pmap)
1485 vm_page_t m, ptdpg[NPGPTD];
1490 PMAP_LOCK_INIT(pmap);
1493 * No need to allocate page table space yet but we do need a valid
1494 * page directory table.
1496 if (pmap->pm_pdir == NULL) {
1497 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1500 if (pmap->pm_pdir == NULL) {
1501 PMAP_LOCK_DESTROY(pmap);
1505 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1506 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1507 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1508 ("pmap_pinit: pdpt misaligned"));
1509 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1510 ("pmap_pinit: pdpt above 4g"));
1512 pmap->pm_root = NULL;
1514 KASSERT(pmap->pm_root == NULL,
1515 ("pmap_pinit: pmap has reserved page table page(s)"));
1518 * allocate the page directory page(s)
1520 for (i = 0; i < NPGPTD;) {
1521 m = vm_page_alloc(NULL, color++,
1522 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1531 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1533 for (i = 0; i < NPGPTD; i++) {
1534 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1535 bzero(pmap->pm_pdir + (i * NPDEPG), PAGE_SIZE);
1538 mtx_lock_spin(&allpmaps_lock);
1539 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1540 mtx_unlock_spin(&allpmaps_lock);
1541 /* Wire in kernel global address entries. */
1542 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1544 /* install self-referential address mapping entry(s) */
1545 for (i = 0; i < NPGPTD; i++) {
1546 pa = VM_PAGE_TO_PHYS(ptdpg[i]);
1547 pmap->pm_pdir[PTDPTDI + i] = pa | PG_V | PG_RW | PG_A | PG_M;
1549 pmap->pm_pdpt[i] = pa | PG_V;
1553 pmap->pm_active = 0;
1554 TAILQ_INIT(&pmap->pm_pvchunk);
1555 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1561 * this routine is called if the page table page is not
1565 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1570 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1571 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1572 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1575 * Allocate a page table page.
1577 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1578 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1579 if (flags & M_WAITOK) {
1581 vm_page_unlock_queues();
1583 vm_page_lock_queues();
1588 * Indicate the need to retry. While waiting, the page table
1589 * page may have been allocated.
1593 if ((m->flags & PG_ZERO) == 0)
1597 * Map the pagetable page into the process address space, if
1598 * it isn't already there.
1601 pmap->pm_stats.resident_count++;
1603 ptepa = VM_PAGE_TO_PHYS(m);
1604 pmap->pm_pdir[ptepindex] =
1605 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
1611 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1617 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1618 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1619 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1622 * Calculate pagetable page index
1624 ptepindex = va >> PDRSHIFT;
1627 * Get the page directory entry
1629 ptepa = pmap->pm_pdir[ptepindex];
1632 * This supports switching from a 4MB page to a
1635 if (ptepa & PG_PS) {
1636 (void)pmap_demote_pde(pmap, &pmap->pm_pdir[ptepindex], va);
1637 ptepa = pmap->pm_pdir[ptepindex];
1641 * If the page table page is mapped, we just increment the
1642 * hold count, and activate it.
1645 m = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
1649 * Here if the pte page isn't mapped, or if it has
1652 m = _pmap_allocpte(pmap, ptepindex, flags);
1653 if (m == NULL && (flags & M_WAITOK))
1660 /***************************************************
1661 * Pmap allocation/deallocation routines.
1662 ***************************************************/
1666 * Deal with a SMP shootdown of other users of the pmap that we are
1667 * trying to dispose of. This can be a bit hairy.
1669 static cpumask_t *lazymask;
1670 static u_int lazyptd;
1671 static volatile u_int lazywait;
1673 void pmap_lazyfix_action(void);
1676 pmap_lazyfix_action(void)
1678 cpumask_t mymask = PCPU_GET(cpumask);
1681 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1683 if (rcr3() == lazyptd)
1684 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1685 atomic_clear_int(lazymask, mymask);
1686 atomic_store_rel_int(&lazywait, 1);
1690 pmap_lazyfix_self(cpumask_t mymask)
1693 if (rcr3() == lazyptd)
1694 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1695 atomic_clear_int(lazymask, mymask);
1700 pmap_lazyfix(pmap_t pmap)
1702 cpumask_t mymask, mask;
1705 while ((mask = pmap->pm_active) != 0) {
1707 mask = mask & -mask; /* Find least significant set bit */
1708 mtx_lock_spin(&smp_ipi_mtx);
1710 lazyptd = vtophys(pmap->pm_pdpt);
1712 lazyptd = vtophys(pmap->pm_pdir);
1714 mymask = PCPU_GET(cpumask);
1715 if (mask == mymask) {
1716 lazymask = &pmap->pm_active;
1717 pmap_lazyfix_self(mymask);
1719 atomic_store_rel_int((u_int *)&lazymask,
1720 (u_int)&pmap->pm_active);
1721 atomic_store_rel_int(&lazywait, 0);
1722 ipi_selected(mask, IPI_LAZYPMAP);
1723 while (lazywait == 0) {
1729 mtx_unlock_spin(&smp_ipi_mtx);
1731 printf("pmap_lazyfix: spun for 50000000\n");
1738 * Cleaning up on uniprocessor is easy. For various reasons, we're
1739 * unlikely to have to even execute this code, including the fact
1740 * that the cleanup is deferred until the parent does a wait(2), which
1741 * means that another userland process has run.
1744 pmap_lazyfix(pmap_t pmap)
1748 cr3 = vtophys(pmap->pm_pdir);
1749 if (cr3 == rcr3()) {
1750 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1751 pmap->pm_active &= ~(PCPU_GET(cpumask));
1757 * Release any resources held by the given physical map.
1758 * Called when a pmap initialized by pmap_pinit is being released.
1759 * Should only be called if the map contains no valid mappings.
1762 pmap_release(pmap_t pmap)
1764 vm_page_t m, ptdpg[NPGPTD];
1767 KASSERT(pmap->pm_stats.resident_count == 0,
1768 ("pmap_release: pmap resident count %ld != 0",
1769 pmap->pm_stats.resident_count));
1770 KASSERT(pmap->pm_root == NULL,
1771 ("pmap_release: pmap has reserved page table page(s)"));
1774 mtx_lock_spin(&allpmaps_lock);
1775 LIST_REMOVE(pmap, pm_list);
1776 mtx_unlock_spin(&allpmaps_lock);
1778 for (i = 0; i < NPGPTD; i++)
1779 ptdpg[i] = PHYS_TO_VM_PAGE(pmap->pm_pdir[PTDPTDI + i] &
1782 bzero(pmap->pm_pdir + PTDPTDI, (nkpt + NPGPTD) *
1783 sizeof(*pmap->pm_pdir));
1785 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1787 for (i = 0; i < NPGPTD; i++) {
1790 KASSERT(VM_PAGE_TO_PHYS(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1791 ("pmap_release: got wrong ptd page"));
1794 atomic_subtract_int(&cnt.v_wire_count, 1);
1795 vm_page_free_zero(m);
1797 PMAP_LOCK_DESTROY(pmap);
1801 kvm_size(SYSCTL_HANDLER_ARGS)
1803 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1805 return sysctl_handle_long(oidp, &ksize, 0, req);
1807 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1808 0, 0, kvm_size, "IU", "Size of KVM");
1811 kvm_free(SYSCTL_HANDLER_ARGS)
1813 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1815 return sysctl_handle_long(oidp, &kfree, 0, req);
1817 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1818 0, 0, kvm_free, "IU", "Amount of KVM free");
1821 * grow the number of kernel page table entries, if needed
1824 pmap_growkernel(vm_offset_t addr)
1827 vm_paddr_t ptppaddr;
1832 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1833 if (kernel_vm_end == 0) {
1834 kernel_vm_end = KERNBASE;
1836 while (pdir_pde(PTD, kernel_vm_end)) {
1837 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1839 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1840 kernel_vm_end = kernel_map->max_offset;
1845 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1846 if (addr - 1 >= kernel_map->max_offset)
1847 addr = kernel_map->max_offset;
1848 while (kernel_vm_end < addr) {
1849 if (pdir_pde(PTD, kernel_vm_end)) {
1850 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1851 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1852 kernel_vm_end = kernel_map->max_offset;
1858 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
1859 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1862 panic("pmap_growkernel: no memory to grow kernel");
1866 if ((nkpg->flags & PG_ZERO) == 0)
1867 pmap_zero_page(nkpg);
1868 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1869 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1870 pdir_pde(PTD, kernel_vm_end) = newpdir;
1872 mtx_lock_spin(&allpmaps_lock);
1873 LIST_FOREACH(pmap, &allpmaps, pm_list) {
1874 pde = pmap_pde(pmap, kernel_vm_end);
1875 pde_store(pde, newpdir);
1877 mtx_unlock_spin(&allpmaps_lock);
1878 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1879 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1880 kernel_vm_end = kernel_map->max_offset;
1887 /***************************************************
1888 * page management routines.
1889 ***************************************************/
1891 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1892 CTASSERT(_NPCM == 11);
1894 static __inline struct pv_chunk *
1895 pv_to_chunk(pv_entry_t pv)
1898 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
1901 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1903 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1904 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1906 static uint32_t pc_freemask[11] = {
1907 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1908 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1909 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1910 PC_FREE0_9, PC_FREE10
1913 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1914 "Current number of pv entries");
1917 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1919 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1920 "Current number of pv entry chunks");
1921 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1922 "Current number of pv entry chunks allocated");
1923 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1924 "Current number of pv entry chunks frees");
1925 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1926 "Number of times tried to get a chunk page but failed.");
1928 static long pv_entry_frees, pv_entry_allocs;
1929 static int pv_entry_spare;
1931 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1932 "Current number of pv entry frees");
1933 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1934 "Current number of pv entry allocs");
1935 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1936 "Current number of spare pv entries");
1938 static int pmap_collect_inactive, pmap_collect_active;
1940 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
1941 "Current number times pmap_collect called on inactive queue");
1942 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
1943 "Current number times pmap_collect called on active queue");
1947 * We are in a serious low memory condition. Resort to
1948 * drastic measures to free some pages so we can allocate
1949 * another pv entry chunk. This is normally called to
1950 * unmap inactive pages, and if necessary, active pages.
1953 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
1955 struct md_page *pvh;
1958 pt_entry_t *pte, tpte;
1959 pv_entry_t next_pv, pv;
1964 TAILQ_FOREACH(m, &vpq->pl, pageq) {
1965 if (m->hold_count || m->busy)
1967 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
1970 /* Avoid deadlock and lock recursion. */
1971 if (pmap > locked_pmap)
1973 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
1975 pmap->pm_stats.resident_count--;
1976 pde = pmap_pde(pmap, va);
1977 KASSERT((*pde & PG_PS) == 0, ("pmap_collect: found"
1978 " a 4mpage in page %p's pv list", m));
1979 pte = pmap_pte_quick(pmap, va);
1980 tpte = pte_load_clear(pte);
1981 KASSERT((tpte & PG_W) == 0,
1982 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
1984 vm_page_flag_set(m, PG_REFERENCED);
1985 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
1988 pmap_unuse_pt(pmap, va, &free);
1989 pmap_invalidate_page(pmap, va);
1990 pmap_free_zero_pages(free);
1991 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1992 if (TAILQ_EMPTY(&m->md.pv_list)) {
1993 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
1994 if (TAILQ_EMPTY(&pvh->pv_list))
1995 vm_page_flag_clear(m, PG_WRITEABLE);
1997 free_pv_entry(pmap, pv);
1998 if (pmap != locked_pmap)
2007 * free the pv_entry back to the free list
2010 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2013 struct pv_chunk *pc;
2014 int idx, field, bit;
2016 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2017 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2018 PV_STAT(pv_entry_frees++);
2019 PV_STAT(pv_entry_spare++);
2021 pc = pv_to_chunk(pv);
2022 idx = pv - &pc->pc_pventry[0];
2025 pc->pc_map[field] |= 1ul << bit;
2026 /* move to head of list */
2027 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2028 for (idx = 0; idx < _NPCM; idx++)
2029 if (pc->pc_map[idx] != pc_freemask[idx]) {
2030 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2033 PV_STAT(pv_entry_spare -= _NPCPV);
2034 PV_STAT(pc_chunk_count--);
2035 PV_STAT(pc_chunk_frees++);
2036 /* entire chunk is free, return it */
2037 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2038 pmap_qremove((vm_offset_t)pc, 1);
2039 vm_page_unwire(m, 0);
2041 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2045 * get a new pv_entry, allocating a block from the system
2049 get_pv_entry(pmap_t pmap, int try)
2051 static const struct timeval printinterval = { 60, 0 };
2052 static struct timeval lastprint;
2053 static vm_pindex_t colour;
2054 struct vpgqueues *pq;
2057 struct pv_chunk *pc;
2060 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2061 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2062 PV_STAT(pv_entry_allocs++);
2064 if (pv_entry_count > pv_entry_high_water)
2065 if (ratecheck(&lastprint, &printinterval))
2066 printf("Approaching the limit on PV entries, consider "
2067 "increasing either the vm.pmap.shpgperproc or the "
2068 "vm.pmap.pv_entry_max tunable.\n");
2071 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2073 for (field = 0; field < _NPCM; field++) {
2074 if (pc->pc_map[field]) {
2075 bit = bsfl(pc->pc_map[field]);
2079 if (field < _NPCM) {
2080 pv = &pc->pc_pventry[field * 32 + bit];
2081 pc->pc_map[field] &= ~(1ul << bit);
2082 /* If this was the last item, move it to tail */
2083 for (field = 0; field < _NPCM; field++)
2084 if (pc->pc_map[field] != 0) {
2085 PV_STAT(pv_entry_spare--);
2086 return (pv); /* not full, return */
2088 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2089 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2090 PV_STAT(pv_entry_spare--);
2095 * Access to the ptelist "pv_vafree" is synchronized by the page
2096 * queues lock. If "pv_vafree" is currently non-empty, it will
2097 * remain non-empty until pmap_ptelist_alloc() completes.
2099 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2100 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2101 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2104 PV_STAT(pc_chunk_tryfail++);
2108 * Reclaim pv entries: At first, destroy mappings to
2109 * inactive pages. After that, if a pv chunk entry
2110 * is still needed, destroy mappings to active pages.
2113 PV_STAT(pmap_collect_inactive++);
2114 pq = &vm_page_queues[PQ_INACTIVE];
2115 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2116 PV_STAT(pmap_collect_active++);
2117 pq = &vm_page_queues[PQ_ACTIVE];
2119 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2120 pmap_collect(pmap, pq);
2123 PV_STAT(pc_chunk_count++);
2124 PV_STAT(pc_chunk_allocs++);
2126 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2127 pmap_qenter((vm_offset_t)pc, &m, 1);
2129 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2130 for (field = 1; field < _NPCM; field++)
2131 pc->pc_map[field] = pc_freemask[field];
2132 pv = &pc->pc_pventry[0];
2133 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2134 PV_STAT(pv_entry_spare += _NPCPV - 1);
2138 static __inline pv_entry_t
2139 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2143 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2144 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
2145 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2146 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2154 pmap_pv_demote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2156 struct md_page *pvh;
2158 vm_offset_t va_last;
2161 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2162 KASSERT((pa & PDRMASK) == 0,
2163 ("pmap_pv_demote_pde: pa is not 4mpage aligned"));
2166 * Transfer the 4mpage's pv entry for this mapping to the first
2169 pvh = pa_to_pvh(pa);
2170 va = trunc_4mpage(va);
2171 pv = pmap_pvh_remove(pvh, pmap, va);
2172 KASSERT(pv != NULL, ("pmap_pv_demote_pde: pv not found"));
2173 m = PHYS_TO_VM_PAGE(pa);
2174 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2175 /* Instantiate the remaining NPTEPG - 1 pv entries. */
2176 va_last = va + NBPDR - PAGE_SIZE;
2179 KASSERT((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0,
2180 ("pmap_pv_demote_pde: page %p is not managed", m));
2182 pmap_insert_entry(pmap, va, m);
2183 } while (va < va_last);
2187 pmap_pv_promote_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2189 struct md_page *pvh;
2191 vm_offset_t va_last;
2194 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2195 KASSERT((pa & PDRMASK) == 0,
2196 ("pmap_pv_promote_pde: pa is not 4mpage aligned"));
2199 * Transfer the first page's pv entry for this mapping to the
2200 * 4mpage's pv list. Aside from avoiding the cost of a call
2201 * to get_pv_entry(), a transfer avoids the possibility that
2202 * get_pv_entry() calls pmap_collect() and that pmap_collect()
2203 * removes one of the mappings that is being promoted.
2205 m = PHYS_TO_VM_PAGE(pa);
2206 va = trunc_4mpage(va);
2207 pv = pmap_pvh_remove(&m->md, pmap, va);
2208 KASSERT(pv != NULL, ("pmap_pv_promote_pde: pv not found"));
2209 pvh = pa_to_pvh(pa);
2210 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2211 /* Free the remaining NPTEPG - 1 pv entries. */
2212 va_last = va + NBPDR - PAGE_SIZE;
2216 pmap_pvh_free(&m->md, pmap, va);
2217 } while (va < va_last);
2221 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2225 pv = pmap_pvh_remove(pvh, pmap, va);
2226 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2227 free_pv_entry(pmap, pv);
2231 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2233 struct md_page *pvh;
2235 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2236 pmap_pvh_free(&m->md, pmap, va);
2237 if (TAILQ_EMPTY(&m->md.pv_list)) {
2238 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2239 if (TAILQ_EMPTY(&pvh->pv_list))
2240 vm_page_flag_clear(m, PG_WRITEABLE);
2245 * Create a pv entry for page at pa for
2249 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2253 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2254 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2255 pv = get_pv_entry(pmap, FALSE);
2257 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2261 * Conditionally create a pv entry.
2264 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2268 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2269 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2270 if (pv_entry_count < pv_entry_high_water &&
2271 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2273 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2280 * Create the pv entries for each of the pages within a superpage.
2283 pmap_pv_insert_pde(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
2285 struct md_page *pvh;
2288 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2289 if (pv_entry_count < pv_entry_high_water &&
2290 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2292 pvh = pa_to_pvh(pa);
2293 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
2300 * Fills a page table page with mappings to consecutive physical pages.
2303 pmap_fill_ptp(pt_entry_t *firstpte, pt_entry_t newpte)
2307 for (pte = firstpte; pte < firstpte + NPTEPG; pte++) {
2309 newpte += PAGE_SIZE;
2314 * Tries to demote a 2- or 4MB page mapping. If demotion fails, the
2315 * 2- or 4MB page mapping is invalidated.
2318 pmap_demote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2320 pd_entry_t newpde, oldpde;
2321 pmap_t allpmaps_entry;
2322 pt_entry_t *firstpte, newpte;
2324 vm_page_t free, mpte;
2326 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2328 KASSERT((oldpde & (PG_PS | PG_V)) == (PG_PS | PG_V),
2329 ("pmap_demote_pde: oldpde is missing PG_PS and/or PG_V"));
2330 mpte = pmap_lookup_pt_page(pmap, va);
2332 pmap_remove_pt_page(pmap, mpte);
2334 KASSERT((oldpde & PG_W) == 0,
2335 ("pmap_demote_pde: page table page for a wired mapping"
2339 * Invalidate the 2- or 4MB page mapping and return
2340 * "failure" if the mapping was never accessed or the
2341 * allocation of the new page table page fails.
2343 if ((oldpde & PG_A) == 0 || (mpte = vm_page_alloc(NULL,
2344 va >> PDRSHIFT, VM_ALLOC_NOOBJ | VM_ALLOC_NORMAL |
2345 VM_ALLOC_WIRED)) == NULL) {
2347 pmap_remove_pde(pmap, pde, trunc_4mpage(va), &free);
2348 pmap_invalidate_page(pmap, trunc_4mpage(va));
2349 pmap_free_zero_pages(free);
2350 CTR2(KTR_PMAP, "pmap_demote_pde: failure for va %#x"
2351 " in pmap %p", va, pmap);
2354 if (va < VM_MAXUSER_ADDRESS)
2355 pmap->pm_stats.resident_count++;
2357 mptepa = VM_PAGE_TO_PHYS(mpte);
2360 * Temporarily map the page table page (mpte) into the kernel's
2361 * address space at either PADDR1 or PADDR2.
2363 if (curthread->td_pinned > 0 && mtx_owned(&vm_page_queue_mtx)) {
2364 if ((*PMAP1 & PG_FRAME) != mptepa) {
2365 *PMAP1 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2367 PMAP1cpu = PCPU_GET(cpuid);
2373 if (PMAP1cpu != PCPU_GET(cpuid)) {
2374 PMAP1cpu = PCPU_GET(cpuid);
2382 mtx_lock(&PMAP2mutex);
2383 if ((*PMAP2 & PG_FRAME) != mptepa) {
2384 *PMAP2 = mptepa | PG_RW | PG_V | PG_A | PG_M;
2385 pmap_invalidate_page(kernel_pmap, (vm_offset_t)PADDR2);
2389 newpde = mptepa | PG_M | PG_A | (oldpde & PG_U) | PG_RW | PG_V;
2390 KASSERT((oldpde & PG_A) != 0,
2391 ("pmap_demote_pde: oldpde is missing PG_A"));
2392 KASSERT((oldpde & (PG_M | PG_RW)) != PG_RW,
2393 ("pmap_demote_pde: oldpde is missing PG_M"));
2394 newpte = oldpde & ~PG_PS;
2395 if ((newpte & PG_PDE_PAT) != 0)
2396 newpte ^= PG_PDE_PAT | PG_PTE_PAT;
2399 * If the page table page is new, initialize it.
2401 if (mpte->wire_count == 1) {
2402 mpte->wire_count = NPTEPG;
2403 pmap_fill_ptp(firstpte, newpte);
2405 KASSERT((*firstpte & PG_FRAME) == (newpte & PG_FRAME),
2406 ("pmap_demote_pde: firstpte and newpte map different physical"
2410 * If the mapping has changed attributes, update the page table
2413 if ((*firstpte & PG_PTE_PROMOTE) != (newpte & PG_PTE_PROMOTE))
2414 pmap_fill_ptp(firstpte, newpte);
2417 * Demote the mapping. This pmap is locked. The old PDE has
2418 * PG_A set. If the old PDE has PG_RW set, it also has PG_M
2419 * set. Thus, there is no danger of a race with another
2420 * processor changing the setting of PG_A and/or PG_M between
2421 * the read above and the store below.
2423 if (pmap == kernel_pmap) {
2425 * A harmless race exists between this loop and the bcopy()
2426 * in pmap_pinit() that initializes the kernel segment of
2427 * the new page table. Specifically, that bcopy() may copy
2428 * the new PDE from the PTD, which is first in allpmaps, to
2429 * the new page table before this loop updates that new
2432 mtx_lock_spin(&allpmaps_lock);
2433 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) {
2434 pde = pmap_pde(allpmaps_entry, va);
2435 KASSERT(*pde == newpde || (*pde & PG_PTE_PROMOTE) ==
2436 (oldpde & PG_PTE_PROMOTE),
2437 ("pmap_demote_pde: pde was %#jx, expected %#jx",
2438 (uintmax_t)*pde, (uintmax_t)oldpde));
2439 pde_store(pde, newpde);
2441 mtx_unlock_spin(&allpmaps_lock);
2443 pde_store(pde, newpde);
2444 if (firstpte == PADDR2)
2445 mtx_unlock(&PMAP2mutex);
2448 * Invalidate the recursive mapping of the page table page.
2450 pmap_invalidate_page(pmap, (vm_offset_t)vtopte(va));
2453 * Demote the pv entry. This depends on the earlier demotion
2454 * of the mapping. Specifically, the (re)creation of a per-
2455 * page pv entry might trigger the execution of pmap_collect(),
2456 * which might reclaim a newly (re)created per-page pv entry
2457 * and destroy the associated mapping. In order to destroy
2458 * the mapping, the PDE must have already changed from mapping
2459 * the 2mpage to referencing the page table page.
2461 if ((oldpde & PG_MANAGED) != 0)
2462 pmap_pv_demote_pde(pmap, va, oldpde & PG_PS_FRAME);
2464 pmap_pde_demotions++;
2465 CTR2(KTR_PMAP, "pmap_demote_pde: success for va %#x"
2466 " in pmap %p", va, pmap);
2471 * pmap_remove_pde: do the things to unmap a superpage in a process
2474 pmap_remove_pde(pmap_t pmap, pd_entry_t *pdq, vm_offset_t sva,
2477 struct md_page *pvh;
2479 vm_offset_t eva, va;
2482 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2483 KASSERT((sva & PDRMASK) == 0,
2484 ("pmap_remove_pde: sva is not 4mpage aligned"));
2485 oldpde = pte_load_clear(pdq);
2487 pmap->pm_stats.wired_count -= NBPDR / PAGE_SIZE;
2490 * Machines that don't support invlpg, also don't support
2494 pmap_invalidate_page(kernel_pmap, sva);
2495 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2496 if (oldpde & PG_MANAGED) {
2497 pvh = pa_to_pvh(oldpde & PG_PS_FRAME);
2498 pmap_pvh_free(pvh, pmap, sva);
2500 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2501 va < eva; va += PAGE_SIZE, m++) {
2502 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2505 vm_page_flag_set(m, PG_REFERENCED);
2506 if (TAILQ_EMPTY(&m->md.pv_list) &&
2507 TAILQ_EMPTY(&pvh->pv_list))
2508 vm_page_flag_clear(m, PG_WRITEABLE);
2511 if (pmap == kernel_pmap) {
2512 if (!pmap_demote_pde(pmap, pdq, sva))
2513 panic("pmap_remove_pde: failed demotion");
2515 mpte = pmap_lookup_pt_page(pmap, sva);
2517 pmap_remove_pt_page(pmap, mpte);
2518 pmap->pm_stats.resident_count--;
2519 KASSERT(mpte->wire_count == NPTEPG,
2520 ("pmap_remove_pde: pte page wire count error"));
2521 mpte->wire_count = 0;
2522 pmap_add_delayed_free_list(mpte, free, FALSE);
2523 atomic_subtract_int(&cnt.v_wire_count, 1);
2529 * pmap_remove_pte: do the things to unmap a page in a process
2532 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2537 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2538 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2539 oldpte = pte_load_clear(ptq);
2541 pmap->pm_stats.wired_count -= 1;
2543 * Machines that don't support invlpg, also don't support
2547 pmap_invalidate_page(kernel_pmap, va);
2548 pmap->pm_stats.resident_count -= 1;
2549 if (oldpte & PG_MANAGED) {
2550 m = PHYS_TO_VM_PAGE(oldpte & PG_FRAME);
2551 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2554 vm_page_flag_set(m, PG_REFERENCED);
2555 pmap_remove_entry(pmap, m, va);
2557 return (pmap_unuse_pt(pmap, va, free));
2561 * Remove a single page from a process address space
2564 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2568 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2569 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2570 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2571 if ((pte = pmap_pte_quick(pmap, va)) == NULL || *pte == 0)
2573 pmap_remove_pte(pmap, pte, va, free);
2574 pmap_invalidate_page(pmap, va);
2578 * Remove the given range of addresses from the specified map.
2580 * It is assumed that the start and end are properly
2581 * rounded to the page size.
2584 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2589 vm_page_t free = NULL;
2593 * Perform an unsynchronized read. This is, however, safe.
2595 if (pmap->pm_stats.resident_count == 0)
2600 vm_page_lock_queues();
2605 * special handling of removing one page. a very
2606 * common operation and easy to short circuit some
2609 if ((sva + PAGE_SIZE == eva) &&
2610 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2611 pmap_remove_page(pmap, sva, &free);
2615 for (; sva < eva; sva = pdnxt) {
2619 * Calculate index for next page table.
2621 pdnxt = (sva + NBPDR) & ~PDRMASK;
2624 if (pmap->pm_stats.resident_count == 0)
2627 pdirindex = sva >> PDRSHIFT;
2628 ptpaddr = pmap->pm_pdir[pdirindex];
2631 * Weed out invalid mappings. Note: we assume that the page
2632 * directory table is always allocated, and in kernel virtual.
2638 * Check for large page.
2640 if ((ptpaddr & PG_PS) != 0) {
2642 * Are we removing the entire large page? If not,
2643 * demote the mapping and fall through.
2645 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2647 * The TLB entry for a PG_G mapping is
2648 * invalidated by pmap_remove_pde().
2650 if ((ptpaddr & PG_G) == 0)
2652 pmap_remove_pde(pmap,
2653 &pmap->pm_pdir[pdirindex], sva, &free);
2655 } else if (!pmap_demote_pde(pmap,
2656 &pmap->pm_pdir[pdirindex], sva)) {
2657 /* The large page mapping was destroyed. */
2663 * Limit our scan to either the end of the va represented
2664 * by the current page table page, or to the end of the
2665 * range being removed.
2670 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2676 * The TLB entry for a PG_G mapping is invalidated
2677 * by pmap_remove_pte().
2679 if ((*pte & PG_G) == 0)
2681 if (pmap_remove_pte(pmap, pte, sva, &free))
2688 pmap_invalidate_all(pmap);
2689 vm_page_unlock_queues();
2691 pmap_free_zero_pages(free);
2695 * Routine: pmap_remove_all
2697 * Removes this physical page from
2698 * all physical maps in which it resides.
2699 * Reflects back modify bits to the pager.
2702 * Original versions of this routine were very
2703 * inefficient because they iteratively called
2704 * pmap_remove (slow...)
2708 pmap_remove_all(vm_page_t m)
2710 struct md_page *pvh;
2713 pt_entry_t *pte, tpte;
2718 KASSERT((m->flags & PG_FICTITIOUS) == 0,
2719 ("pmap_remove_all: page %p is fictitious", m));
2720 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2722 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2723 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2727 pde = pmap_pde(pmap, va);
2728 (void)pmap_demote_pde(pmap, pde, va);
2731 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2734 pmap->pm_stats.resident_count--;
2735 pde = pmap_pde(pmap, pv->pv_va);
2736 KASSERT((*pde & PG_PS) == 0, ("pmap_remove_all: found"
2737 " a 4mpage in page %p's pv list", m));
2738 pte = pmap_pte_quick(pmap, pv->pv_va);
2739 tpte = pte_load_clear(pte);
2741 pmap->pm_stats.wired_count--;
2743 vm_page_flag_set(m, PG_REFERENCED);
2746 * Update the vm_page_t clean and reference bits.
2748 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2751 pmap_unuse_pt(pmap, pv->pv_va, &free);
2752 pmap_invalidate_page(pmap, pv->pv_va);
2753 pmap_free_zero_pages(free);
2754 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2755 free_pv_entry(pmap, pv);
2758 vm_page_flag_clear(m, PG_WRITEABLE);
2763 * pmap_protect_pde: do the things to protect a 4mpage in a process
2766 pmap_protect_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t sva, vm_prot_t prot)
2768 pd_entry_t newpde, oldpde;
2769 vm_offset_t eva, va;
2771 boolean_t anychanged;
2773 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2774 KASSERT((sva & PDRMASK) == 0,
2775 ("pmap_protect_pde: sva is not 4mpage aligned"));
2778 oldpde = newpde = *pde;
2779 if (oldpde & PG_MANAGED) {
2781 for (va = sva, m = PHYS_TO_VM_PAGE(oldpde & PG_PS_FRAME);
2782 va < eva; va += PAGE_SIZE, m++) {
2784 * In contrast to the analogous operation on a 4KB page
2785 * mapping, the mapping's PG_A flag is not cleared and
2786 * the page's PG_REFERENCED flag is not set. The
2787 * reason is that pmap_demote_pde() expects that a 2/4MB
2788 * page mapping with a stored page table page has PG_A
2791 if ((oldpde & (PG_M | PG_RW)) == (PG_M | PG_RW))
2795 if ((prot & VM_PROT_WRITE) == 0)
2796 newpde &= ~(PG_RW | PG_M);
2798 if ((prot & VM_PROT_EXECUTE) == 0)
2801 if (newpde != oldpde) {
2802 if (!pde_cmpset(pde, oldpde, newpde))
2805 pmap_invalidate_page(pmap, sva);
2809 return (anychanged);
2813 * Set the physical protection on the
2814 * specified range of this map as requested.
2817 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2824 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2825 pmap_remove(pmap, sva, eva);
2830 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2831 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2834 if (prot & VM_PROT_WRITE)
2840 vm_page_lock_queues();
2843 for (; sva < eva; sva = pdnxt) {
2844 pt_entry_t obits, pbits;
2847 pdnxt = (sva + NBPDR) & ~PDRMASK;
2851 pdirindex = sva >> PDRSHIFT;
2852 ptpaddr = pmap->pm_pdir[pdirindex];
2855 * Weed out invalid mappings. Note: we assume that the page
2856 * directory table is always allocated, and in kernel virtual.
2862 * Check for large page.
2864 if ((ptpaddr & PG_PS) != 0) {
2866 * Are we protecting the entire large page? If not,
2867 * demote the mapping and fall through.
2869 if (sva + NBPDR == pdnxt && eva >= pdnxt) {
2871 * The TLB entry for a PG_G mapping is
2872 * invalidated by pmap_protect_pde().
2874 if (pmap_protect_pde(pmap,
2875 &pmap->pm_pdir[pdirindex], sva, prot))
2878 } else if (!pmap_demote_pde(pmap,
2879 &pmap->pm_pdir[pdirindex], sva)) {
2880 /* The large page mapping was destroyed. */
2888 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2894 * Regardless of whether a pte is 32 or 64 bits in
2895 * size, PG_RW, PG_A, and PG_M are among the least
2896 * significant 32 bits.
2898 obits = pbits = *pte;
2899 if ((pbits & PG_V) == 0)
2901 if (pbits & PG_MANAGED) {
2904 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2905 vm_page_flag_set(m, PG_REFERENCED);
2908 if ((pbits & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
2910 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2915 if ((prot & VM_PROT_WRITE) == 0)
2916 pbits &= ~(PG_RW | PG_M);
2918 if ((prot & VM_PROT_EXECUTE) == 0)
2922 if (pbits != obits) {
2924 if (!atomic_cmpset_64(pte, obits, pbits))
2927 if (!atomic_cmpset_int((u_int *)pte, obits,
2932 pmap_invalidate_page(pmap, sva);
2940 pmap_invalidate_all(pmap);
2941 vm_page_unlock_queues();
2946 * Tries to promote the 512 or 1024, contiguous 4KB page mappings that are
2947 * within a single page table page (PTP) to a single 2- or 4MB page mapping.
2948 * For promotion to occur, two conditions must be met: (1) the 4KB page
2949 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
2950 * mappings must have identical characteristics.
2952 * Managed (PG_MANAGED) mappings within the kernel address space are not
2953 * promoted. The reason is that kernel PDEs are replicated in each pmap but
2954 * pmap_clear_ptes() and pmap_ts_referenced() only read the PDE from the kernel
2958 pmap_promote_pde(pmap_t pmap, pd_entry_t *pde, vm_offset_t va)
2961 pmap_t allpmaps_entry;
2962 pt_entry_t *firstpte, oldpte, pa, *pte;
2963 vm_offset_t oldpteva;
2966 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2969 * Examine the first PTE in the specified PTP. Abort if this PTE is
2970 * either invalid, unused, or does not map the first 4KB physical page
2971 * within a 2- or 4MB page.
2973 firstpte = vtopte(trunc_4mpage(va));
2976 if ((newpde & ((PG_FRAME & PDRMASK) | PG_A | PG_V)) != (PG_A | PG_V)) {
2977 pmap_pde_p_failures++;
2978 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
2979 " in pmap %p", va, pmap);
2982 if ((*firstpte & PG_MANAGED) != 0 && pmap == kernel_pmap) {
2983 pmap_pde_p_failures++;
2984 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
2985 " in pmap %p", va, pmap);
2988 if ((newpde & (PG_M | PG_RW)) == PG_RW) {
2990 * When PG_M is already clear, PG_RW can be cleared without
2991 * a TLB invalidation.
2993 if (!atomic_cmpset_int((u_int *)firstpte, newpde, newpde &
3000 * Examine each of the other PTEs in the specified PTP. Abort if this
3001 * PTE maps an unexpected 4KB physical page or does not have identical
3002 * characteristics to the first PTE.
3004 pa = (newpde & (PG_PS_FRAME | PG_A | PG_V)) + NBPDR - PAGE_SIZE;
3005 for (pte = firstpte + NPTEPG - 1; pte > firstpte; pte--) {
3008 if ((oldpte & (PG_FRAME | PG_A | PG_V)) != pa) {
3009 pmap_pde_p_failures++;
3010 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3011 " in pmap %p", va, pmap);
3014 if ((oldpte & (PG_M | PG_RW)) == PG_RW) {
3016 * When PG_M is already clear, PG_RW can be cleared
3017 * without a TLB invalidation.
3019 if (!atomic_cmpset_int((u_int *)pte, oldpte,
3023 oldpteva = (oldpte & PG_FRAME & PDRMASK) |
3025 CTR2(KTR_PMAP, "pmap_promote_pde: protect for va %#x"
3026 " in pmap %p", oldpteva, pmap);
3028 if ((oldpte & PG_PTE_PROMOTE) != (newpde & PG_PTE_PROMOTE)) {
3029 pmap_pde_p_failures++;
3030 CTR2(KTR_PMAP, "pmap_promote_pde: failure for va %#x"
3031 " in pmap %p", va, pmap);
3038 * Save the page table page in its current state until the PDE
3039 * mapping the superpage is demoted by pmap_demote_pde() or
3040 * destroyed by pmap_remove_pde().
3042 mpte = PHYS_TO_VM_PAGE(*pde & PG_FRAME);
3043 KASSERT(mpte >= vm_page_array &&
3044 mpte < &vm_page_array[vm_page_array_size],
3045 ("pmap_promote_pde: page table page is out of range"));
3046 KASSERT(mpte->pindex == va >> PDRSHIFT,
3047 ("pmap_promote_pde: page table page's pindex is wrong"));
3048 pmap_insert_pt_page(pmap, mpte);
3051 * Promote the pv entries.
3053 if ((newpde & PG_MANAGED) != 0)
3054 pmap_pv_promote_pde(pmap, va, newpde & PG_PS_FRAME);
3057 * Propagate the PAT index to its proper position.
3059 if ((newpde & PG_PTE_PAT) != 0)
3060 newpde ^= PG_PDE_PAT | PG_PTE_PAT;
3063 * Map the superpage.
3065 if (pmap == kernel_pmap) {
3066 mtx_lock_spin(&allpmaps_lock);
3067 LIST_FOREACH(allpmaps_entry, &allpmaps, pm_list) {
3068 pde = pmap_pde(allpmaps_entry, va);
3069 pde_store(pde, PG_PS | newpde);
3071 mtx_unlock_spin(&allpmaps_lock);
3073 pde_store(pde, PG_PS | newpde);
3075 pmap_pde_promotions++;
3076 CTR2(KTR_PMAP, "pmap_promote_pde: success for va %#x"
3077 " in pmap %p", va, pmap);
3081 * Insert the given physical page (p) at
3082 * the specified virtual address (v) in the
3083 * target physical map with the protection requested.
3085 * If specified, the page will be wired down, meaning
3086 * that the related pte can not be reclaimed.
3088 * NB: This is the only routine which MAY NOT lazy-evaluate
3089 * or lose information. That is, this routine must actually
3090 * insert this page into the given map NOW.
3093 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
3094 vm_prot_t prot, boolean_t wired)
3100 pt_entry_t origpte, newpte;
3104 va = trunc_page(va);
3105 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
3106 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
3107 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va));
3111 vm_page_lock_queues();
3116 * In the case that a page table page is not
3117 * resident, we are creating it here.
3119 if (va < VM_MAXUSER_ADDRESS) {
3120 mpte = pmap_allocpte(pmap, va, M_WAITOK);
3123 pde = pmap_pde(pmap, va);
3124 if ((*pde & PG_PS) != 0)
3125 panic("pmap_enter: attempted pmap_enter on 4MB page");
3126 pte = pmap_pte_quick(pmap, va);
3129 * Page Directory table entry not valid, we need a new PT page
3132 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
3133 (uintmax_t)pmap->pm_pdir[PTDPTDI], va);
3136 pa = VM_PAGE_TO_PHYS(m);
3139 opa = origpte & PG_FRAME;
3142 * Mapping has not changed, must be protection or wiring change.
3144 if (origpte && (opa == pa)) {
3146 * Wiring change, just update stats. We don't worry about
3147 * wiring PT pages as they remain resident as long as there
3148 * are valid mappings in them. Hence, if a user page is wired,
3149 * the PT page will be also.
3151 if (wired && ((origpte & PG_W) == 0))
3152 pmap->pm_stats.wired_count++;
3153 else if (!wired && (origpte & PG_W))
3154 pmap->pm_stats.wired_count--;
3157 * Remove extra pte reference
3163 * We might be turning off write access to the page,
3164 * so we go ahead and sense modify status.
3166 if (origpte & PG_MANAGED) {
3173 * Mapping has changed, invalidate old range and fall through to
3174 * handle validating new mapping.
3178 pmap->pm_stats.wired_count--;
3179 if (origpte & PG_MANAGED) {
3180 om = PHYS_TO_VM_PAGE(opa);
3181 pmap_remove_entry(pmap, om, va);
3185 KASSERT(mpte->wire_count > 0,
3186 ("pmap_enter: missing reference to page table page,"
3190 pmap->pm_stats.resident_count++;
3193 * Enter on the PV list if part of our managed memory.
3195 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3196 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3197 ("pmap_enter: managed mapping within the clean submap"));
3198 pmap_insert_entry(pmap, va, m);
3203 * Increment counters
3206 pmap->pm_stats.wired_count++;
3210 * Now validate mapping with desired protection/wiring.
3212 newpte = (pt_entry_t)(pa | pmap_cache_bits(m->md.pat_mode, 0) | PG_V);
3213 if ((prot & VM_PROT_WRITE) != 0) {
3215 vm_page_flag_set(m, PG_WRITEABLE);
3218 if ((prot & VM_PROT_EXECUTE) == 0)
3223 if (va < VM_MAXUSER_ADDRESS)
3225 if (pmap == kernel_pmap)
3229 * if the mapping or permission bits are different, we need
3230 * to update the pte.
3232 if ((origpte & ~(PG_M|PG_A)) != newpte) {
3234 if ((access & VM_PROT_WRITE) != 0)
3236 if (origpte & PG_V) {
3238 origpte = pte_load_store(pte, newpte);
3239 if (origpte & PG_A) {
3240 if (origpte & PG_MANAGED)
3241 vm_page_flag_set(om, PG_REFERENCED);
3242 if (opa != VM_PAGE_TO_PHYS(m))
3245 if ((origpte & PG_NX) == 0 &&
3246 (newpte & PG_NX) != 0)
3250 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3251 if ((origpte & PG_MANAGED) != 0)
3253 if ((prot & VM_PROT_WRITE) == 0)
3257 pmap_invalidate_page(pmap, va);
3259 pte_store(pte, newpte);
3263 * If both the page table page and the reservation are fully
3264 * populated, then attempt promotion.
3266 if ((mpte == NULL || mpte->wire_count == NPTEPG) &&
3267 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0)
3268 pmap_promote_pde(pmap, pde, va);
3271 vm_page_unlock_queues();
3276 * Tries to create a 2- or 4MB page mapping. Returns TRUE if successful and
3277 * FALSE otherwise. Fails if (1) a page table page cannot be allocated without
3278 * blocking, (2) a mapping already exists at the specified virtual address, or
3279 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3282 pmap_enter_pde(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3284 pd_entry_t *pde, newpde;
3286 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3287 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3288 pde = pmap_pde(pmap, va);
3290 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3291 " in pmap %p", va, pmap);
3294 newpde = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 1) |
3296 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
3297 newpde |= PG_MANAGED;
3300 * Abort this mapping if its PV entry could not be created.
3302 if (!pmap_pv_insert_pde(pmap, va, VM_PAGE_TO_PHYS(m))) {
3303 CTR2(KTR_PMAP, "pmap_enter_pde: failure for va %#lx"
3304 " in pmap %p", va, pmap);
3309 if ((prot & VM_PROT_EXECUTE) == 0)
3312 if (va < VM_MAXUSER_ADDRESS)
3316 * Increment counters.
3318 pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3321 * Map the superpage.
3323 pde_store(pde, newpde);
3325 pmap_pde_mappings++;
3326 CTR2(KTR_PMAP, "pmap_enter_pde: success for va %#lx"
3327 " in pmap %p", va, pmap);
3332 * Maps a sequence of resident pages belonging to the same object.
3333 * The sequence begins with the given page m_start. This page is
3334 * mapped at the given virtual address start. Each subsequent page is
3335 * mapped at a virtual address that is offset from start by the same
3336 * amount as the page is offset from m_start within the object. The
3337 * last page in the sequence is the page with the largest offset from
3338 * m_start that can be mapped at a virtual address less than the given
3339 * virtual address end. Not every virtual page between start and end
3340 * is mapped; only those for which a resident page exists with the
3341 * corresponding offset from m_start are mapped.
3344 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3345 vm_page_t m_start, vm_prot_t prot)
3349 vm_pindex_t diff, psize;
3351 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
3352 psize = atop(end - start);
3356 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3357 va = start + ptoa(diff);
3358 if ((va & PDRMASK) == 0 && va + NBPDR <= end &&
3359 (VM_PAGE_TO_PHYS(m) & PDRMASK) == 0 &&
3360 pg_ps_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3361 pmap_enter_pde(pmap, va, m, prot))
3362 m = &m[NBPDR / PAGE_SIZE - 1];
3364 mpte = pmap_enter_quick_locked(pmap, va, m, prot,
3366 m = TAILQ_NEXT(m, listq);
3372 * this code makes some *MAJOR* assumptions:
3373 * 1. Current pmap & pmap exists.
3376 * 4. No page table pages.
3377 * but is *MUCH* faster than pmap_enter...
3381 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3385 (void) pmap_enter_quick_locked(pmap, va, m, prot, NULL);
3390 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
3391 vm_prot_t prot, vm_page_t mpte)
3397 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
3398 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
3399 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
3400 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3401 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
3404 * In the case that a page table page is not
3405 * resident, we are creating it here.
3407 if (va < VM_MAXUSER_ADDRESS) {
3412 * Calculate pagetable page index
3414 ptepindex = va >> PDRSHIFT;
3415 if (mpte && (mpte->pindex == ptepindex)) {
3419 * Get the page directory entry
3421 ptepa = pmap->pm_pdir[ptepindex];
3424 * If the page table page is mapped, we just increment
3425 * the hold count, and activate it.
3430 mpte = PHYS_TO_VM_PAGE(ptepa & PG_FRAME);
3433 mpte = _pmap_allocpte(pmap, ptepindex,
3444 * This call to vtopte makes the assumption that we are
3445 * entering the page into the current pmap. In order to support
3446 * quick entry into any pmap, one would likely use pmap_pte_quick.
3447 * But that isn't as quick as vtopte.
3459 * Enter on the PV list if part of our managed memory.
3461 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
3462 !pmap_try_insert_pv_entry(pmap, va, m)) {
3465 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3466 pmap_invalidate_page(pmap, va);
3467 pmap_free_zero_pages(free);
3476 * Increment counters
3478 pmap->pm_stats.resident_count++;
3480 pa = VM_PAGE_TO_PHYS(m) | pmap_cache_bits(m->md.pat_mode, 0);
3482 if ((prot & VM_PROT_EXECUTE) == 0)
3487 * Now validate mapping with RO protection
3489 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3490 pte_store(pte, pa | PG_V | PG_U);
3492 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3497 * Make a temporary mapping for a physical address. This is only intended
3498 * to be used for panic dumps.
3501 pmap_kenter_temporary(vm_paddr_t pa, int i)
3505 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3506 pmap_kenter(va, pa);
3508 return ((void *)crashdumpmap);
3512 * This code maps large physical mmap regions into the
3513 * processor address space. Note that some shortcuts
3514 * are taken, but the code works.
3517 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3518 vm_pindex_t pindex, vm_size_t size)
3521 vm_paddr_t pa, ptepa;
3525 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3526 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3527 ("pmap_object_init_pt: non-device object"));
3529 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3530 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3532 p = vm_page_lookup(object, pindex);
3533 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3534 ("pmap_object_init_pt: invalid page %p", p));
3535 pat_mode = p->md.pat_mode;
3538 * Abort the mapping if the first page is not physically
3539 * aligned to a 2/4MB page boundary.
3541 ptepa = VM_PAGE_TO_PHYS(p);
3542 if (ptepa & (NBPDR - 1))
3546 * Skip the first page. Abort the mapping if the rest of
3547 * the pages are not physically contiguous or have differing
3548 * memory attributes.
3550 p = TAILQ_NEXT(p, listq);
3551 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3553 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3554 ("pmap_object_init_pt: invalid page %p", p));
3555 if (pa != VM_PAGE_TO_PHYS(p) ||
3556 pat_mode != p->md.pat_mode)
3558 p = TAILQ_NEXT(p, listq);
3562 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3563 * "size" is a multiple of 2/4M, adding the PAT setting to
3564 * "pa" will not affect the termination of this loop.
3567 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3568 size; pa += NBPDR) {
3569 pde = pmap_pde(pmap, addr);
3571 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3572 PG_U | PG_RW | PG_V);
3573 pmap->pm_stats.resident_count += NBPDR /
3575 pmap_pde_mappings++;
3577 /* Else continue on if the PDE is already valid. */
3585 * Routine: pmap_change_wiring
3586 * Function: Change the wiring attribute for a map/virtual-address
3588 * In/out conditions:
3589 * The mapping must already exist in the pmap.
3592 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3596 boolean_t are_queues_locked;
3598 are_queues_locked = FALSE;
3601 pde = pmap_pde(pmap, va);
3602 if ((*pde & PG_PS) != 0) {
3603 if (!wired != ((*pde & PG_W) == 0)) {
3604 if (!are_queues_locked) {
3605 are_queues_locked = TRUE;
3606 if (!mtx_trylock(&vm_page_queue_mtx)) {
3608 vm_page_lock_queues();
3612 if (!pmap_demote_pde(pmap, pde, va))
3613 panic("pmap_change_wiring: demotion failed");
3617 pte = pmap_pte(pmap, va);
3619 if (wired && !pmap_pte_w(pte))
3620 pmap->pm_stats.wired_count++;
3621 else if (!wired && pmap_pte_w(pte))
3622 pmap->pm_stats.wired_count--;
3625 * Wiring is not a hardware characteristic so there is no need to
3628 pmap_pte_set_w(pte, wired);
3629 pmap_pte_release(pte);
3631 if (are_queues_locked)
3632 vm_page_unlock_queues();
3639 * Copy the range specified by src_addr/len
3640 * from the source map to the range dst_addr/len
3641 * in the destination map.
3643 * This routine is only advisory and need not do anything.
3647 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3648 vm_offset_t src_addr)
3652 vm_offset_t end_addr = src_addr + len;
3655 if (dst_addr != src_addr)
3658 if (!pmap_is_current(src_pmap))
3661 vm_page_lock_queues();
3662 if (dst_pmap < src_pmap) {
3663 PMAP_LOCK(dst_pmap);
3664 PMAP_LOCK(src_pmap);
3666 PMAP_LOCK(src_pmap);
3667 PMAP_LOCK(dst_pmap);
3670 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3671 pt_entry_t *src_pte, *dst_pte;
3672 vm_page_t dstmpte, srcmpte;
3673 pd_entry_t srcptepaddr;
3676 KASSERT(addr < UPT_MIN_ADDRESS,
3677 ("pmap_copy: invalid to pmap_copy page tables"));
3679 pdnxt = (addr + NBPDR) & ~PDRMASK;
3682 ptepindex = addr >> PDRSHIFT;
3684 srcptepaddr = src_pmap->pm_pdir[ptepindex];
3685 if (srcptepaddr == 0)
3688 if (srcptepaddr & PG_PS) {
3689 if (dst_pmap->pm_pdir[ptepindex] == 0 &&
3690 ((srcptepaddr & PG_MANAGED) == 0 ||
3691 pmap_pv_insert_pde(dst_pmap, addr, srcptepaddr &
3693 dst_pmap->pm_pdir[ptepindex] = srcptepaddr &
3695 dst_pmap->pm_stats.resident_count +=
3701 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3702 KASSERT(srcmpte->wire_count > 0,
3703 ("pmap_copy: source page table page is unused"));
3705 if (pdnxt > end_addr)
3708 src_pte = vtopte(addr);
3709 while (addr < pdnxt) {
3713 * we only virtual copy managed pages
3715 if ((ptetemp & PG_MANAGED) != 0) {
3716 dstmpte = pmap_allocpte(dst_pmap, addr,
3718 if (dstmpte == NULL)
3720 dst_pte = pmap_pte_quick(dst_pmap, addr);
3721 if (*dst_pte == 0 &&
3722 pmap_try_insert_pv_entry(dst_pmap, addr,
3723 PHYS_TO_VM_PAGE(ptetemp & PG_FRAME))) {
3725 * Clear the wired, modified, and
3726 * accessed (referenced) bits
3729 *dst_pte = ptetemp & ~(PG_W | PG_M |
3731 dst_pmap->pm_stats.resident_count++;
3734 if (pmap_unwire_pte_hold(dst_pmap,
3736 pmap_invalidate_page(dst_pmap,
3738 pmap_free_zero_pages(free);
3742 if (dstmpte->wire_count >= srcmpte->wire_count)
3751 vm_page_unlock_queues();
3752 PMAP_UNLOCK(src_pmap);
3753 PMAP_UNLOCK(dst_pmap);
3756 static __inline void
3757 pagezero(void *page)
3759 #if defined(I686_CPU)
3760 if (cpu_class == CPUCLASS_686) {
3761 #if defined(CPU_ENABLE_SSE)
3762 if (cpu_feature & CPUID_SSE2)
3763 sse2_pagezero(page);
3766 i686_pagezero(page);
3769 bzero(page, PAGE_SIZE);
3773 * pmap_zero_page zeros the specified hardware page by mapping
3774 * the page into KVM and using bzero to clear its contents.
3777 pmap_zero_page(vm_page_t m)
3779 struct sysmaps *sysmaps;
3781 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3782 mtx_lock(&sysmaps->lock);
3783 if (*sysmaps->CMAP2)
3784 panic("pmap_zero_page: CMAP2 busy");
3786 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3787 pmap_cache_bits(m->md.pat_mode, 0);
3788 invlcaddr(sysmaps->CADDR2);
3789 pagezero(sysmaps->CADDR2);
3790 *sysmaps->CMAP2 = 0;
3792 mtx_unlock(&sysmaps->lock);
3796 * pmap_zero_page_area zeros the specified hardware page by mapping
3797 * the page into KVM and using bzero to clear its contents.
3799 * off and size may not cover an area beyond a single hardware page.
3802 pmap_zero_page_area(vm_page_t m, int off, int size)
3804 struct sysmaps *sysmaps;
3806 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3807 mtx_lock(&sysmaps->lock);
3808 if (*sysmaps->CMAP2)
3809 panic("pmap_zero_page_area: CMAP2 busy");
3811 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3812 pmap_cache_bits(m->md.pat_mode, 0);
3813 invlcaddr(sysmaps->CADDR2);
3814 if (off == 0 && size == PAGE_SIZE)
3815 pagezero(sysmaps->CADDR2);
3817 bzero((char *)sysmaps->CADDR2 + off, size);
3818 *sysmaps->CMAP2 = 0;
3820 mtx_unlock(&sysmaps->lock);
3824 * pmap_zero_page_idle zeros the specified hardware page by mapping
3825 * the page into KVM and using bzero to clear its contents. This
3826 * is intended to be called from the vm_pagezero process only and
3830 pmap_zero_page_idle(vm_page_t m)
3834 panic("pmap_zero_page_idle: CMAP3 busy");
3836 *CMAP3 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) | PG_A | PG_M |
3837 pmap_cache_bits(m->md.pat_mode, 0);
3845 * pmap_copy_page copies the specified (machine independent)
3846 * page by mapping the page into virtual memory and using
3847 * bcopy to copy the page, one machine dependent page at a
3851 pmap_copy_page(vm_page_t src, vm_page_t dst)
3853 struct sysmaps *sysmaps;
3855 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3856 mtx_lock(&sysmaps->lock);
3857 if (*sysmaps->CMAP1)
3858 panic("pmap_copy_page: CMAP1 busy");
3859 if (*sysmaps->CMAP2)
3860 panic("pmap_copy_page: CMAP2 busy");
3862 invlpg((u_int)sysmaps->CADDR1);
3863 invlpg((u_int)sysmaps->CADDR2);
3864 *sysmaps->CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A |
3865 pmap_cache_bits(src->md.pat_mode, 0);
3866 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M |
3867 pmap_cache_bits(dst->md.pat_mode, 0);
3868 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3869 *sysmaps->CMAP1 = 0;
3870 *sysmaps->CMAP2 = 0;
3872 mtx_unlock(&sysmaps->lock);
3876 * Returns true if the pmap's pv is one of the first
3877 * 16 pvs linked to from this page. This count may
3878 * be changed upwards or downwards in the future; it
3879 * is only necessary that true be returned for a small
3880 * subset of pmaps for proper page aging.
3883 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3885 struct md_page *pvh;
3889 if (m->flags & PG_FICTITIOUS)
3892 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3893 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3894 if (PV_PMAP(pv) == pmap) {
3902 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3903 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
3904 if (PV_PMAP(pv) == pmap)
3915 * pmap_page_wired_mappings:
3917 * Return the number of managed mappings to the given physical page
3921 pmap_page_wired_mappings(vm_page_t m)
3926 if ((m->flags & PG_FICTITIOUS) != 0)
3928 count = pmap_pvh_wired_mappings(&m->md, count);
3929 return (pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)), count));
3933 * pmap_pvh_wired_mappings:
3935 * Return the updated number "count" of managed mappings that are wired.
3938 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
3944 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3946 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
3949 pte = pmap_pte_quick(pmap, pv->pv_va);
3950 if ((*pte & PG_W) != 0)
3959 * Returns TRUE if the given page is mapped individually or as part of
3960 * a 4mpage. Otherwise, returns FALSE.
3963 pmap_page_is_mapped(vm_page_t m)
3965 struct md_page *pvh;
3967 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
3969 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3970 if (TAILQ_EMPTY(&m->md.pv_list)) {
3971 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3972 return (!TAILQ_EMPTY(&pvh->pv_list));
3978 * Remove all pages from specified address space
3979 * this aids process exit speeds. Also, this code
3980 * is special cased for current process only, but
3981 * can have the more generic (and slightly slower)
3982 * mode enabled. This is much faster than pmap_remove
3983 * in the case of running down an entire address space.
3986 pmap_remove_pages(pmap_t pmap)
3988 pt_entry_t *pte, tpte;
3989 vm_page_t free = NULL;
3990 vm_page_t m, mpte, mt;
3992 struct md_page *pvh;
3993 struct pv_chunk *pc, *npc;
3996 uint32_t inuse, bitmask;
3999 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
4000 printf("warning: pmap_remove_pages called with non-current pmap\n");
4003 vm_page_lock_queues();
4006 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
4008 for (field = 0; field < _NPCM; field++) {
4009 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
4010 while (inuse != 0) {
4012 bitmask = 1UL << bit;
4013 idx = field * 32 + bit;
4014 pv = &pc->pc_pventry[idx];
4017 pte = pmap_pde(pmap, pv->pv_va);
4019 if ((tpte & PG_PS) == 0) {
4020 pte = vtopte(pv->pv_va);
4021 tpte = *pte & ~PG_PTE_PAT;
4026 "TPTE at %p IS ZERO @ VA %08x\n",
4032 * We cannot remove wired pages from a process' mapping at this time
4039 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
4040 KASSERT(m->phys_addr == (tpte & PG_FRAME),
4041 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
4042 m, (uintmax_t)m->phys_addr,
4045 KASSERT(m < &vm_page_array[vm_page_array_size],
4046 ("pmap_remove_pages: bad tpte %#jx",
4052 * Update the vm_page_t clean/reference bits.
4054 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4055 if ((tpte & PG_PS) != 0) {
4056 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4063 PV_STAT(pv_entry_frees++);
4064 PV_STAT(pv_entry_spare++);
4066 pc->pc_map[field] |= bitmask;
4067 if ((tpte & PG_PS) != 0) {
4068 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
4069 pvh = pa_to_pvh(tpte & PG_PS_FRAME);
4070 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
4071 if (TAILQ_EMPTY(&pvh->pv_list)) {
4072 for (mt = m; mt < &m[NBPDR / PAGE_SIZE]; mt++)
4073 if (TAILQ_EMPTY(&mt->md.pv_list))
4074 vm_page_flag_clear(mt, PG_WRITEABLE);
4076 mpte = pmap_lookup_pt_page(pmap, pv->pv_va);
4078 pmap_remove_pt_page(pmap, mpte);
4079 pmap->pm_stats.resident_count--;
4080 KASSERT(mpte->wire_count == NPTEPG,
4081 ("pmap_remove_pages: pte page wire count error"));
4082 mpte->wire_count = 0;
4083 pmap_add_delayed_free_list(mpte, &free, FALSE);
4084 atomic_subtract_int(&cnt.v_wire_count, 1);
4087 pmap->pm_stats.resident_count--;
4088 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4089 if (TAILQ_EMPTY(&m->md.pv_list)) {
4090 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4091 if (TAILQ_EMPTY(&pvh->pv_list))
4092 vm_page_flag_clear(m, PG_WRITEABLE);
4094 pmap_unuse_pt(pmap, pv->pv_va, &free);
4099 PV_STAT(pv_entry_spare -= _NPCPV);
4100 PV_STAT(pc_chunk_count--);
4101 PV_STAT(pc_chunk_frees++);
4102 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4103 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4104 pmap_qremove((vm_offset_t)pc, 1);
4105 vm_page_unwire(m, 0);
4107 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4111 pmap_invalidate_all(pmap);
4112 vm_page_unlock_queues();
4114 pmap_free_zero_pages(free);
4120 * Return whether or not the specified physical page was modified
4121 * in any physical maps.
4124 pmap_is_modified(vm_page_t m)
4127 if (m->flags & PG_FICTITIOUS)
4129 if (pmap_is_modified_pvh(&m->md))
4131 return (pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4135 * Returns TRUE if any of the given mappings were used to modify
4136 * physical memory. Otherwise, returns FALSE. Both page and 2mpage
4137 * mappings are supported.
4140 pmap_is_modified_pvh(struct md_page *pvh)
4147 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4150 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4153 pte = pmap_pte_quick(pmap, pv->pv_va);
4154 rv = (*pte & (PG_M | PG_RW)) == (PG_M | PG_RW);
4164 * pmap_is_prefaultable:
4166 * Return whether or not the specified virtual address is elgible
4170 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
4178 pde = pmap_pde(pmap, addr);
4179 if (*pde != 0 && (*pde & PG_PS) == 0) {
4188 * Clear the write and modified bits in each of the given page's mappings.
4191 pmap_remove_write(vm_page_t m)
4193 struct md_page *pvh;
4194 pv_entry_t next_pv, pv;
4197 pt_entry_t oldpte, *pte;
4200 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4201 if ((m->flags & PG_FICTITIOUS) != 0 ||
4202 (m->flags & PG_WRITEABLE) == 0)
4205 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4206 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4210 pde = pmap_pde(pmap, va);
4211 if ((*pde & PG_RW) != 0)
4212 (void)pmap_demote_pde(pmap, pde, va);
4215 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4218 pde = pmap_pde(pmap, pv->pv_va);
4219 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_write: found"
4220 " a 4mpage in page %p's pv list", m));
4221 pte = pmap_pte_quick(pmap, pv->pv_va);
4224 if ((oldpte & PG_RW) != 0) {
4226 * Regardless of whether a pte is 32 or 64 bits
4227 * in size, PG_RW and PG_M are among the least
4228 * significant 32 bits.
4230 if (!atomic_cmpset_int((u_int *)pte, oldpte,
4231 oldpte & ~(PG_RW | PG_M)))
4233 if ((oldpte & PG_M) != 0)
4235 pmap_invalidate_page(pmap, pv->pv_va);
4239 vm_page_flag_clear(m, PG_WRITEABLE);
4244 * pmap_ts_referenced:
4246 * Return a count of reference bits for a page, clearing those bits.
4247 * It is not necessary for every reference bit to be cleared, but it
4248 * is necessary that 0 only be returned when there are truly no
4249 * reference bits set.
4251 * XXX: The exact number of bits to check and clear is a matter that
4252 * should be tested and standardized at some point in the future for
4253 * optimal aging of shared pages.
4256 pmap_ts_referenced(vm_page_t m)
4258 struct md_page *pvh;
4259 pv_entry_t pv, pvf, pvn;
4261 pd_entry_t oldpde, *pde;
4266 if (m->flags & PG_FICTITIOUS)
4269 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4270 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4271 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, pvn) {
4275 pde = pmap_pde(pmap, va);
4277 if ((oldpde & PG_A) != 0) {
4278 if (pmap_demote_pde(pmap, pde, va)) {
4279 if ((oldpde & PG_W) == 0) {
4281 * Remove the mapping to a single page
4282 * so that a subsequent access may
4283 * repromote. Since the underlying
4284 * page table page is fully populated,
4285 * this removal never frees a page
4288 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4290 pmap_remove_page(pmap, va, NULL);
4301 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
4304 pvn = TAILQ_NEXT(pv, pv_list);
4305 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4306 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
4309 pde = pmap_pde(pmap, pv->pv_va);
4310 KASSERT((*pde & PG_PS) == 0, ("pmap_ts_referenced:"
4311 " found a 4mpage in page %p's pv list", m));
4312 pte = pmap_pte_quick(pmap, pv->pv_va);
4313 if ((*pte & PG_A) != 0) {
4314 atomic_clear_int((u_int *)pte, PG_A);
4315 pmap_invalidate_page(pmap, pv->pv_va);
4321 } while ((pv = pvn) != NULL && pv != pvf);
4328 * Clear the modify bits on the specified physical page.
4331 pmap_clear_modify(vm_page_t m)
4333 struct md_page *pvh;
4334 pv_entry_t next_pv, pv;
4336 pd_entry_t oldpde, *pde;
4337 pt_entry_t oldpte, *pte;
4340 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4341 if ((m->flags & PG_FICTITIOUS) != 0)
4344 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4345 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4349 pde = pmap_pde(pmap, va);
4351 if ((oldpde & PG_RW) != 0) {
4352 if (pmap_demote_pde(pmap, pde, va)) {
4353 if ((oldpde & PG_W) == 0) {
4355 * Write protect the mapping to a
4356 * single page so that a subsequent
4357 * write access may repromote.
4359 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4361 pte = pmap_pte_quick(pmap, va);
4363 if ((oldpte & PG_V) != 0) {
4365 * Regardless of whether a pte is 32 or 64 bits
4366 * in size, PG_RW and PG_M are among the least
4367 * significant 32 bits.
4369 while (!atomic_cmpset_int((u_int *)pte,
4371 oldpte & ~(PG_M | PG_RW)))
4374 pmap_invalidate_page(pmap, va);
4381 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4384 pde = pmap_pde(pmap, pv->pv_va);
4385 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_modify: found"
4386 " a 4mpage in page %p's pv list", m));
4387 pte = pmap_pte_quick(pmap, pv->pv_va);
4388 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4390 * Regardless of whether a pte is 32 or 64 bits
4391 * in size, PG_M is among the least significant
4394 atomic_clear_int((u_int *)pte, PG_M);
4395 pmap_invalidate_page(pmap, pv->pv_va);
4403 * pmap_clear_reference:
4405 * Clear the reference bit on the specified physical page.
4408 pmap_clear_reference(vm_page_t m)
4410 struct md_page *pvh;
4411 pv_entry_t next_pv, pv;
4413 pd_entry_t oldpde, *pde;
4417 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
4418 if ((m->flags & PG_FICTITIOUS) != 0)
4421 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4422 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
4426 pde = pmap_pde(pmap, va);
4428 if ((oldpde & PG_A) != 0) {
4429 if (pmap_demote_pde(pmap, pde, va)) {
4431 * Remove the mapping to a single page so
4432 * that a subsequent access may repromote.
4433 * Since the underlying page table page is
4434 * fully populated, this removal never frees
4435 * a page table page.
4437 va += VM_PAGE_TO_PHYS(m) - (oldpde &
4439 pmap_remove_page(pmap, va, NULL);
4444 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4447 pde = pmap_pde(pmap, pv->pv_va);
4448 KASSERT((*pde & PG_PS) == 0, ("pmap_clear_reference: found"
4449 " a 4mpage in page %p's pv list", m));
4450 pte = pmap_pte_quick(pmap, pv->pv_va);
4451 if ((*pte & PG_A) != 0) {
4453 * Regardless of whether a pte is 32 or 64 bits
4454 * in size, PG_A is among the least significant
4457 atomic_clear_int((u_int *)pte, PG_A);
4458 pmap_invalidate_page(pmap, pv->pv_va);
4466 * Miscellaneous support routines follow
4469 /* Adjust the cache mode for a 4KB page mapped via a PTE. */
4470 static __inline void
4471 pmap_pte_attr(pt_entry_t *pte, int cache_bits)
4476 * The cache mode bits are all in the low 32-bits of the
4477 * PTE, so we can just spin on updating the low 32-bits.
4480 opte = *(u_int *)pte;
4481 npte = opte & ~PG_PTE_CACHE;
4483 } while (npte != opte && !atomic_cmpset_int((u_int *)pte, opte, npte));
4486 /* Adjust the cache mode for a 2/4MB page mapped via a PDE. */
4487 static __inline void
4488 pmap_pde_attr(pd_entry_t *pde, int cache_bits)
4493 * The cache mode bits are all in the low 32-bits of the
4494 * PDE, so we can just spin on updating the low 32-bits.
4497 opde = *(u_int *)pde;
4498 npde = opde & ~PG_PDE_CACHE;
4500 } while (npde != opde && !atomic_cmpset_int((u_int *)pde, opde, npde));
4504 * Map a set of physical memory pages into the kernel virtual
4505 * address space. Return a pointer to where it is mapped. This
4506 * routine is intended to be used for mapping device memory,
4510 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4512 vm_offset_t va, offset;
4515 offset = pa & PAGE_MASK;
4516 size = roundup(offset + size, PAGE_SIZE);
4519 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4522 va = kmem_alloc_nofault(kernel_map, size);
4524 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4526 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4527 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4528 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4529 pmap_invalidate_cache_range(va, va + size);
4530 return ((void *)(va + offset));
4534 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4537 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4541 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4544 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4548 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4550 vm_offset_t base, offset, tmpva;
4552 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4554 base = trunc_page(va);
4555 offset = va & PAGE_MASK;
4556 size = roundup(offset + size, PAGE_SIZE);
4557 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
4558 pmap_kremove(tmpva);
4559 pmap_invalidate_range(kernel_pmap, va, tmpva);
4560 kmem_free(kernel_map, base, size);
4564 * Sets the memory attribute for the specified page.
4567 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4569 struct sysmaps *sysmaps;
4570 vm_offset_t sva, eva;
4572 m->md.pat_mode = ma;
4573 if ((m->flags & PG_FICTITIOUS) != 0)
4577 * If "m" is a normal page, flush it from the cache.
4578 * See pmap_invalidate_cache_range().
4580 * First, try to find an existing mapping of the page by sf
4581 * buffer. sf_buf_invalidate_cache() modifies mapping and
4582 * flushes the cache.
4584 if (sf_buf_invalidate_cache(m))
4588 * If page is not mapped by sf buffer, but CPU does not
4589 * support self snoop, map the page transient and do
4590 * invalidation. In the worst case, whole cache is flushed by
4591 * pmap_invalidate_cache_range().
4593 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) {
4594 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4595 mtx_lock(&sysmaps->lock);
4596 if (*sysmaps->CMAP2)
4597 panic("pmap_page_set_memattr: CMAP2 busy");
4599 *sysmaps->CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(m) |
4600 PG_A | PG_M | pmap_cache_bits(m->md.pat_mode, 0);
4601 invlcaddr(sysmaps->CADDR2);
4602 sva = (vm_offset_t)sysmaps->CADDR2;
4603 eva = sva + PAGE_SIZE;
4605 sva = eva = 0; /* gcc */
4606 pmap_invalidate_cache_range(sva, eva);
4608 *sysmaps->CMAP2 = 0;
4610 mtx_unlock(&sysmaps->lock);
4615 * Changes the specified virtual address range's memory type to that given by
4616 * the parameter "mode". The specified virtual address range must be
4617 * completely contained within either the kernel map.
4619 * Returns zero if the change completed successfully, and either EINVAL or
4620 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4621 * of the virtual address range was not mapped, and ENOMEM is returned if
4622 * there was insufficient memory available to complete the change.
4625 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4627 vm_offset_t base, offset, tmpva;
4630 int cache_bits_pte, cache_bits_pde;
4633 base = trunc_page(va);
4634 offset = va & PAGE_MASK;
4635 size = roundup(offset + size, PAGE_SIZE);
4638 * Only supported on kernel virtual addresses above the recursive map.
4640 if (base < VM_MIN_KERNEL_ADDRESS)
4643 cache_bits_pde = pmap_cache_bits(mode, 1);
4644 cache_bits_pte = pmap_cache_bits(mode, 0);
4648 * Pages that aren't mapped aren't supported. Also break down
4649 * 2/4MB pages into 4KB pages if required.
4651 PMAP_LOCK(kernel_pmap);
4652 for (tmpva = base; tmpva < base + size; ) {
4653 pde = pmap_pde(kernel_pmap, tmpva);
4655 PMAP_UNLOCK(kernel_pmap);
4660 * If the current 2/4MB page already has
4661 * the required memory type, then we need not
4662 * demote this page. Just increment tmpva to
4663 * the next 2/4MB page frame.
4665 if ((*pde & PG_PDE_CACHE) == cache_bits_pde) {
4666 tmpva = trunc_4mpage(tmpva) + NBPDR;
4671 * If the current offset aligns with a 2/4MB
4672 * page frame and there is at least 2/4MB left
4673 * within the range, then we need not break
4674 * down this page into 4KB pages.
4676 if ((tmpva & PDRMASK) == 0 &&
4677 tmpva + PDRMASK < base + size) {
4681 if (!pmap_demote_pde(kernel_pmap, pde, tmpva)) {
4682 PMAP_UNLOCK(kernel_pmap);
4686 pte = vtopte(tmpva);
4688 PMAP_UNLOCK(kernel_pmap);
4693 PMAP_UNLOCK(kernel_pmap);
4696 * Ok, all the pages exist, so run through them updating their
4697 * cache mode if required.
4699 for (tmpva = base; tmpva < base + size; ) {
4700 pde = pmap_pde(kernel_pmap, tmpva);
4702 if ((*pde & PG_PDE_CACHE) != cache_bits_pde) {
4703 pmap_pde_attr(pde, cache_bits_pde);
4706 tmpva = trunc_4mpage(tmpva) + NBPDR;
4708 pte = vtopte(tmpva);
4709 if ((*pte & PG_PTE_CACHE) != cache_bits_pte) {
4710 pmap_pte_attr(pte, cache_bits_pte);
4718 * Flush CPU caches to make sure any data isn't cached that
4719 * shouldn't be, etc.
4722 pmap_invalidate_range(kernel_pmap, base, tmpva);
4723 pmap_invalidate_cache_range(base, tmpva);
4729 * perform the pmap work for mincore
4732 pmap_mincore(pmap_t pmap, vm_offset_t addr)
4735 pt_entry_t *ptep, pte;
4741 pdep = pmap_pde(pmap, addr);
4743 if (*pdep & PG_PS) {
4745 val = MINCORE_SUPER;
4746 /* Compute the physical address of the 4KB page. */
4747 pa = ((*pdep & PG_PS_FRAME) | (addr & PDRMASK)) &
4750 ptep = pmap_pte(pmap, addr);
4752 pmap_pte_release(ptep);
4753 pa = pte & PG_FRAME;
4762 val |= MINCORE_INCORE;
4763 if ((pte & PG_MANAGED) == 0)
4766 m = PHYS_TO_VM_PAGE(pa);
4771 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
4772 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
4775 * Modified by someone else
4777 vm_page_lock_queues();
4778 if (m->dirty || pmap_is_modified(m))
4779 val |= MINCORE_MODIFIED_OTHER;
4780 vm_page_unlock_queues();
4786 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
4789 * Referenced by someone else
4791 vm_page_lock_queues();
4792 if ((m->flags & PG_REFERENCED) ||
4793 pmap_ts_referenced(m)) {
4794 val |= MINCORE_REFERENCED_OTHER;
4795 vm_page_flag_set(m, PG_REFERENCED);
4797 vm_page_unlock_queues();
4804 pmap_activate(struct thread *td)
4806 pmap_t pmap, oldpmap;
4810 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4811 oldpmap = PCPU_GET(curpmap);
4813 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
4814 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
4816 oldpmap->pm_active &= ~1;
4817 pmap->pm_active |= 1;
4820 cr3 = vtophys(pmap->pm_pdpt);
4822 cr3 = vtophys(pmap->pm_pdir);
4825 * pmap_activate is for the current thread on the current cpu
4827 td->td_pcb->pcb_cr3 = cr3;
4829 PCPU_SET(curpmap, pmap);
4834 * Increase the starting virtual address of the given mapping if a
4835 * different alignment might result in more superpage mappings.
4838 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4839 vm_offset_t *addr, vm_size_t size)
4841 vm_offset_t superpage_offset;
4845 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4846 offset += ptoa(object->pg_color);
4847 superpage_offset = offset & PDRMASK;
4848 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
4849 (*addr & PDRMASK) == superpage_offset)
4851 if ((*addr & PDRMASK) < superpage_offset)
4852 *addr = (*addr & ~PDRMASK) + superpage_offset;
4854 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
4858 #if defined(PMAP_DEBUG)
4859 pmap_pid_dump(int pid)
4866 sx_slock(&allproc_lock);
4867 FOREACH_PROC_IN_SYSTEM(p) {
4868 if (p->p_pid != pid)
4874 pmap = vmspace_pmap(p->p_vmspace);
4875 for (i = 0; i < NPDEPTD; i++) {
4878 vm_offset_t base = i << PDRSHIFT;
4880 pde = &pmap->pm_pdir[i];
4881 if (pde && pmap_pde_v(pde)) {
4882 for (j = 0; j < NPTEPG; j++) {
4883 vm_offset_t va = base + (j << PAGE_SHIFT);
4884 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
4889 sx_sunlock(&allproc_lock);
4892 pte = pmap_pte(pmap, va);
4893 if (pte && pmap_pte_v(pte)) {
4897 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
4898 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
4899 va, pa, m->hold_count, m->wire_count, m->flags);
4914 sx_sunlock(&allproc_lock);
4921 static void pads(pmap_t pm);
4922 void pmap_pvdump(vm_offset_t pa);
4924 /* print address space of pmap*/
4932 if (pm == kernel_pmap)
4934 for (i = 0; i < NPDEPTD; i++)
4936 for (j = 0; j < NPTEPG; j++) {
4937 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
4938 if (pm == kernel_pmap && va < KERNBASE)
4940 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
4942 ptep = pmap_pte(pm, va);
4943 if (pmap_pte_v(ptep))
4944 printf("%x:%x ", va, *ptep);
4950 pmap_pvdump(vm_paddr_t pa)
4956 printf("pa %x", pa);
4957 m = PHYS_TO_VM_PAGE(pa);
4958 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4960 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);