2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * Since the information managed by this module is
84 * also stored by the logical address mapping module,
85 * this module may throw away valid virtual-to-physical
86 * mappings at almost any time. However, invalidations
87 * of virtual-to-physical mappings must be done as
90 * In order to cope with hardware architectures which
91 * make virtual-to-physical map invalidates expensive,
92 * this module may delay invalidate or reduced protection
93 * operations until such time as they are actually
94 * necessary. This module is given full information as
95 * to which processors are currently using which maps,
96 * and to when physical maps must be made correct.
100 #include "opt_pmap.h"
102 #include "opt_xbox.h"
104 #include <sys/param.h>
105 #include <sys/systm.h>
106 #include <sys/kernel.h>
108 #include <sys/lock.h>
109 #include <sys/malloc.h>
110 #include <sys/mman.h>
111 #include <sys/msgbuf.h>
112 #include <sys/mutex.h>
113 #include <sys/proc.h>
114 #include <sys/rwlock.h>
115 #include <sys/sf_buf.h>
117 #include <sys/vmmeter.h>
118 #include <sys/sched.h>
119 #include <sys/sysctl.h>
123 #include <sys/cpuset.h>
127 #include <vm/vm_param.h>
128 #include <vm/vm_kern.h>
129 #include <vm/vm_page.h>
130 #include <vm/vm_map.h>
131 #include <vm/vm_object.h>
132 #include <vm/vm_extern.h>
133 #include <vm/vm_pageout.h>
134 #include <vm/vm_pager.h>
137 #include <machine/cpu.h>
138 #include <machine/cputypes.h>
139 #include <machine/md_var.h>
140 #include <machine/pcb.h>
141 #include <machine/specialreg.h>
143 #include <machine/smp.h>
147 #include <machine/xbox.h>
150 #include <xen/interface/xen.h>
151 #include <xen/hypervisor.h>
152 #include <machine/xen/hypercall.h>
153 #include <machine/xen/xenvar.h>
154 #include <machine/xen/xenfunc.h>
156 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
157 #define CPU_ENABLE_SSE
160 #ifndef PMAP_SHPGPERPROC
161 #define PMAP_SHPGPERPROC 200
166 #if !defined(DIAGNOSTIC)
167 #ifdef __GNUC_GNU_INLINE__
168 #define PMAP_INLINE __attribute__((__gnu_inline__)) inline
170 #define PMAP_INLINE extern inline
177 #define PV_STAT(x) do { x ; } while (0)
179 #define PV_STAT(x) do { } while (0)
183 * Get PDEs and PTEs for user/kernel address space
185 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
186 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
188 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
189 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
190 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
191 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
192 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
194 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
196 #define HAMFISTED_LOCKING
197 #ifdef HAMFISTED_LOCKING
198 static struct mtx createdelete_lock;
201 struct pmap kernel_pmap_store;
202 LIST_HEAD(pmaplist, pmap);
203 static struct pmaplist allpmaps;
204 static struct mtx allpmaps_lock;
206 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
207 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
208 int pgeflag = 0; /* PG_G or-in */
209 int pseflag = 0; /* PG_PS or-in */
212 vm_offset_t kernel_vm_end;
213 extern u_int32_t KERNend;
219 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
221 static int pat_works; /* Is page attribute table sane? */
224 * This lock is defined as static in other pmap implementations. It cannot,
225 * however, be defined as static here, because it is (ab)used to serialize
226 * queued page table changes in other sources files.
228 struct rwlock pvh_global_lock;
231 * Data for the pv entry allocation mechanism
233 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
234 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
235 static int shpgperproc = PMAP_SHPGPERPROC;
237 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
238 int pv_maxchunks; /* How many chunks we have KVA for */
239 vm_offset_t pv_vafree; /* freelist stored in the PTE */
242 * All those kernel PT submaps that BSD is so fond of
251 static struct sysmaps sysmaps_pcpu[MAXCPU];
255 struct msgbuf *msgbufp = 0;
260 static caddr_t crashdumpmap;
262 static pt_entry_t *PMAP1 = 0, *PMAP2;
263 static pt_entry_t *PADDR1 = 0, *PADDR2;
266 static int PMAP1changedcpu;
267 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
269 "Number of times pmap_pte_quick changed CPU with same PMAP1");
271 static int PMAP1changed;
272 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
274 "Number of times pmap_pte_quick changed PMAP1");
275 static int PMAP1unchanged;
276 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
278 "Number of times pmap_pte_quick didn't change PMAP1");
279 static struct mtx PMAP2mutex;
281 static void free_pv_chunk(struct pv_chunk *pc);
282 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
283 static pv_entry_t get_pv_entry(pmap_t pmap, boolean_t try);
284 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
285 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
288 static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va,
289 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
290 static void pmap_flush_page(vm_page_t m);
291 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
292 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
294 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
296 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
298 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
301 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, u_int flags);
303 static vm_page_t _pmap_allocpte(pmap_t pmap, u_int ptepindex, u_int flags);
304 static void _pmap_unwire_ptp(pmap_t pmap, vm_page_t m, vm_page_t *free);
305 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
306 static void pmap_pte_release(pt_entry_t *pte);
307 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
308 static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr);
310 static __inline void pagezero(void *page);
312 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
313 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
316 * If you get an error here, then you set KVA_PAGES wrong! See the
317 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
318 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
320 CTASSERT(KERNBASE % (1 << 24) == 0);
323 pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type)
325 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]);
330 xen_queue_pt_update(shadow_pdir_ma,
331 xpmap_ptom(val & ~(PG_RW)));
333 xen_queue_pt_update(pdir_ma,
336 case SH_PD_SET_VA_MA:
338 xen_queue_pt_update(shadow_pdir_ma,
341 xen_queue_pt_update(pdir_ma, val);
343 case SH_PD_SET_VA_CLEAR:
345 xen_queue_pt_update(shadow_pdir_ma, 0);
347 xen_queue_pt_update(pdir_ma, 0);
353 * Bootstrap the system enough to run with virtual memory.
355 * On the i386 this is called after mapping has already been enabled
356 * and just syncs the pmap module with what has already been done.
357 * [We can't call it easily with mapping off since the kernel is not
358 * mapped with PA == VA, hence we would have to relocate every address
359 * from the linked base (virtual) address "KERNBASE" to the actual
360 * (physical) address starting relative to 0]
363 pmap_bootstrap(vm_paddr_t firstaddr)
366 pt_entry_t *pte, *unused;
367 struct sysmaps *sysmaps;
371 * Initialize the first available kernel virtual address. However,
372 * using "firstaddr" may waste a few pages of the kernel virtual
373 * address space, because locore may not have mapped every physical
374 * page that it allocated. Preferably, locore would provide a first
375 * unused virtual address in addition to "firstaddr".
377 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
379 virtual_end = VM_MAX_KERNEL_ADDRESS;
382 * Initialize the kernel pmap (which is statically allocated).
384 PMAP_LOCK_INIT(kernel_pmap);
385 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
387 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
389 CPU_FILL(&kernel_pmap->pm_active); /* don't allow deactivation */
390 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
393 * Initialize the global pv list lock.
395 rw_init_flags(&pvh_global_lock, "pmap pv global", RW_RECURSE);
397 LIST_INIT(&allpmaps);
398 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
399 mtx_lock_spin(&allpmaps_lock);
400 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
401 mtx_unlock_spin(&allpmaps_lock);
406 * Reserve some special page table entries/VA space for temporary
409 #define SYSMAP(c, p, v, n) \
410 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
416 * CMAP1/CMAP2 are used for zeroing and copying pages.
417 * CMAP3 is used for the idle process page zeroing.
419 for (i = 0; i < MAXCPU; i++) {
420 sysmaps = &sysmaps_pcpu[i];
421 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
422 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
423 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
424 PT_SET_MA(sysmaps->CADDR1, 0);
425 PT_SET_MA(sysmaps->CADDR2, 0);
427 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
428 PT_SET_MA(CADDR3, 0);
433 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
436 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
438 SYSMAP(caddr_t, unused, ptvmmap, 1)
441 * msgbufp is used to map the system message buffer.
443 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(msgbufsize)))
446 * PADDR1 and PADDR2 are used by pmap_pte_quick() and pmap_pte(),
449 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1)
450 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1)
452 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
457 * Leave in place an identity mapping (virt == phys) for the low 1 MB
458 * physical memory region that is used by the ACPI wakeup code. This
459 * mapping must not have PG_G set.
463 * leave here deliberately to show that this is not supported
466 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
467 * an early stadium, we cannot yet neatly map video memory ... :-(
468 * Better fixes are very welcome! */
469 if (!arch_i386_is_xbox)
471 for (i = 1; i < NKPT; i++)
474 /* Initialize the PAT MSR if present. */
477 /* Turn on PG_G on kernel page(s) */
481 #ifdef HAMFISTED_LOCKING
482 mtx_init(&createdelete_lock, "pmap create/delete", NULL, MTX_DEF);
494 /* Bail if this CPU doesn't implement PAT. */
495 if (!(cpu_feature & CPUID_PAT))
498 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
499 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) {
501 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
502 * Program 4 and 5 as WP and WC.
503 * Leave 6 and 7 as UC and UC-.
505 pat_msr = rdmsr(MSR_PAT);
506 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
507 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
508 PAT_VALUE(5, PAT_WRITE_COMBINING);
512 * Due to some Intel errata, we can only safely use the lower 4
513 * PAT entries. Thus, just replace PAT Index 2 with WC instead
516 * Intel Pentium III Processor Specification Update
517 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
520 * Intel Pentium IV Processor Specification Update
521 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
523 pat_msr = rdmsr(MSR_PAT);
524 pat_msr &= ~PAT_MASK(2);
525 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
528 wrmsr(MSR_PAT, pat_msr);
532 * Initialize a vm_page's machine-dependent fields.
535 pmap_page_init(vm_page_t m)
538 TAILQ_INIT(&m->md.pv_list);
539 m->md.pat_mode = PAT_WRITE_BACK;
543 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
545 * - Must deal with pages in order to ensure that none of the PG_* bits
546 * are ever set, PG_V in particular.
547 * - Assumes we can write to ptes without pte_store() atomic ops, even
548 * on PAE systems. This should be ok.
549 * - Assumes nothing will ever test these addresses for 0 to indicate
550 * no mapping instead of correctly checking PG_V.
551 * - Assumes a vm_offset_t will fit in a pte (true for i386).
552 * Because PG_V is never set, there can be no mappings to invalidate.
554 static int ptelist_count = 0;
556 pmap_ptelist_alloc(vm_offset_t *head)
559 vm_offset_t *phead = (vm_offset_t *)*head;
561 if (ptelist_count == 0) {
562 printf("out of memory!!!!!!\n");
563 return (0); /* Out of memory */
566 va = phead[ptelist_count];
571 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
573 vm_offset_t *phead = (vm_offset_t *)*head;
575 phead[ptelist_count++] = va;
579 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
585 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t));
586 for (i = 0; i < nstackpages; i++) {
587 va = (vm_offset_t)base + i * PAGE_SIZE;
588 m = vm_page_alloc(NULL, i,
589 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
591 pmap_qenter(va, &m, 1);
594 *head = (vm_offset_t)base;
595 for (i = npages - 1; i >= nstackpages; i--) {
596 va = (vm_offset_t)base + i * PAGE_SIZE;
597 pmap_ptelist_free(head, va);
603 * Initialize the pmap module.
604 * Called by vm_init, to initialize any structures that the pmap
605 * system needs to map virtual memory.
612 * Initialize the address space (zone) for the pv entries. Set a
613 * high water mark so that the system can recover from excessive
614 * numbers of pv entries.
616 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
617 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
618 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
619 pv_entry_max = roundup(pv_entry_max, _NPCPV);
620 pv_entry_high_water = 9 * (pv_entry_max / 10);
622 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
623 pv_chunkbase = (struct pv_chunk *)kva_alloc(PAGE_SIZE * pv_maxchunks);
624 if (pv_chunkbase == NULL)
625 panic("pmap_init: not enough kvm for pv chunks");
626 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
630 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
631 "Max number of PV entries");
632 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
633 "Page share factor per proc");
635 static SYSCTL_NODE(_vm_pmap, OID_AUTO, pde, CTLFLAG_RD, 0,
636 "2/4MB page mapping counters");
638 static u_long pmap_pde_mappings;
639 SYSCTL_ULONG(_vm_pmap_pde, OID_AUTO, mappings, CTLFLAG_RD,
640 &pmap_pde_mappings, 0, "2/4MB page mappings");
642 /***************************************************
643 * Low level helper routines.....
644 ***************************************************/
647 * Determine the appropriate bits to set in a PTE or PDE for a specified
651 pmap_cache_bits(int mode, boolean_t is_pde)
653 int pat_flag, pat_index, cache_bits;
655 /* The PAT bit is different for PTE's and PDE's. */
656 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
658 /* If we don't support PAT, map extended modes to older ones. */
659 if (!(cpu_feature & CPUID_PAT)) {
661 case PAT_UNCACHEABLE:
662 case PAT_WRITE_THROUGH:
666 case PAT_WRITE_COMBINING:
667 case PAT_WRITE_PROTECTED:
668 mode = PAT_UNCACHEABLE;
673 /* Map the caching mode to a PAT index. */
676 case PAT_UNCACHEABLE:
679 case PAT_WRITE_THROUGH:
688 case PAT_WRITE_COMBINING:
691 case PAT_WRITE_PROTECTED:
695 panic("Unknown caching mode %d\n", mode);
700 case PAT_UNCACHEABLE:
701 case PAT_WRITE_PROTECTED:
704 case PAT_WRITE_THROUGH:
710 case PAT_WRITE_COMBINING:
714 panic("Unknown caching mode %d\n", mode);
718 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
721 cache_bits |= pat_flag;
723 cache_bits |= PG_NC_PCD;
725 cache_bits |= PG_NC_PWT;
730 * For SMP, these functions have to use the IPI mechanism for coherence.
732 * N.B.: Before calling any of the following TLB invalidation functions,
733 * the calling processor must ensure that all stores updating a non-
734 * kernel page table are globally performed. Otherwise, another
735 * processor could cache an old, pre-update entry without being
736 * invalidated. This can happen one of two ways: (1) The pmap becomes
737 * active on another processor after its pm_active field is checked by
738 * one of the following functions but before a store updating the page
739 * table is globally performed. (2) The pmap becomes active on another
740 * processor before its pm_active field is checked but due to
741 * speculative loads one of the following functions stills reads the
742 * pmap as inactive on the other processor.
744 * The kernel page table is exempt because its pm_active field is
745 * immutable. The kernel page table is always active on every
749 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
754 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
758 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
762 cpuid = PCPU_GET(cpuid);
763 other_cpus = all_cpus;
764 CPU_CLR(cpuid, &other_cpus);
765 if (CPU_ISSET(cpuid, &pmap->pm_active))
767 CPU_AND(&other_cpus, &pmap->pm_active);
768 if (!CPU_EMPTY(&other_cpus))
769 smp_masked_invlpg(other_cpus, va);
776 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
782 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x",
786 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
787 for (addr = sva; addr < eva; addr += PAGE_SIZE)
789 smp_invlpg_range(sva, eva);
791 cpuid = PCPU_GET(cpuid);
792 other_cpus = all_cpus;
793 CPU_CLR(cpuid, &other_cpus);
794 if (CPU_ISSET(cpuid, &pmap->pm_active))
795 for (addr = sva; addr < eva; addr += PAGE_SIZE)
797 CPU_AND(&other_cpus, &pmap->pm_active);
798 if (!CPU_EMPTY(&other_cpus))
799 smp_masked_invlpg_range(other_cpus, sva, eva);
806 pmap_invalidate_all(pmap_t pmap)
811 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap);
814 if (pmap == kernel_pmap || !CPU_CMP(&pmap->pm_active, &all_cpus)) {
818 cpuid = PCPU_GET(cpuid);
819 other_cpus = all_cpus;
820 CPU_CLR(cpuid, &other_cpus);
821 if (CPU_ISSET(cpuid, &pmap->pm_active))
823 CPU_AND(&other_cpus, &pmap->pm_active);
824 if (!CPU_EMPTY(&other_cpus))
825 smp_masked_invltlb(other_cpus);
831 pmap_invalidate_cache(void)
841 * Normal, non-SMP, 486+ invalidation functions.
842 * We inline these within pmap.c for speed.
845 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
847 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
850 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
856 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
860 if (eva - sva > PAGE_SIZE)
861 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x",
864 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
865 for (addr = sva; addr < eva; addr += PAGE_SIZE)
871 pmap_invalidate_all(pmap_t pmap)
874 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap);
876 if (pmap == kernel_pmap || !CPU_EMPTY(&pmap->pm_active))
881 pmap_invalidate_cache(void)
888 #define PMAP_CLFLUSH_THRESHOLD (2 * 1024 * 1024)
891 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva, boolean_t force)
895 sva &= ~(vm_offset_t)cpu_clflush_line_size;
897 KASSERT((sva & PAGE_MASK) == 0,
898 ("pmap_invalidate_cache_range: sva not page-aligned"));
899 KASSERT((eva & PAGE_MASK) == 0,
900 ("pmap_invalidate_cache_range: eva not page-aligned"));
903 if ((cpu_feature & CPUID_SS) != 0 && !force)
904 ; /* If "Self Snoop" is supported, do nothing. */
905 else if ((cpu_feature & CPUID_CLFSH) != 0 &&
906 eva - sva < PMAP_CLFLUSH_THRESHOLD) {
909 * Otherwise, do per-cache line flush. Use the mfence
910 * instruction to insure that previous stores are
911 * included in the write-back. The processor
912 * propagates flush to other processors in the cache
916 for (; sva < eva; sva += cpu_clflush_line_size)
922 * No targeted cache flush methods are supported by CPU,
923 * or the supplied range is bigger than 2MB.
924 * Globally invalidate cache.
926 pmap_invalidate_cache();
931 pmap_invalidate_cache_pages(vm_page_t *pages, int count)
935 if (count >= PMAP_CLFLUSH_THRESHOLD / PAGE_SIZE ||
936 (cpu_feature & CPUID_CLFSH) == 0) {
937 pmap_invalidate_cache();
939 for (i = 0; i < count; i++)
940 pmap_flush_page(pages[i]);
945 * Are we current address space or kernel? N.B. We return FALSE when
946 * a pmap's page table is in use because a kernel thread is borrowing
947 * it. The borrowed page table can change spontaneously, making any
948 * dependence on its continued use subject to a race condition.
951 pmap_is_current(pmap_t pmap)
954 return (pmap == kernel_pmap ||
955 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
956 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
960 * If the given pmap is not the current or kernel pmap, the returned pte must
961 * be released by passing it to pmap_pte_release().
964 pmap_pte(pmap_t pmap, vm_offset_t va)
969 pde = pmap_pde(pmap, va);
973 /* are we current address space or kernel? */
974 if (pmap_is_current(pmap))
976 mtx_lock(&PMAP2mutex);
977 newpf = *pde & PG_FRAME;
978 if ((*PMAP2 & PG_FRAME) != newpf) {
979 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M);
980 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x",
981 pmap, va, (*PMAP2 & 0xffffffff));
983 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
989 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
993 pmap_pte_release(pt_entry_t *pte)
996 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) {
997 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx",
999 rw_wlock(&pvh_global_lock);
1000 PT_SET_VA(PMAP2, 0, TRUE);
1001 rw_wunlock(&pvh_global_lock);
1002 mtx_unlock(&PMAP2mutex);
1006 static __inline void
1007 invlcaddr(void *caddr)
1010 invlpg((u_int)caddr);
1015 * Super fast pmap_pte routine best used when scanning
1016 * the pv lists. This eliminates many coarse-grained
1017 * invltlb calls. Note that many of the pv list
1018 * scans are across different pmaps. It is very wasteful
1019 * to do an entire invltlb for checking a single mapping.
1021 * If the given pmap is not the current pmap, pvh_global_lock
1022 * must be held and curthread pinned to a CPU.
1025 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1030 pde = pmap_pde(pmap, va);
1034 /* are we current address space or kernel? */
1035 if (pmap_is_current(pmap))
1036 return (vtopte(va));
1037 rw_assert(&pvh_global_lock, RA_WLOCKED);
1038 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1039 newpf = *pde & PG_FRAME;
1040 if ((*PMAP1 & PG_FRAME) != newpf) {
1041 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M);
1042 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x",
1043 pmap, va, (u_long)*PMAP1);
1046 PMAP1cpu = PCPU_GET(cpuid);
1051 if (PMAP1cpu != PCPU_GET(cpuid)) {
1052 PMAP1cpu = PCPU_GET(cpuid);
1058 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1064 * Routine: pmap_extract
1066 * Extract the physical page address associated
1067 * with the given map/virtual_address pair.
1070 pmap_extract(pmap_t pmap, vm_offset_t va)
1079 pde = pmap->pm_pdir[va >> PDRSHIFT];
1081 if ((pde & PG_PS) != 0) {
1082 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK);
1086 pte = pmap_pte(pmap, va);
1087 pteval = *pte ? xpmap_mtop(*pte) : 0;
1088 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK);
1089 pmap_pte_release(pte);
1096 * Routine: pmap_extract_ma
1098 * Like pmap_extract, but returns machine address
1101 pmap_extract_ma(pmap_t pmap, vm_offset_t va)
1109 pde = pmap->pm_pdir[va >> PDRSHIFT];
1111 if ((pde & PG_PS) != 0) {
1112 rtval = (pde & ~PDRMASK) | (va & PDRMASK);
1116 pte = pmap_pte(pmap, va);
1117 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1118 pmap_pte_release(pte);
1125 * Routine: pmap_extract_and_hold
1127 * Atomically extract and hold the physical page
1128 * with the given pmap and virtual address pair
1129 * if that mapping permits the given protection.
1132 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1135 pt_entry_t pte, *ptep;
1143 pde = PT_GET(pmap_pde(pmap, va));
1146 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1147 if (vm_page_pa_tryrelock(pmap, (pde &
1148 PG_PS_FRAME) | (va & PDRMASK), &pa))
1150 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1155 ptep = pmap_pte(pmap, va);
1157 pmap_pte_release(ptep);
1159 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1160 if (vm_page_pa_tryrelock(pmap, pte & PG_FRAME,
1163 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1173 /***************************************************
1174 * Low level mapping routines.....
1175 ***************************************************/
1178 * Add a wired page to the kva.
1179 * Note: not SMP coherent.
1181 * This function may be used before pmap_bootstrap() is called.
1184 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1187 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag);
1191 pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma)
1196 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag);
1199 static __inline void
1200 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1203 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1207 * Remove a page from the kernel pagetables.
1208 * Note: not SMP coherent.
1210 * This function may be used before pmap_bootstrap() is called.
1213 pmap_kremove(vm_offset_t va)
1218 PT_CLEAR_VA(pte, FALSE);
1222 * Used to map a range of physical addresses into kernel
1223 * virtual address space.
1225 * The value passed in '*virt' is a suggested virtual address for
1226 * the mapping. Architectures which can support a direct-mapped
1227 * physical to virtual region can return the appropriate address
1228 * within that region, leaving '*virt' unchanged. Other
1229 * architectures should map the pages starting at '*virt' and
1230 * update '*virt' with the first usable address after the mapped
1234 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1236 vm_offset_t va, sva;
1239 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x",
1240 va, start, end, prot);
1241 while (start < end) {
1242 pmap_kenter(va, start);
1246 pmap_invalidate_range(kernel_pmap, sva, va);
1253 * Add a list of wired pages to the kva
1254 * this routine is only used for temporary
1255 * kernel mappings that do not need to have
1256 * page modification or references recorded.
1257 * Note that old mappings are simply written
1258 * over. The page *must* be wired.
1259 * Note: SMP coherent. Uses a ranged shootdown IPI.
1262 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1264 pt_entry_t *endpte, *pte;
1266 vm_offset_t va = sva;
1268 multicall_entry_t mcl[16];
1269 multicall_entry_t *mclp = mcl;
1272 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count);
1274 endpte = pte + count;
1275 while (pte < endpte) {
1276 pa = VM_PAGE_TO_MACH(*ma) | pgeflag | PG_RW | PG_V | PG_M | PG_A;
1278 mclp->op = __HYPERVISOR_update_va_mapping;
1280 mclp->args[1] = (uint32_t)(pa & 0xffffffff);
1281 mclp->args[2] = (uint32_t)(pa >> 32);
1282 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0;
1289 if (mclcount == 16) {
1290 error = HYPERVISOR_multicall(mcl, mclcount);
1293 KASSERT(error == 0, ("bad multicall %d", error));
1297 error = HYPERVISOR_multicall(mcl, mclcount);
1298 KASSERT(error == 0, ("bad multicall %d", error));
1302 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++)
1303 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE));
1308 * This routine tears out page mappings from the
1309 * kernel -- it is meant only for temporary mappings.
1310 * Note: SMP coherent. Uses a ranged shootdown IPI.
1313 pmap_qremove(vm_offset_t sva, int count)
1317 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count);
1319 rw_wlock(&pvh_global_lock);
1321 while (count-- > 0) {
1326 pmap_invalidate_range(kernel_pmap, sva, va);
1328 rw_wunlock(&pvh_global_lock);
1331 /***************************************************
1332 * Page table page management routines.....
1333 ***************************************************/
1334 static __inline void
1335 pmap_free_zero_pages(vm_page_t free)
1339 while (free != NULL) {
1341 free = (void *)m->object;
1343 vm_page_free_zero(m);
1348 * Decrements a page table page's wire count, which is used to record the
1349 * number of valid page table entries within the page. If the wire count
1350 * drops to zero, then the page table page is unmapped. Returns TRUE if the
1351 * page table page was unmapped and FALSE otherwise.
1353 static inline boolean_t
1354 pmap_unwire_ptp(pmap_t pmap, vm_page_t m, vm_page_t *free)
1358 if (m->wire_count == 0) {
1359 _pmap_unwire_ptp(pmap, m, free);
1366 _pmap_unwire_ptp(pmap_t pmap, vm_page_t m, vm_page_t *free)
1372 * unmap the page table page
1374 xen_pt_unpin(pmap->pm_pdir[m->pindex]);
1376 * page *might* contain residual mapping :-/
1378 PD_CLEAR_VA(pmap, m->pindex, TRUE);
1380 --pmap->pm_stats.resident_count;
1383 * This is a release store so that the ordinary store unmapping
1384 * the page table page is globally performed before TLB shoot-
1387 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1390 * Do an invltlb to make the invalidated mapping
1391 * take effect immediately.
1393 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1394 pmap_invalidate_page(pmap, pteva);
1397 * Put page on a list so that it is released after
1398 * *ALL* TLB shootdown is done
1400 m->object = (void *)*free;
1405 * After removing a page table entry, this routine is used to
1406 * conditionally free the page, and manage the hold/wire counts.
1409 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1414 if (va >= VM_MAXUSER_ADDRESS)
1416 ptepde = PT_GET(pmap_pde(pmap, va));
1417 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1418 return (pmap_unwire_ptp(pmap, mpte, free));
1422 * Initialize the pmap for the swapper process.
1425 pmap_pinit0(pmap_t pmap)
1428 PMAP_LOCK_INIT(pmap);
1430 * Since the page table directory is shared with the kernel pmap,
1431 * which is already included in the list "allpmaps", this pmap does
1432 * not need to be inserted into that list.
1434 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1436 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1438 CPU_ZERO(&pmap->pm_active);
1439 PCPU_SET(curpmap, pmap);
1440 TAILQ_INIT(&pmap->pm_pvchunk);
1441 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1445 * Initialize a preallocated and zeroed pmap structure,
1446 * such as one in a vmspace structure.
1449 pmap_pinit(pmap_t pmap)
1451 vm_page_t m, ptdpg[NPGPTD + 1];
1452 int npgptd = NPGPTD + 1;
1455 #ifdef HAMFISTED_LOCKING
1456 mtx_lock(&createdelete_lock);
1460 * No need to allocate page table space yet but we do need a valid
1461 * page directory table.
1463 if (pmap->pm_pdir == NULL) {
1464 pmap->pm_pdir = (pd_entry_t *)kva_alloc(NBPTD);
1465 if (pmap->pm_pdir == NULL) {
1466 #ifdef HAMFISTED_LOCKING
1467 mtx_unlock(&createdelete_lock);
1472 pmap->pm_pdpt = (pd_entry_t *)kva_alloc(1);
1477 * allocate the page directory page(s)
1479 for (i = 0; i < npgptd;) {
1480 m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ |
1481 VM_ALLOC_WIRED | VM_ALLOC_ZERO);
1489 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1491 for (i = 0; i < NPGPTD; i++)
1492 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1493 pagezero(pmap->pm_pdir + (i * NPDEPG));
1495 mtx_lock_spin(&allpmaps_lock);
1496 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1497 /* Copy the kernel page table directory entries. */
1498 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1499 mtx_unlock_spin(&allpmaps_lock);
1502 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1);
1503 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0)
1504 bzero(pmap->pm_pdpt, PAGE_SIZE);
1505 for (i = 0; i < NPGPTD; i++) {
1508 ma = VM_PAGE_TO_MACH(ptdpg[i]);
1509 pmap->pm_pdpt[i] = ma | PG_V;
1513 for (i = 0; i < NPGPTD; i++) {
1517 ma = VM_PAGE_TO_MACH(ptdpg[i]);
1518 pd = pmap->pm_pdir + (i * NPDEPG);
1519 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW));
1526 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW);
1528 rw_wlock(&pvh_global_lock);
1530 xen_pgdpt_pin(VM_PAGE_TO_MACH(ptdpg[NPGPTD]));
1531 for (i = 0; i < NPGPTD; i++) {
1532 vm_paddr_t ma = VM_PAGE_TO_MACH(ptdpg[i]);
1533 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE);
1536 rw_wunlock(&pvh_global_lock);
1537 CPU_ZERO(&pmap->pm_active);
1538 TAILQ_INIT(&pmap->pm_pvchunk);
1539 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1541 #ifdef HAMFISTED_LOCKING
1542 mtx_unlock(&createdelete_lock);
1548 * this routine is called if the page table page is not
1552 _pmap_allocpte(pmap_t pmap, u_int ptepindex, u_int flags)
1558 * Allocate a page table page.
1560 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1561 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1562 if ((flags & PMAP_ENTER_NOSLEEP) == 0) {
1564 rw_wunlock(&pvh_global_lock);
1566 rw_wlock(&pvh_global_lock);
1571 * Indicate the need to retry. While waiting, the page table
1572 * page may have been allocated.
1576 if ((m->flags & PG_ZERO) == 0)
1580 * Map the pagetable page into the process address space, if
1581 * it isn't already there.
1584 pmap->pm_stats.resident_count++;
1586 ptema = VM_PAGE_TO_MACH(m);
1588 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex],
1589 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE);
1591 KASSERT(pmap->pm_pdir[ptepindex],
1592 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex));
1597 pmap_allocpte(pmap_t pmap, vm_offset_t va, u_int flags)
1604 * Calculate pagetable page index
1606 ptepindex = va >> PDRSHIFT;
1609 * Get the page directory entry
1611 ptema = pmap->pm_pdir[ptepindex];
1614 * This supports switching from a 4MB page to a
1617 if (ptema & PG_PS) {
1621 pmap->pm_pdir[ptepindex] = 0;
1623 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1624 pmap_invalidate_all(kernel_pmap);
1628 * If the page table page is mapped, we just increment the
1629 * hold count, and activate it.
1632 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME);
1636 * Here if the pte page isn't mapped, or if it has
1639 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x",
1641 m = _pmap_allocpte(pmap, ptepindex, flags);
1642 if (m == NULL && (flags & PMAP_ENTER_NOSLEEP) == 0)
1645 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex));
1651 /***************************************************
1652 * Pmap allocation/deallocation routines.
1653 ***************************************************/
1657 * Deal with a SMP shootdown of other users of the pmap that we are
1658 * trying to dispose of. This can be a bit hairy.
1660 static cpuset_t *lazymask;
1661 static u_int lazyptd;
1662 static volatile u_int lazywait;
1664 void pmap_lazyfix_action(void);
1667 pmap_lazyfix_action(void)
1671 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1673 if (rcr3() == lazyptd)
1674 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1675 CPU_CLR_ATOMIC(PCPU_GET(cpuid), lazymask);
1676 atomic_store_rel_int(&lazywait, 1);
1680 pmap_lazyfix_self(u_int cpuid)
1683 if (rcr3() == lazyptd)
1684 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1685 CPU_CLR_ATOMIC(cpuid, lazymask);
1690 pmap_lazyfix(pmap_t pmap)
1692 cpuset_t mymask, mask;
1696 mask = pmap->pm_active;
1697 while (!CPU_EMPTY(&mask)) {
1700 /* Find least significant set bit. */
1701 lsb = CPU_FFS(&mask);
1704 CPU_SETOF(lsb, &mask);
1705 mtx_lock_spin(&smp_ipi_mtx);
1707 lazyptd = vtophys(pmap->pm_pdpt);
1709 lazyptd = vtophys(pmap->pm_pdir);
1711 cpuid = PCPU_GET(cpuid);
1713 /* Use a cpuset just for having an easy check. */
1714 CPU_SETOF(cpuid, &mymask);
1715 if (!CPU_CMP(&mask, &mymask)) {
1716 lazymask = &pmap->pm_active;
1717 pmap_lazyfix_self(cpuid);
1719 atomic_store_rel_int((u_int *)&lazymask,
1720 (u_int)&pmap->pm_active);
1721 atomic_store_rel_int(&lazywait, 0);
1722 ipi_selected(mask, IPI_LAZYPMAP);
1723 while (lazywait == 0) {
1729 mtx_unlock_spin(&smp_ipi_mtx);
1731 printf("pmap_lazyfix: spun for 50000000\n");
1732 mask = pmap->pm_active;
1739 * Cleaning up on uniprocessor is easy. For various reasons, we're
1740 * unlikely to have to even execute this code, including the fact
1741 * that the cleanup is deferred until the parent does a wait(2), which
1742 * means that another userland process has run.
1745 pmap_lazyfix(pmap_t pmap)
1749 cr3 = vtophys(pmap->pm_pdir);
1750 if (cr3 == rcr3()) {
1751 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1752 CPU_CLR(PCPU_GET(cpuid), &pmap->pm_active);
1758 * Release any resources held by the given physical map.
1759 * Called when a pmap initialized by pmap_pinit is being released.
1760 * Should only be called if the map contains no valid mappings.
1763 pmap_release(pmap_t pmap)
1765 vm_page_t m, ptdpg[2*NPGPTD+1];
1769 int npgptd = NPGPTD + 1;
1771 int npgptd = NPGPTD;
1774 KASSERT(pmap->pm_stats.resident_count == 0,
1775 ("pmap_release: pmap resident count %ld != 0",
1776 pmap->pm_stats.resident_count));
1779 #ifdef HAMFISTED_LOCKING
1780 mtx_lock(&createdelete_lock);
1784 mtx_lock_spin(&allpmaps_lock);
1785 LIST_REMOVE(pmap, pm_list);
1786 mtx_unlock_spin(&allpmaps_lock);
1788 for (i = 0; i < NPGPTD; i++)
1789 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME);
1790 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1792 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt));
1795 for (i = 0; i < npgptd; i++) {
1797 ma = VM_PAGE_TO_MACH(m);
1798 /* unpinning L1 and L2 treated the same */
1807 KASSERT(VM_PAGE_TO_MACH(m) == (pmap->pm_pdpt[i] & PG_FRAME),
1808 ("pmap_release: got wrong ptd page"));
1811 atomic_subtract_int(&cnt.v_wire_count, 1);
1815 pmap_qremove((vm_offset_t)pmap->pm_pdpt, 1);
1818 #ifdef HAMFISTED_LOCKING
1819 mtx_unlock(&createdelete_lock);
1824 kvm_size(SYSCTL_HANDLER_ARGS)
1826 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1828 return (sysctl_handle_long(oidp, &ksize, 0, req));
1830 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1831 0, 0, kvm_size, "IU", "Size of KVM");
1834 kvm_free(SYSCTL_HANDLER_ARGS)
1836 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1838 return (sysctl_handle_long(oidp, &kfree, 0, req));
1840 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1841 0, 0, kvm_free, "IU", "Amount of KVM free");
1844 * grow the number of kernel page table entries, if needed
1847 pmap_growkernel(vm_offset_t addr)
1850 vm_paddr_t ptppaddr;
1854 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1855 if (kernel_vm_end == 0) {
1856 kernel_vm_end = KERNBASE;
1858 while (pdir_pde(PTD, kernel_vm_end)) {
1859 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1861 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1862 kernel_vm_end = kernel_map->max_offset;
1867 addr = roundup2(addr, NBPDR);
1868 if (addr - 1 >= kernel_map->max_offset)
1869 addr = kernel_map->max_offset;
1870 while (kernel_vm_end < addr) {
1871 if (pdir_pde(PTD, kernel_vm_end)) {
1872 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
1873 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1874 kernel_vm_end = kernel_map->max_offset;
1880 nkpg = vm_page_alloc(NULL, kernel_vm_end >> PDRSHIFT,
1881 VM_ALLOC_INTERRUPT | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1884 panic("pmap_growkernel: no memory to grow kernel");
1888 if ((nkpg->flags & PG_ZERO) == 0)
1889 pmap_zero_page(nkpg);
1890 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1891 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1892 rw_wlock(&pvh_global_lock);
1893 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1894 mtx_lock_spin(&allpmaps_lock);
1895 LIST_FOREACH(pmap, &allpmaps, pm_list)
1896 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1898 mtx_unlock_spin(&allpmaps_lock);
1899 rw_wunlock(&pvh_global_lock);
1901 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
1902 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1903 kernel_vm_end = kernel_map->max_offset;
1910 /***************************************************
1911 * page management routines.
1912 ***************************************************/
1914 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1915 CTASSERT(_NPCM == 11);
1916 CTASSERT(_NPCPV == 336);
1918 static __inline struct pv_chunk *
1919 pv_to_chunk(pv_entry_t pv)
1922 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1925 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1927 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1928 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1930 static const uint32_t pc_freemask[_NPCM] = {
1931 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1932 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1933 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1934 PC_FREE0_9, PC_FREE10
1937 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1938 "Current number of pv entries");
1941 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1943 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1944 "Current number of pv entry chunks");
1945 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1946 "Current number of pv entry chunks allocated");
1947 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1948 "Current number of pv entry chunks frees");
1949 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1950 "Number of times tried to get a chunk page but failed.");
1952 static long pv_entry_frees, pv_entry_allocs;
1953 static int pv_entry_spare;
1955 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1956 "Current number of pv entry frees");
1957 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1958 "Current number of pv entry allocs");
1959 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1960 "Current number of spare pv entries");
1964 * We are in a serious low memory condition. Resort to
1965 * drastic measures to free some pages so we can allocate
1966 * another pv entry chunk.
1969 pmap_pv_reclaim(pmap_t locked_pmap)
1972 struct pv_chunk *pc;
1974 pt_entry_t *pte, tpte;
1977 vm_page_t free, m, m_pc;
1979 int bit, field, freed;
1981 PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED);
1984 TAILQ_INIT(&newtail);
1985 while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL && (pv_vafree == 0 ||
1987 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1988 if (pmap != pc->pc_pmap) {
1990 pmap_invalidate_all(pmap);
1991 if (pmap != locked_pmap)
1995 /* Avoid deadlock and lock recursion. */
1996 if (pmap > locked_pmap)
1998 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
2000 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
2006 * Destroy every non-wired, 4 KB page mapping in the chunk.
2009 for (field = 0; field < _NPCM; field++) {
2010 for (inuse = ~pc->pc_map[field] & pc_freemask[field];
2011 inuse != 0; inuse &= ~(1UL << bit)) {
2013 pv = &pc->pc_pventry[field * 32 + bit];
2015 pte = pmap_pte(pmap, va);
2017 if ((tpte & PG_W) == 0)
2018 tpte = pte_load_clear(pte);
2019 pmap_pte_release(pte);
2020 if ((tpte & PG_W) != 0)
2023 ("pmap_pv_reclaim: pmap %p va %x zero pte",
2025 if ((tpte & PG_G) != 0)
2026 pmap_invalidate_page(pmap, va);
2027 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
2028 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2030 if ((tpte & PG_A) != 0)
2031 vm_page_aflag_set(m, PGA_REFERENCED);
2032 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2033 if (TAILQ_EMPTY(&m->md.pv_list))
2034 vm_page_aflag_clear(m, PGA_WRITEABLE);
2035 pc->pc_map[field] |= 1UL << bit;
2036 pmap_unuse_pt(pmap, va, &free);
2041 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
2044 /* Every freed mapping is for a 4 KB page. */
2045 pmap->pm_stats.resident_count -= freed;
2046 PV_STAT(pv_entry_frees += freed);
2047 PV_STAT(pv_entry_spare += freed);
2048 pv_entry_count -= freed;
2049 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2050 for (field = 0; field < _NPCM; field++)
2051 if (pc->pc_map[field] != pc_freemask[field]) {
2052 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
2054 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
2057 * One freed pv entry in locked_pmap is
2060 if (pmap == locked_pmap)
2064 if (field == _NPCM) {
2065 PV_STAT(pv_entry_spare -= _NPCPV);
2066 PV_STAT(pc_chunk_count--);
2067 PV_STAT(pc_chunk_frees++);
2068 /* Entire chunk is free; return it. */
2069 m_pc = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2070 pmap_qremove((vm_offset_t)pc, 1);
2071 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2076 TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
2078 pmap_invalidate_all(pmap);
2079 if (pmap != locked_pmap)
2082 if (m_pc == NULL && pv_vafree != 0 && free != NULL) {
2084 free = (void *)m_pc->object;
2085 /* Recycle a freed page table page. */
2086 m_pc->wire_count = 1;
2087 atomic_add_int(&cnt.v_wire_count, 1);
2089 pmap_free_zero_pages(free);
2094 * free the pv_entry back to the free list
2097 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2099 struct pv_chunk *pc;
2100 int idx, field, bit;
2102 rw_assert(&pvh_global_lock, RA_WLOCKED);
2103 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2104 PV_STAT(pv_entry_frees++);
2105 PV_STAT(pv_entry_spare++);
2107 pc = pv_to_chunk(pv);
2108 idx = pv - &pc->pc_pventry[0];
2111 pc->pc_map[field] |= 1ul << bit;
2112 for (idx = 0; idx < _NPCM; idx++)
2113 if (pc->pc_map[idx] != pc_freemask[idx]) {
2115 * 98% of the time, pc is already at the head of the
2116 * list. If it isn't already, move it to the head.
2118 if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
2120 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2121 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
2126 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2131 free_pv_chunk(struct pv_chunk *pc)
2135 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
2136 PV_STAT(pv_entry_spare -= _NPCPV);
2137 PV_STAT(pc_chunk_count--);
2138 PV_STAT(pc_chunk_frees++);
2139 /* entire chunk is free, return it */
2140 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2141 pmap_qremove((vm_offset_t)pc, 1);
2142 vm_page_unwire(m, 0);
2144 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2148 * get a new pv_entry, allocating a block from the system
2152 get_pv_entry(pmap_t pmap, boolean_t try)
2154 static const struct timeval printinterval = { 60, 0 };
2155 static struct timeval lastprint;
2158 struct pv_chunk *pc;
2161 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2162 rw_assert(&pvh_global_lock, RA_WLOCKED);
2163 PV_STAT(pv_entry_allocs++);
2165 if (pv_entry_count > pv_entry_high_water)
2166 if (ratecheck(&lastprint, &printinterval))
2167 printf("Approaching the limit on PV entries, consider "
2168 "increasing either the vm.pmap.shpgperproc or the "
2169 "vm.pmap.pv_entry_max tunable.\n");
2171 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2173 for (field = 0; field < _NPCM; field++) {
2174 if (pc->pc_map[field]) {
2175 bit = bsfl(pc->pc_map[field]);
2179 if (field < _NPCM) {
2180 pv = &pc->pc_pventry[field * 32 + bit];
2181 pc->pc_map[field] &= ~(1ul << bit);
2182 /* If this was the last item, move it to tail */
2183 for (field = 0; field < _NPCM; field++)
2184 if (pc->pc_map[field] != 0) {
2185 PV_STAT(pv_entry_spare--);
2186 return (pv); /* not full, return */
2188 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2189 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2190 PV_STAT(pv_entry_spare--);
2195 * Access to the ptelist "pv_vafree" is synchronized by the page
2196 * queues lock. If "pv_vafree" is currently non-empty, it will
2197 * remain non-empty until pmap_ptelist_alloc() completes.
2199 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
2200 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2203 PV_STAT(pc_chunk_tryfail++);
2206 m = pmap_pv_reclaim(pmap);
2210 PV_STAT(pc_chunk_count++);
2211 PV_STAT(pc_chunk_allocs++);
2212 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2213 pmap_qenter((vm_offset_t)pc, &m, 1);
2214 if ((m->flags & PG_ZERO) == 0)
2217 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2218 for (field = 1; field < _NPCM; field++)
2219 pc->pc_map[field] = pc_freemask[field];
2220 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
2221 pv = &pc->pc_pventry[0];
2222 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2223 PV_STAT(pv_entry_spare += _NPCPV - 1);
2227 static __inline pv_entry_t
2228 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2232 rw_assert(&pvh_global_lock, RA_WLOCKED);
2233 TAILQ_FOREACH(pv, &pvh->pv_list, pv_next) {
2234 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
2235 TAILQ_REMOVE(&pvh->pv_list, pv, pv_next);
2243 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
2247 pv = pmap_pvh_remove(pvh, pmap, va);
2248 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
2249 free_pv_entry(pmap, pv);
2253 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2256 rw_assert(&pvh_global_lock, RA_WLOCKED);
2257 pmap_pvh_free(&m->md, pmap, va);
2258 if (TAILQ_EMPTY(&m->md.pv_list))
2259 vm_page_aflag_clear(m, PGA_WRITEABLE);
2263 * Conditionally create a pv entry.
2266 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2270 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2271 rw_assert(&pvh_global_lock, RA_WLOCKED);
2272 if (pv_entry_count < pv_entry_high_water &&
2273 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2275 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2282 * pmap_remove_pte: do the things to unmap a page in a process
2285 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2290 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x",
2291 pmap, (u_long)*ptq, va);
2293 rw_assert(&pvh_global_lock, RA_WLOCKED);
2294 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2296 PT_SET_VA_MA(ptq, 0, TRUE);
2297 KASSERT(oldpte != 0,
2298 ("pmap_remove_pte: pmap %p va %x zero pte", pmap, va));
2300 pmap->pm_stats.wired_count -= 1;
2302 * Machines that don't support invlpg, also don't support
2306 pmap_invalidate_page(kernel_pmap, va);
2307 pmap->pm_stats.resident_count -= 1;
2308 if (oldpte & PG_MANAGED) {
2309 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME);
2310 if ((oldpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2313 vm_page_aflag_set(m, PGA_REFERENCED);
2314 pmap_remove_entry(pmap, m, va);
2316 return (pmap_unuse_pt(pmap, va, free));
2320 * Remove a single page from a process address space
2323 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2327 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x",
2330 rw_assert(&pvh_global_lock, RA_WLOCKED);
2331 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2332 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2333 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0)
2335 pmap_remove_pte(pmap, pte, va, free);
2336 pmap_invalidate_page(pmap, va);
2338 PT_SET_MA(PADDR1, 0);
2343 * Remove the given range of addresses from the specified map.
2345 * It is assumed that the start and end are properly
2346 * rounded to the page size.
2349 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2354 vm_page_t free = NULL;
2357 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x",
2361 * Perform an unsynchronized read. This is, however, safe.
2363 if (pmap->pm_stats.resident_count == 0)
2368 rw_wlock(&pvh_global_lock);
2373 * special handling of removing one page. a very
2374 * common operation and easy to short circuit some
2377 if ((sva + PAGE_SIZE == eva) &&
2378 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2379 pmap_remove_page(pmap, sva, &free);
2383 for (; sva < eva; sva = pdnxt) {
2387 * Calculate index for next page table.
2389 pdnxt = (sva + NBPDR) & ~PDRMASK;
2392 if (pmap->pm_stats.resident_count == 0)
2395 pdirindex = sva >> PDRSHIFT;
2396 ptpaddr = pmap->pm_pdir[pdirindex];
2399 * Weed out invalid mappings. Note: we assume that the page
2400 * directory table is always allocated, and in kernel virtual.
2406 * Check for large page.
2408 if ((ptpaddr & PG_PS) != 0) {
2409 PD_CLEAR_VA(pmap, pdirindex, TRUE);
2410 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2416 * Limit our scan to either the end of the va represented
2417 * by the current page table page, or to the end of the
2418 * range being removed.
2423 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2425 if ((*pte & PG_V) == 0)
2429 * The TLB entry for a PG_G mapping is invalidated
2430 * by pmap_remove_pte().
2432 if ((*pte & PG_G) == 0)
2434 if (pmap_remove_pte(pmap, pte, sva, &free))
2440 PT_SET_VA_MA(PMAP1, 0, TRUE);
2443 pmap_invalidate_all(pmap);
2445 rw_wunlock(&pvh_global_lock);
2447 pmap_free_zero_pages(free);
2451 * Routine: pmap_remove_all
2453 * Removes this physical page from
2454 * all physical maps in which it resides.
2455 * Reflects back modify bits to the pager.
2458 * Original versions of this routine were very
2459 * inefficient because they iteratively called
2460 * pmap_remove (slow...)
2464 pmap_remove_all(vm_page_t m)
2468 pt_entry_t *pte, tpte;
2471 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2472 ("pmap_remove_all: page %p is not managed", m));
2474 rw_wlock(&pvh_global_lock);
2476 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2479 pmap->pm_stats.resident_count--;
2480 pte = pmap_pte_quick(pmap, pv->pv_va);
2482 PT_SET_VA_MA(pte, 0, TRUE);
2483 KASSERT(tpte != 0, ("pmap_remove_all: pmap %p va %x zero pte",
2486 pmap->pm_stats.wired_count--;
2488 vm_page_aflag_set(m, PGA_REFERENCED);
2491 * Update the vm_page_t clean and reference bits.
2493 if ((tpte & (PG_M | PG_RW)) == (PG_M | PG_RW))
2495 pmap_unuse_pt(pmap, pv->pv_va, &free);
2496 pmap_invalidate_page(pmap, pv->pv_va);
2497 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
2498 free_pv_entry(pmap, pv);
2501 vm_page_aflag_clear(m, PGA_WRITEABLE);
2504 PT_SET_MA(PADDR1, 0);
2506 rw_wunlock(&pvh_global_lock);
2507 pmap_free_zero_pages(free);
2511 * Set the physical protection on the
2512 * specified range of this map as requested.
2515 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2522 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x",
2523 pmap, sva, eva, prot);
2525 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2526 pmap_remove(pmap, sva, eva);
2531 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2532 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2535 if (prot & VM_PROT_WRITE)
2541 rw_wlock(&pvh_global_lock);
2544 for (; sva < eva; sva = pdnxt) {
2545 pt_entry_t obits, pbits;
2548 pdnxt = (sva + NBPDR) & ~PDRMASK;
2552 pdirindex = sva >> PDRSHIFT;
2553 ptpaddr = pmap->pm_pdir[pdirindex];
2556 * Weed out invalid mappings. Note: we assume that the page
2557 * directory table is always allocated, and in kernel virtual.
2563 * Check for large page.
2565 if ((ptpaddr & PG_PS) != 0) {
2566 if ((prot & VM_PROT_WRITE) == 0)
2567 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW);
2569 if ((prot & VM_PROT_EXECUTE) == 0)
2570 pmap->pm_pdir[pdirindex] |= pg_nx;
2579 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2585 * Regardless of whether a pte is 32 or 64 bits in
2586 * size, PG_RW, PG_A, and PG_M are among the least
2587 * significant 32 bits.
2589 obits = pbits = *pte;
2590 if ((pbits & PG_V) == 0)
2593 if ((prot & VM_PROT_WRITE) == 0) {
2594 if ((pbits & (PG_MANAGED | PG_M | PG_RW)) ==
2595 (PG_MANAGED | PG_M | PG_RW)) {
2596 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) &
2600 pbits &= ~(PG_RW | PG_M);
2603 if ((prot & VM_PROT_EXECUTE) == 0)
2607 if (pbits != obits) {
2609 PT_SET_VA_MA(pte, pbits, TRUE);
2613 pmap_invalidate_page(pmap, sva);
2621 PT_SET_VA_MA(PMAP1, 0, TRUE);
2623 pmap_invalidate_all(pmap);
2625 rw_wunlock(&pvh_global_lock);
2630 * Insert the given physical page (p) at
2631 * the specified virtual address (v) in the
2632 * target physical map with the protection requested.
2634 * If specified, the page will be wired down, meaning
2635 * that the related pte can not be reclaimed.
2637 * NB: This is the only routine which MAY NOT lazy-evaluate
2638 * or lose information. That is, this routine must actually
2639 * insert this page into the given map NOW.
2642 pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2643 u_int flags, int8_t psind __unused)
2647 pt_entry_t newpte, origpte;
2651 boolean_t invlva, wired;
2654 "pmap_enter: pmap=%08p va=0x%08x ma=0x%08x prot=0x%x flags=0x%x",
2655 pmap, va, VM_PAGE_TO_MACH(m), prot, flags);
2656 va = trunc_page(va);
2657 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
2658 KASSERT(va < UPT_MIN_ADDRESS || va >= UPT_MAX_ADDRESS,
2659 ("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)",
2661 if ((m->oflags & VPO_UNMANAGED) == 0 && !vm_page_xbusied(m))
2662 VM_OBJECT_ASSERT_LOCKED(m->object);
2665 wired = (flags & PMAP_ENTER_WIRED) != 0;
2667 rw_wlock(&pvh_global_lock);
2672 * In the case that a page table page is not
2673 * resident, we are creating it here.
2675 if (va < VM_MAXUSER_ADDRESS) {
2676 mpte = pmap_allocpte(pmap, va, flags);
2678 KASSERT((flags & PMAP_ENTER_NOSLEEP) != 0,
2679 ("pmap_allocpte failed with sleep allowed"));
2681 rw_wunlock(&pvh_global_lock);
2683 return (KERN_RESOURCE_SHORTAGE);
2687 pde = pmap_pde(pmap, va);
2688 if ((*pde & PG_PS) != 0)
2689 panic("pmap_enter: attempted pmap_enter on 4MB page");
2690 pte = pmap_pte_quick(pmap, va);
2693 * Page Directory table entry not valid, we need a new PT page
2696 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x",
2697 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va);
2700 pa = VM_PAGE_TO_PHYS(m);
2705 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx",
2710 origpte = xpmap_mtop(origpte);
2711 opa = origpte & PG_FRAME;
2714 * Mapping has not changed, must be protection or wiring change.
2716 if (origpte && (opa == pa)) {
2718 * Wiring change, just update stats. We don't worry about
2719 * wiring PT pages as they remain resident as long as there
2720 * are valid mappings in them. Hence, if a user page is wired,
2721 * the PT page will be also.
2723 if (wired && ((origpte & PG_W) == 0))
2724 pmap->pm_stats.wired_count++;
2725 else if (!wired && (origpte & PG_W))
2726 pmap->pm_stats.wired_count--;
2729 * Remove extra pte reference
2734 if (origpte & PG_MANAGED) {
2744 * Mapping has changed, invalidate old range and fall through to
2745 * handle validating new mapping.
2749 pmap->pm_stats.wired_count--;
2750 if (origpte & PG_MANAGED) {
2751 om = PHYS_TO_VM_PAGE(opa);
2752 pv = pmap_pvh_remove(&om->md, pmap, va);
2753 } else if (va < VM_MAXUSER_ADDRESS)
2754 printf("va=0x%x is unmanaged :-( \n", va);
2758 KASSERT(mpte->wire_count > 0,
2759 ("pmap_enter: missing reference to page table page,"
2763 pmap->pm_stats.resident_count++;
2766 * Enter on the PV list if part of our managed memory.
2768 if ((m->oflags & VPO_UNMANAGED) == 0) {
2769 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
2770 ("pmap_enter: managed mapping within the clean submap"));
2772 pv = get_pv_entry(pmap, FALSE);
2774 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
2776 } else if (pv != NULL)
2777 free_pv_entry(pmap, pv);
2780 * Increment counters
2783 pmap->pm_stats.wired_count++;
2787 * Now validate mapping with desired protection/wiring.
2789 newpte = (pt_entry_t)(pa | PG_V);
2790 if ((prot & VM_PROT_WRITE) != 0) {
2792 if ((newpte & PG_MANAGED) != 0)
2793 vm_page_aflag_set(m, PGA_WRITEABLE);
2796 if ((prot & VM_PROT_EXECUTE) == 0)
2801 if (va < VM_MAXUSER_ADDRESS)
2803 if (pmap == kernel_pmap)
2808 * if the mapping or permission bits are different, we need
2809 * to update the pte.
2811 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2815 PT_SET_VA(pte, newpte | PG_A, FALSE);
2816 if (origpte & PG_A) {
2817 if (origpte & PG_MANAGED)
2818 vm_page_aflag_set(om, PGA_REFERENCED);
2819 if (opa != VM_PAGE_TO_PHYS(m))
2822 if ((origpte & PG_NX) == 0 &&
2823 (newpte & PG_NX) != 0)
2827 if ((origpte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
2828 if ((origpte & PG_MANAGED) != 0)
2830 if ((prot & VM_PROT_WRITE) == 0)
2833 if ((origpte & PG_MANAGED) != 0 &&
2834 TAILQ_EMPTY(&om->md.pv_list))
2835 vm_page_aflag_clear(om, PGA_WRITEABLE);
2837 pmap_invalidate_page(pmap, va);
2839 PT_SET_VA(pte, newpte | PG_A, FALSE);
2846 PT_SET_VA_MA(PMAP1, 0, TRUE);
2848 rw_wunlock(&pvh_global_lock);
2850 return (KERN_SUCCESS);
2854 * Maps a sequence of resident pages belonging to the same object.
2855 * The sequence begins with the given page m_start. This page is
2856 * mapped at the given virtual address start. Each subsequent page is
2857 * mapped at a virtual address that is offset from start by the same
2858 * amount as the page is offset from m_start within the object. The
2859 * last page in the sequence is the page with the largest offset from
2860 * m_start that can be mapped at a virtual address less than the given
2861 * virtual address end. Not every virtual page between start and end
2862 * is mapped; only those for which a resident page exists with the
2863 * corresponding offset from m_start are mapped.
2866 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2867 vm_page_t m_start, vm_prot_t prot)
2870 vm_pindex_t diff, psize;
2871 multicall_entry_t mcl[16];
2872 multicall_entry_t *mclp = mcl;
2873 int error, count = 0;
2875 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2877 psize = atop(end - start);
2880 rw_wlock(&pvh_global_lock);
2882 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2883 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m,
2885 m = TAILQ_NEXT(m, listq);
2887 error = HYPERVISOR_multicall(mcl, count);
2888 KASSERT(error == 0, ("bad multicall %d", error));
2894 error = HYPERVISOR_multicall(mcl, count);
2895 KASSERT(error == 0, ("bad multicall %d", error));
2897 rw_wunlock(&pvh_global_lock);
2902 * this code makes some *MAJOR* assumptions:
2903 * 1. Current pmap & pmap exists.
2906 * 4. No page table pages.
2907 * but is *MUCH* faster than pmap_enter...
2911 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2913 multicall_entry_t mcl, *mclp;
2917 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x",
2920 rw_wlock(&pvh_global_lock);
2922 (void)pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL);
2924 HYPERVISOR_multicall(&mcl, count);
2925 rw_wunlock(&pvh_global_lock);
2931 pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count)
2933 int i, error, index = 0;
2934 multicall_entry_t mcl[16];
2935 multicall_entry_t *mclp = mcl;
2938 for (i = 0; i < count; i++, addrs++, pages++, prots++) {
2939 if (!pmap_is_prefaultable_locked(pmap, *addrs))
2942 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL);
2944 error = HYPERVISOR_multicall(mcl, index);
2947 KASSERT(error == 0, ("bad multicall %d", error));
2951 error = HYPERVISOR_multicall(mcl, index);
2952 KASSERT(error == 0, ("bad multicall %d", error));
2960 pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m,
2961 vm_prot_t prot, vm_page_t mpte)
2966 multicall_entry_t *mcl = *mclpp;
2968 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2969 (m->oflags & VPO_UNMANAGED) != 0,
2970 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2971 rw_assert(&pvh_global_lock, RA_WLOCKED);
2972 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2975 * In the case that a page table page is not
2976 * resident, we are creating it here.
2978 if (va < VM_MAXUSER_ADDRESS) {
2983 * Calculate pagetable page index
2985 ptepindex = va >> PDRSHIFT;
2986 if (mpte && (mpte->pindex == ptepindex)) {
2990 * Get the page directory entry
2992 ptema = pmap->pm_pdir[ptepindex];
2995 * If the page table page is mapped, we just increment
2996 * the hold count, and activate it.
3000 panic("pmap_enter_quick: unexpected mapping into 4MB page");
3001 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME);
3004 mpte = _pmap_allocpte(pmap, ptepindex,
3005 PMAP_ENTER_NOSLEEP);
3015 * This call to vtopte makes the assumption that we are
3016 * entering the page into the current pmap. In order to support
3017 * quick entry into any pmap, one would likely use pmap_pte_quick.
3018 * But that isn't as quick as vtopte.
3020 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap"));
3031 * Enter on the PV list if part of our managed memory.
3033 if ((m->oflags & VPO_UNMANAGED) == 0 &&
3034 !pmap_try_insert_pv_entry(pmap, va, m)) {
3037 if (pmap_unwire_ptp(pmap, mpte, &free)) {
3038 pmap_invalidate_page(pmap, va);
3039 pmap_free_zero_pages(free);
3048 * Increment counters
3050 pmap->pm_stats.resident_count++;
3052 pa = VM_PAGE_TO_PHYS(m);
3054 if ((prot & VM_PROT_EXECUTE) == 0)
3060 * Now validate mapping with RO protection
3062 if ((m->oflags & VPO_UNMANAGED) != 0)
3063 pte_store(pte, pa | PG_V | PG_U);
3065 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3068 * Now validate mapping with RO protection
3070 if ((m->oflags & VPO_UNMANAGED) != 0)
3071 pa = xpmap_ptom(pa | PG_V | PG_U);
3073 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED);
3075 mcl->op = __HYPERVISOR_update_va_mapping;
3077 mcl->args[1] = (uint32_t)(pa & 0xffffffff);
3078 mcl->args[2] = (uint32_t)(pa >> 32);
3081 *count = *count + 1;
3087 * Make a temporary mapping for a physical address. This is only intended
3088 * to be used for panic dumps.
3091 pmap_kenter_temporary(vm_paddr_t pa, int i)
3094 vm_paddr_t ma = xpmap_ptom(pa);
3096 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3097 PT_SET_MA(va, (ma & ~PAGE_MASK) | PG_V | pgeflag);
3099 return ((void *)crashdumpmap);
3103 * This code maps large physical mmap regions into the
3104 * processor address space. Note that some shortcuts
3105 * are taken, but the code works.
3108 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
3109 vm_pindex_t pindex, vm_size_t size)
3112 vm_paddr_t pa, ptepa;
3116 VM_OBJECT_ASSERT_WLOCKED(object);
3117 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3118 ("pmap_object_init_pt: non-device object"));
3120 (addr & (NBPDR - 1)) == 0 && (size & (NBPDR - 1)) == 0) {
3121 if (!vm_object_populate(object, pindex, pindex + atop(size)))
3123 p = vm_page_lookup(object, pindex);
3124 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3125 ("pmap_object_init_pt: invalid page %p", p));
3126 pat_mode = p->md.pat_mode;
3129 * Abort the mapping if the first page is not physically
3130 * aligned to a 2/4MB page boundary.
3132 ptepa = VM_PAGE_TO_PHYS(p);
3133 if (ptepa & (NBPDR - 1))
3137 * Skip the first page. Abort the mapping if the rest of
3138 * the pages are not physically contiguous or have differing
3139 * memory attributes.
3141 p = TAILQ_NEXT(p, listq);
3142 for (pa = ptepa + PAGE_SIZE; pa < ptepa + size;
3144 KASSERT(p->valid == VM_PAGE_BITS_ALL,
3145 ("pmap_object_init_pt: invalid page %p", p));
3146 if (pa != VM_PAGE_TO_PHYS(p) ||
3147 pat_mode != p->md.pat_mode)
3149 p = TAILQ_NEXT(p, listq);
3153 * Map using 2/4MB pages. Since "ptepa" is 2/4M aligned and
3154 * "size" is a multiple of 2/4M, adding the PAT setting to
3155 * "pa" will not affect the termination of this loop.
3158 for (pa = ptepa | pmap_cache_bits(pat_mode, 1); pa < ptepa +
3159 size; pa += NBPDR) {
3160 pde = pmap_pde(pmap, addr);
3162 pde_store(pde, pa | PG_PS | PG_M | PG_A |
3163 PG_U | PG_RW | PG_V);
3164 pmap->pm_stats.resident_count += NBPDR /
3166 pmap_pde_mappings++;
3168 /* Else continue on if the PDE is already valid. */
3176 * Clear the wired attribute from the mappings for the specified range of
3177 * addresses in the given pmap. Every valid mapping within that range
3178 * must have the wired attribute set. In contrast, invalid mappings
3179 * cannot have the wired attribute set, so they are ignored.
3181 * The wired attribute of the page table entry is not a hardware feature,
3182 * so there is no need to invalidate any TLB entries.
3185 pmap_unwire(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3191 CTR3(KTR_PMAP, "pmap_unwire: pmap=%p sva=0x%x eva=0x%x", pmap, sva,
3193 rw_wlock(&pvh_global_lock);
3196 for (; sva < eva; sva = pdnxt) {
3197 pdnxt = (sva + NBPDR) & ~PDRMASK;
3200 pde = pmap_pde(pmap, sva);
3201 if ((*pde & PG_V) == 0)
3203 if ((*pde & PG_PS) != 0)
3204 panic("pmap_unwire: unexpected PG_PS in pde %#jx",
3208 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3210 if ((*pte & PG_V) == 0)
3212 if ((*pte & PG_W) == 0)
3213 panic("pmap_unwire: pte %#jx is missing PG_W",
3215 PT_SET_VA_MA(pte, *pte & ~PG_W, FALSE);
3216 pmap->pm_stats.wired_count--;
3220 PT_CLEAR_VA(PMAP1, FALSE);
3223 rw_wunlock(&pvh_global_lock);
3229 * Copy the range specified by src_addr/len
3230 * from the source map to the range dst_addr/len
3231 * in the destination map.
3233 * This routine is only advisory and need not do anything.
3237 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3238 vm_offset_t src_addr)
3242 vm_offset_t end_addr = src_addr + len;
3245 if (dst_addr != src_addr)
3248 if (!pmap_is_current(src_pmap)) {
3250 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx",
3251 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME));
3255 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x",
3256 dst_pmap, src_pmap, dst_addr, len, src_addr);
3258 #ifdef HAMFISTED_LOCKING
3259 mtx_lock(&createdelete_lock);
3262 rw_wlock(&pvh_global_lock);
3263 if (dst_pmap < src_pmap) {
3264 PMAP_LOCK(dst_pmap);
3265 PMAP_LOCK(src_pmap);
3267 PMAP_LOCK(src_pmap);
3268 PMAP_LOCK(dst_pmap);
3271 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3272 pt_entry_t *src_pte, *dst_pte;
3273 vm_page_t dstmpte, srcmpte;
3274 pd_entry_t srcptepaddr;
3277 KASSERT(addr < UPT_MIN_ADDRESS,
3278 ("pmap_copy: invalid to pmap_copy page tables"));
3280 pdnxt = (addr + NBPDR) & ~PDRMASK;
3283 ptepindex = addr >> PDRSHIFT;
3285 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]);
3286 if (srcptepaddr == 0)
3289 if (srcptepaddr & PG_PS) {
3290 if (dst_pmap->pm_pdir[ptepindex] == 0) {
3291 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE);
3292 dst_pmap->pm_stats.resident_count +=
3298 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3299 KASSERT(srcmpte->wire_count > 0,
3300 ("pmap_copy: source page table page is unused"));
3302 if (pdnxt > end_addr)
3305 src_pte = vtopte(addr);
3306 while (addr < pdnxt) {
3310 * we only virtual copy managed pages
3312 if ((ptetemp & PG_MANAGED) != 0) {
3313 dstmpte = pmap_allocpte(dst_pmap, addr,
3314 PMAP_ENTER_NOSLEEP);
3315 if (dstmpte == NULL)
3317 dst_pte = pmap_pte_quick(dst_pmap, addr);
3318 if (*dst_pte == 0 &&
3319 pmap_try_insert_pv_entry(dst_pmap, addr,
3320 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) {
3322 * Clear the wired, modified, and
3323 * accessed (referenced) bits
3326 KASSERT(ptetemp != 0, ("src_pte not set"));
3327 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */);
3328 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)),
3329 ("no pmap copy expected: 0x%jx saw: 0x%jx",
3330 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte));
3331 dst_pmap->pm_stats.resident_count++;
3334 if (pmap_unwire_ptp(dst_pmap, dstmpte,
3336 pmap_invalidate_page(dst_pmap,
3338 pmap_free_zero_pages(free);
3342 if (dstmpte->wire_count >= srcmpte->wire_count)
3352 rw_wunlock(&pvh_global_lock);
3353 PMAP_UNLOCK(src_pmap);
3354 PMAP_UNLOCK(dst_pmap);
3356 #ifdef HAMFISTED_LOCKING
3357 mtx_unlock(&createdelete_lock);
3361 static __inline void
3362 pagezero(void *page)
3364 #if defined(I686_CPU)
3365 if (cpu_class == CPUCLASS_686) {
3366 #if defined(CPU_ENABLE_SSE)
3367 if (cpu_feature & CPUID_SSE2)
3368 sse2_pagezero(page);
3371 i686_pagezero(page);
3374 bzero(page, PAGE_SIZE);
3378 * pmap_zero_page zeros the specified hardware page by mapping
3379 * the page into KVM and using bzero to clear its contents.
3382 pmap_zero_page(vm_page_t m)
3384 struct sysmaps *sysmaps;
3386 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3387 mtx_lock(&sysmaps->lock);
3388 if (*sysmaps->CMAP2)
3389 panic("pmap_zero_page: CMAP2 busy");
3391 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M);
3392 pagezero(sysmaps->CADDR2);
3393 PT_SET_MA(sysmaps->CADDR2, 0);
3395 mtx_unlock(&sysmaps->lock);
3399 * pmap_zero_page_area zeros the specified hardware page by mapping
3400 * the page into KVM and using bzero to clear its contents.
3402 * off and size may not cover an area beyond a single hardware page.
3405 pmap_zero_page_area(vm_page_t m, int off, int size)
3407 struct sysmaps *sysmaps;
3409 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3410 mtx_lock(&sysmaps->lock);
3411 if (*sysmaps->CMAP2)
3412 panic("pmap_zero_page_area: CMAP2 busy");
3414 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M);
3416 if (off == 0 && size == PAGE_SIZE)
3417 pagezero(sysmaps->CADDR2);
3419 bzero((char *)sysmaps->CADDR2 + off, size);
3420 PT_SET_MA(sysmaps->CADDR2, 0);
3422 mtx_unlock(&sysmaps->lock);
3426 * pmap_zero_page_idle zeros the specified hardware page by mapping
3427 * the page into KVM and using bzero to clear its contents. This
3428 * is intended to be called from the vm_pagezero process only and
3432 pmap_zero_page_idle(vm_page_t m)
3436 panic("pmap_zero_page_idle: CMAP3 busy");
3438 PT_SET_MA(CADDR3, PG_V | PG_RW | VM_PAGE_TO_MACH(m) | PG_A | PG_M);
3440 PT_SET_MA(CADDR3, 0);
3445 * pmap_copy_page copies the specified (machine independent)
3446 * page by mapping the page into virtual memory and using
3447 * bcopy to copy the page, one machine dependent page at a
3451 pmap_copy_page(vm_page_t src, vm_page_t dst)
3453 struct sysmaps *sysmaps;
3455 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3456 mtx_lock(&sysmaps->lock);
3457 if (*sysmaps->CMAP1)
3458 panic("pmap_copy_page: CMAP1 busy");
3459 if (*sysmaps->CMAP2)
3460 panic("pmap_copy_page: CMAP2 busy");
3462 PT_SET_MA(sysmaps->CADDR1, PG_V | VM_PAGE_TO_MACH(src) | PG_A);
3463 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | VM_PAGE_TO_MACH(dst) | PG_A | PG_M);
3464 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3465 PT_SET_MA(sysmaps->CADDR1, 0);
3466 PT_SET_MA(sysmaps->CADDR2, 0);
3468 mtx_unlock(&sysmaps->lock);
3471 int unmapped_buf_allowed = 1;
3474 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
3475 vm_offset_t b_offset, int xfersize)
3477 struct sysmaps *sysmaps;
3478 vm_page_t a_pg, b_pg;
3480 vm_offset_t a_pg_offset, b_pg_offset;
3483 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3484 mtx_lock(&sysmaps->lock);
3485 if (*sysmaps->CMAP1 != 0)
3486 panic("pmap_copy_pages: CMAP1 busy");
3487 if (*sysmaps->CMAP2 != 0)
3488 panic("pmap_copy_pages: CMAP2 busy");
3490 while (xfersize > 0) {
3491 a_pg = ma[a_offset >> PAGE_SHIFT];
3492 a_pg_offset = a_offset & PAGE_MASK;
3493 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
3494 b_pg = mb[b_offset >> PAGE_SHIFT];
3495 b_pg_offset = b_offset & PAGE_MASK;
3496 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
3497 PT_SET_MA(sysmaps->CADDR1, PG_V | VM_PAGE_TO_MACH(a_pg) | PG_A);
3498 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW |
3499 VM_PAGE_TO_MACH(b_pg) | PG_A | PG_M);
3500 a_cp = sysmaps->CADDR1 + a_pg_offset;
3501 b_cp = sysmaps->CADDR2 + b_pg_offset;
3502 bcopy(a_cp, b_cp, cnt);
3507 PT_SET_MA(sysmaps->CADDR1, 0);
3508 PT_SET_MA(sysmaps->CADDR2, 0);
3510 mtx_unlock(&sysmaps->lock);
3514 * Returns true if the pmap's pv is one of the first
3515 * 16 pvs linked to from this page. This count may
3516 * be changed upwards or downwards in the future; it
3517 * is only necessary that true be returned for a small
3518 * subset of pmaps for proper page aging.
3521 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3527 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3528 ("pmap_page_exists_quick: page %p is not managed", m));
3530 rw_wlock(&pvh_global_lock);
3531 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3532 if (PV_PMAP(pv) == pmap) {
3540 rw_wunlock(&pvh_global_lock);
3545 * pmap_page_wired_mappings:
3547 * Return the number of managed mappings to the given physical page
3551 pmap_page_wired_mappings(vm_page_t m)
3559 if ((m->oflags & VPO_UNMANAGED) != 0)
3561 rw_wlock(&pvh_global_lock);
3563 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3566 pte = pmap_pte_quick(pmap, pv->pv_va);
3567 if ((*pte & PG_W) != 0)
3572 rw_wunlock(&pvh_global_lock);
3577 * Returns TRUE if the given page is mapped. Otherwise, returns FALSE.
3580 pmap_page_is_mapped(vm_page_t m)
3583 if ((m->oflags & VPO_UNMANAGED) != 0)
3585 return (!TAILQ_EMPTY(&m->md.pv_list));
3589 * Remove all pages from specified address space
3590 * this aids process exit speeds. Also, this code
3591 * is special cased for current process only, but
3592 * can have the more generic (and slightly slower)
3593 * mode enabled. This is much faster than pmap_remove
3594 * in the case of running down an entire address space.
3597 pmap_remove_pages(pmap_t pmap)
3599 pt_entry_t *pte, tpte;
3600 vm_page_t m, free = NULL;
3602 struct pv_chunk *pc, *npc;
3605 uint32_t inuse, bitmask;
3608 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap);
3610 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
3611 printf("warning: pmap_remove_pages called with non-current pmap\n");
3614 rw_wlock(&pvh_global_lock);
3615 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap"));
3618 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3619 KASSERT(pc->pc_pmap == pmap, ("Wrong pmap %p %p", pmap,
3622 for (field = 0; field < _NPCM; field++) {
3623 inuse = ~pc->pc_map[field] & pc_freemask[field];
3624 while (inuse != 0) {
3626 bitmask = 1UL << bit;
3627 idx = field * 32 + bit;
3628 pv = &pc->pc_pventry[idx];
3631 pte = vtopte(pv->pv_va);
3632 tpte = *pte ? xpmap_mtop(*pte) : 0;
3636 "TPTE at %p IS ZERO @ VA %08x\n",
3642 * We cannot remove wired pages from a process' mapping at this time
3649 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
3650 KASSERT(m->phys_addr == (tpte & PG_FRAME),
3651 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
3652 m, (uintmax_t)m->phys_addr,
3655 KASSERT(m < &vm_page_array[vm_page_array_size],
3656 ("pmap_remove_pages: bad tpte %#jx",
3660 PT_CLEAR_VA(pte, FALSE);
3663 * Update the vm_page_t clean/reference bits.
3668 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3669 if (TAILQ_EMPTY(&m->md.pv_list))
3670 vm_page_aflag_clear(m, PGA_WRITEABLE);
3672 pmap_unuse_pt(pmap, pv->pv_va, &free);
3675 PV_STAT(pv_entry_frees++);
3676 PV_STAT(pv_entry_spare++);
3678 pc->pc_map[field] |= bitmask;
3679 pmap->pm_stats.resident_count--;
3684 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3690 PT_SET_MA(PADDR1, 0);
3693 pmap_invalidate_all(pmap);
3694 rw_wunlock(&pvh_global_lock);
3696 pmap_free_zero_pages(free);
3702 * Return whether or not the specified physical page was modified
3703 * in any physical maps.
3706 pmap_is_modified(vm_page_t m)
3713 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3714 ("pmap_is_modified: page %p is not managed", m));
3718 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3719 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
3720 * is clear, no PTEs can have PG_M set.
3722 VM_OBJECT_ASSERT_WLOCKED(m->object);
3723 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3725 rw_wlock(&pvh_global_lock);
3727 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3730 pte = pmap_pte_quick(pmap, pv->pv_va);
3731 rv = (*pte & PG_M) != 0;
3737 PT_SET_MA(PADDR1, 0);
3739 rw_wunlock(&pvh_global_lock);
3744 * pmap_is_prefaultable:
3746 * Return whether or not the specified virtual address is elgible
3750 pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr)
3753 boolean_t rv = FALSE;
3757 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) {
3765 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3770 rv = pmap_is_prefaultable_locked(pmap, addr);
3776 pmap_is_referenced(vm_page_t m)
3783 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3784 ("pmap_is_referenced: page %p is not managed", m));
3786 rw_wlock(&pvh_global_lock);
3788 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3791 pte = pmap_pte_quick(pmap, pv->pv_va);
3792 rv = (*pte & (PG_A | PG_V)) == (PG_A | PG_V);
3798 PT_SET_MA(PADDR1, 0);
3800 rw_wunlock(&pvh_global_lock);
3805 pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len)
3807 int i, npages = round_page(len) >> PAGE_SHIFT;
3808 for (i = 0; i < npages; i++) {
3810 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3811 rw_wlock(&pvh_global_lock);
3812 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M)));
3813 rw_wunlock(&pvh_global_lock);
3814 PMAP_MARK_PRIV(xpmap_mtop(*pte));
3815 pmap_pte_release(pte);
3820 pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len)
3822 int i, npages = round_page(len) >> PAGE_SHIFT;
3823 for (i = 0; i < npages; i++) {
3825 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3826 PMAP_MARK_UNPRIV(xpmap_mtop(*pte));
3827 rw_wlock(&pvh_global_lock);
3828 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M));
3829 rw_wunlock(&pvh_global_lock);
3830 pmap_pte_release(pte);
3835 * Clear the write and modified bits in each of the given page's mappings.
3838 pmap_remove_write(vm_page_t m)
3842 pt_entry_t oldpte, *pte;
3844 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3845 ("pmap_remove_write: page %p is not managed", m));
3848 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
3849 * set by another thread while the object is locked. Thus,
3850 * if PGA_WRITEABLE is clear, no page table entries need updating.
3852 VM_OBJECT_ASSERT_WLOCKED(m->object);
3853 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
3855 rw_wlock(&pvh_global_lock);
3857 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
3860 pte = pmap_pte_quick(pmap, pv->pv_va);
3863 if ((oldpte & PG_RW) != 0) {
3864 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M);
3867 * Regardless of whether a pte is 32 or 64 bits
3868 * in size, PG_RW and PG_M are among the least
3869 * significant 32 bits.
3871 PT_SET_VA_MA(pte, newpte, TRUE);
3875 if ((oldpte & PG_M) != 0)
3877 pmap_invalidate_page(pmap, pv->pv_va);
3881 vm_page_aflag_clear(m, PGA_WRITEABLE);
3884 PT_SET_MA(PADDR1, 0);
3886 rw_wunlock(&pvh_global_lock);
3890 * pmap_ts_referenced:
3892 * Return a count of reference bits for a page, clearing those bits.
3893 * It is not necessary for every reference bit to be cleared, but it
3894 * is necessary that 0 only be returned when there are truly no
3895 * reference bits set.
3897 * XXX: The exact number of bits to check and clear is a matter that
3898 * should be tested and standardized at some point in the future for
3899 * optimal aging of shared pages.
3902 pmap_ts_referenced(vm_page_t m)
3904 pv_entry_t pv, pvf, pvn;
3909 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3910 ("pmap_ts_referenced: page %p is not managed", m));
3911 rw_wlock(&pvh_global_lock);
3913 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3916 pvn = TAILQ_NEXT(pv, pv_next);
3917 TAILQ_REMOVE(&m->md.pv_list, pv, pv_next);
3918 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_next);
3921 pte = pmap_pte_quick(pmap, pv->pv_va);
3922 if ((*pte & PG_A) != 0) {
3923 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE);
3924 pmap_invalidate_page(pmap, pv->pv_va);
3930 } while ((pv = pvn) != NULL && pv != pvf);
3934 PT_SET_MA(PADDR1, 0);
3936 rw_wunlock(&pvh_global_lock);
3941 * Apply the given advice to the specified range of addresses within the
3942 * given pmap. Depending on the advice, clear the referenced and/or
3943 * modified flags in each mapping and set the mapped page's dirty field.
3946 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
3952 boolean_t anychanged;
3954 if (advice != MADV_DONTNEED && advice != MADV_FREE)
3957 rw_wlock(&pvh_global_lock);
3960 for (; sva < eva; sva = pdnxt) {
3961 pdnxt = (sva + NBPDR) & ~PDRMASK;
3964 oldpde = pmap->pm_pdir[sva >> PDRSHIFT];
3965 if ((oldpde & (PG_PS | PG_V)) != PG_V)
3969 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
3971 if ((*pte & (PG_MANAGED | PG_V)) != (PG_MANAGED |
3974 else if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
3975 if (advice == MADV_DONTNEED) {
3977 * Future calls to pmap_is_modified()
3978 * can be avoided by making the page
3981 m = PHYS_TO_VM_PAGE(xpmap_mtop(*pte) &
3985 PT_SET_VA_MA(pte, *pte & ~(PG_M | PG_A), TRUE);
3986 } else if ((*pte & PG_A) != 0)
3987 PT_SET_VA_MA(pte, *pte & ~PG_A, TRUE);
3990 if ((*pte & PG_G) != 0)
3991 pmap_invalidate_page(pmap, sva);
3998 PT_SET_VA_MA(PMAP1, 0, TRUE);
4000 pmap_invalidate_all(pmap);
4002 rw_wunlock(&pvh_global_lock);
4007 * Clear the modify bits on the specified physical page.
4010 pmap_clear_modify(vm_page_t m)
4016 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4017 ("pmap_clear_modify: page %p is not managed", m));
4018 VM_OBJECT_ASSERT_WLOCKED(m->object);
4019 KASSERT(!vm_page_xbusied(m),
4020 ("pmap_clear_modify: page %p is exclusive busied", m));
4023 * If the page is not PGA_WRITEABLE, then no PTEs can have PG_M set.
4024 * If the object containing the page is locked and the page is not
4025 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4027 if ((m->aflags & PGA_WRITEABLE) == 0)
4029 rw_wlock(&pvh_global_lock);
4031 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4034 pte = pmap_pte_quick(pmap, pv->pv_va);
4035 if ((*pte & (PG_M | PG_RW)) == (PG_M | PG_RW)) {
4037 * Regardless of whether a pte is 32 or 64 bits
4038 * in size, PG_M is among the least significant
4041 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE);
4042 pmap_invalidate_page(pmap, pv->pv_va);
4047 rw_wunlock(&pvh_global_lock);
4051 * Miscellaneous support routines follow
4055 * Map a set of physical memory pages into the kernel virtual
4056 * address space. Return a pointer to where it is mapped. This
4057 * routine is intended to be used for mapping device memory,
4061 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
4063 vm_offset_t va, offset;
4066 offset = pa & PAGE_MASK;
4067 size = round_page(offset + size);
4070 if (pa < KERNLOAD && pa + size <= KERNLOAD)
4073 va = kva_alloc(size);
4075 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
4077 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
4078 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
4079 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
4080 pmap_invalidate_cache_range(va, va + size, FALSE);
4081 return ((void *)(va + offset));
4085 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
4088 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
4092 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
4095 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
4099 pmap_unmapdev(vm_offset_t va, vm_size_t size)
4101 vm_offset_t base, offset;
4103 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
4105 base = trunc_page(va);
4106 offset = va & PAGE_MASK;
4107 size = round_page(offset + size);
4108 kva_free(base, size);
4112 * Sets the memory attribute for the specified page.
4115 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
4118 m->md.pat_mode = ma;
4119 if ((m->flags & PG_FICTITIOUS) != 0)
4123 * If "m" is a normal page, flush it from the cache.
4124 * See pmap_invalidate_cache_range().
4126 * First, try to find an existing mapping of the page by sf
4127 * buffer. sf_buf_invalidate_cache() modifies mapping and
4128 * flushes the cache.
4130 if (sf_buf_invalidate_cache(m))
4134 * If page is not mapped by sf buffer, but CPU does not
4135 * support self snoop, map the page transient and do
4136 * invalidation. In the worst case, whole cache is flushed by
4137 * pmap_invalidate_cache_range().
4139 if ((cpu_feature & CPUID_SS) == 0)
4144 pmap_flush_page(vm_page_t m)
4146 struct sysmaps *sysmaps;
4147 vm_offset_t sva, eva;
4149 if ((cpu_feature & CPUID_CLFSH) != 0) {
4150 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
4151 mtx_lock(&sysmaps->lock);
4152 if (*sysmaps->CMAP2)
4153 panic("pmap_flush_page: CMAP2 busy");
4155 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW |
4156 VM_PAGE_TO_MACH(m) | PG_A | PG_M |
4157 pmap_cache_bits(m->md.pat_mode, 0));
4158 invlcaddr(sysmaps->CADDR2);
4159 sva = (vm_offset_t)sysmaps->CADDR2;
4160 eva = sva + PAGE_SIZE;
4163 * Use mfence despite the ordering implied by
4164 * mtx_{un,}lock() because clflush is not guaranteed
4165 * to be ordered by any other instruction.
4168 for (; sva < eva; sva += cpu_clflush_line_size)
4171 PT_SET_MA(sysmaps->CADDR2, 0);
4173 mtx_unlock(&sysmaps->lock);
4175 pmap_invalidate_cache();
4179 * Changes the specified virtual address range's memory type to that given by
4180 * the parameter "mode". The specified virtual address range must be
4181 * completely contained within either the kernel map.
4183 * Returns zero if the change completed successfully, and either EINVAL or
4184 * ENOMEM if the change failed. Specifically, EINVAL is returned if some part
4185 * of the virtual address range was not mapped, and ENOMEM is returned if
4186 * there was insufficient memory available to complete the change.
4189 pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
4191 vm_offset_t base, offset, tmpva;
4197 base = trunc_page(va);
4198 offset = va & PAGE_MASK;
4199 size = round_page(offset + size);
4201 /* Only supported on kernel virtual addresses. */
4202 if (base <= VM_MAXUSER_ADDRESS)
4205 /* 4MB pages and pages that aren't mapped aren't supported. */
4206 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) {
4207 pde = pmap_pde(kernel_pmap, tmpva);
4210 if ((*pde & PG_V) == 0)
4213 if ((*pte & PG_V) == 0)
4220 * Ok, all the pages exist and are 4k, so run through them updating
4223 for (tmpva = base; size > 0; ) {
4224 pte = vtopte(tmpva);
4227 * The cache mode bits are all in the low 32-bits of the
4228 * PTE, so we can just spin on updating the low 32-bits.
4231 opte = *(u_int *)pte;
4232 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
4233 npte |= pmap_cache_bits(mode, 0);
4234 PT_SET_VA_MA(pte, npte, TRUE);
4235 } while (npte != opte && (*pte != npte));
4243 * Flush CPU caches to make sure any data isn't cached that
4244 * shouldn't be, etc.
4247 pmap_invalidate_range(kernel_pmap, base, tmpva);
4248 pmap_invalidate_cache_range(base, tmpva, FALSE);
4254 * perform the pmap work for mincore
4257 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4259 pt_entry_t *ptep, pte;
4265 ptep = pmap_pte(pmap, addr);
4266 pte = (ptep != NULL) ? PT_GET(ptep) : 0;
4267 pmap_pte_release(ptep);
4269 if ((pte & PG_V) != 0) {
4270 val |= MINCORE_INCORE;
4271 if ((pte & (PG_M | PG_RW)) == (PG_M | PG_RW))
4272 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4273 if ((pte & PG_A) != 0)
4274 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
4276 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4277 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
4278 (pte & (PG_MANAGED | PG_V)) == (PG_MANAGED | PG_V)) {
4279 pa = pte & PG_FRAME;
4280 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
4281 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
4284 PA_UNLOCK_COND(*locked_pa);
4290 pmap_activate(struct thread *td)
4292 pmap_t pmap, oldpmap;
4297 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4298 oldpmap = PCPU_GET(curpmap);
4299 cpuid = PCPU_GET(cpuid);
4301 CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active);
4302 CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
4304 CPU_CLR(cpuid, &oldpmap->pm_active);
4305 CPU_SET(cpuid, &pmap->pm_active);
4308 cr3 = vtophys(pmap->pm_pdpt);
4310 cr3 = vtophys(pmap->pm_pdir);
4313 * pmap_activate is for the current thread on the current cpu
4315 td->td_pcb->pcb_cr3 = cr3;
4318 PCPU_SET(curpmap, pmap);
4323 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
4328 * Increase the starting virtual address of the given mapping if a
4329 * different alignment might result in more superpage mappings.
4332 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4333 vm_offset_t *addr, vm_size_t size)
4335 vm_offset_t superpage_offset;
4339 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4340 offset += ptoa(object->pg_color);
4341 superpage_offset = offset & PDRMASK;
4342 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
4343 (*addr & PDRMASK) == superpage_offset)
4345 if ((*addr & PDRMASK) < superpage_offset)
4346 *addr = (*addr & ~PDRMASK) + superpage_offset;
4348 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
4355 int i, pdir, offset;
4360 * We need to remove the recursive mapping structure from all
4361 * our pmaps so that Xen doesn't get confused when it restores
4362 * the page tables. The recursive map lives at page directory
4363 * index PTDPTDI. We assume that the suspend code has stopped
4364 * the other vcpus (if any).
4366 LIST_FOREACH(pmap, &allpmaps, pm_list) {
4367 for (i = 0; i < 4; i++) {
4369 * Figure out which page directory (L2) page
4370 * contains this bit of the recursive map and
4371 * the offset within that page of the map
4374 pdir = (PTDPTDI + i) / NPDEPG;
4375 offset = (PTDPTDI + i) % NPDEPG;
4376 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME;
4377 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t);
4380 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF);
4388 int i, pdir, offset;
4393 * Restore the recursive map that we removed on suspend.
4395 LIST_FOREACH(pmap, &allpmaps, pm_list) {
4396 for (i = 0; i < 4; i++) {
4398 * Figure out which page directory (L2) page
4399 * contains this bit of the recursive map and
4400 * the offset within that page of the map
4403 pdir = (PTDPTDI + i) / NPDEPG;
4404 offset = (PTDPTDI + i) % NPDEPG;
4405 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME;
4406 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t);
4407 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V;
4409 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF);
4413 #if defined(PMAP_DEBUG)
4414 pmap_pid_dump(int pid)
4421 sx_slock(&allproc_lock);
4422 FOREACH_PROC_IN_SYSTEM(p) {
4423 if (p->p_pid != pid)
4429 pmap = vmspace_pmap(p->p_vmspace);
4430 for (i = 0; i < NPDEPTD; i++) {
4433 vm_offset_t base = i << PDRSHIFT;
4435 pde = &pmap->pm_pdir[i];
4436 if (pde && pmap_pde_v(pde)) {
4437 for (j = 0; j < NPTEPG; j++) {
4438 vm_offset_t va = base + (j << PAGE_SHIFT);
4439 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
4444 sx_sunlock(&allproc_lock);
4447 pte = pmap_pte(pmap, va);
4448 if (pte && pmap_pte_v(pte)) {
4452 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
4453 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
4454 va, pa, m->hold_count, m->wire_count, m->flags);
4469 sx_sunlock(&allproc_lock);
4476 static void pads(pmap_t pm);
4477 void pmap_pvdump(vm_paddr_t pa);
4479 /* print address space of pmap*/
4487 if (pm == kernel_pmap)
4489 for (i = 0; i < NPDEPTD; i++)
4491 for (j = 0; j < NPTEPG; j++) {
4492 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
4493 if (pm == kernel_pmap && va < KERNBASE)
4495 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
4497 ptep = pmap_pte(pm, va);
4498 if (pmap_pte_v(ptep))
4499 printf("%x:%x ", va, *ptep);
4505 pmap_pvdump(vm_paddr_t pa)
4511 printf("pa %x", pa);
4512 m = PHYS_TO_VM_PAGE(pa);
4513 TAILQ_FOREACH(pv, &m->md.pv_list, pv_next) {
4515 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);