2 * Copyright (c) 2000-2006 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
33 #include <ia64/disasm/disasm_int.h>
34 #include <ia64/disasm/disasm.h>
39 static const char *asm_templname[] = {
40 "MII", "MII;", "MI;I", "MI;I;", "MLX", "MLX;", 0, 0,
41 "MMI", "MMI;", "M;MI", "M;MI;", "MFI", "MFI;", "MMF", "MMF;",
42 "MIB", "MIB;", "MBB", "MBB;", 0, 0, "BBB", "BBB;",
43 "MMB", "MMB;", 0, 0, "MFB", "MFB;", 0, 0
47 * Decode A-unit instructions.
50 asm_decodeA(uint64_t bits, struct asm_bundle *b, int slot)
55 fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
56 switch((int)OPCODE(bits)) {
58 switch (FIELD(bits, 34, 2)) { /* x2a */
60 if (FIELD(bits, 33, 1) == 0) { /* ve */
61 switch (FIELD(bits, 29, 4)) { /* x4 */
63 if (FIELD(bits, 27, 2) <= 1) /* x2b */
68 if (FIELD(bits, 27, 2) <= 1) /* x2b */
73 if (FIELD(bits, 27, 2) == 0) /* x2b */
78 switch (FIELD(bits, 27, 2)) { /* x2b */
98 switch (FIELD(bits, 27, 2)) { /* x2b */
118 op = ASM_OP_SHLADD, fmt = ASM_FMT_A2;
121 op = ASM_OP_SHLADDP4, fmt = ASM_FMT_A2;
124 if (FIELD(bits, 27, 2) == 1) /* x2b */
132 switch (FIELD(bits, 29, 8)) { /* za + x2a + zb + x4 */
134 switch (FIELD(bits, 27, 2)) { /* x2b */
136 op = ASM_OP_PADD1_, fmt = ASM_FMT_A9;
139 op = ASM_OP_PADD1_SSS,
143 op = ASM_OP_PADD1_UUU,
147 op = ASM_OP_PADD1_UUS,
153 switch (FIELD(bits, 27, 2)) { /* x2b */
155 op = ASM_OP_PSUB1_, fmt = ASM_FMT_A9;
158 op = ASM_OP_PSUB1_SSS,
162 op = ASM_OP_PSUB1_UUU,
166 op = ASM_OP_PSUB1_UUS,
172 switch (FIELD(bits, 27, 2)) { /* x2b */
174 op = ASM_OP_PAVG1_, fmt = ASM_FMT_A9;
177 op = ASM_OP_PAVG1_RAZ,
183 if (FIELD(bits, 27, 2) == 2) /* x2b */
184 op = ASM_OP_PAVGSUB1, fmt = ASM_FMT_A9;
187 switch (FIELD(bits, 27, 2)) { /* x2b */
189 op = ASM_OP_PCMP1_EQ, fmt = ASM_FMT_A9;
192 op = ASM_OP_PCMP1_GT, fmt = ASM_FMT_A9;
197 switch (FIELD(bits, 27, 2)) { /* x2b */
199 op = ASM_OP_PADD2_, fmt = ASM_FMT_A9;
202 op = ASM_OP_PADD2_SSS,
206 op = ASM_OP_PADD2_UUU,
210 op = ASM_OP_PADD2_UUS,
216 switch (FIELD(bits, 27, 2)) { /* x2b */
218 op = ASM_OP_PSUB2_, fmt = ASM_FMT_A9;
221 op = ASM_OP_PSUB2_SSS,
225 op = ASM_OP_PSUB2_UUU,
229 op = ASM_OP_PSUB2_UUS,
235 switch (FIELD(bits, 27, 2)) { /* x2b */
237 op = ASM_OP_PAVG2_, fmt = ASM_FMT_A9;
240 op = ASM_OP_PAVG2_RAZ,
246 if (FIELD(bits, 27, 2) == 2) /* x2b */
247 op = ASM_OP_PAVGSUB2, fmt = ASM_FMT_A9;
250 op = ASM_OP_PSHLADD2, fmt = ASM_FMT_A10;
253 op = ASM_OP_PSHRADD2, fmt = ASM_FMT_A10;
256 switch (FIELD(bits, 27, 2)) { /* x2b */
258 op = ASM_OP_PCMP2_EQ, fmt = ASM_FMT_A9;
261 op = ASM_OP_PCMP2_GT, fmt = ASM_FMT_A9;
266 if (FIELD(bits, 27, 2) == 0) /* x2b */
267 op = ASM_OP_PADD4, fmt = ASM_FMT_A9;
270 if (FIELD(bits, 27, 2) == 0) /* x2b */
271 op = ASM_OP_PSUB4, fmt = ASM_FMT_A9;
274 switch (FIELD(bits, 27, 2)) { /* x2b */
276 op = ASM_OP_PCMP4_EQ, fmt = ASM_FMT_A9;
279 op = ASM_OP_PCMP4_GT, fmt = ASM_FMT_A9;
286 if (FIELD(bits, 33, 1) == 0) /* ve */
287 op = ASM_OP_ADDS, fmt = ASM_FMT_A4;
290 if (FIELD(bits, 33, 1) == 0) /* ve */
291 op = ASM_OP_ADDP4, fmt = ASM_FMT_A4;
296 op = ASM_OP_ADDL, fmt = ASM_FMT_A5;
298 case 0xC: case 0xD: case 0xE:
299 if (FIELD(bits, 12, 1) == 0) { /* c */
300 switch (FIELD(bits, 33, 8)) { /* maj + tb + x2 + ta */
302 op = ASM_OP_CMP_LT, fmt = ASM_FMT_A6;
305 op = ASM_OP_CMP_EQ_AND, fmt = ASM_FMT_A6;
308 op = ASM_OP_CMP4_LT, fmt = ASM_FMT_A6;
311 op = ASM_OP_CMP4_EQ_AND, fmt = ASM_FMT_A6;
313 case 0xC4: case 0xCC:
314 op = ASM_OP_CMP_LT, fmt = ASM_FMT_A8;
316 case 0xC5: case 0xCD:
317 op = ASM_OP_CMP_EQ_AND, fmt = ASM_FMT_A8;
319 case 0xC6: case 0xCE:
320 op = ASM_OP_CMP4_LT, fmt = ASM_FMT_A8;
322 case 0xC7: case 0xCF:
323 op = ASM_OP_CMP4_EQ_AND, fmt = ASM_FMT_A8;
326 op = ASM_OP_CMP_GT_AND, fmt = ASM_FMT_A7;
329 op = ASM_OP_CMP_GE_AND, fmt = ASM_FMT_A7;
332 op = ASM_OP_CMP4_GT_AND, fmt = ASM_FMT_A7;
335 op = ASM_OP_CMP4_GE_AND, fmt = ASM_FMT_A7;
338 op = ASM_OP_CMP_LTU, fmt = ASM_FMT_A6;
341 op = ASM_OP_CMP_EQ_OR, fmt = ASM_FMT_A6;
344 op = ASM_OP_CMP4_LTU, fmt = ASM_FMT_A6;
347 op = ASM_OP_CMP4_EQ_OR, fmt = ASM_FMT_A6;
349 case 0xD4: case 0xDC:
350 op = ASM_OP_CMP_LTU, fmt = ASM_FMT_A8;
352 case 0xD5: case 0xDD:
353 op = ASM_OP_CMP_EQ_OR, fmt = ASM_FMT_A8;
355 case 0xD6: case 0xDE:
356 op = ASM_OP_CMP4_LTU, fmt = ASM_FMT_A8;
358 case 0xD7: case 0xDF:
359 op = ASM_OP_CMP4_EQ_OR, fmt = ASM_FMT_A8;
362 op = ASM_OP_CMP_GT_OR, fmt = ASM_FMT_A7;
365 op = ASM_OP_CMP_GE_OR, fmt = ASM_FMT_A7;
368 op = ASM_OP_CMP4_GT_OR, fmt = ASM_FMT_A7;
371 op = ASM_OP_CMP4_GE_OR, fmt = ASM_FMT_A7;
374 op = ASM_OP_CMP_EQ, fmt = ASM_FMT_A6;
377 op = ASM_OP_CMP_EQ_OR_ANDCM, fmt = ASM_FMT_A6;
380 op = ASM_OP_CMP4_EQ, fmt = ASM_FMT_A6;
383 op = ASM_OP_CMP4_EQ_OR_ANDCM, fmt = ASM_FMT_A6;
385 case 0xE4: case 0xEC:
386 op = ASM_OP_CMP_EQ, fmt = ASM_FMT_A8;
388 case 0xE5: case 0xED:
389 op = ASM_OP_CMP_EQ_OR_ANDCM, fmt = ASM_FMT_A8;
391 case 0xE6: case 0xEE:
392 op = ASM_OP_CMP4_EQ, fmt = ASM_FMT_A8;
394 case 0xE7: case 0xEF:
395 op = ASM_OP_CMP4_EQ_OR_ANDCM, fmt = ASM_FMT_A8;
398 op = ASM_OP_CMP_GT_OR_ANDCM, fmt = ASM_FMT_A7;
401 op = ASM_OP_CMP_GE_OR_ANDCM, fmt = ASM_FMT_A7;
404 op = ASM_OP_CMP4_GT_OR_ANDCM, fmt = ASM_FMT_A7;
407 op = ASM_OP_CMP4_GE_OR_ANDCM, fmt = ASM_FMT_A7;
411 switch (FIELD(bits, 33, 8)) { /* maj + tb + x2 + ta */
413 op = ASM_OP_CMP_LT_UNC, fmt = ASM_FMT_A6;
416 op = ASM_OP_CMP_NE_AND, fmt = ASM_FMT_A6;
419 op = ASM_OP_CMP4_LT_UNC, fmt = ASM_FMT_A6;
422 op = ASM_OP_CMP4_NE_AND, fmt = ASM_FMT_A6;
424 case 0xC4: case 0xCC:
425 op = ASM_OP_CMP_LT_UNC, fmt = ASM_FMT_A8;
427 case 0xC5: case 0xCD:
428 op = ASM_OP_CMP_NE_AND, fmt = ASM_FMT_A8;
430 case 0xC6: case 0xCE:
431 op = ASM_OP_CMP4_LT_UNC, fmt = ASM_FMT_A8;
433 case 0xC7: case 0xCF:
434 op = ASM_OP_CMP4_NE_AND, fmt = ASM_FMT_A8;
437 op = ASM_OP_CMP_LE_AND, fmt = ASM_FMT_A7;
440 op = ASM_OP_CMP_LT_AND, fmt = ASM_FMT_A7;
443 op = ASM_OP_CMP4_LE_AND, fmt = ASM_FMT_A7;
446 op = ASM_OP_CMP4_LT_AND, fmt = ASM_FMT_A7;
449 op = ASM_OP_CMP_LTU_UNC, fmt = ASM_FMT_A6;
452 op = ASM_OP_CMP_NE_OR, fmt = ASM_FMT_A6;
455 op = ASM_OP_CMP4_LTU_UNC, fmt = ASM_FMT_A6;
458 op = ASM_OP_CMP4_NE_OR, fmt = ASM_FMT_A6;
460 case 0xD4: case 0xDC:
461 op = ASM_OP_CMP_LTU_UNC, fmt = ASM_FMT_A8;
463 case 0xD5: case 0xDD:
464 op = ASM_OP_CMP_NE_OR, fmt = ASM_FMT_A8;
466 case 0xD6: case 0xDE:
467 op = ASM_OP_CMP4_LTU_UNC, fmt = ASM_FMT_A8;
469 case 0xD7: case 0xDF:
470 op = ASM_OP_CMP4_NE_OR, fmt = ASM_FMT_A8;
473 op = ASM_OP_CMP_LE_OR, fmt = ASM_FMT_A7;
476 op = ASM_OP_CMP_LT_OR, fmt = ASM_FMT_A7;
479 op = ASM_OP_CMP4_LE_OR, fmt = ASM_FMT_A7;
482 op = ASM_OP_CMP4_LT_OR, fmt = ASM_FMT_A7;
485 op = ASM_OP_CMP_EQ_UNC, fmt = ASM_FMT_A6;
488 op = ASM_OP_CMP_NE_OR_ANDCM, fmt = ASM_FMT_A6;
491 op = ASM_OP_CMP4_EQ_UNC, fmt = ASM_FMT_A6;
494 op = ASM_OP_CMP4_NE_OR_ANDCM, fmt = ASM_FMT_A6;
496 case 0xE4: case 0xEC:
497 op = ASM_OP_CMP_EQ_UNC, fmt = ASM_FMT_A8;
499 case 0xE5: case 0xED:
500 op = ASM_OP_CMP_NE_OR_ANDCM, fmt = ASM_FMT_A8;
502 case 0xE6: case 0xEE:
503 op = ASM_OP_CMP4_EQ_UNC, fmt = ASM_FMT_A8;
505 case 0xE7: case 0xEF:
506 op = ASM_OP_CMP4_NE_OR_ANDCM, fmt = ASM_FMT_A8;
509 op = ASM_OP_CMP_LE_OR_ANDCM, fmt = ASM_FMT_A7;
512 op = ASM_OP_CMP_LT_OR_ANDCM, fmt = ASM_FMT_A7;
515 op = ASM_OP_CMP4_LE_OR_ANDCM, fmt = ASM_FMT_A7;
518 op = ASM_OP_CMP4_LT_OR_ANDCM, fmt = ASM_FMT_A7;
525 if (op != ASM_OP_NONE)
526 return (asm_extract(op, fmt, bits, b, slot));
531 * Decode B-unit instructions.
534 asm_decodeB(uint64_t ip, struct asm_bundle *b, int slot)
540 bits = SLOT(ip, slot);
541 fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
543 switch((int)OPCODE(bits)) {
545 switch (FIELD(bits, 27, 6)) { /* x6 */
547 op = ASM_OP_BREAK_B, fmt = ASM_FMT_B9;
550 op = ASM_OP_COVER, fmt = ASM_FMT_B8;
553 op = ASM_OP_CLRRRB_, fmt = ASM_FMT_B8;
556 op = ASM_OP_CLRRRB_PR, fmt = ASM_FMT_B8;
559 op = ASM_OP_RFI, fmt = ASM_FMT_B8;
562 op = ASM_OP_BSW_0, fmt = ASM_FMT_B8;
565 op = ASM_OP_BSW_1, fmt = ASM_FMT_B8;
568 op = ASM_OP_EPC, fmt = ASM_FMT_B8;
571 op = ASM_OP_VMSW_0, fmt = ASM_FMT_B8;
574 op = ASM_OP_VMSW_1, fmt = ASM_FMT_B8;
577 switch (FIELD(bits, 6, 3)) { /* btype */
579 op = ASM_OP_BR_COND, fmt = ASM_FMT_B4;
582 op = ASM_OP_BR_IA, fmt = ASM_FMT_B4;
587 if (FIELD(bits, 6, 3) == 4) /* btype */
588 op = ASM_OP_BR_RET, fmt = ASM_FMT_B4;
593 op = ASM_OP_BR_CALL, fmt = ASM_FMT_B5;
596 switch (FIELD(bits, 27, 6)) { /* x6 */
598 op = ASM_OP_NOP_B, fmt = ASM_FMT_B9;
601 op = ASM_OP_HINT_B, fmt = ASM_FMT_B9;
604 op = ASM_OP_BRP_, fmt = ASM_FMT_B7;
607 op = ASM_OP_BRP_RET, fmt = ASM_FMT_B7;
612 switch (FIELD(bits, 6, 3)) { /* btype */
614 op = ASM_OP_BR_COND, fmt = ASM_FMT_B1;
617 op = ASM_OP_BR_WEXIT, fmt = ASM_FMT_B1;
620 op = ASM_OP_BR_WTOP, fmt = ASM_FMT_B1;
623 op = ASM_OP_BR_CLOOP, fmt = ASM_FMT_B2;
626 op = ASM_OP_BR_CEXIT, fmt = ASM_FMT_B2;
629 op = ASM_OP_BR_CTOP, fmt = ASM_FMT_B2;
634 op = ASM_OP_BR_CALL, fmt = ASM_FMT_B3;
637 op = ASM_OP_BRP_, fmt = ASM_FMT_B6;
641 if (op != ASM_OP_NONE)
642 return (asm_extract(op, fmt, bits, b, slot));
647 * Decode F-unit instructions.
650 asm_decodeF(uint64_t ip, struct asm_bundle *b, int slot)
656 bits = SLOT(ip, slot);
657 fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
659 switch((int)OPCODE(bits)) {
661 if (FIELD(bits, 33, 1) == 0) { /* x */
662 switch (FIELD(bits, 27, 6)) { /* x6 */
664 op = ASM_OP_BREAK_F, fmt = ASM_FMT_F15;
667 if (FIELD(bits, 26, 1) == 0) /* y */
668 op = ASM_OP_NOP_F, fmt = ASM_FMT_F16;
670 op = ASM_OP_HINT_F, fmt = ASM_FMT_F16;
673 op = ASM_OP_FSETC, fmt = ASM_FMT_F12;
676 op = ASM_OP_FCLRF, fmt = ASM_FMT_F13;
679 op = ASM_OP_FCHKF, fmt = ASM_FMT_F14;
682 op = ASM_OP_FMERGE_S, fmt = ASM_FMT_F9;
685 op = ASM_OP_FMERGE_NS, fmt = ASM_FMT_F9;
688 op = ASM_OP_FMERGE_SE, fmt = ASM_FMT_F9;
691 op = ASM_OP_FMIN, fmt = ASM_FMT_F8;
694 op = ASM_OP_FMAX, fmt = ASM_FMT_F8;
697 op = ASM_OP_FAMIN, fmt = ASM_FMT_F8;
700 op = ASM_OP_FAMAX, fmt = ASM_FMT_F8;
703 op = ASM_OP_FCVT_FX, fmt = ASM_FMT_F10;
706 op = ASM_OP_FCVT_FXU, fmt = ASM_FMT_F10;
709 op = ASM_OP_FCVT_FX_TRUNC, fmt = ASM_FMT_F10;
712 op = ASM_OP_FCVT_FXU_TRUNC, fmt = ASM_FMT_F10;
715 op = ASM_OP_FCVT_XF, fmt = ASM_FMT_F11;
718 op = ASM_OP_FPACK, fmt = ASM_FMT_F9;
721 op = ASM_OP_FAND, fmt = ASM_FMT_F9;
724 op = ASM_OP_FANDCM, fmt = ASM_FMT_F9;
727 op = ASM_OP_FOR, fmt = ASM_FMT_F9;
730 op = ASM_OP_FXOR, fmt = ASM_FMT_F9;
733 op = ASM_OP_FSWAP_, fmt = ASM_FMT_F9;
736 op = ASM_OP_FSWAP_NL, fmt = ASM_FMT_F9;
739 op = ASM_OP_FSWAP_NR, fmt = ASM_FMT_F9;
742 op = ASM_OP_FMIX_LR, fmt = ASM_FMT_F9;
745 op = ASM_OP_FMIX_R, fmt = ASM_FMT_F9;
748 op = ASM_OP_FMIX_L, fmt = ASM_FMT_F9;
751 op = ASM_OP_FSXT_R, fmt = ASM_FMT_F9;
754 op = ASM_OP_FSXT_L, fmt = ASM_FMT_F9;
758 if (FIELD(bits, 36, 1) == 0) /* q */
759 op = ASM_OP_FRCPA, fmt = ASM_FMT_F6;
761 op = ASM_OP_FRSQRTA, fmt = ASM_FMT_F7;
765 if (FIELD(bits, 33, 1) == 0) { /* x */
766 switch (FIELD(bits, 27, 6)) { /* x6 */
768 op = ASM_OP_FPMERGE_S, fmt = ASM_FMT_F9;
771 op = ASM_OP_FPMERGE_NS, fmt = ASM_FMT_F9;
774 op = ASM_OP_FPMERGE_SE, fmt = ASM_FMT_F9;
777 op = ASM_OP_FPMIN, fmt = ASM_FMT_F8;
780 op = ASM_OP_FPMAX, fmt = ASM_FMT_F8;
783 op = ASM_OP_FPAMIN, fmt = ASM_FMT_F8;
786 op = ASM_OP_FPAMAX, fmt = ASM_FMT_F8;
789 op = ASM_OP_FPCVT_FX, fmt = ASM_FMT_F10;
792 op = ASM_OP_FPCVT_FXU, fmt = ASM_FMT_F10;
795 op = ASM_OP_FPCVT_FX_TRUNC, fmt = ASM_FMT_F10;
798 op = ASM_OP_FPCVT_FXU_TRUNC, fmt = ASM_FMT_F10;
801 op = ASM_OP_FPCMP_EQ, fmt = ASM_FMT_F8;
804 op = ASM_OP_FPCMP_LT, fmt = ASM_FMT_F8;
807 op = ASM_OP_FPCMP_LE, fmt = ASM_FMT_F8;
810 op = ASM_OP_FPCMP_UNORD, fmt = ASM_FMT_F8;
813 op = ASM_OP_FPCMP_NEQ, fmt = ASM_FMT_F8;
816 op = ASM_OP_FPCMP_NLT, fmt = ASM_FMT_F8;
819 op = ASM_OP_FPCMP_NLE, fmt = ASM_FMT_F8;
822 op = ASM_OP_FPCMP_ORD, fmt = ASM_FMT_F8;
826 if (FIELD(bits, 36, 1) == 0) /* q */
827 op = ASM_OP_FPRCPA, fmt = ASM_FMT_F6;
829 op = ASM_OP_FPRSQRTA, fmt = ASM_FMT_F7;
833 op = ASM_OP_FCMP, fmt = ASM_FMT_F4;
836 op = ASM_OP_FCLASS_M, fmt = ASM_FMT_F5;
839 if (FIELD(bits, 36, 1) == 0) /* x */
840 op = ASM_OP_FMA_, fmt = ASM_FMT_F1;
842 op = ASM_OP_FMA_S, fmt = ASM_FMT_F1;
845 if (FIELD(bits, 36, 1) == 0) /* x */
846 op = ASM_OP_FMA_D, fmt = ASM_FMT_F1;
848 op = ASM_OP_FPMA, fmt = ASM_FMT_F1;
851 if (FIELD(bits, 36, 1) == 0) /* x */
852 op = ASM_OP_FMS_, fmt = ASM_FMT_F1;
854 op = ASM_OP_FMS_S, fmt = ASM_FMT_F1;
857 if (FIELD(bits, 36, 1) == 0) /* x */
858 op = ASM_OP_FMS_D, fmt = ASM_FMT_F1;
860 op = ASM_OP_FPMS, fmt = ASM_FMT_F1;
863 if (FIELD(bits, 36, 1) == 0) /* x */
864 op = ASM_OP_FNMA_, fmt = ASM_FMT_F1;
866 op = ASM_OP_FNMA_S, fmt = ASM_FMT_F1;
869 if (FIELD(bits, 36, 1) == 0) /* x */
870 op = ASM_OP_FNMA_D, fmt = ASM_FMT_F1;
872 op = ASM_OP_FPNMA, fmt = ASM_FMT_F1;
875 if (FIELD(bits, 36, 1) == 1) { /* x */
876 switch (FIELD(bits, 34, 2)) { /* x2 */
878 op = ASM_OP_XMA_L, fmt = ASM_FMT_F2;
881 op = ASM_OP_XMA_HU, fmt = ASM_FMT_F2;
884 op = ASM_OP_XMA_H, fmt = ASM_FMT_F2;
888 op = ASM_OP_FSELECT, fmt = ASM_FMT_F3;
892 if (op != ASM_OP_NONE)
893 return (asm_extract(op, fmt, bits, b, slot));
898 * Decode I-unit instructions.
901 asm_decodeI(uint64_t ip, struct asm_bundle *b, int slot)
907 bits = SLOT(ip, slot);
908 if ((int)OPCODE(bits) >= 8)
909 return (asm_decodeA(bits, b, slot));
910 fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
912 switch((int)OPCODE(bits)) {
914 switch (FIELD(bits, 33, 3)) { /* x3 */
916 switch (FIELD(bits, 27, 6)) { /* x6 */
918 op = ASM_OP_BREAK_I, fmt = ASM_FMT_I19;
921 if (FIELD(bits, 26, 1) == 0) /* y */
922 op = ASM_OP_NOP_I, fmt = ASM_FMT_I18;
924 op = ASM_OP_HINT_I, fmt = ASM_FMT_I18;
927 op = ASM_OP_MOV_I, fmt = ASM_FMT_I27;
930 op = ASM_OP_ZXT1, fmt = ASM_FMT_I29;
933 op = ASM_OP_ZXT2, fmt = ASM_FMT_I29;
936 op = ASM_OP_ZXT4, fmt = ASM_FMT_I29;
939 op = ASM_OP_SXT1, fmt = ASM_FMT_I29;
942 op = ASM_OP_SXT2, fmt = ASM_FMT_I29;
945 op = ASM_OP_SXT4, fmt = ASM_FMT_I29;
948 op = ASM_OP_CZX1_L, fmt = ASM_FMT_I29;
951 op = ASM_OP_CZX2_L, fmt = ASM_FMT_I29;
954 op = ASM_OP_CZX1_R, fmt = ASM_FMT_I29;
957 op = ASM_OP_CZX2_R, fmt = ASM_FMT_I29;
960 op = ASM_OP_MOV_I, fmt = ASM_FMT_I26;
963 op = ASM_OP_MOV_IP, fmt = ASM_FMT_I25;
966 op = ASM_OP_MOV_, fmt = ASM_FMT_I22;
969 op = ASM_OP_MOV_I, fmt = ASM_FMT_I28;
972 op = ASM_OP_MOV_PR, fmt = ASM_FMT_I25;
977 op = ASM_OP_CHK_S_I, fmt = ASM_FMT_I20;
980 op = ASM_OP_MOV_, fmt = ASM_FMT_I24;
983 op = ASM_OP_MOV_, fmt = ASM_FMT_I23;
986 if (FIELD(bits, 22, 1) == 0) /* x */
987 op = ASM_OP_MOV_, fmt = ASM_FMT_I21;
989 op = ASM_OP_MOV_RET, fmt = ASM_FMT_I21;
994 op = ASM_OP_DEP_, fmt = ASM_FMT_I15;
997 switch (FIELD(bits, 33, 3)) { /* x + x2 */
999 if (FIELD(bits, 36, 1) == 0) { /* tb */
1000 switch (FIELD(bits, 12, 2)) { /* c + y */
1002 op = ASM_OP_TBIT_Z, fmt = ASM_FMT_I16;
1005 op = ASM_OP_TBIT_Z_UNC,
1009 if (FIELD(bits, 19, 1) == 0) /* x */
1017 if (FIELD(bits, 19, 1) == 0) /* x */
1018 op = ASM_OP_TNAT_Z_UNC,
1021 op = ASM_OP_TF_Z_UNC,
1026 switch (FIELD(bits, 12, 2)) { /* c + y */
1028 op = ASM_OP_TBIT_Z_AND,
1032 op = ASM_OP_TBIT_NZ_AND,
1036 if (FIELD(bits, 19, 1) == 0) /* x */
1037 op = ASM_OP_TNAT_Z_AND,
1040 op = ASM_OP_TF_Z_AND,
1044 if (FIELD(bits, 19, 1) == 0) /* x */
1045 op = ASM_OP_TNAT_NZ_AND,
1048 op = ASM_OP_TF_NZ_AND,
1055 if (FIELD(bits, 36, 1) == 0) { /* tb */
1056 switch (FIELD(bits, 12, 2)) { /* c + y */
1058 op = ASM_OP_TBIT_Z_OR,
1062 op = ASM_OP_TBIT_NZ_OR,
1066 if (FIELD(bits, 19, 1) == 0) /* x */
1067 op = ASM_OP_TNAT_Z_OR,
1070 op = ASM_OP_TF_Z_OR,
1074 if (FIELD(bits, 19, 1) == 0) /* x */
1075 op = ASM_OP_TNAT_NZ_OR,
1078 op = ASM_OP_TF_NZ_OR,
1083 switch (FIELD(bits, 12, 2)) { /* c + y */
1085 op = ASM_OP_TBIT_Z_OR_ANDCM,
1089 op = ASM_OP_TBIT_NZ_OR_ANDCM,
1093 if (FIELD(bits, 19, 1) == 0) /* x */
1094 op = ASM_OP_TNAT_Z_OR_ANDCM,
1097 op = ASM_OP_TF_Z_OR_ANDCM,
1101 if (FIELD(bits, 19, 1) == 0) /* x */
1102 op = ASM_OP_TNAT_NZ_OR_ANDCM,
1105 op = ASM_OP_TF_NZ_OR_ANDCM,
1112 op = ASM_OP_EXTR, fmt = ASM_FMT_I11;
1115 if (FIELD(bits, 26, 1) == 0) /* y */
1116 op = ASM_OP_DEP_Z, fmt = ASM_FMT_I12;
1118 op = ASM_OP_DEP_Z, fmt = ASM_FMT_I13;
1121 op = ASM_OP_SHRP, fmt = ASM_FMT_I10;
1124 op = ASM_OP_DEP_, fmt = ASM_FMT_I14;
1129 switch (FIELD(bits, 32, 5)) { /* ve + zb + x2a + za */
1131 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1133 op = ASM_OP_PSHR2_U, fmt = ASM_FMT_I5;
1135 case 0x1: case 0x5: case 0x9: case 0xD:
1136 op = ASM_OP_PMPYSHR2_U, fmt = ASM_FMT_I1;
1139 op = ASM_OP_PSHR2_, fmt = ASM_FMT_I5;
1141 case 0x3: case 0x7: case 0xB: case 0xF:
1142 op = ASM_OP_PMPYSHR2_, fmt = ASM_FMT_I1;
1145 op = ASM_OP_PSHL2, fmt = ASM_FMT_I7;
1150 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1152 op = ASM_OP_PSHR2_U, fmt = ASM_FMT_I6;
1155 op = ASM_OP_PSHR2_, fmt = ASM_FMT_I6;
1158 op = ASM_OP_POPCNT, fmt = ASM_FMT_I9;
1163 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1165 op = ASM_OP_PMIN1_U, fmt = ASM_FMT_I2;
1168 op = ASM_OP_UNPACK1_H, fmt = ASM_FMT_I2;
1171 op = ASM_OP_PMAX1_U, fmt = ASM_FMT_I2;
1174 op = ASM_OP_UNPACK1_L, fmt = ASM_FMT_I2;
1177 op = ASM_OP_MIX1_R, fmt = ASM_FMT_I2;
1180 op = ASM_OP_MIX1_L, fmt = ASM_FMT_I2;
1183 op = ASM_OP_PSAD1, fmt = ASM_FMT_I2;
1188 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1190 op = ASM_OP_PACK2_USS, fmt = ASM_FMT_I2;
1193 op = ASM_OP_PACK2_SSS, fmt = ASM_FMT_I2;
1196 op = ASM_OP_PMIN2, fmt = ASM_FMT_I2;
1199 op = ASM_OP_UNPACK2_H, fmt = ASM_FMT_I2;
1202 op = ASM_OP_UNPACK2_L, fmt = ASM_FMT_I2;
1205 op = ASM_OP_PMAX2, fmt = ASM_FMT_I2;
1208 op = ASM_OP_MIX2_R, fmt = ASM_FMT_I2;
1211 op = ASM_OP_MIX2_L, fmt = ASM_FMT_I2;
1214 op = ASM_OP_PMPY2_R, fmt = ASM_FMT_I2;
1217 op = ASM_OP_PMPY2_L, fmt = ASM_FMT_I2;
1222 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1224 op = ASM_OP_MUX1, fmt = ASM_FMT_I3;
1229 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1231 op = ASM_OP_PSHL2, fmt = ASM_FMT_I8;
1234 op = ASM_OP_MUX2, fmt = ASM_FMT_I4;
1239 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1241 op = ASM_OP_PSHR4_U, fmt = ASM_FMT_I5;
1244 op = ASM_OP_PSHR4_, fmt = ASM_FMT_I5;
1247 op = ASM_OP_PSHL4, fmt = ASM_FMT_I7;
1252 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1254 op = ASM_OP_SHR_U, fmt = ASM_FMT_I5;
1257 op = ASM_OP_SHR_, fmt = ASM_FMT_I5;
1260 op = ASM_OP_SHL, fmt = ASM_FMT_I7;
1265 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1267 op = ASM_OP_PSHR4_U, fmt = ASM_FMT_I6;
1270 op = ASM_OP_PSHR4_, fmt = ASM_FMT_I6;
1275 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1277 op = ASM_OP_PACK4_SSS, fmt = ASM_FMT_I2;
1280 op = ASM_OP_UNPACK4_H, fmt = ASM_FMT_I2;
1283 op = ASM_OP_UNPACK4_L, fmt = ASM_FMT_I2;
1286 op = ASM_OP_MIX4_R, fmt = ASM_FMT_I2;
1289 op = ASM_OP_MIX4_L, fmt = ASM_FMT_I2;
1294 switch (FIELD(bits, 28, 4)) { /* x2b + x2c */
1296 op = ASM_OP_PSHL4, fmt = ASM_FMT_I8;
1304 if (op != ASM_OP_NONE)
1305 return (asm_extract(op, fmt, bits, b, slot));
1310 * Decode M-unit instructions.
1313 asm_decodeM(uint64_t ip, struct asm_bundle *b, int slot)
1319 bits = SLOT(ip, slot);
1320 if ((int)OPCODE(bits) >= 8)
1321 return (asm_decodeA(bits, b, slot));
1322 fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
1324 switch((int)OPCODE(bits)) {
1326 switch (FIELD(bits, 33, 3)) { /* x3 */
1328 switch (FIELD(bits, 27, 6)) { /* x6 (x4 + x2) */
1330 op = ASM_OP_BREAK_M, fmt = ASM_FMT_M37;
1333 if (FIELD(bits, 26, 1) == 0) /* y */
1334 op = ASM_OP_NOP_M, fmt = ASM_FMT_M48;
1336 op = ASM_OP_HINT_M, fmt = ASM_FMT_M48;
1338 case 0x4: case 0x14: case 0x24: case 0x34:
1339 op = ASM_OP_SUM, fmt = ASM_FMT_M44;
1341 case 0x5: case 0x15: case 0x25: case 0x35:
1342 op = ASM_OP_RUM, fmt = ASM_FMT_M44;
1344 case 0x6: case 0x16: case 0x26: case 0x36:
1345 op = ASM_OP_SSM, fmt = ASM_FMT_M44;
1347 case 0x7: case 0x17: case 0x27: case 0x37:
1348 op = ASM_OP_RSM, fmt = ASM_FMT_M44;
1351 op = ASM_OP_LOADRS, fmt = ASM_FMT_M25;
1354 op = ASM_OP_FLUSHRS, fmt = ASM_FMT_M25;
1357 op = ASM_OP_INVALA_, fmt = ASM_FMT_M24;
1360 op = ASM_OP_INVALA_E, fmt = ASM_FMT_M26;
1363 op = ASM_OP_INVALA_E, fmt = ASM_FMT_M27;
1366 op = ASM_OP_FWB, fmt = ASM_FMT_M24;
1369 op = ASM_OP_MF_, fmt = ASM_FMT_M24;
1372 op = ASM_OP_MF_A, fmt = ASM_FMT_M24;
1375 op = ASM_OP_MOV_M, fmt = ASM_FMT_M30;
1378 op = ASM_OP_SRLZ_D, fmt = ASM_FMT_M24;
1381 op = ASM_OP_SRLZ_I, fmt = ASM_FMT_M24;
1384 op = ASM_OP_SYNC_I, fmt = ASM_FMT_M24;
1389 op = ASM_OP_CHK_A_NC, fmt = ASM_FMT_M22;
1392 op = ASM_OP_CHK_A_CLR, fmt = ASM_FMT_M22;
1395 op = ASM_OP_CHK_A_NC, fmt = ASM_FMT_M23;
1398 op = ASM_OP_CHK_A_CLR, fmt = ASM_FMT_M23;
1403 switch (FIELD(bits, 33, 3)) { /* x3 */
1405 switch (FIELD(bits, 27, 6)) { /* x6 (x4 + x2) */
1407 op = ASM_OP_MOV_RR, fmt = ASM_FMT_M42;
1410 op = ASM_OP_MOV_DBR, fmt = ASM_FMT_M42;
1413 op = ASM_OP_MOV_IBR, fmt = ASM_FMT_M42;
1416 op = ASM_OP_MOV_PKR, fmt = ASM_FMT_M42;
1419 op = ASM_OP_MOV_PMC, fmt = ASM_FMT_M42;
1422 op = ASM_OP_MOV_PMD, fmt = ASM_FMT_M42;
1425 op = ASM_OP_MOV_MSR, fmt = ASM_FMT_M42;
1428 op = ASM_OP_PTC_L, fmt = ASM_FMT_M45;
1431 op = ASM_OP_PTC_G, fmt = ASM_FMT_M45;
1434 op = ASM_OP_PTC_GA, fmt = ASM_FMT_M45;
1437 op = ASM_OP_PTR_D, fmt = ASM_FMT_M45;
1440 op = ASM_OP_PTR_I, fmt = ASM_FMT_M45;
1443 op = ASM_OP_ITR_D, fmt = ASM_FMT_M42;
1446 op = ASM_OP_ITR_I, fmt = ASM_FMT_M42;
1449 op = ASM_OP_MOV_RR, fmt = ASM_FMT_M43;
1452 op = ASM_OP_MOV_DBR, fmt = ASM_FMT_M43;
1455 op = ASM_OP_MOV_IBR, fmt = ASM_FMT_M43;
1458 op = ASM_OP_MOV_PKR, fmt = ASM_FMT_M43;
1461 op = ASM_OP_MOV_PMC, fmt = ASM_FMT_M43;
1464 op = ASM_OP_MOV_PMD, fmt = ASM_FMT_M43;
1467 op = ASM_OP_MOV_MSR, fmt = ASM_FMT_M43;
1470 op = ASM_OP_MOV_CPUID, fmt = ASM_FMT_M43;
1473 op = ASM_OP_PROBE_R, fmt = ASM_FMT_M39;
1476 op = ASM_OP_PROBE_W, fmt = ASM_FMT_M39;
1479 op = ASM_OP_THASH, fmt = ASM_FMT_M46;
1482 op = ASM_OP_TTAG, fmt = ASM_FMT_M46;
1485 op = ASM_OP_TPA, fmt = ASM_FMT_M46;
1488 op = ASM_OP_TAK, fmt = ASM_FMT_M46;
1491 op = ASM_OP_MOV_PSR_UM, fmt = ASM_FMT_M36;
1494 op = ASM_OP_MOV_M, fmt = ASM_FMT_M31;
1497 op = ASM_OP_MOV_, fmt = ASM_FMT_M33;
1500 op = ASM_OP_MOV_PSR, fmt = ASM_FMT_M36;
1503 op = ASM_OP_MOV_PSR_UM, fmt = ASM_FMT_M35;
1506 op = ASM_OP_MOV_M, fmt = ASM_FMT_M29;
1509 op = ASM_OP_MOV_, fmt = ASM_FMT_M32;
1512 op = ASM_OP_MOV_PSR_L, fmt = ASM_FMT_M35;
1515 op = ASM_OP_ITC_D, fmt = ASM_FMT_M41;
1518 op = ASM_OP_ITC_I, fmt = ASM_FMT_M41;
1521 if (FIELD(bits, 36, 1) == 0) /* x */
1522 op = ASM_OP_FC_, fmt = ASM_FMT_M28;
1524 op = ASM_OP_FC_I, fmt = ASM_FMT_M28;
1527 op = ASM_OP_PROBE_RW_FAULT, fmt = ASM_FMT_M40;
1530 op = ASM_OP_PROBE_R_FAULT, fmt = ASM_FMT_M40;
1533 op = ASM_OP_PROBE_W_FAULT, fmt = ASM_FMT_M40;
1536 op = ASM_OP_PTC_E, fmt = ASM_FMT_M47;
1539 op = ASM_OP_PROBE_R, fmt = ASM_FMT_M38;
1542 op = ASM_OP_PROBE_W, fmt = ASM_FMT_M38;
1547 op = ASM_OP_CHK_S_M, fmt = ASM_FMT_M20;
1550 op = ASM_OP_CHK_S, fmt = ASM_FMT_M21;
1553 op = ASM_OP_ALLOC, fmt = ASM_FMT_M34;
1558 if (FIELD(bits, 27, 1) == 0) { /* x */
1559 switch (FIELD(bits, 30, 7)) { /* x6 + m */
1561 op = ASM_OP_LD1_, fmt = ASM_FMT_M1;
1564 op = ASM_OP_LD2_, fmt = ASM_FMT_M1;
1567 op = ASM_OP_LD4_, fmt = ASM_FMT_M1;
1570 op = ASM_OP_LD8_, fmt = ASM_FMT_M1;
1573 op = ASM_OP_LD1_S, fmt = ASM_FMT_M1;
1576 op = ASM_OP_LD2_S, fmt = ASM_FMT_M1;
1579 op = ASM_OP_LD4_S, fmt = ASM_FMT_M1;
1582 op = ASM_OP_LD8_S, fmt = ASM_FMT_M1;
1585 op = ASM_OP_LD1_A, fmt = ASM_FMT_M1;
1588 op = ASM_OP_LD2_A, fmt = ASM_FMT_M1;
1591 op = ASM_OP_LD4_A, fmt = ASM_FMT_M1;
1594 op = ASM_OP_LD8_A, fmt = ASM_FMT_M1;
1597 op = ASM_OP_LD1_SA, fmt = ASM_FMT_M1;
1600 op = ASM_OP_LD2_SA, fmt = ASM_FMT_M1;
1603 op = ASM_OP_LD4_SA, fmt = ASM_FMT_M1;
1606 op = ASM_OP_LD8_SA, fmt = ASM_FMT_M1;
1609 op = ASM_OP_LD1_BIAS, fmt = ASM_FMT_M1;
1612 op = ASM_OP_LD2_BIAS, fmt = ASM_FMT_M1;
1615 op = ASM_OP_LD4_BIAS, fmt = ASM_FMT_M1;
1618 op = ASM_OP_LD8_BIAS, fmt = ASM_FMT_M1;
1621 op = ASM_OP_LD1_ACQ, fmt = ASM_FMT_M1;
1624 op = ASM_OP_LD2_ACQ, fmt = ASM_FMT_M1;
1627 op = ASM_OP_LD4_ACQ, fmt = ASM_FMT_M1;
1630 op = ASM_OP_LD8_ACQ, fmt = ASM_FMT_M1;
1633 op = ASM_OP_LD8_FILL, fmt = ASM_FMT_M1;
1636 op = ASM_OP_LD1_C_CLR, fmt = ASM_FMT_M1;
1639 op = ASM_OP_LD2_C_CLR, fmt = ASM_FMT_M1;
1642 op = ASM_OP_LD4_C_CLR, fmt = ASM_FMT_M1;
1645 op = ASM_OP_LD8_C_CLR, fmt = ASM_FMT_M1;
1648 op = ASM_OP_LD1_C_NC, fmt = ASM_FMT_M1;
1651 op = ASM_OP_LD2_C_NC, fmt = ASM_FMT_M1;
1654 op = ASM_OP_LD4_C_NC, fmt = ASM_FMT_M1;
1657 op = ASM_OP_LD8_C_NC, fmt = ASM_FMT_M1;
1660 op = ASM_OP_LD1_C_CLR_ACQ, fmt = ASM_FMT_M1;
1663 op = ASM_OP_LD2_C_CLR_ACQ, fmt = ASM_FMT_M1;
1666 op = ASM_OP_LD4_C_CLR_ACQ, fmt = ASM_FMT_M1;
1669 op = ASM_OP_LD8_C_CLR_ACQ, fmt = ASM_FMT_M1;
1672 op = ASM_OP_ST1_, fmt = ASM_FMT_M4;
1675 op = ASM_OP_ST2_, fmt = ASM_FMT_M4;
1678 op = ASM_OP_ST4_, fmt = ASM_FMT_M4;
1681 op = ASM_OP_ST8_, fmt = ASM_FMT_M4;
1684 op = ASM_OP_ST1_REL, fmt = ASM_FMT_M4;
1687 op = ASM_OP_ST2_REL, fmt = ASM_FMT_M4;
1690 op = ASM_OP_ST4_REL, fmt = ASM_FMT_M4;
1693 op = ASM_OP_ST8_REL, fmt = ASM_FMT_M4;
1696 op = ASM_OP_ST8_SPILL, fmt = ASM_FMT_M4;
1699 op = ASM_OP_LD1_, fmt = ASM_FMT_M2;
1702 op = ASM_OP_LD2_, fmt = ASM_FMT_M2;
1705 op = ASM_OP_LD4_, fmt = ASM_FMT_M2;
1708 op = ASM_OP_LD8_, fmt = ASM_FMT_M2;
1711 op = ASM_OP_LD1_S, fmt = ASM_FMT_M2;
1714 op = ASM_OP_LD2_S, fmt = ASM_FMT_M2;
1717 op = ASM_OP_LD4_S, fmt = ASM_FMT_M2;
1720 op = ASM_OP_LD8_S, fmt = ASM_FMT_M2;
1723 op = ASM_OP_LD1_A, fmt = ASM_FMT_M2;
1726 op = ASM_OP_LD2_A, fmt = ASM_FMT_M2;
1729 op = ASM_OP_LD4_A, fmt = ASM_FMT_M2;
1732 op = ASM_OP_LD8_A, fmt = ASM_FMT_M2;
1735 op = ASM_OP_LD1_SA, fmt = ASM_FMT_M2;
1738 op = ASM_OP_LD2_SA, fmt = ASM_FMT_M2;
1741 op = ASM_OP_LD4_SA, fmt = ASM_FMT_M2;
1744 op = ASM_OP_LD8_SA, fmt = ASM_FMT_M2;
1747 op = ASM_OP_LD1_BIAS, fmt = ASM_FMT_M2;
1750 op = ASM_OP_LD2_BIAS, fmt = ASM_FMT_M2;
1753 op = ASM_OP_LD4_BIAS, fmt = ASM_FMT_M2;
1756 op = ASM_OP_LD8_BIAS, fmt = ASM_FMT_M2;
1759 op = ASM_OP_LD1_ACQ, fmt = ASM_FMT_M2;
1762 op = ASM_OP_LD2_ACQ, fmt = ASM_FMT_M2;
1765 op = ASM_OP_LD4_ACQ, fmt = ASM_FMT_M2;
1768 op = ASM_OP_LD8_ACQ, fmt = ASM_FMT_M2;
1771 op = ASM_OP_LD8_FILL, fmt = ASM_FMT_M2;
1774 op = ASM_OP_LD1_C_CLR, fmt = ASM_FMT_M2;
1777 op = ASM_OP_LD2_C_CLR, fmt = ASM_FMT_M2;
1780 op = ASM_OP_LD4_C_CLR, fmt = ASM_FMT_M2;
1783 op = ASM_OP_LD8_C_CLR, fmt = ASM_FMT_M2;
1786 op = ASM_OP_LD1_C_NC, fmt = ASM_FMT_M2;
1789 op = ASM_OP_LD2_C_NC, fmt = ASM_FMT_M2;
1792 op = ASM_OP_LD4_C_NC, fmt = ASM_FMT_M2;
1795 op = ASM_OP_LD8_C_NC, fmt = ASM_FMT_M2;
1798 op = ASM_OP_LD1_C_CLR_ACQ, fmt = ASM_FMT_M2;
1801 op = ASM_OP_LD2_C_CLR_ACQ, fmt = ASM_FMT_M2;
1804 op = ASM_OP_LD4_C_CLR_ACQ, fmt = ASM_FMT_M2;
1807 op = ASM_OP_LD8_C_CLR_ACQ, fmt = ASM_FMT_M2;
1811 switch (FIELD(bits, 30, 7)) { /* x6 + m */
1813 op = ASM_OP_CMPXCHG1_ACQ, fmt = ASM_FMT_M16;
1816 op = ASM_OP_CMPXCHG2_ACQ, fmt = ASM_FMT_M16;
1819 op = ASM_OP_CMPXCHG4_ACQ, fmt = ASM_FMT_M16;
1822 op = ASM_OP_CMPXCHG8_ACQ, fmt = ASM_FMT_M16;
1825 op = ASM_OP_CMPXCHG1_REL, fmt = ASM_FMT_M16;
1828 op = ASM_OP_CMPXCHG2_REL, fmt = ASM_FMT_M16;
1831 op = ASM_OP_CMPXCHG4_REL, fmt = ASM_FMT_M16;
1834 op = ASM_OP_CMPXCHG8_REL, fmt = ASM_FMT_M16;
1837 op = ASM_OP_XCHG1, fmt = ASM_FMT_M16;
1840 op = ASM_OP_XCHG2, fmt = ASM_FMT_M16;
1843 op = ASM_OP_XCHG4, fmt = ASM_FMT_M16;
1846 op = ASM_OP_XCHG8, fmt = ASM_FMT_M16;
1849 op = ASM_OP_FETCHADD4_ACQ, fmt = ASM_FMT_M17;
1852 op = ASM_OP_FETCHADD8_ACQ, fmt = ASM_FMT_M17;
1855 op = ASM_OP_FETCHADD4_REL, fmt = ASM_FMT_M17;
1858 op = ASM_OP_FETCHADD8_REL, fmt = ASM_FMT_M17;
1861 op = ASM_OP_GETF_SIG, fmt = ASM_FMT_M19;
1864 op = ASM_OP_GETF_EXP, fmt = ASM_FMT_M19;
1867 op = ASM_OP_GETF_S, fmt = ASM_FMT_M19;
1870 op = ASM_OP_GETF_D, fmt = ASM_FMT_M19;
1873 op = ASM_OP_CMP8XCHG16_ACQ, fmt = ASM_FMT_M16;
1876 op = ASM_OP_CMP8XCHG16_REL, fmt = ASM_FMT_M16;
1879 op = ASM_OP_LD16_, fmt = ASM_FMT_M1;
1882 op = ASM_OP_LD16_ACQ, fmt = ASM_FMT_M1;
1885 op = ASM_OP_ST16_, fmt = ASM_FMT_M4;
1888 op = ASM_OP_ST16_REL, fmt = ASM_FMT_M4;
1894 switch (FIELD(bits, 30, 6)) { /* x6 */
1896 op = ASM_OP_LD1_, fmt = ASM_FMT_M3;
1899 op = ASM_OP_LD2_, fmt = ASM_FMT_M3;
1902 op = ASM_OP_LD4_, fmt = ASM_FMT_M3;
1905 op = ASM_OP_LD8_, fmt = ASM_FMT_M3;
1908 op = ASM_OP_LD1_S, fmt = ASM_FMT_M3;
1911 op = ASM_OP_LD2_S, fmt = ASM_FMT_M3;
1914 op = ASM_OP_LD4_S, fmt = ASM_FMT_M3;
1917 op = ASM_OP_LD8_S, fmt = ASM_FMT_M3;
1920 op = ASM_OP_LD1_A, fmt = ASM_FMT_M3;
1923 op = ASM_OP_LD2_A, fmt = ASM_FMT_M3;
1926 op = ASM_OP_LD4_A, fmt = ASM_FMT_M3;
1929 op = ASM_OP_LD8_A, fmt = ASM_FMT_M3;
1932 op = ASM_OP_LD1_SA, fmt = ASM_FMT_M3;
1935 op = ASM_OP_LD2_SA, fmt = ASM_FMT_M3;
1938 op = ASM_OP_LD4_SA, fmt = ASM_FMT_M3;
1941 op = ASM_OP_LD8_SA, fmt = ASM_FMT_M3;
1944 op = ASM_OP_LD1_BIAS, fmt = ASM_FMT_M3;
1947 op = ASM_OP_LD2_BIAS, fmt = ASM_FMT_M3;
1950 op = ASM_OP_LD4_BIAS, fmt = ASM_FMT_M3;
1953 op = ASM_OP_LD8_BIAS, fmt = ASM_FMT_M3;
1956 op = ASM_OP_LD1_ACQ, fmt = ASM_FMT_M3;
1959 op = ASM_OP_LD2_ACQ, fmt = ASM_FMT_M3;
1962 op = ASM_OP_LD4_ACQ, fmt = ASM_FMT_M3;
1965 op = ASM_OP_LD8_ACQ, fmt = ASM_FMT_M3;
1968 op = ASM_OP_LD8_FILL, fmt = ASM_FMT_M3;
1971 op = ASM_OP_LD1_C_CLR, fmt = ASM_FMT_M3;
1974 op = ASM_OP_LD2_C_CLR, fmt = ASM_FMT_M3;
1977 op = ASM_OP_LD4_C_CLR, fmt = ASM_FMT_M3;
1980 op = ASM_OP_LD8_C_CLR, fmt = ASM_FMT_M3;
1983 op = ASM_OP_LD1_C_NC, fmt = ASM_FMT_M3;
1986 op = ASM_OP_LD2_C_NC, fmt = ASM_FMT_M3;
1989 op = ASM_OP_LD4_C_NC, fmt = ASM_FMT_M3;
1992 op = ASM_OP_LD8_C_NC, fmt = ASM_FMT_M3;
1995 op = ASM_OP_LD1_C_CLR_ACQ, fmt = ASM_FMT_M3;
1998 op = ASM_OP_LD2_C_CLR_ACQ, fmt = ASM_FMT_M3;
2001 op = ASM_OP_LD4_C_CLR_ACQ, fmt = ASM_FMT_M3;
2004 op = ASM_OP_LD8_C_CLR_ACQ, fmt = ASM_FMT_M3;
2007 op = ASM_OP_ST1_, fmt = ASM_FMT_M5;
2010 op = ASM_OP_ST2_, fmt = ASM_FMT_M5;
2013 op = ASM_OP_ST4_, fmt = ASM_FMT_M5;
2016 op = ASM_OP_ST8_, fmt = ASM_FMT_M5;
2019 op = ASM_OP_ST1_REL, fmt = ASM_FMT_M5;
2022 op = ASM_OP_ST2_REL, fmt = ASM_FMT_M5;
2025 op = ASM_OP_ST4_REL, fmt = ASM_FMT_M5;
2028 op = ASM_OP_ST8_REL, fmt = ASM_FMT_M5;
2031 op = ASM_OP_ST8_SPILL, fmt = ASM_FMT_M5;
2036 if (FIELD(bits, 27, 1) == 0) { /* x */
2037 switch (FIELD(bits, 30, 7)) { /* x6 + m */
2039 op = ASM_OP_LDFE_, fmt = ASM_FMT_M6;
2042 op = ASM_OP_LDF8_, fmt = ASM_FMT_M6;
2045 op = ASM_OP_LDFS_, fmt = ASM_FMT_M6;
2048 op = ASM_OP_LDFD_, fmt = ASM_FMT_M6;
2051 op = ASM_OP_LDFE_S, fmt = ASM_FMT_M6;
2054 op = ASM_OP_LDF8_S, fmt = ASM_FMT_M6;
2057 op = ASM_OP_LDFS_S, fmt = ASM_FMT_M6;
2060 op = ASM_OP_LDFD_S, fmt = ASM_FMT_M6;
2063 op = ASM_OP_LDFE_A, fmt = ASM_FMT_M6;
2066 op = ASM_OP_LDF8_A, fmt = ASM_FMT_M6;
2069 op = ASM_OP_LDFS_A, fmt = ASM_FMT_M6;
2072 op = ASM_OP_LDFD_A, fmt = ASM_FMT_M6;
2075 op = ASM_OP_LDFE_SA, fmt = ASM_FMT_M6;
2078 op = ASM_OP_LDF8_SA, fmt = ASM_FMT_M6;
2081 op = ASM_OP_LDFS_SA, fmt = ASM_FMT_M6;
2084 op = ASM_OP_LDFD_SA, fmt = ASM_FMT_M6;
2087 op = ASM_OP_LDF_FILL, fmt = ASM_FMT_M6;
2090 op = ASM_OP_LDFE_C_CLR, fmt = ASM_FMT_M6;
2093 op = ASM_OP_LDF8_C_CLR, fmt = ASM_FMT_M6;
2096 op = ASM_OP_LDFS_C_CLR, fmt = ASM_FMT_M6;
2099 op = ASM_OP_LDFD_C_CLR, fmt = ASM_FMT_M6;
2102 op = ASM_OP_LDFE_C_NC, fmt = ASM_FMT_M6;
2105 op = ASM_OP_LDF8_C_NC, fmt = ASM_FMT_M6;
2108 op = ASM_OP_LDFS_C_NC, fmt = ASM_FMT_M6;
2111 op = ASM_OP_LDFD_C_NC, fmt = ASM_FMT_M6;
2114 op = ASM_OP_LFETCH_, fmt = ASM_FMT_M13;
2117 op = ASM_OP_LFETCH_EXCL, fmt = ASM_FMT_M13;
2120 op = ASM_OP_LFETCH_FAULT, fmt = ASM_FMT_M13;
2123 op = ASM_OP_LFETCH_FAULT_EXCL,
2127 op = ASM_OP_STFE, fmt = ASM_FMT_M9;
2130 op = ASM_OP_STF8, fmt = ASM_FMT_M9;
2133 op = ASM_OP_STFS, fmt = ASM_FMT_M9;
2136 op = ASM_OP_STFD, fmt = ASM_FMT_M9;
2139 op = ASM_OP_STF_SPILL, fmt = ASM_FMT_M9;
2142 op = ASM_OP_LDFE_, fmt = ASM_FMT_M7;
2145 op = ASM_OP_LDF8_, fmt = ASM_FMT_M7;
2148 op = ASM_OP_LDFS_, fmt = ASM_FMT_M7;
2151 op = ASM_OP_LDFD_, fmt = ASM_FMT_M7;
2154 op = ASM_OP_LDFE_S, fmt = ASM_FMT_M7;
2157 op = ASM_OP_LDF8_S, fmt = ASM_FMT_M7;
2160 op = ASM_OP_LDFS_S, fmt = ASM_FMT_M7;
2163 op = ASM_OP_LDFD_S, fmt = ASM_FMT_M7;
2166 op = ASM_OP_LDFE_A, fmt = ASM_FMT_M7;
2169 op = ASM_OP_LDF8_A, fmt = ASM_FMT_M7;
2172 op = ASM_OP_LDFS_A, fmt = ASM_FMT_M7;
2175 op = ASM_OP_LDFD_A, fmt = ASM_FMT_M7;
2178 op = ASM_OP_LDFE_SA, fmt = ASM_FMT_M7;
2181 op = ASM_OP_LDF8_SA, fmt = ASM_FMT_M7;
2184 op = ASM_OP_LDFS_SA, fmt = ASM_FMT_M7;
2187 op = ASM_OP_LDFD_SA, fmt = ASM_FMT_M7;
2190 op = ASM_OP_LDF_FILL, fmt = ASM_FMT_M7;
2193 op = ASM_OP_LDFE_C_CLR, fmt = ASM_FMT_M7;
2196 op = ASM_OP_LDF8_C_CLR, fmt = ASM_FMT_M7;
2199 op = ASM_OP_LDFS_C_CLR, fmt = ASM_FMT_M7;
2202 op = ASM_OP_LDFD_C_CLR, fmt = ASM_FMT_M7;
2205 op = ASM_OP_LDFE_C_NC, fmt = ASM_FMT_M7;
2208 op = ASM_OP_LDF8_C_NC, fmt = ASM_FMT_M7;
2211 op = ASM_OP_LDFS_C_NC, fmt = ASM_FMT_M7;
2214 op = ASM_OP_LDFD_C_NC, fmt = ASM_FMT_M7;
2217 op = ASM_OP_LFETCH_, fmt = ASM_FMT_M14;
2220 op = ASM_OP_LFETCH_EXCL, fmt = ASM_FMT_M14;
2223 op = ASM_OP_LFETCH_FAULT, fmt = ASM_FMT_M14;
2226 op = ASM_OP_LFETCH_FAULT_EXCL,
2231 switch (FIELD(bits, 30, 7)) { /* x6 + m */
2233 op = ASM_OP_LDFP8_, fmt = ASM_FMT_M11;
2236 op = ASM_OP_LDFPS_, fmt = ASM_FMT_M11;
2239 op = ASM_OP_LDFPD_, fmt = ASM_FMT_M11;
2242 op = ASM_OP_LDFP8_S, fmt = ASM_FMT_M11;
2245 op = ASM_OP_LDFPS_S, fmt = ASM_FMT_M11;
2248 op = ASM_OP_LDFPD_S, fmt = ASM_FMT_M11;
2251 op = ASM_OP_LDFP8_A, fmt = ASM_FMT_M11;
2254 op = ASM_OP_LDFPS_A, fmt = ASM_FMT_M11;
2257 op = ASM_OP_LDFPD_A, fmt = ASM_FMT_M11;
2260 op = ASM_OP_LDFP8_SA, fmt = ASM_FMT_M11;
2263 op = ASM_OP_LDFPS_SA, fmt = ASM_FMT_M11;
2266 op = ASM_OP_LDFPD_SA, fmt = ASM_FMT_M11;
2269 op = ASM_OP_SETF_SIG, fmt = ASM_FMT_M18;
2272 op = ASM_OP_SETF_EXP, fmt = ASM_FMT_M18;
2275 op = ASM_OP_SETF_S, fmt = ASM_FMT_M18;
2278 op = ASM_OP_SETF_D, fmt = ASM_FMT_M18;
2281 op = ASM_OP_LDFP8_C_CLR, fmt = ASM_FMT_M11;
2284 op = ASM_OP_LDFPS_C_CLR, fmt = ASM_FMT_M11;
2287 op = ASM_OP_LDFPD_C_CLR, fmt = ASM_FMT_M11;
2290 op = ASM_OP_LDFP8_C_NC, fmt = ASM_FMT_M11;
2293 op = ASM_OP_LDFPS_C_NC, fmt = ASM_FMT_M11;
2296 op = ASM_OP_LDFPD_C_NC, fmt = ASM_FMT_M11;
2299 op = ASM_OP_LDFP8_, fmt = ASM_FMT_M12;
2302 op = ASM_OP_LDFPS_, fmt = ASM_FMT_M12;
2305 op = ASM_OP_LDFPD_, fmt = ASM_FMT_M12;
2308 op = ASM_OP_LDFP8_S, fmt = ASM_FMT_M12;
2311 op = ASM_OP_LDFPS_S, fmt = ASM_FMT_M12;
2314 op = ASM_OP_LDFPD_S, fmt = ASM_FMT_M12;
2317 op = ASM_OP_LDFP8_A, fmt = ASM_FMT_M12;
2320 op = ASM_OP_LDFPS_A, fmt = ASM_FMT_M12;
2323 op = ASM_OP_LDFPD_A, fmt = ASM_FMT_M12;
2326 op = ASM_OP_LDFP8_SA, fmt = ASM_FMT_M12;
2329 op = ASM_OP_LDFPS_SA, fmt = ASM_FMT_M12;
2332 op = ASM_OP_LDFPD_SA, fmt = ASM_FMT_M12;
2335 op = ASM_OP_LDFP8_C_CLR, fmt = ASM_FMT_M12;
2338 op = ASM_OP_LDFPS_C_CLR, fmt = ASM_FMT_M12;
2341 op = ASM_OP_LDFPD_C_CLR, fmt = ASM_FMT_M12;
2344 op = ASM_OP_LDFP8_C_NC, fmt = ASM_FMT_M12;
2347 op = ASM_OP_LDFPS_C_NC, fmt = ASM_FMT_M12;
2350 op = ASM_OP_LDFPD_C_NC, fmt = ASM_FMT_M12;
2356 switch (FIELD(bits, 30, 6)) { /* x6 */
2358 op = ASM_OP_LDFE_, fmt = ASM_FMT_M8;
2361 op = ASM_OP_LDF8_, fmt = ASM_FMT_M8;
2364 op = ASM_OP_LDFS_, fmt = ASM_FMT_M8;
2367 op = ASM_OP_LDFD_, fmt = ASM_FMT_M8;
2370 op = ASM_OP_LDFE_S, fmt = ASM_FMT_M8;
2373 op = ASM_OP_LDF8_S, fmt = ASM_FMT_M8;
2376 op = ASM_OP_LDFS_S, fmt = ASM_FMT_M8;
2379 op = ASM_OP_LDFD_S, fmt = ASM_FMT_M8;
2382 op = ASM_OP_LDFE_A, fmt = ASM_FMT_M8;
2385 op = ASM_OP_LDF8_A, fmt = ASM_FMT_M8;
2388 op = ASM_OP_LDFS_A, fmt = ASM_FMT_M8;
2391 op = ASM_OP_LDFD_A, fmt = ASM_FMT_M8;
2394 op = ASM_OP_LDFE_SA, fmt = ASM_FMT_M8;
2397 op = ASM_OP_LDF8_SA, fmt = ASM_FMT_M8;
2400 op = ASM_OP_LDFS_SA, fmt = ASM_FMT_M8;
2403 op = ASM_OP_LDFD_SA, fmt = ASM_FMT_M8;
2406 op = ASM_OP_LDF_FILL, fmt = ASM_FMT_M8;
2409 op = ASM_OP_LDFE_C_CLR, fmt = ASM_FMT_M8;
2412 op = ASM_OP_LDF8_C_CLR, fmt = ASM_FMT_M8;
2415 op = ASM_OP_LDFS_C_CLR, fmt = ASM_FMT_M8;
2418 op = ASM_OP_LDFD_C_CLR, fmt = ASM_FMT_M8;
2421 op = ASM_OP_LDFE_C_NC, fmt = ASM_FMT_M8;
2424 op = ASM_OP_LDF8_C_NC, fmt = ASM_FMT_M8;
2427 op = ASM_OP_LDFS_C_NC, fmt = ASM_FMT_M8;
2430 op = ASM_OP_LDFD_C_NC, fmt = ASM_FMT_M8;
2433 op = ASM_OP_LFETCH_, fmt = ASM_FMT_M15;
2436 op = ASM_OP_LFETCH_EXCL, fmt = ASM_FMT_M15;
2439 op = ASM_OP_LFETCH_FAULT, fmt = ASM_FMT_M15;
2442 op = ASM_OP_LFETCH_FAULT_EXCL, fmt = ASM_FMT_M15;
2445 op = ASM_OP_STFE, fmt = ASM_FMT_M10;
2448 op = ASM_OP_STF8, fmt = ASM_FMT_M10;
2451 op = ASM_OP_STFS, fmt = ASM_FMT_M10;
2454 op = ASM_OP_STFD, fmt = ASM_FMT_M10;
2457 op = ASM_OP_STF_SPILL, fmt = ASM_FMT_M10;
2463 if (op != ASM_OP_NONE)
2464 return (asm_extract(op, fmt, bits, b, slot));
2469 * Decode X-unit instructions.
2472 asm_decodeX(uint64_t ip, struct asm_bundle *b, int slot)
2478 KASSERT(slot == 2, ("foo"));
2479 bits = SLOT(ip, slot);
2480 fmt = ASM_FMT_NONE, op = ASM_OP_NONE;
2481 /* Initialize slot 1 (slot - 1) */
2482 b->b_inst[slot - 1].i_format = ASM_FMT_NONE;
2483 b->b_inst[slot - 1].i_bits = SLOT(ip, slot - 1);
2485 switch((int)OPCODE(bits)) {
2487 if (FIELD(bits, 33, 3) == 0) { /* x3 */
2488 switch (FIELD(bits, 27, 6)) { /* x6 */
2490 op = ASM_OP_BREAK_X, fmt = ASM_FMT_X1;
2493 if (FIELD(bits, 26, 1) == 0) /* y */
2494 op = ASM_OP_NOP_X, fmt = ASM_FMT_X5;
2496 op = ASM_OP_HINT_X, fmt = ASM_FMT_X5;
2502 if (FIELD(bits, 20, 1) == 0)
2503 op = ASM_OP_MOVL, fmt = ASM_FMT_X2;
2506 if (FIELD(bits, 6, 3) == 0) /* btype */
2507 op = ASM_OP_BRL_COND, fmt = ASM_FMT_X3;
2510 op = ASM_OP_BRL_CALL, fmt = ASM_FMT_X4;
2514 if (op != ASM_OP_NONE)
2515 return (asm_extract(op, fmt, bits, b, slot));
2520 asm_decode(uint64_t ip, struct asm_bundle *b)
2526 memset(b, 0, sizeof(*b));
2528 b->b_templ = asm_templname[TMPL(ip)];
2529 if (b->b_templ == 0)
2536 while (ok && *tp != 0) {
2539 ok = asm_decodeB(ip, b, slot++);
2542 ok = asm_decodeF(ip, b, slot++);
2545 ok = asm_decodeI(ip, b, slot++);
2548 ok = (slot++ == 1) ? 1 : 0;
2551 ok = asm_decodeM(ip, b, slot++);
2554 ok = asm_decodeX(ip, b, slot++);