2 * Copyright (c) 2003,2004 Marcel Moolenaar
3 * Copyright (c) 2000,2001 Doug Rabson
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include "opt_compat.h"
33 #include "opt_kstack_pages.h"
34 #include "opt_sched.h"
36 #include <sys/param.h>
38 #include <sys/systm.h>
44 #include <sys/eventhandler.h>
46 #include <sys/imgact.h>
48 #include <sys/kernel.h>
49 #include <sys/linker.h>
51 #include <sys/malloc.h>
53 #include <sys/msgbuf.h>
55 #include <sys/ptrace.h>
56 #include <sys/random.h>
57 #include <sys/reboot.h>
58 #include <sys/sched.h>
59 #include <sys/signalvar.h>
60 #include <sys/syscall.h>
61 #include <sys/syscallsubr.h>
62 #include <sys/sysctl.h>
63 #include <sys/sysproto.h>
64 #include <sys/ucontext.h>
67 #include <sys/vmmeter.h>
68 #include <sys/vnode.h>
72 #include <net/netisr.h>
75 #include <vm/vm_extern.h>
76 #include <vm/vm_kern.h>
77 #include <vm/vm_page.h>
78 #include <vm/vm_map.h>
79 #include <vm/vm_object.h>
80 #include <vm/vm_pager.h>
82 #include <machine/bootinfo.h>
83 #include <machine/cpu.h>
84 #include <machine/efi.h>
85 #include <machine/elf.h>
86 #include <machine/fpu.h>
87 #include <machine/intr.h>
88 #include <machine/mca.h>
89 #include <machine/md_var.h>
90 #include <machine/pal.h>
91 #include <machine/pcb.h>
92 #include <machine/reg.h>
93 #include <machine/sal.h>
94 #include <machine/sigframe.h>
96 #include <machine/smp.h>
98 #include <machine/unwind.h>
99 #include <machine/vmparam.h>
102 * For atomicity reasons, we demand that pc_curthread is the first
103 * field in the struct pcpu. It allows us to read the pointer with
104 * a single atomic instruction:
105 * ld8 %curthread = [r13]
106 * Otherwise we would first have to calculate the load address and
107 * store the result in a temporary register and that for the load:
108 * add %temp = %offsetof(struct pcpu), r13
109 * ld8 %curthread = [%temp]
110 * A context switch inbetween the add and the ld8 could have the
111 * thread migrate to a different core. In that case, %curthread
112 * would be the thread running on the original core and not actually
113 * the current thread.
115 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
117 static SYSCTL_NODE(_hw, OID_AUTO, freq, CTLFLAG_RD, 0, "");
118 static SYSCTL_NODE(_machdep, OID_AUTO, cpu, CTLFLAG_RD, 0, "");
120 static u_int bus_freq;
121 SYSCTL_UINT(_hw_freq, OID_AUTO, bus, CTLFLAG_RD, &bus_freq, 0,
122 "Bus clock frequency");
124 static u_int cpu_freq;
125 SYSCTL_UINT(_hw_freq, OID_AUTO, cpu, CTLFLAG_RD, &cpu_freq, 0,
126 "CPU clock frequency");
128 static u_int itc_freq;
129 SYSCTL_UINT(_hw_freq, OID_AUTO, itc, CTLFLAG_RD, &itc_freq, 0,
134 struct bootinfo *bootinfo;
138 extern u_int64_t kernel_text[], _end[];
140 extern u_int64_t ia64_gateway_page[];
141 extern u_int64_t break_sigtramp[];
142 extern u_int64_t epc_sigtramp[];
144 struct fpswa_iface *fpswa_iface;
146 vm_size_t ia64_pal_size;
147 vm_paddr_t ia64_pal_base;
148 vm_offset_t ia64_port_base;
150 u_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR;
152 struct ia64_pib *ia64_pib;
154 static int ia64_sync_icache_needed;
156 char machine[] = MACHINE;
157 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
159 static char cpu_model[64];
160 SYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0,
161 "The CPU model name");
163 static char cpu_family[64];
164 SYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0,
165 "The CPU family name");
168 extern vm_offset_t ksym_start, ksym_end;
171 struct msgbuf *msgbufp = NULL;
173 /* Other subsystems (e.g., ACPI) can hook this later. */
174 void (*cpu_idle_hook)(void) = NULL;
176 struct kva_md_info kmi;
179 #define Ghz (1000L*Mhz)
185 char *family_name, *model_name;
186 u_int64_t features, tmp;
187 int number, revision, model, family, archrev;
190 * Assumes little-endian.
192 *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0);
193 *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1);
196 tmp = ia64_get_cpuid(3);
197 number = (tmp >> 0) & 0xff;
198 revision = (tmp >> 8) & 0xff;
199 model = (tmp >> 16) & 0xff;
200 family = (tmp >> 24) & 0xff;
201 archrev = (tmp >> 32) & 0xff;
203 family_name = model_name = "unknown";
206 family_name = "Itanium";
207 model_name = "Merced";
210 family_name = "Itanium 2";
213 model_name = "McKinley";
217 * Deerfield is a low-voltage variant based on the
218 * Madison core. We need circumstantial evidence
219 * (i.e. the clock frequency) to identify those.
220 * Allow for roughly 1% error margin.
222 if (cpu_freq > 990 && cpu_freq < 1010)
223 model_name = "Deerfield";
225 model_name = "Madison";
228 model_name = "Madison II";
233 ia64_sync_icache_needed = 1;
235 family_name = "Itanium 2";
238 model_name = "Montecito";
241 model_name = "Montvale";
246 snprintf(cpu_family, sizeof(cpu_family), "%s", family_name);
247 snprintf(cpu_model, sizeof(cpu_model), "%s", model_name);
249 features = ia64_get_cpuid(4);
251 printf("CPU: %s (", model_name);
253 printf("%u MHz ", cpu_freq);
254 printf("%s)\n", family_name);
255 printf(" Origin = \"%s\" Revision = %d\n", vendor, revision);
256 printf(" Features = 0x%b\n", (u_int32_t) features,
258 "\001LB" /* long branch (brl) instruction. */
259 "\002SD" /* Spontaneous deferral. */
260 "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ );
264 cpu_startup(void *dummy)
268 struct pcpu_stats *pcs;
271 * Good {morning,afternoon,evening,night}.
278 printf("real memory = %ld (%ld MB)\n", ptoa(realmem),
279 ptoa(realmem) / 1048576);
281 vm_ksubmap_init(&kmi);
283 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
284 ptoa(cnt.v_free_count) / 1048576);
286 if (fpswa_iface == NULL)
287 printf("Warning: no FPSWA package supplied\n");
289 printf("FPSWA Revision = 0x%lx, Entry = %p\n",
290 (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa);
293 * Set up buffers, so they can be used to read disk labels.
296 vm_pager_bufferinit();
299 * Traverse the MADT to discover IOSAPIC and Local SAPIC
303 ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib));
308 * Create sysctl tree for per-CPU information.
310 STAILQ_FOREACH(pc, &cpuhead, pc_allcpu) {
311 snprintf(nodename, sizeof(nodename), "%u", pc->pc_cpuid);
312 sysctl_ctx_init(&pc->pc_md.sysctl_ctx);
313 pc->pc_md.sysctl_tree = SYSCTL_ADD_NODE(&pc->pc_md.sysctl_ctx,
314 SYSCTL_STATIC_CHILDREN(_machdep_cpu), OID_AUTO, nodename,
315 CTLFLAG_RD, NULL, "");
316 if (pc->pc_md.sysctl_tree == NULL)
319 pcs = &pc->pc_md.stats;
321 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
322 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
323 "nasts", CTLFLAG_RD, &pcs->pcs_nasts,
324 "Number of IPI_AST interrupts");
326 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
327 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
328 "nclks", CTLFLAG_RD, &pcs->pcs_nclks,
329 "Number of clock interrupts");
331 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
332 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
333 "nextints", CTLFLAG_RD, &pcs->pcs_nextints,
334 "Number of ExtINT interrupts");
336 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
337 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
338 "nhardclocks", CTLFLAG_RD, &pcs->pcs_nhardclocks,
339 "Number of IPI_HARDCLOCK interrupts");
341 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
342 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
343 "nhighfps", CTLFLAG_RD, &pcs->pcs_nhighfps,
344 "Number of IPI_HIGH_FP interrupts");
346 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
347 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
348 "nhwints", CTLFLAG_RD, &pcs->pcs_nhwints,
349 "Number of hardware (device) interrupts");
351 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
352 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
353 "npreempts", CTLFLAG_RD, &pcs->pcs_npreempts,
354 "Number of IPI_PREEMPT interrupts");
356 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
357 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
358 "nrdvs", CTLFLAG_RD, &pcs->pcs_nrdvs,
359 "Number of IPI_RENDEZVOUS interrupts");
361 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
362 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
363 "nstops", CTLFLAG_RD, &pcs->pcs_nstops,
364 "Number of IPI_STOP interrupts");
366 SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx,
367 SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO,
368 "nstrays", CTLFLAG_RD, &pcs->pcs_nstrays,
369 "Number of stray interrupts");
372 SYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
375 cpu_flush_dcache(void *ptr, size_t len)
379 va = (uintptr_t)ptr & ~31;
380 lim = (uintptr_t)ptr + len;
389 /* Get current clock frequency for the given cpu id. */
391 cpu_est_clockrate(int cpu_id, uint64_t *rate)
394 if (pcpu_find(cpu_id) == NULL || rate == NULL)
396 *rate = (u_long)cpu_freq * 1000000ul;
418 KASSERT(ie != 0, ("%s called with interrupts disabled\n", __func__));
420 if (sched_runnable())
422 else if (cpu_idle_hook != NULL) {
424 /* The hook must enable interrupts! */
426 ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
437 cpu_idle_wakeup(int cpu)
451 cpu_switch(struct thread *old, struct thread *new, struct mtx *mtx)
453 struct pcb *oldpcb, *newpcb;
455 oldpcb = old->td_pcb;
456 #ifdef COMPAT_FREEBSD32
457 ia32_savectx(oldpcb);
459 if (PCPU_GET(fpcurthread) == old)
460 old->td_frame->tf_special.psr |= IA64_PSR_DFH;
461 if (!savectx(oldpcb)) {
462 newpcb = new->td_pcb;
463 oldpcb->pcb_current_pmap =
464 pmap_switch(newpcb->pcb_current_pmap);
466 atomic_store_rel_ptr(&old->td_lock, mtx);
468 #if defined(SCHED_ULE) && defined(SMP)
469 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock)
473 PCPU_SET(curthread, new);
475 #ifdef COMPAT_FREEBSD32
476 ia32_restorectx(newpcb);
479 if (PCPU_GET(fpcurthread) == new)
480 new->td_frame->tf_special.psr &= ~IA64_PSR_DFH;
482 /* We should not get here. */
483 panic("cpu_switch: restorectx() returned");
489 cpu_throw(struct thread *old __unused, struct thread *new)
493 newpcb = new->td_pcb;
494 (void)pmap_switch(newpcb->pcb_current_pmap);
496 #if defined(SCHED_ULE) && defined(SMP)
497 while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock)
501 PCPU_SET(curthread, new);
503 #ifdef COMPAT_FREEBSD32
504 ia32_restorectx(newpcb);
508 /* We should not get here. */
509 panic("cpu_throw: restorectx() returned");
514 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
518 * Set pc_acpi_id to "uninitialized".
519 * See sys/dev/acpica/acpi_cpu.c
521 pcpu->pc_acpi_id = 0xffffffff;
531 if (td->td_md.md_spinlock_count == 0) {
532 intr = intr_disable();
533 td->td_md.md_spinlock_count = 1;
534 td->td_md.md_saved_intr = intr;
536 td->td_md.md_spinlock_count++;
548 intr = td->td_md.md_saved_intr;
549 td->td_md.md_spinlock_count--;
550 if (td->td_md.md_spinlock_count == 0)
555 map_vhpt(uintptr_t vhpt)
560 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
561 PTE_PL_KERN | PTE_AR_RW;
562 pte |= vhpt & PTE_PPN_MASK;
564 __asm __volatile("ptr.d %0,%1" :: "r"(vhpt),
565 "r"(pmap_vhpt_log2size << 2));
567 __asm __volatile("mov %0=psr" : "=r"(psr));
568 __asm __volatile("rsm psr.ic|psr.i");
571 ia64_set_itir(pmap_vhpt_log2size << 2);
573 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte));
574 __asm __volatile("mov psr.l=%0" :: "r" (psr));
587 if (ia64_pal_size == 0)
590 va = IA64_PHYS_TO_RR7(ia64_pal_base);
599 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
600 PTE_PL_KERN | PTE_AR_RWX;
601 pte |= ia64_pal_base & PTE_PPN_MASK;
603 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: "r"(va), "r"(shft<<2));
605 __asm __volatile("mov %0=psr" : "=r"(psr));
606 __asm __volatile("rsm psr.ic|psr.i");
609 ia64_set_itir(shft << 2);
611 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(4), "r"(pte));
613 __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte));
614 __asm __volatile("mov psr.l=%0" :: "r" (psr));
619 map_gateway_page(void)
624 pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY |
625 PTE_PL_KERN | PTE_AR_X_RX;
626 pte |= ia64_tpa((uint64_t)ia64_gateway_page) & PTE_PPN_MASK;
628 __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" ::
629 "r"(VM_MAXUSER_ADDRESS), "r"(PAGE_SHIFT << 2));
631 __asm __volatile("mov %0=psr" : "=r"(psr));
632 __asm __volatile("rsm psr.ic|psr.i");
634 ia64_set_ifa(VM_MAXUSER_ADDRESS);
635 ia64_set_itir(PAGE_SHIFT << 2);
637 __asm __volatile("itr.d dtr[%0]=%1" :: "r"(5), "r"(pte));
639 __asm __volatile("itr.i itr[%0]=%1" :: "r"(2), "r"(pte));
640 __asm __volatile("mov psr.l=%0" :: "r" (psr));
643 /* Expose the mapping to userland in ar.k5 */
644 ia64_set_k5(VM_MAXUSER_ADDRESS);
648 freq_ratio(u_long base, u_long ratio)
652 f = (base * (ratio >> 32)) / (ratio & 0xfffffffful);
653 return ((f + 500000) / 1000000);
657 calculate_frequencies(void)
659 struct ia64_sal_result sal;
660 struct ia64_pal_result pal;
664 sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
665 pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
668 if (sal.sal_status == 0 && pal.pal_status == 0) {
670 printf("Platform clock frequency %ld Hz\n",
672 printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
673 "ITC ratio %ld/%ld\n",
674 pal.pal_result[0] >> 32,
675 pal.pal_result[0] & ((1L << 32) - 1),
676 pal.pal_result[1] >> 32,
677 pal.pal_result[1] & ((1L << 32) - 1),
678 pal.pal_result[2] >> 32,
679 pal.pal_result[2] & ((1L << 32) - 1));
681 cpu_freq = freq_ratio(sal.sal_result[0], pal.pal_result[0]);
682 bus_freq = freq_ratio(sal.sal_result[0], pal.pal_result[1]);
683 itc_freq = freq_ratio(sal.sal_result[0], pal.pal_result[2]);
687 struct ia64_init_return
690 struct ia64_init_return ret;
692 pt_entry_t *pbvm_pgtbl_ent, *pbvm_pgtbl_lim;
695 int metadata_missing;
698 * NO OUTPUT ALLOWED UNTIL FURTHER NOTICE.
701 ia64_set_fpsr(IA64_FPSR_DEFAULT);
704 * Region 6 is direct mapped UC and region 7 is direct mapped
705 * WC. The details of this is controlled by the Alt {I,D}TLB
706 * handlers. Here we just make sure that they have the largest
707 * possible page size to minimise TLB usage.
709 ia64_set_rr(IA64_RR_BASE(6), (6 << 8) | (PAGE_SHIFT << 2));
710 ia64_set_rr(IA64_RR_BASE(7), (7 << 8) | (PAGE_SHIFT << 2));
713 /* Initialize/setup physical memory datastructures */
717 * Process the memory map. This gives us the PAL locations,
718 * the I/O port base address, the available memory regions
719 * for initializing the physical memory map.
721 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) {
722 mdlen = md->md_pages * EFI_PAGE_SIZE;
723 switch (md->md_type) {
724 case EFI_MD_TYPE_IOPORT:
725 ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys,
728 case EFI_MD_TYPE_PALCODE:
729 ia64_pal_base = md->md_phys;
730 ia64_pal_size = mdlen;
732 case EFI_MD_TYPE_BAD:
733 case EFI_MD_TYPE_FIRMWARE:
734 case EFI_MD_TYPE_RECLAIM:
735 case EFI_MD_TYPE_RT_CODE:
736 case EFI_MD_TYPE_RT_DATA:
737 /* Don't use these memory regions. */
738 ia64_physmem_track(md->md_phys, mdlen);
740 case EFI_MD_TYPE_BS_CODE:
741 case EFI_MD_TYPE_BS_DATA:
742 case EFI_MD_TYPE_CODE:
743 case EFI_MD_TYPE_DATA:
744 case EFI_MD_TYPE_FREE:
745 /* These are ok to use. */
746 ia64_physmem_add(md->md_phys, mdlen);
752 * Remove the PBVM and its page table from phys_avail. The loader
753 * passes the physical address of the page table to us. The virtual
754 * address of the page table is fixed.
755 * Track and the PBVM limit for later use.
757 ia64_physmem_delete(bootinfo->bi_pbvm_pgtbl, bootinfo->bi_pbvm_pgtblsz);
758 pbvm_pgtbl_ent = (void *)IA64_PBVM_PGTBL;
759 pbvm_pgtbl_lim = (void *)(IA64_PBVM_PGTBL + bootinfo->bi_pbvm_pgtblsz);
760 while (pbvm_pgtbl_ent < pbvm_pgtbl_lim) {
761 if ((*pbvm_pgtbl_ent & PTE_PRESENT) == 0)
763 ia64_physmem_delete(*pbvm_pgtbl_ent & PTE_PPN_MASK,
764 IA64_PBVM_PAGE_SIZE);
768 /* Finalize physical memory datastructures */
771 metadata_missing = 0;
772 if (bootinfo->bi_modulep)
773 preload_metadata = (caddr_t)bootinfo->bi_modulep;
775 metadata_missing = 1;
777 if (envmode == 0 && bootinfo->bi_envp)
778 kern_envp = (caddr_t)bootinfo->bi_envp;
780 kern_envp = static_env;
783 * Look at arguments passed to us and compute boothowto.
785 boothowto = bootinfo->bi_boothowto;
787 if (boothowto & RB_VERBOSE)
791 * Wire things up so we can call the firmware.
794 efi_boot_minimal(bootinfo->bi_systab);
797 calculate_frequencies();
799 set_cputicker(ia64_get_itc, (u_long)itc_freq * 1000000, 0);
802 * Setup the PCPU data for the bootstrap processor. It is needed
803 * by printf(). Also, since printf() has critical sections, we
804 * need to initialize at least pc_curthread.
807 ia64_set_k4((u_int64_t)pcpup);
808 pcpu_init(pcpup, 0, sizeof(pcpu0));
809 dpcpu_init(ia64_physmem_alloc(DPCPU_SIZE, PAGE_SIZE), 0);
810 PCPU_SET(md.lid, ia64_get_lid());
811 PCPU_SET(curthread, &thread0);
814 * Initialize the console before we print anything out.
818 /* OUTPUT NOW ALLOWED */
820 if (metadata_missing)
821 printf("WARNING: loader(8) metadata is missing!\n");
823 /* Get FPSWA interface */
824 fpswa_iface = (bootinfo->bi_fpswa == 0) ? NULL :
825 (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo->bi_fpswa);
827 /* Init basic tunables, including hz */
830 p = getenv("kernelname");
832 strlcpy(kernelname, p, sizeof(kernelname));
836 init_param2(physmem);
839 * Initialize error message buffer (at end of core).
841 msgbufp = ia64_physmem_alloc(msgbufsize, PAGE_SIZE);
842 msgbufinit(msgbufp, msgbufsize);
844 proc_linkup0(&proc0, &thread0);
846 * Init mapping for kernel stack for proc 0
848 p = ia64_physmem_alloc(KSTACK_PAGES * PAGE_SIZE, PAGE_SIZE);
849 thread0.td_kstack = (uintptr_t)p;
850 thread0.td_kstack_pages = KSTACK_PAGES;
855 * Initialize the rest of proc 0's PCB.
857 * Set the kernel sp, reserving space for an (empty) trapframe,
858 * and make proc0's trapframe pointer point to it for sanity.
859 * Initialise proc0's backing store to start after u area.
861 cpu_thread_alloc(&thread0);
862 thread0.td_frame->tf_flags = FRAME_SYSCALL;
863 thread0.td_pcb->pcb_special.sp =
864 (u_int64_t)thread0.td_frame - 16;
865 thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack;
868 * Initialize the virtual memory system.
873 * Initialize debuggers, and break into them if appropriate.
876 ksym_start = bootinfo->bi_symtab;
877 ksym_end = bootinfo->bi_esymtab;
883 if (boothowto & RB_KDB)
884 kdb_enter(KDB_WHY_BOOTFLAGS,
885 "Boot flags requested debugger\n");
891 ret.bspstore = thread0.td_pcb->pcb_special.bspstore;
892 ret.sp = thread0.td_pcb->pcb_special.sp;
900 return (bootinfo->bi_hcdp);
904 bzero(void *buf, size_t len)
908 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
912 while (len >= sizeof(u_long) * 8) {
914 *((u_long*) p + 1) = 0;
915 *((u_long*) p + 2) = 0;
916 *((u_long*) p + 3) = 0;
917 len -= sizeof(u_long) * 8;
918 *((u_long*) p + 4) = 0;
919 *((u_long*) p + 5) = 0;
920 *((u_long*) p + 6) = 0;
921 *((u_long*) p + 7) = 0;
922 p += sizeof(u_long) * 8;
924 while (len >= sizeof(u_long)) {
926 len -= sizeof(u_long);
945 u_int64_t start, end, now;
949 start = ia64_get_itc();
950 end = start + itc_freq * n;
951 /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */
953 now = ia64_get_itc();
954 } while (now < end || (now > start && end < start));
960 * Send an interrupt (signal) to a process.
963 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
967 struct trapframe *tf;
969 struct sigframe sf, *sfp;
977 PROC_LOCK_ASSERT(p, MA_OWNED);
978 sig = ksi->ksi_signo;
979 code = ksi->ksi_code;
981 mtx_assert(&psp->ps_mtx, MA_OWNED);
983 sp = tf->tf_special.sp;
984 oonstack = sigonstack(sp);
987 /* save user context */
988 bzero(&sf, sizeof(struct sigframe));
989 sf.sf_uc.uc_sigmask = *mask;
990 sf.sf_uc.uc_stack = td->td_sigstk;
991 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
992 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
995 * Allocate and validate space for the signal handler
996 * context. Note that if the stack is in P0 space, the
997 * call to grow() is a nop, and the useracc() check
998 * will fail if the process has not already allocated
999 * the space with a `brk'.
1001 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
1002 SIGISMEMBER(psp->ps_sigonstack, sig)) {
1003 sbs = (u_int64_t)td->td_sigstk.ss_sp;
1004 sbs = (sbs + 15) & ~15;
1005 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size);
1006 #if defined(COMPAT_43)
1007 td->td_sigstk.ss_flags |= SS_ONSTACK;
1010 sfp = (struct sigframe *)sp;
1011 sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15);
1013 /* Fill in the siginfo structure for POSIX handlers. */
1014 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
1015 sf.sf_si = ksi->ksi_info;
1016 sf.sf_si.si_signo = sig;
1018 * XXX this shouldn't be here after code in trap.c
1021 sf.sf_si.si_addr = (void*)tf->tf_special.ifa;
1022 code = (u_int64_t)&sfp->sf_si;
1025 mtx_unlock(&psp->ps_mtx);
1028 get_mcontext(td, &sf.sf_uc.uc_mcontext, 0);
1030 /* Copy the frame out to userland. */
1031 if (copyout(&sf, sfp, sizeof(sf)) != 0) {
1033 * Process has trashed its stack; give it an illegal
1034 * instruction to halt it in its tracks.
1037 sigexit(td, SIGILL);
1041 if ((tf->tf_flags & FRAME_SYSCALL) == 0) {
1042 tf->tf_special.psr &= ~IA64_PSR_RI;
1043 tf->tf_special.iip = ia64_get_k5() +
1044 ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page);
1046 tf->tf_special.iip = ia64_get_k5() +
1047 ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page);
1050 * Setup the trapframe to return to the signal trampoline. We pass
1051 * information to the trampoline in the following registers:
1053 * gp new backing store or NULL
1055 * r9 signal code or siginfo pointer
1056 * r10 signal handler (function descriptor)
1058 tf->tf_special.sp = (u_int64_t)sfp - 16;
1059 tf->tf_special.gp = sbs;
1060 tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore;
1061 tf->tf_special.ndirty = 0;
1062 tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat;
1063 tf->tf_scratch.gr8 = sig;
1064 tf->tf_scratch.gr9 = code;
1065 tf->tf_scratch.gr10 = (u_int64_t)catcher;
1068 mtx_lock(&psp->ps_mtx);
1072 * System call to cleanup state after a signal
1073 * has been taken. Reset signal mask and
1074 * stack state from context left by sendsig (above).
1075 * Return to previous pc and psl as specified by
1076 * context left by sendsig. Check carefully to
1077 * make sure that the user has not modified the
1078 * state to gain improper privileges.
1083 sys_sigreturn(struct thread *td,
1084 struct sigreturn_args /* {
1085 ucontext_t *sigcntxp;
1089 struct trapframe *tf;
1096 * Fetch the entire context structure at once for speed.
1097 * We don't use a normal argument to simplify RSE handling.
1099 if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc)))
1102 set_mcontext(td, &uc.uc_mcontext);
1104 #if defined(COMPAT_43)
1105 if (sigonstack(tf->tf_special.sp))
1106 td->td_sigstk.ss_flags |= SS_ONSTACK;
1108 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1110 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
1112 return (EJUSTRETURN);
1115 #ifdef COMPAT_FREEBSD4
1117 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
1120 return sys_sigreturn(td, (struct sigreturn_args *)uap);
1125 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1126 * we want to start a backtrace from the function that caused us to enter
1127 * the debugger. We have the context in the trapframe, but base the trace
1128 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1129 * enough for a backtrace.
1132 makectx(struct trapframe *tf, struct pcb *pcb)
1135 pcb->pcb_special = tf->tf_special;
1136 pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */
1137 save_callee_saved(&pcb->pcb_preserved);
1138 save_callee_saved_fp(&pcb->pcb_preserved_fp);
1142 ia64_flush_dirty(struct thread *td, struct _special *r)
1146 uint64_t bspst, kstk, rnat;
1152 kstk = td->td_kstack + (r->bspstore & 0x1ffUL);
1153 if (td == curthread) {
1154 __asm __volatile("mov ar.rsc=0;;");
1155 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst));
1156 /* Make sure we have all the user registers written out. */
1157 if (bspst - kstk < r->ndirty) {
1158 __asm __volatile("flushrs;;");
1159 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst));
1161 __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat));
1162 __asm __volatile("mov ar.rsc=3");
1163 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty);
1165 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL))
1166 ? *(uint64_t*)(kstk | 0x1f8L) : rnat;
1168 locked = PROC_LOCKED(td->td_proc);
1171 iov.iov_base = (void*)(uintptr_t)kstk;
1172 iov.iov_len = r->ndirty;
1175 uio.uio_offset = r->bspstore;
1176 uio.uio_resid = r->ndirty;
1177 uio.uio_segflg = UIO_SYSSPACE;
1178 uio.uio_rw = UIO_WRITE;
1180 error = proc_rwmem(td->td_proc, &uio);
1182 * XXX proc_rwmem() doesn't currently return ENOSPC,
1183 * so I think it can bogusly return 0. Neither do
1184 * we allow short writes.
1186 if (uio.uio_resid != 0 && error == 0)
1192 r->bspstore += r->ndirty;
1198 get_mcontext(struct thread *td, mcontext_t *mc, int flags)
1200 struct trapframe *tf;
1204 bzero(mc, sizeof(*mc));
1205 mc->mc_special = tf->tf_special;
1206 error = ia64_flush_dirty(td, &mc->mc_special);
1207 if (tf->tf_flags & FRAME_SYSCALL) {
1208 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT;
1209 mc->mc_scratch = tf->tf_scratch;
1210 if (flags & GET_MC_CLEAR_RET) {
1211 mc->mc_scratch.gr8 = 0;
1212 mc->mc_scratch.gr9 = 0;
1213 mc->mc_scratch.gr10 = 0;
1214 mc->mc_scratch.gr11 = 0;
1217 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT;
1218 mc->mc_scratch = tf->tf_scratch;
1219 mc->mc_scratch_fp = tf->tf_scratch_fp;
1221 * XXX If the thread never used the high FP registers, we
1222 * probably shouldn't waste time saving them.
1224 ia64_highfp_save(td);
1225 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID;
1226 mc->mc_high_fp = td->td_pcb->pcb_high_fp;
1228 save_callee_saved(&mc->mc_preserved);
1229 save_callee_saved_fp(&mc->mc_preserved_fp);
1234 set_mcontext(struct thread *td, const mcontext_t *mc)
1237 struct trapframe *tf;
1242 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1243 ("Whoa there! We have more than 8KB of dirty registers!"));
1247 * Only copy the user mask and the restart instruction bit from
1250 psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL |
1251 IA64_PSR_MFH | IA64_PSR_RI;
1252 s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask);
1253 /* We don't have any dirty registers of the new context. */
1255 if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) {
1257 * We can get an async context passed to us while we
1258 * entered the kernel through a syscall: sigreturn(2)
1259 * takes contexts that could previously be the result of
1260 * a trap or interrupt.
1261 * Hence, we cannot assert that the trapframe is not
1262 * a syscall frame, but we can assert that it's at
1263 * least an expected syscall.
1265 if (tf->tf_flags & FRAME_SYSCALL) {
1266 KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo"));
1267 tf->tf_flags &= ~FRAME_SYSCALL;
1269 tf->tf_scratch = mc->mc_scratch;
1270 tf->tf_scratch_fp = mc->mc_scratch_fp;
1271 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID)
1272 td->td_pcb->pcb_high_fp = mc->mc_high_fp;
1274 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo"));
1275 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) {
1276 s.cfm = tf->tf_special.cfm;
1277 s.iip = tf->tf_special.iip;
1278 tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */
1280 tf->tf_scratch = mc->mc_scratch;
1283 restore_callee_saved(&mc->mc_preserved);
1284 restore_callee_saved_fp(&mc->mc_preserved_fp);
1290 * Clear registers on exec.
1293 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1295 struct trapframe *tf;
1296 uint64_t *ksttop, *kst;
1299 ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty +
1300 (tf->tf_special.bspstore & 0x1ffUL));
1303 * We can ignore up to 8KB of dirty registers by masking off the
1304 * lower 13 bits in exception_restore() or epc_syscall(). This
1305 * should be enough for a couple of years, but if there are more
1306 * than 8KB of dirty registers, we lose track of the bottom of
1307 * the kernel stack. The solution is to copy the active part of
1308 * the kernel stack down 1 page (or 2, but not more than that)
1309 * so that we always have less than 8KB of dirty registers.
1311 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0,
1312 ("Whoa there! We have more than 8KB of dirty registers!"));
1314 bzero(&tf->tf_special, sizeof(tf->tf_special));
1315 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */
1316 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch));
1317 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp));
1318 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL;
1319 tf->tf_special.bspstore = IA64_BACKINGSTORE;
1321 * Copy the arguments onto the kernel register stack so that
1322 * they get loaded by the loadrs instruction. Skip over the
1323 * NaT collection points.
1326 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1329 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1331 *kst-- = imgp->ps_strings;
1332 if (((uintptr_t)kst & 0x1ff) == 0x1f8)
1335 tf->tf_special.ndirty = (ksttop - kst) << 3;
1336 } else { /* epc syscalls (default). */
1337 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL;
1338 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24;
1340 * Write values for out0, out1 and out2 to the user's backing
1341 * store and arrange for them to be restored into the user's
1342 * initial register frame.
1343 * Assumes that (bspstore & 0x1f8) < 0x1e0.
1345 suword((caddr_t)tf->tf_special.bspstore - 24, stack);
1346 suword((caddr_t)tf->tf_special.bspstore - 16, imgp->ps_strings);
1347 suword((caddr_t)tf->tf_special.bspstore - 8, 0);
1350 tf->tf_special.iip = imgp->entry_addr;
1351 tf->tf_special.sp = (stack & ~15) - 16;
1352 tf->tf_special.rsc = 0xf;
1353 tf->tf_special.fpsr = IA64_FPSR_DEFAULT;
1354 tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT |
1355 IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN |
1360 ptrace_set_pc(struct thread *td, unsigned long addr)
1364 switch (addr & 0xFUL) {
1366 slot = IA64_PSR_RI_0;
1369 /* XXX we need to deal with MLX bundles here */
1370 slot = IA64_PSR_RI_1;
1373 slot = IA64_PSR_RI_2;
1379 td->td_frame->tf_special.iip = addr & ~0x0FULL;
1380 td->td_frame->tf_special.psr =
1381 (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot;
1386 ptrace_single_step(struct thread *td)
1388 struct trapframe *tf;
1391 * There's no way to set single stepping when we're leaving the
1392 * kernel through the EPC syscall path. The way we solve this is
1393 * by enabling the lower-privilege trap so that we re-enter the
1394 * kernel as soon as the privilege level changes. See trap.c for
1395 * how we proceed from there.
1398 if (tf->tf_flags & FRAME_SYSCALL)
1399 tf->tf_special.psr |= IA64_PSR_LP;
1401 tf->tf_special.psr |= IA64_PSR_SS;
1406 ptrace_clear_single_step(struct thread *td)
1408 struct trapframe *tf;
1411 * Clear any and all status bits we may use to implement single
1415 tf->tf_special.psr &= ~IA64_PSR_SS;
1416 tf->tf_special.psr &= ~IA64_PSR_LP;
1417 tf->tf_special.psr &= ~IA64_PSR_TB;
1422 fill_regs(struct thread *td, struct reg *regs)
1424 struct trapframe *tf;
1427 regs->r_special = tf->tf_special;
1428 regs->r_scratch = tf->tf_scratch;
1429 save_callee_saved(®s->r_preserved);
1434 set_regs(struct thread *td, struct reg *regs)
1436 struct trapframe *tf;
1440 error = ia64_flush_dirty(td, &tf->tf_special);
1442 tf->tf_special = regs->r_special;
1443 tf->tf_special.bspstore += tf->tf_special.ndirty;
1444 tf->tf_special.ndirty = 0;
1445 tf->tf_scratch = regs->r_scratch;
1446 restore_callee_saved(®s->r_preserved);
1452 fill_dbregs(struct thread *td, struct dbreg *dbregs)
1459 set_dbregs(struct thread *td, struct dbreg *dbregs)
1466 fill_fpregs(struct thread *td, struct fpreg *fpregs)
1468 struct trapframe *frame = td->td_frame;
1469 struct pcb *pcb = td->td_pcb;
1471 /* Save the high FP registers. */
1472 ia64_highfp_save(td);
1474 fpregs->fpr_scratch = frame->tf_scratch_fp;
1475 save_callee_saved_fp(&fpregs->fpr_preserved);
1476 fpregs->fpr_high = pcb->pcb_high_fp;
1481 set_fpregs(struct thread *td, struct fpreg *fpregs)
1483 struct trapframe *frame = td->td_frame;
1484 struct pcb *pcb = td->td_pcb;
1486 /* Throw away the high FP registers (should be redundant). */
1487 ia64_highfp_drop(td);
1489 frame->tf_scratch_fp = fpregs->fpr_scratch;
1490 restore_callee_saved_fp(&fpregs->fpr_preserved);
1491 pcb->pcb_high_fp = fpregs->fpr_high;
1496 ia64_sync_icache(vm_offset_t va, vm_offset_t sz)
1500 if (!ia64_sync_icache_needed)