2 * Copyright (c) 1988 University of Utah.
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department and Ralph Campbell.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * from: Utah $Hdr: vmparam.h 1.16 91/01/18$
36 * @(#)vmparam.h 8.2 (Berkeley) 4/22/94
41 #ifndef _MACHINE_VMPARAM_H_
42 #define _MACHINE_VMPARAM_H_
45 * Virtual memory related constants, all in bytes
48 #define MAXTSIZ (1<<30) /* max text size (1G) */
51 #define DFLDSIZ (1<<27) /* initial data size (128M) */
54 #define MAXDSIZ (1<<30) /* max data size (1G) */
57 #define DFLSSIZ (1<<21) /* initial stack size (2M) */
60 #define MAXSSIZ (1<<28) /* max stack size (256M) */
63 #define SGROWSIZ (128UL*1024) /* amount to grow stack */
67 * We need region 7 virtual addresses for pagetables.
69 #define UMA_MD_SMALL_ALLOC
72 * The physical address space is sparsely populated.
74 #define VM_PHYSSEG_SPARSE
77 * The number of PHYSSEG entries is equal to the number of phys_avail
80 #define VM_PHYSSEG_MAX 49
83 * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
84 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
85 * the pool from which physical pages for small UMA objects are
88 #define VM_NFREEPOOL 3
89 #define VM_FREEPOOL_CACHE 2
90 #define VM_FREEPOOL_DEFAULT 0
91 #define VM_FREEPOOL_DIRECT 1
94 * Create one free page list.
96 #define VM_NFREELIST 1
97 #define VM_FREELIST_DEFAULT 0
100 * An allocation size of 256MB is supported in order to optimize the
101 * use of the identity mappings in region 7 by UMA.
103 #define VM_NFREEORDER 16
106 * Disable superpage reservations.
108 #ifndef VM_NRESERVLEVEL
109 #define VM_NRESERVLEVEL 0
112 #define IA64_VM_MINKERN_REGION 4
115 * Manipulating region bits of an address.
117 #define IA64_RR_BASE(n) (((uint64_t) (n)) << 61)
118 #define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1))
120 #define IA64_PHYS_TO_RR6(x) ((x) | IA64_RR_BASE(6))
121 #define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7))
124 * The Itanium architecture defines that all implementations support at
125 * least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented
126 * bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in
127 * the virtual address range, which extends at most from 0x0004000000000000
128 * to 0x1ffbffffffffffff. We define the top half of a region in terms of
129 * this worst-case gap.
131 #define IA64_REGION_GAP_START 0x0004000000000000
132 #define IA64_REGION_GAP_EXTEND 0x1ffc000000000000
135 * Parameters for Pre-Boot Virtual Memory (PBVM).
136 * The kernel, its modules and metadata are loaded in the PBVM by the loader.
137 * The PBVM consists of pages for which the mapping is maintained in a page
138 * table. The page table is at least 1 EFI page large (i.e. 4KB), but can be
139 * larger to accommodate more PBVM. The maximum page table size is 1MB. With
140 * 8 bytes per page table entry, this means that the PBVM has at least 512
141 * pages and at most 128K pages.
142 * The GNU toolchain (in particular GNU ld) does not support an alignment
143 * larger than 64K. This means that we cannot guarantee page alignment for
144 * a page size that's larger than 64K. We do want to have text and data in
145 * different pages, which means that the maximum usable page size is 64KB.
147 * The maximum total PBVM size is 8GB -- enough for a DVD image. A page table
148 * of a single EFI page (4KB) allows for 32MB of PBVM.
150 * The kernel is given the PA and size of the page table that provides the
151 * mapping of the PBVM. The page table itself is assumed to be mapped at a
152 * known virtual address and using a single translation wired into the CPU.
153 * As such, the page table is assumed to be a power of 2 and naturally aligned.
154 * The kernel also assumes that a good portion of the kernel text is mapped
155 * and wired into the CPU, but does not assume that the mapping covers the
158 #define IA64_PBVM_RR IA64_VM_MINKERN_REGION
159 #define IA64_PBVM_BASE \
160 (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_GAP_EXTEND)
162 #define IA64_PBVM_PGTBL_MAXSZ 1048576
163 #define IA64_PBVM_PGTBL \
164 (IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ)
166 #define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */
167 #define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT)
168 #define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1)
171 * Mach derived constants
174 /* user/kernel map constants */
175 #define VM_MIN_ADDRESS 0
176 #define VM_MAXUSER_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION)
177 #define VM_MIN_KERNEL_ADDRESS VM_MAXUSER_ADDRESS
178 #define VM_INIT_KERNEL_ADDRESS IA64_RR_BASE(IA64_VM_MINKERN_REGION + 1)
179 #define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(IA64_VM_MINKERN_REGION + 2) - 1)
180 #define VM_MAX_ADDRESS ~0UL
182 /* We link the kernel at IA64_PBVM_BASE. */
183 #define KERNBASE IA64_PBVM_BASE
186 * USRSTACK is the top (end) of the user stack. Immediately above the user
187 * stack resides the syscall gateway page.
189 #define USRSTACK VM_MAXUSER_ADDRESS
190 #define IA64_BACKINGSTORE (USRSTACK - (2 * MAXSSIZ) - PAGE_SIZE)
193 * How many physical pages per kmem arena virtual page.
195 #ifndef VM_KMEM_SIZE_SCALE
196 #define VM_KMEM_SIZE_SCALE (4)
199 /* initial pagein size of beginning of executable file */
200 #ifndef VM_INITIAL_PAGEIN
201 #define VM_INITIAL_PAGEIN 16
204 #define ZERO_REGION_SIZE (2 * 1024 * 1024) /* 2MB */
206 #endif /* !_MACHINE_VMPARAM_H_ */