2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2009, Luiz Otavio O Souza.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * GPIO driver for AR71xx
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
44 #include <sys/mutex.h>
47 #include <machine/bus.h>
48 #include <machine/resource.h>
49 #include <mips/atheros/ar71xxreg.h>
50 #include <mips/atheros/ar71xx_setup.h>
51 #include <mips/atheros/ar71xx_gpiovar.h>
55 #define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
57 struct ar71xx_gpio_pin {
63 static struct ar71xx_gpio_pin ar71xx_gpio_pins[] = {
64 { "RFled", 2, GPIO_PIN_OUTPUT},
65 { "SW4", 8, GPIO_PIN_INPUT},
72 static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc,
74 static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc,
76 static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc,
77 struct gpio_pin *pin, uint32_t flags);
82 static int ar71xx_gpio_probe(device_t dev);
83 static int ar71xx_gpio_attach(device_t dev);
84 static int ar71xx_gpio_detach(device_t dev);
85 static int ar71xx_gpio_filter(void *arg);
86 static void ar71xx_gpio_intr(void *arg);
91 static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
92 static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
93 static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
95 static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
96 static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
97 static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
98 static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
99 static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
102 ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
105 GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
110 ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
113 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
118 ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
123 mask = 1 << pin->gp_pin;
127 * Manage input/output
129 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
130 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
131 if (flags & GPIO_PIN_OUTPUT) {
132 pin->gp_flags |= GPIO_PIN_OUTPUT;
133 GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
136 pin->gp_flags |= GPIO_PIN_INPUT;
137 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
145 ar71xx_gpio_pin_max(device_t dev, int *maxpin)
148 switch (ar71xx_soc) {
149 case AR71XX_SOC_AR9130:
150 case AR71XX_SOC_AR9132:
151 *maxpin = AR91XX_GPIO_PINS - 1;
153 case AR71XX_SOC_AR7240:
154 case AR71XX_SOC_AR7241:
155 case AR71XX_SOC_AR7242:
156 *maxpin = AR724X_GPIO_PINS - 1;
159 *maxpin = AR71XX_GPIO_PINS - 1;
165 ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
167 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
170 for (i = 0; i < sc->gpio_npins; i++) {
171 if (sc->gpio_pins[i].gp_pin == pin)
175 if (i >= sc->gpio_npins)
179 *caps = sc->gpio_pins[i].gp_caps;
186 ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
188 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
191 for (i = 0; i < sc->gpio_npins; i++) {
192 if (sc->gpio_pins[i].gp_pin == pin)
196 if (i >= sc->gpio_npins)
200 *flags = sc->gpio_pins[i].gp_flags;
207 ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
209 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
212 for (i = 0; i < sc->gpio_npins; i++) {
213 if (sc->gpio_pins[i].gp_pin == pin)
217 if (i >= sc->gpio_npins)
221 memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
228 ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
231 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
233 for (i = 0; i < sc->gpio_npins; i++) {
234 if (sc->gpio_pins[i].gp_pin == pin)
238 if (i >= sc->gpio_npins)
241 /* Check for unwanted flags. */
242 if ((flags & sc->gpio_pins[i].gp_caps) != flags)
245 /* Can't mix input/output together */
246 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
247 (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
250 ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
255 ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
257 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
260 for (i = 0; i < sc->gpio_npins; i++) {
261 if (sc->gpio_pins[i].gp_pin == pin)
265 if (i >= sc->gpio_npins)
270 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
272 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
279 ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
281 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
284 for (i = 0; i < sc->gpio_npins; i++) {
285 if (sc->gpio_pins[i].gp_pin == pin)
289 if (i >= sc->gpio_npins)
293 *val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
300 ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
303 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
305 for (i = 0; i < sc->gpio_npins; i++) {
306 if (sc->gpio_pins[i].gp_pin == pin)
310 if (i >= sc->gpio_npins)
314 res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
316 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
318 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
325 ar71xx_gpio_filter(void *arg)
328 /* TODO: something useful */
329 return (FILTER_STRAY);
335 ar71xx_gpio_intr(void *arg)
337 struct ar71xx_gpio_softc *sc = arg;
339 /* TODO: something useful */
344 ar71xx_gpio_probe(device_t dev)
347 device_set_desc(dev, "Atheros AR71XX GPIO driver");
352 ar71xx_gpio_attach(device_t dev)
354 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
356 struct ar71xx_gpio_pin *pinp;
359 KASSERT((device_get_unit(dev) == 0),
360 ("ar71xx_gpio: Only one gpio module supported"));
362 mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
365 /* Map control/status registers. */
366 sc->gpio_mem_rid = 0;
367 sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
368 &sc->gpio_mem_rid, RF_ACTIVE);
370 if (sc->gpio_mem_res == NULL) {
371 device_printf(dev, "couldn't map memory\n");
373 ar71xx_gpio_detach(dev);
377 if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
378 &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
379 device_printf(dev, "unable to allocate IRQ resource\n");
383 if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC,
384 ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
386 "WARNING: unable to register interrupt handler\n");
391 ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS1_EN);
392 ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS2_EN);
393 /* Configure all pins as input */
394 /* disable interrupts for all pins */
395 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
396 pinp = ar71xx_gpio_pins;
399 strncpy(sc->gpio_pins[i].gp_name, pinp->name, GPIOMAXNAME);
400 sc->gpio_pins[i].gp_pin = pinp->pin;
401 sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
402 sc->gpio_pins[i].gp_flags = 0;
403 ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], pinp->flags);
410 device_add_child(dev, "gpioc", device_get_unit(dev));
411 device_add_child(dev, "gpiobus", device_get_unit(dev));
412 return (bus_generic_attach(dev));
416 ar71xx_gpio_detach(device_t dev)
418 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
420 KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
422 ar71xx_gpio_function_disable(sc, GPIO_FUNC_SPI_CS1_EN);
423 ar71xx_gpio_function_disable(sc, GPIO_FUNC_SPI_CS2_EN);
424 bus_generic_detach(dev);
426 if (sc->gpio_mem_res)
427 bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
430 mtx_destroy(&sc->gpio_mtx);
435 static device_method_t ar71xx_gpio_methods[] = {
436 DEVMETHOD(device_probe, ar71xx_gpio_probe),
437 DEVMETHOD(device_attach, ar71xx_gpio_attach),
438 DEVMETHOD(device_detach, ar71xx_gpio_detach),
441 DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
442 DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
443 DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
444 DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
445 DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
446 DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
447 DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
448 DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
452 static driver_t ar71xx_gpio_driver = {
455 sizeof(struct ar71xx_gpio_softc),
457 static devclass_t ar71xx_gpio_devclass;
459 DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);